xref: /OK3568_Linux_fs/kernel/sound/soc/rockchip/rockchip_multi_dais_pcm.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * ALSA SoC Audio Layer - Rockchip Multi-DAIS-PCM driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2018 Rockchip Electronics Co. Ltd.
6*4882a593Smuzhiyun  * Author: Sugar Zhang <sugar.zhang@rock-chips.com>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/dmaengine.h>
12*4882a593Smuzhiyun #include <linux/dma-mapping.h>
13*4882a593Smuzhiyun #include <sound/dmaengine_pcm.h>
14*4882a593Smuzhiyun #include <sound/pcm.h>
15*4882a593Smuzhiyun #include <sound/pcm_params.h>
16*4882a593Smuzhiyun #include <sound/soc.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include "rockchip_multi_dais.h"
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #define MAX_FIFO_SIZE	32 /* max fifo size in frames */
21*4882a593Smuzhiyun #define SND_DMAENGINE_MPCM_DRV_NAME "snd_dmaengine_mpcm"
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun struct dmaengine_mpcm {
24*4882a593Smuzhiyun 	struct rk_mdais_dev *mdais;
25*4882a593Smuzhiyun 	struct dma_chan *tx_chans[MAX_DAIS];
26*4882a593Smuzhiyun 	struct dma_chan *rx_chans[MAX_DAIS];
27*4882a593Smuzhiyun 	struct snd_soc_component component;
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun struct dmaengine_mpcm_runtime_data {
31*4882a593Smuzhiyun 	struct dma_chan *chans[MAX_DAIS];
32*4882a593Smuzhiyun 	dma_cookie_t cookies[MAX_DAIS];
33*4882a593Smuzhiyun 	unsigned int *channel_maps;
34*4882a593Smuzhiyun 	int num_chans;
35*4882a593Smuzhiyun 	unsigned int pos;
36*4882a593Smuzhiyun 	unsigned int master_chan;
37*4882a593Smuzhiyun 	bool start_flag;
38*4882a593Smuzhiyun #ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
39*4882a593Smuzhiyun 	unsigned int vpos;
40*4882a593Smuzhiyun 	unsigned int vresidue_bytes;
41*4882a593Smuzhiyun #endif
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun 
substream_to_prtd(const struct snd_pcm_substream * substream)44*4882a593Smuzhiyun static inline struct dmaengine_mpcm_runtime_data *substream_to_prtd(
45*4882a593Smuzhiyun 	const struct snd_pcm_substream *substream)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun 	return substream->runtime->private_data;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun 
soc_component_to_mpcm(struct snd_soc_component * p)50*4882a593Smuzhiyun static struct dmaengine_mpcm *soc_component_to_mpcm(struct snd_soc_component *p)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun 	return container_of(p, struct dmaengine_mpcm, component);
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun 
to_chan(struct dmaengine_mpcm * pcm,struct snd_pcm_substream * substream)55*4882a593Smuzhiyun static struct dma_chan *to_chan(struct dmaengine_mpcm *pcm,
56*4882a593Smuzhiyun 				struct snd_pcm_substream *substream)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun 	struct dma_chan *chan = NULL;
59*4882a593Smuzhiyun 	int i;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	for (i = 0; i < pcm->mdais->num_dais; i++) {
62*4882a593Smuzhiyun 		chan = substream->stream ? pcm->rx_chans[i] : pcm->tx_chans[i];
63*4882a593Smuzhiyun 		if (chan)
64*4882a593Smuzhiyun 			break;
65*4882a593Smuzhiyun 	}
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	return chan;
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun 
dmaengine_dma_dev(struct dmaengine_mpcm * pcm,struct snd_pcm_substream * substream)70*4882a593Smuzhiyun static struct device *dmaengine_dma_dev(struct dmaengine_mpcm *pcm,
71*4882a593Smuzhiyun 					struct snd_pcm_substream *substream)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun 	struct dma_chan *chan;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	chan = to_chan(pcm, substream);
76*4882a593Smuzhiyun 	if (!chan)
77*4882a593Smuzhiyun 		return NULL;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	return chan->device->dev;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun 
snd_dmaengine_mpcm_set_config_from_dai_data(const struct snd_pcm_substream * substream,const struct snd_dmaengine_dai_dma_data * dma_data,struct dma_slave_config * slave_config)82*4882a593Smuzhiyun static void snd_dmaengine_mpcm_set_config_from_dai_data(
83*4882a593Smuzhiyun 	const struct snd_pcm_substream *substream,
84*4882a593Smuzhiyun 	const struct snd_dmaengine_dai_dma_data *dma_data,
85*4882a593Smuzhiyun 	struct dma_slave_config *slave_config)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
88*4882a593Smuzhiyun 		slave_config->dst_addr = dma_data->addr;
89*4882a593Smuzhiyun 		if (dma_data->addr_width != DMA_SLAVE_BUSWIDTH_UNDEFINED)
90*4882a593Smuzhiyun 			slave_config->dst_addr_width = dma_data->addr_width;
91*4882a593Smuzhiyun 	} else {
92*4882a593Smuzhiyun 		slave_config->src_addr = dma_data->addr;
93*4882a593Smuzhiyun 		if (dma_data->addr_width != DMA_SLAVE_BUSWIDTH_UNDEFINED)
94*4882a593Smuzhiyun 			slave_config->src_addr_width = dma_data->addr_width;
95*4882a593Smuzhiyun 	}
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	slave_config->slave_id = dma_data->slave_id;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
dmaengine_mpcm_dma_complete(void * arg)100*4882a593Smuzhiyun static void dmaengine_mpcm_dma_complete(void *arg)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun 	struct snd_pcm_substream *substream = arg;
103*4882a593Smuzhiyun #ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
104*4882a593Smuzhiyun 	struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	if (snd_pcm_vad_attached(substream) &&
107*4882a593Smuzhiyun 	    substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
108*4882a593Smuzhiyun 		void *buf = substream->runtime->dma_area + prtd->pos;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 		snd_pcm_vad_preprocess(substream, buf,
111*4882a593Smuzhiyun 				       substream->runtime->period_size);
112*4882a593Smuzhiyun 	}
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	prtd->pos += snd_pcm_lib_period_bytes(substream);
115*4882a593Smuzhiyun 	if (prtd->pos >= snd_pcm_lib_buffer_bytes(substream))
116*4882a593Smuzhiyun 		prtd->pos = 0;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun #endif
119*4882a593Smuzhiyun 	snd_pcm_period_elapsed(substream);
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun 
dmaengine_mpcm_get_master_chan(struct dmaengine_mpcm_runtime_data * prtd)122*4882a593Smuzhiyun static void dmaengine_mpcm_get_master_chan(struct dmaengine_mpcm_runtime_data *prtd)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun 	int i;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	for (i = prtd->num_chans; i > 0; i--) {
127*4882a593Smuzhiyun 		if (prtd->chans[i - 1]) {
128*4882a593Smuzhiyun 			prtd->master_chan = i - 1;
129*4882a593Smuzhiyun 			break;
130*4882a593Smuzhiyun 		}
131*4882a593Smuzhiyun 	}
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun 
dmaengine_mpcm_prepare_and_submit(struct snd_pcm_substream * substream)134*4882a593Smuzhiyun static int dmaengine_mpcm_prepare_and_submit(struct snd_pcm_substream *substream)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun 	struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
137*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
138*4882a593Smuzhiyun 	struct dma_async_tx_descriptor *desc = NULL;
139*4882a593Smuzhiyun 	enum dma_transfer_direction direction;
140*4882a593Smuzhiyun 	unsigned long flags = DMA_CTRL_ACK;
141*4882a593Smuzhiyun 	unsigned int *maps = prtd->channel_maps;
142*4882a593Smuzhiyun 	int offset, buffer_bytes, period_bytes;
143*4882a593Smuzhiyun 	int i;
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	direction = snd_pcm_substream_to_dma_direction(substream);
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	if (!substream->runtime->no_period_wakeup)
148*4882a593Smuzhiyun 		flags |= DMA_PREP_INTERRUPT;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	prtd->pos = 0;
151*4882a593Smuzhiyun 	offset = 0;
152*4882a593Smuzhiyun 	period_bytes = snd_pcm_lib_period_bytes(substream);
153*4882a593Smuzhiyun 	buffer_bytes = snd_pcm_lib_buffer_bytes(substream);
154*4882a593Smuzhiyun 	for (i = 0; i < prtd->num_chans; i++) {
155*4882a593Smuzhiyun 		if (!prtd->chans[i])
156*4882a593Smuzhiyun 			continue;
157*4882a593Smuzhiyun 		desc = dmaengine_prep_dma_cyclic(prtd->chans[i],
158*4882a593Smuzhiyun 						 runtime->dma_addr + offset,
159*4882a593Smuzhiyun 						 buffer_bytes, period_bytes,
160*4882a593Smuzhiyun 						 direction, flags);
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 		if (!desc)
163*4882a593Smuzhiyun 			return -ENOMEM;
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 		prtd->cookies[i] = dmaengine_submit(desc);
166*4882a593Smuzhiyun 		offset += samples_to_bytes(runtime, maps[i]);
167*4882a593Smuzhiyun 	}
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	if (desc) {
170*4882a593Smuzhiyun 		desc->callback = dmaengine_mpcm_dma_complete;
171*4882a593Smuzhiyun 		desc->callback_param = substream;
172*4882a593Smuzhiyun 		dmaengine_mpcm_get_master_chan(prtd);
173*4882a593Smuzhiyun 	} else {
174*4882a593Smuzhiyun 		return -ENOMEM;
175*4882a593Smuzhiyun 	}
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	return 0;
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun 
mpcm_dma_async_issue_pending(struct dmaengine_mpcm_runtime_data * prtd)180*4882a593Smuzhiyun static void mpcm_dma_async_issue_pending(struct dmaengine_mpcm_runtime_data *prtd)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun 	int i;
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	for (i = 0; i < prtd->num_chans; i++) {
185*4882a593Smuzhiyun 		if (prtd->chans[i])
186*4882a593Smuzhiyun 			dma_async_issue_pending(prtd->chans[i]);
187*4882a593Smuzhiyun 	}
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun 
mpcm_dmaengine_resume(struct dmaengine_mpcm_runtime_data * prtd)190*4882a593Smuzhiyun static void mpcm_dmaengine_resume(struct dmaengine_mpcm_runtime_data *prtd)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun 	int i;
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	for (i = 0; i < prtd->num_chans; i++) {
195*4882a593Smuzhiyun 		if (prtd->chans[i])
196*4882a593Smuzhiyun 			dmaengine_resume(prtd->chans[i]);
197*4882a593Smuzhiyun 	}
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun 
mpcm_dmaengine_pause(struct dmaengine_mpcm_runtime_data * prtd)200*4882a593Smuzhiyun static void mpcm_dmaengine_pause(struct dmaengine_mpcm_runtime_data *prtd)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun 	int i;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	for (i = 0; i < prtd->num_chans; i++) {
205*4882a593Smuzhiyun 		if (prtd->chans[i])
206*4882a593Smuzhiyun 			dmaengine_pause(prtd->chans[i]);
207*4882a593Smuzhiyun 	}
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
mpcm_dmaengine_terminate_all(struct dmaengine_mpcm_runtime_data * prtd)210*4882a593Smuzhiyun static void mpcm_dmaengine_terminate_all(struct dmaengine_mpcm_runtime_data *prtd)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun 	int i;
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	for (i = 0; i < prtd->num_chans; i++) {
215*4882a593Smuzhiyun 		if (prtd->chans[i])
216*4882a593Smuzhiyun 			dmaengine_terminate_all(prtd->chans[i]);
217*4882a593Smuzhiyun 	}
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun #ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
dmaengine_mpcm_single_dma_complete(void * arg)221*4882a593Smuzhiyun static void dmaengine_mpcm_single_dma_complete(void *arg)
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun 	struct snd_pcm_substream *substream = arg;
224*4882a593Smuzhiyun 	struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
225*4882a593Smuzhiyun 	unsigned int pos, size;
226*4882a593Smuzhiyun 	void *buf;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	if (snd_pcm_vad_attached(substream) &&
229*4882a593Smuzhiyun 	    substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
230*4882a593Smuzhiyun 		buf = substream->runtime->dma_area + prtd->vpos;
231*4882a593Smuzhiyun 		pos = prtd->vpos + snd_pcm_lib_period_bytes(substream);
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 		if (pos <= snd_pcm_lib_buffer_bytes(substream))
234*4882a593Smuzhiyun 			size = substream->runtime->period_size;
235*4882a593Smuzhiyun 		else
236*4882a593Smuzhiyun 			size = bytes_to_frames(substream->runtime,
237*4882a593Smuzhiyun 					       prtd->vresidue_bytes);
238*4882a593Smuzhiyun 		snd_pcm_vad_preprocess(substream, buf, size);
239*4882a593Smuzhiyun 	}
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	prtd->vpos += snd_pcm_lib_period_bytes(substream);
242*4882a593Smuzhiyun 	if (prtd->vpos >= snd_pcm_lib_buffer_bytes(substream))
243*4882a593Smuzhiyun 		prtd->vpos = 0;
244*4882a593Smuzhiyun 	snd_pcm_period_elapsed(substream);
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun 
__mpcm_prepare_single_and_submit(struct snd_pcm_substream * substream,dma_addr_t buf_start,int size)247*4882a593Smuzhiyun static int __mpcm_prepare_single_and_submit(struct snd_pcm_substream *substream,
248*4882a593Smuzhiyun 					    dma_addr_t buf_start, int size)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun 	struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
251*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
252*4882a593Smuzhiyun 	struct dma_async_tx_descriptor *desc;
253*4882a593Smuzhiyun 	enum dma_transfer_direction direction;
254*4882a593Smuzhiyun 	unsigned long flags = DMA_CTRL_ACK;
255*4882a593Smuzhiyun 	unsigned int *maps = prtd->channel_maps;
256*4882a593Smuzhiyun 	int offset, i;
257*4882a593Smuzhiyun 	bool callback = false;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	direction = snd_pcm_substream_to_dma_direction(substream);
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	if (!substream->runtime->no_period_wakeup)
262*4882a593Smuzhiyun 		flags |= DMA_PREP_INTERRUPT;
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	offset = 0;
265*4882a593Smuzhiyun 	for (i = 0; i < prtd->num_chans; i++) {
266*4882a593Smuzhiyun 		if (!prtd->chans[i])
267*4882a593Smuzhiyun 			continue;
268*4882a593Smuzhiyun 		desc = dmaengine_prep_slave_single(prtd->chans[i],
269*4882a593Smuzhiyun 						   buf_start + offset,
270*4882a593Smuzhiyun 						   size,
271*4882a593Smuzhiyun 						   direction, flags);
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 		if (!desc)
274*4882a593Smuzhiyun 			return -ENOMEM;
275*4882a593Smuzhiyun 		if (!callback) {
276*4882a593Smuzhiyun 			desc->callback = dmaengine_mpcm_single_dma_complete;
277*4882a593Smuzhiyun 			desc->callback_param = substream;
278*4882a593Smuzhiyun 			callback = true;
279*4882a593Smuzhiyun 		}
280*4882a593Smuzhiyun 		dmaengine_submit(desc);
281*4882a593Smuzhiyun 		offset += samples_to_bytes(runtime, maps[i]);
282*4882a593Smuzhiyun 	}
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	return 0;
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun 
dmaengine_mpcm_prepare_single_and_submit(struct snd_pcm_substream * substream)287*4882a593Smuzhiyun static int dmaengine_mpcm_prepare_single_and_submit(struct snd_pcm_substream *substream)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun 	struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
290*4882a593Smuzhiyun 	enum dma_transfer_direction direction;
291*4882a593Smuzhiyun 	unsigned long flags = DMA_CTRL_ACK;
292*4882a593Smuzhiyun 	snd_pcm_uframes_t avail;
293*4882a593Smuzhiyun 	dma_addr_t buf_start, buf_end;
294*4882a593Smuzhiyun 	int offset, i, count, ret;
295*4882a593Smuzhiyun 	int buffer_bytes, period_bytes, residue_bytes;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	direction = snd_pcm_substream_to_dma_direction(substream);
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	if (!substream->runtime->no_period_wakeup)
300*4882a593Smuzhiyun 		flags |= DMA_PREP_INTERRUPT;
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	period_bytes = snd_pcm_lib_period_bytes(substream);
303*4882a593Smuzhiyun 	buffer_bytes = snd_pcm_lib_buffer_bytes(substream);
304*4882a593Smuzhiyun 	avail = snd_pcm_vad_avail(substream);
305*4882a593Smuzhiyun 	offset = frames_to_bytes(substream->runtime, avail);
306*4882a593Smuzhiyun 	prtd->vpos = offset;
307*4882a593Smuzhiyun 	buf_start = substream->runtime->dma_addr + offset;
308*4882a593Smuzhiyun 	buf_end = substream->runtime->dma_addr + snd_pcm_lib_buffer_bytes(substream);
309*4882a593Smuzhiyun 	count = (buf_end - buf_start) / period_bytes;
310*4882a593Smuzhiyun 	residue_bytes = (buf_end - buf_start) % period_bytes;
311*4882a593Smuzhiyun 	prtd->vresidue_bytes = residue_bytes;
312*4882a593Smuzhiyun 	pr_debug("%s: offset: %d, buffer_bytes: %d\n", __func__, offset, buffer_bytes);
313*4882a593Smuzhiyun 	pr_debug("%s: count: %d, residue_bytes: %d\n", __func__, count, residue_bytes);
314*4882a593Smuzhiyun 	for (i = 0; i < count; i++) {
315*4882a593Smuzhiyun 		ret = __mpcm_prepare_single_and_submit(substream, buf_start,
316*4882a593Smuzhiyun 						       period_bytes);
317*4882a593Smuzhiyun 		if (ret)
318*4882a593Smuzhiyun 			return ret;
319*4882a593Smuzhiyun 		buf_start += period_bytes;
320*4882a593Smuzhiyun 	}
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	if (residue_bytes) {
323*4882a593Smuzhiyun 		ret = __mpcm_prepare_single_and_submit(substream, buf_start,
324*4882a593Smuzhiyun 						       residue_bytes);
325*4882a593Smuzhiyun 		if (ret)
326*4882a593Smuzhiyun 			return ret;
327*4882a593Smuzhiyun 	}
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun 	return 0;
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun #endif
332*4882a593Smuzhiyun 
snd_dmaengine_mpcm_trigger(struct snd_soc_component * component,struct snd_pcm_substream * substream,int cmd)333*4882a593Smuzhiyun static int snd_dmaengine_mpcm_trigger(struct snd_soc_component *component,
334*4882a593Smuzhiyun 				      struct snd_pcm_substream *substream, int cmd)
335*4882a593Smuzhiyun {
336*4882a593Smuzhiyun 	struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
337*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
338*4882a593Smuzhiyun 	int ret;
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	switch (cmd) {
341*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_START:
342*4882a593Smuzhiyun #ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
343*4882a593Smuzhiyun 		if (substream->stream == SNDRV_PCM_STREAM_CAPTURE &&
344*4882a593Smuzhiyun 		    snd_pcm_vad_attached(substream) &&
345*4882a593Smuzhiyun 		    snd_pcm_vad_avail(substream)) {
346*4882a593Smuzhiyun 			dmaengine_mpcm_prepare_single_and_submit(substream);
347*4882a593Smuzhiyun 			mpcm_dma_async_issue_pending(prtd);
348*4882a593Smuzhiyun 		}
349*4882a593Smuzhiyun #endif
350*4882a593Smuzhiyun 		ret = dmaengine_mpcm_prepare_and_submit(substream);
351*4882a593Smuzhiyun 		if (ret)
352*4882a593Smuzhiyun 			return ret;
353*4882a593Smuzhiyun 		mpcm_dma_async_issue_pending(prtd);
354*4882a593Smuzhiyun 		break;
355*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_RESUME:
356*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
357*4882a593Smuzhiyun 		mpcm_dmaengine_resume(prtd);
358*4882a593Smuzhiyun 		break;
359*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_SUSPEND:
360*4882a593Smuzhiyun 		if (runtime->info & SNDRV_PCM_INFO_PAUSE)
361*4882a593Smuzhiyun 			mpcm_dmaengine_pause(prtd);
362*4882a593Smuzhiyun 		else
363*4882a593Smuzhiyun 			mpcm_dmaengine_terminate_all(prtd);
364*4882a593Smuzhiyun 		prtd->start_flag = false;
365*4882a593Smuzhiyun 		break;
366*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
367*4882a593Smuzhiyun 		mpcm_dmaengine_pause(prtd);
368*4882a593Smuzhiyun 		prtd->start_flag = false;
369*4882a593Smuzhiyun 		break;
370*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_STOP:
371*4882a593Smuzhiyun 		mpcm_dmaengine_terminate_all(prtd);
372*4882a593Smuzhiyun 		prtd->start_flag = false;
373*4882a593Smuzhiyun 		break;
374*4882a593Smuzhiyun 	default:
375*4882a593Smuzhiyun 		return -EINVAL;
376*4882a593Smuzhiyun 	}
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	return 0;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun 
dmaengine_mpcm_hw_params(struct snd_soc_component * component,struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params)381*4882a593Smuzhiyun static int dmaengine_mpcm_hw_params(struct snd_soc_component *component,
382*4882a593Smuzhiyun 				    struct snd_pcm_substream *substream,
383*4882a593Smuzhiyun 				    struct snd_pcm_hw_params *params)
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun 	struct dmaengine_mpcm *pcm = soc_component_to_mpcm(component);
386*4882a593Smuzhiyun 	struct dma_chan *chan;
387*4882a593Smuzhiyun 	struct snd_dmaengine_dai_dma_data *dma_data;
388*4882a593Smuzhiyun 	struct dma_slave_config slave_config;
389*4882a593Smuzhiyun 	snd_pcm_format_t format;
390*4882a593Smuzhiyun 	unsigned int *maps;
391*4882a593Smuzhiyun 	int frame_bytes;
392*4882a593Smuzhiyun 	int ret, num, i, sz;
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
395*4882a593Smuzhiyun 		maps = pcm->mdais->playback_channel_maps;
396*4882a593Smuzhiyun 	else
397*4882a593Smuzhiyun 		maps = pcm->mdais->capture_channel_maps;
398*4882a593Smuzhiyun 	format = params_format(params);
399*4882a593Smuzhiyun 	frame_bytes = snd_pcm_format_size(format, params_channels(params));
400*4882a593Smuzhiyun 	num = pcm->mdais->num_dais;
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 	for (i = 0; i < num; i++) {
403*4882a593Smuzhiyun 		memset(&slave_config, 0, sizeof(slave_config));
404*4882a593Smuzhiyun 		ret = snd_hwparams_to_dma_slave_config(substream, params,
405*4882a593Smuzhiyun 						       &slave_config);
406*4882a593Smuzhiyun 		if (ret)
407*4882a593Smuzhiyun 			return ret;
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 		dma_data = snd_soc_dai_get_dma_data(pcm->mdais->dais[i].dai,
410*4882a593Smuzhiyun 						    substream);
411*4882a593Smuzhiyun 		if (!dma_data)
412*4882a593Smuzhiyun 			continue;
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 		snd_dmaengine_mpcm_set_config_from_dai_data(substream,
415*4882a593Smuzhiyun 							    dma_data,
416*4882a593Smuzhiyun 							    &slave_config);
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun 		/* refine params for interlace access */
419*4882a593Smuzhiyun 		sz = snd_pcm_format_size(format, maps[i]);
420*4882a593Smuzhiyun 		if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
421*4882a593Smuzhiyun 			chan = pcm->tx_chans[i];
422*4882a593Smuzhiyun #ifdef CONFIG_NO_GKI
423*4882a593Smuzhiyun 			if (sz) {
424*4882a593Smuzhiyun 				slave_config.src_interlace_size = frame_bytes - sz;
425*4882a593Smuzhiyun 				if (slave_config.src_interlace_size)
426*4882a593Smuzhiyun 					slave_config.dst_maxburst = sz / slave_config.dst_addr_width;
427*4882a593Smuzhiyun 			}
428*4882a593Smuzhiyun #endif
429*4882a593Smuzhiyun 		} else {
430*4882a593Smuzhiyun 			chan = pcm->rx_chans[i];
431*4882a593Smuzhiyun #ifdef CONFIG_NO_GKI
432*4882a593Smuzhiyun 			if (sz) {
433*4882a593Smuzhiyun 				slave_config.dst_interlace_size = frame_bytes - sz;
434*4882a593Smuzhiyun 				if (slave_config.dst_interlace_size)
435*4882a593Smuzhiyun 					slave_config.src_maxburst = sz / slave_config.src_addr_width;
436*4882a593Smuzhiyun 			}
437*4882a593Smuzhiyun #endif
438*4882a593Smuzhiyun 		}
439*4882a593Smuzhiyun 		if (!chan)
440*4882a593Smuzhiyun 			continue;
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 		ret = dmaengine_slave_config(chan, &slave_config);
443*4882a593Smuzhiyun 		if (ret)
444*4882a593Smuzhiyun 			return ret;
445*4882a593Smuzhiyun 	}
446*4882a593Smuzhiyun 	return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun 
dmaengine_mpcm_set_runtime_hwparams(struct snd_pcm_substream * substream)449*4882a593Smuzhiyun static int dmaengine_mpcm_set_runtime_hwparams(struct snd_pcm_substream *substream)
450*4882a593Smuzhiyun {
451*4882a593Smuzhiyun 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
452*4882a593Smuzhiyun 	struct snd_soc_component *component =
453*4882a593Smuzhiyun 		snd_soc_rtdcom_lookup(rtd, SND_DMAENGINE_MPCM_DRV_NAME);
454*4882a593Smuzhiyun 	struct dmaengine_mpcm *pcm = soc_component_to_mpcm(component);
455*4882a593Smuzhiyun 	struct device *dma_dev = dmaengine_dma_dev(pcm, substream);
456*4882a593Smuzhiyun 	struct dma_chan *chan;
457*4882a593Smuzhiyun 	struct dma_slave_caps dma_caps;
458*4882a593Smuzhiyun 	struct snd_pcm_hardware hw;
459*4882a593Smuzhiyun 	u32 addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
460*4882a593Smuzhiyun 			  BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
461*4882a593Smuzhiyun 			  BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
462*4882a593Smuzhiyun 	snd_pcm_format_t i;
463*4882a593Smuzhiyun 	int ret;
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 	chan = to_chan(pcm, substream);
466*4882a593Smuzhiyun 	if (!chan)
467*4882a593Smuzhiyun 		return -EINVAL;
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	memset(&hw, 0, sizeof(hw));
470*4882a593Smuzhiyun 	hw.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
471*4882a593Smuzhiyun 			SNDRV_PCM_INFO_INTERLEAVED;
472*4882a593Smuzhiyun 	hw.periods_min = 2;
473*4882a593Smuzhiyun 	hw.periods_max = UINT_MAX;
474*4882a593Smuzhiyun 	hw.period_bytes_min = 256;
475*4882a593Smuzhiyun 	hw.period_bytes_max = dma_get_max_seg_size(dma_dev);
476*4882a593Smuzhiyun 	hw.buffer_bytes_max = SIZE_MAX;
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun 	ret = dma_get_slave_caps(chan, &dma_caps);
479*4882a593Smuzhiyun 	if (ret == 0) {
480*4882a593Smuzhiyun 		if (dma_caps.cmd_pause && dma_caps.cmd_resume)
481*4882a593Smuzhiyun 			hw.info |= SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME;
482*4882a593Smuzhiyun 		if (dma_caps.residue_granularity <= DMA_RESIDUE_GRANULARITY_SEGMENT)
483*4882a593Smuzhiyun 			hw.info |= SNDRV_PCM_INFO_BATCH;
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 		if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
486*4882a593Smuzhiyun 			addr_widths = dma_caps.dst_addr_widths;
487*4882a593Smuzhiyun 		else
488*4882a593Smuzhiyun 			addr_widths = dma_caps.src_addr_widths;
489*4882a593Smuzhiyun 	}
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	/*
492*4882a593Smuzhiyun 	 * Prepare formats mask for valid/allowed sample types. If the dma does
493*4882a593Smuzhiyun 	 * not have support for the given physical word size, it needs to be
494*4882a593Smuzhiyun 	 * masked out so user space can not use the format which produces
495*4882a593Smuzhiyun 	 * corrupted audio.
496*4882a593Smuzhiyun 	 * In case the dma driver does not implement the slave_caps the default
497*4882a593Smuzhiyun 	 * assumption is that it supports 1, 2 and 4 bytes widths.
498*4882a593Smuzhiyun 	 */
499*4882a593Smuzhiyun 	for (i = 0; i <= SNDRV_PCM_FORMAT_LAST; i++) {
500*4882a593Smuzhiyun 		int bits = snd_pcm_format_physical_width(i);
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun 		/* Enable only samples with DMA supported physical widths */
503*4882a593Smuzhiyun 		switch (bits) {
504*4882a593Smuzhiyun 		case 8:
505*4882a593Smuzhiyun 		case 16:
506*4882a593Smuzhiyun 		case 24:
507*4882a593Smuzhiyun 		case 32:
508*4882a593Smuzhiyun 		case 64:
509*4882a593Smuzhiyun 			if (addr_widths & (1 << (bits / 8)))
510*4882a593Smuzhiyun 				hw.formats |= pcm_format_to_bits(i);
511*4882a593Smuzhiyun 			break;
512*4882a593Smuzhiyun 		default:
513*4882a593Smuzhiyun 			/* Unsupported types */
514*4882a593Smuzhiyun 			break;
515*4882a593Smuzhiyun 		}
516*4882a593Smuzhiyun 	}
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun 	return snd_soc_set_runtime_hwparams(substream, &hw);
519*4882a593Smuzhiyun }
520*4882a593Smuzhiyun 
dmaengine_mpcm_open(struct snd_soc_component * component,struct snd_pcm_substream * substream)521*4882a593Smuzhiyun static int dmaengine_mpcm_open(struct snd_soc_component *component,
522*4882a593Smuzhiyun 			       struct snd_pcm_substream *substream)
523*4882a593Smuzhiyun {
524*4882a593Smuzhiyun 	struct dmaengine_mpcm *pcm = soc_component_to_mpcm(component);
525*4882a593Smuzhiyun 	struct dmaengine_mpcm_runtime_data *prtd;
526*4882a593Smuzhiyun 	int ret, i;
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun 	ret = dmaengine_mpcm_set_runtime_hwparams(substream);
529*4882a593Smuzhiyun 	if (ret)
530*4882a593Smuzhiyun 		return ret;
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun 	ret = snd_pcm_hw_constraint_integer(substream->runtime,
533*4882a593Smuzhiyun 					    SNDRV_PCM_HW_PARAM_PERIODS);
534*4882a593Smuzhiyun 	if (ret < 0)
535*4882a593Smuzhiyun 		return ret;
536*4882a593Smuzhiyun 
537*4882a593Smuzhiyun 	prtd = kzalloc(sizeof(*prtd), GFP_KERNEL);
538*4882a593Smuzhiyun 	if (!prtd)
539*4882a593Smuzhiyun 		return -ENOMEM;
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
542*4882a593Smuzhiyun 		prtd->channel_maps = pcm->mdais->playback_channel_maps;
543*4882a593Smuzhiyun 		for (i = 0; i < pcm->mdais->num_dais; i++)
544*4882a593Smuzhiyun 			prtd->chans[i] = pcm->tx_chans[i];
545*4882a593Smuzhiyun 	} else {
546*4882a593Smuzhiyun 		prtd->channel_maps = pcm->mdais->capture_channel_maps;
547*4882a593Smuzhiyun 		for (i = 0; i < pcm->mdais->num_dais; i++)
548*4882a593Smuzhiyun 			prtd->chans[i] = pcm->rx_chans[i];
549*4882a593Smuzhiyun 	}
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun 	prtd->num_chans = pcm->mdais->num_dais;
552*4882a593Smuzhiyun 	prtd->start_flag = false;
553*4882a593Smuzhiyun 	substream->runtime->private_data = prtd;
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun 	return 0;
556*4882a593Smuzhiyun }
557*4882a593Smuzhiyun 
dmaengine_mpcm_new(struct snd_soc_component * component,struct snd_soc_pcm_runtime * rtd)558*4882a593Smuzhiyun static int dmaengine_mpcm_new(struct snd_soc_component *component, struct snd_soc_pcm_runtime *rtd)
559*4882a593Smuzhiyun {
560*4882a593Smuzhiyun 	struct dmaengine_mpcm *pcm = soc_component_to_mpcm(component);
561*4882a593Smuzhiyun 	struct snd_pcm_substream *substream;
562*4882a593Smuzhiyun 	size_t prealloc_buffer_size;
563*4882a593Smuzhiyun 	size_t max_buffer_size;
564*4882a593Smuzhiyun 	unsigned int i;
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun 	prealloc_buffer_size = 512 * 1024;
567*4882a593Smuzhiyun 	max_buffer_size = SIZE_MAX;
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 	for (i = SNDRV_PCM_STREAM_PLAYBACK; i <= SNDRV_PCM_STREAM_CAPTURE; i++) {
570*4882a593Smuzhiyun 		substream = rtd->pcm->streams[i].substream;
571*4882a593Smuzhiyun 		if (!substream)
572*4882a593Smuzhiyun 			continue;
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 		snd_pcm_lib_preallocate_pages(substream,
575*4882a593Smuzhiyun 					      SNDRV_DMA_TYPE_DEV_IRAM,
576*4882a593Smuzhiyun 					      dmaengine_dma_dev(pcm, substream),
577*4882a593Smuzhiyun 					      prealloc_buffer_size,
578*4882a593Smuzhiyun 					      max_buffer_size);
579*4882a593Smuzhiyun 	}
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun 	return 0;
582*4882a593Smuzhiyun }
583*4882a593Smuzhiyun 
dmaengine_mpcm_pointer(struct snd_soc_component * component,struct snd_pcm_substream * substream)584*4882a593Smuzhiyun static snd_pcm_uframes_t dmaengine_mpcm_pointer(struct snd_soc_component *component,
585*4882a593Smuzhiyun 						struct snd_pcm_substream *substream)
586*4882a593Smuzhiyun {
587*4882a593Smuzhiyun 	struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
588*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
589*4882a593Smuzhiyun 	struct dma_tx_state state;
590*4882a593Smuzhiyun 	snd_pcm_uframes_t frames;
591*4882a593Smuzhiyun 	unsigned int buf_size;
592*4882a593Smuzhiyun 	unsigned int pos = 0;
593*4882a593Smuzhiyun 	unsigned int master = prtd->master_chan;
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun 	buf_size = snd_pcm_lib_buffer_bytes(substream);
596*4882a593Smuzhiyun 	dmaengine_tx_status(prtd->chans[master], prtd->cookies[master], &state);
597*4882a593Smuzhiyun 	if (state.residue > 0 && state.residue <= buf_size)
598*4882a593Smuzhiyun 		pos = buf_size - state.residue;
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 	frames = bytes_to_frames(substream->runtime, pos);
601*4882a593Smuzhiyun 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
602*4882a593Smuzhiyun 		return frames;
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun #ifdef CONFIG_SND_SOC_ROCKCHIP_VAD
605*4882a593Smuzhiyun 	if (prtd->vpos)
606*4882a593Smuzhiyun 		frames = bytes_to_frames(substream->runtime, prtd->vpos);
607*4882a593Smuzhiyun #endif
608*4882a593Smuzhiyun 	if (!prtd->start_flag && frames >= MAX_FIFO_SIZE)
609*4882a593Smuzhiyun 		prtd->start_flag = true;
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 	if (prtd->start_flag) {
612*4882a593Smuzhiyun 		if (frames >= MAX_FIFO_SIZE)
613*4882a593Smuzhiyun 			frames -= MAX_FIFO_SIZE;
614*4882a593Smuzhiyun 		else
615*4882a593Smuzhiyun 			frames = runtime->buffer_size + frames - MAX_FIFO_SIZE;
616*4882a593Smuzhiyun 	} else {
617*4882a593Smuzhiyun 		frames = 0;
618*4882a593Smuzhiyun 	}
619*4882a593Smuzhiyun 
620*4882a593Smuzhiyun 	return frames;
621*4882a593Smuzhiyun }
622*4882a593Smuzhiyun 
dmaengine_mpcm_ioctl(struct snd_soc_component * component,struct snd_pcm_substream * substream,unsigned int cmd,void * arg)623*4882a593Smuzhiyun static int dmaengine_mpcm_ioctl(struct snd_soc_component *component,
624*4882a593Smuzhiyun 				struct snd_pcm_substream *substream,
625*4882a593Smuzhiyun 				unsigned int cmd, void *arg)
626*4882a593Smuzhiyun {
627*4882a593Smuzhiyun 	return snd_pcm_lib_ioctl(substream, cmd, arg);
628*4882a593Smuzhiyun }
629*4882a593Smuzhiyun 
dmaengine_mpcm_hw_free(struct snd_soc_component * component,struct snd_pcm_substream * substream)630*4882a593Smuzhiyun static int dmaengine_mpcm_hw_free(struct snd_soc_component *component,
631*4882a593Smuzhiyun 				  struct snd_pcm_substream *substream)
632*4882a593Smuzhiyun {
633*4882a593Smuzhiyun 	return snd_pcm_lib_free_pages(substream);
634*4882a593Smuzhiyun }
635*4882a593Smuzhiyun 
dmaengine_mpcm_close(struct snd_soc_component * component,struct snd_pcm_substream * substream)636*4882a593Smuzhiyun static int dmaengine_mpcm_close(struct snd_soc_component *component,
637*4882a593Smuzhiyun 				struct snd_pcm_substream *substream)
638*4882a593Smuzhiyun {
639*4882a593Smuzhiyun 	struct dmaengine_mpcm_runtime_data *prtd = substream_to_prtd(substream);
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun 	kfree(prtd);
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun 	return 0;
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun static const struct snd_soc_component_driver dmaengine_mpcm_platform = {
647*4882a593Smuzhiyun 	.name		= SND_DMAENGINE_MPCM_DRV_NAME,
648*4882a593Smuzhiyun 	.probe_order	= SND_SOC_COMP_ORDER_LATE,
649*4882a593Smuzhiyun 	.pcm_construct	= dmaengine_mpcm_new,
650*4882a593Smuzhiyun 	.open		= dmaengine_mpcm_open,
651*4882a593Smuzhiyun 	.close		= dmaengine_mpcm_close,
652*4882a593Smuzhiyun 	.ioctl		= dmaengine_mpcm_ioctl,
653*4882a593Smuzhiyun 	.hw_params	= dmaengine_mpcm_hw_params,
654*4882a593Smuzhiyun 	.hw_free	= dmaengine_mpcm_hw_free,
655*4882a593Smuzhiyun 	.trigger	= snd_dmaengine_mpcm_trigger,
656*4882a593Smuzhiyun 	.pointer	= dmaengine_mpcm_pointer,
657*4882a593Smuzhiyun };
658*4882a593Smuzhiyun 
dmaengine_mpcm_release_chan(struct dmaengine_mpcm * pcm)659*4882a593Smuzhiyun static void dmaengine_mpcm_release_chan(struct dmaengine_mpcm *pcm)
660*4882a593Smuzhiyun {
661*4882a593Smuzhiyun 	int i;
662*4882a593Smuzhiyun 
663*4882a593Smuzhiyun 	for (i = 0; i < pcm->mdais->num_dais; i++) {
664*4882a593Smuzhiyun 		if (pcm->tx_chans[i])
665*4882a593Smuzhiyun 			dma_release_channel(pcm->tx_chans[i]);
666*4882a593Smuzhiyun 		if (pcm->rx_chans[i])
667*4882a593Smuzhiyun 			dma_release_channel(pcm->rx_chans[i]);
668*4882a593Smuzhiyun 	}
669*4882a593Smuzhiyun }
670*4882a593Smuzhiyun 
snd_dmaengine_mpcm_register(struct rk_mdais_dev * mdais)671*4882a593Smuzhiyun int snd_dmaengine_mpcm_register(struct rk_mdais_dev *mdais)
672*4882a593Smuzhiyun {
673*4882a593Smuzhiyun 	struct device *dev;
674*4882a593Smuzhiyun 	struct device *child;
675*4882a593Smuzhiyun 	struct dmaengine_mpcm *pcm;
676*4882a593Smuzhiyun 	struct dma_chan *chan;
677*4882a593Smuzhiyun 	unsigned int *tx_maps, *rx_maps;
678*4882a593Smuzhiyun 	int ret, i, num;
679*4882a593Smuzhiyun 
680*4882a593Smuzhiyun 	dev = mdais->dev;
681*4882a593Smuzhiyun 	num = mdais->num_dais;
682*4882a593Smuzhiyun 	tx_maps = mdais->playback_channel_maps;
683*4882a593Smuzhiyun 	rx_maps = mdais->capture_channel_maps;
684*4882a593Smuzhiyun 	pcm = kzalloc(sizeof(*pcm), GFP_KERNEL);
685*4882a593Smuzhiyun 	if (!pcm)
686*4882a593Smuzhiyun 		return -ENOMEM;
687*4882a593Smuzhiyun 
688*4882a593Smuzhiyun 	pcm->mdais = mdais;
689*4882a593Smuzhiyun 	for (i = 0; i < num; i++) {
690*4882a593Smuzhiyun 		child = mdais->dais[i].dev;
691*4882a593Smuzhiyun 		if (tx_maps[i]) {
692*4882a593Smuzhiyun 			chan = dma_request_chan(child, "tx");
693*4882a593Smuzhiyun 			if (IS_ERR(chan))
694*4882a593Smuzhiyun 				chan = NULL;
695*4882a593Smuzhiyun 			pcm->tx_chans[i] = chan;
696*4882a593Smuzhiyun 		}
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun 		if (rx_maps[i]) {
699*4882a593Smuzhiyun 			chan = dma_request_chan(child, "rx");
700*4882a593Smuzhiyun 			if (IS_ERR(chan))
701*4882a593Smuzhiyun 				chan = NULL;
702*4882a593Smuzhiyun 			pcm->rx_chans[i] = chan;
703*4882a593Smuzhiyun 		}
704*4882a593Smuzhiyun 	}
705*4882a593Smuzhiyun 
706*4882a593Smuzhiyun 	ret = snd_soc_component_initialize(&pcm->component, &dmaengine_mpcm_platform,
707*4882a593Smuzhiyun 					   dev);
708*4882a593Smuzhiyun 	if (ret)
709*4882a593Smuzhiyun 		goto err_free_dma;
710*4882a593Smuzhiyun 
711*4882a593Smuzhiyun 	ret = snd_soc_add_component(&pcm->component, NULL, 0);
712*4882a593Smuzhiyun 	if (ret)
713*4882a593Smuzhiyun 		goto err_free_dma;
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun 	return 0;
716*4882a593Smuzhiyun 
717*4882a593Smuzhiyun err_free_dma:
718*4882a593Smuzhiyun 	dmaengine_mpcm_release_chan(pcm);
719*4882a593Smuzhiyun 	kfree(pcm);
720*4882a593Smuzhiyun 	return ret;
721*4882a593Smuzhiyun }
722*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_dmaengine_mpcm_register);
723*4882a593Smuzhiyun 
snd_dmaengine_mpcm_unregister(struct device * dev)724*4882a593Smuzhiyun void snd_dmaengine_mpcm_unregister(struct device *dev)
725*4882a593Smuzhiyun {
726*4882a593Smuzhiyun 	struct snd_soc_component *component;
727*4882a593Smuzhiyun 	struct dmaengine_mpcm *pcm;
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun 	component = snd_soc_lookup_component(dev, SND_DMAENGINE_MPCM_DRV_NAME);
730*4882a593Smuzhiyun 	if (!component)
731*4882a593Smuzhiyun 		return;
732*4882a593Smuzhiyun 
733*4882a593Smuzhiyun 	pcm = soc_component_to_mpcm(component);
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun 	snd_soc_unregister_component(dev);
736*4882a593Smuzhiyun 	dmaengine_mpcm_release_chan(pcm);
737*4882a593Smuzhiyun 	kfree(pcm);
738*4882a593Smuzhiyun }
739*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_dmaengine_mpcm_unregister);
740*4882a593Smuzhiyun 
741*4882a593Smuzhiyun MODULE_LICENSE("GPL");
742