1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Rockchip Audio PWM Driver
4 *
5 * Copyright (C) 2020 Fuzhou Rockchip Electronics Co.,Ltd
6 *
7 */
8
9 #include <linux/clk.h>
10 #include <linux/module.h>
11 #include <linux/of.h>
12 #include <linux/of_device.h>
13 #include <linux/of_gpio.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/regmap.h>
16 #include <sound/dmaengine_pcm.h>
17 #include <sound/pcm_params.h>
18
19 #include "rockchip_audio_pwm.h"
20
21 #define AUDIO_PWM_DMA_BURST_SIZE (16) /* size * width: 16*4 = 64 bytes */
22
23 struct rk_audio_pwm_dev {
24 struct device *dev;
25 struct clk *clk;
26 struct clk *hclk;
27 struct regmap *regmap;
28 struct snd_dmaengine_dai_dma_data playback_dma_data;
29 struct gpio_desc *spk_ctl_gpio;
30 int interpolat_points;
31 int sample_width_bits;
32 };
33
to_info(struct snd_soc_dai * dai)34 static inline struct rk_audio_pwm_dev *to_info(struct snd_soc_dai *dai)
35 {
36 return snd_soc_dai_get_drvdata(dai);
37 }
38
rockchip_audio_spk_ctl(struct rk_audio_pwm_dev * apwm,int on)39 static void rockchip_audio_spk_ctl(struct rk_audio_pwm_dev *apwm, int on)
40 {
41 if (apwm->spk_ctl_gpio)
42 gpiod_direction_output(apwm->spk_ctl_gpio, on);
43 }
44
rockchip_audio_pwm_xfer(struct rk_audio_pwm_dev * apwm,int on)45 static void rockchip_audio_pwm_xfer(struct rk_audio_pwm_dev *apwm, int on)
46 {
47 if (on) {
48 regmap_write(apwm->regmap, AUDPWM_FIFO_CFG, AUDPWM_DMA_EN);
49 regmap_write(apwm->regmap, AUDPWM_XFER, AUDPWM_XFER_START);
50 rockchip_audio_spk_ctl(apwm, on);
51 } else {
52 rockchip_audio_spk_ctl(apwm, on);
53 regmap_write(apwm->regmap, AUDPWM_FIFO_CFG, AUDPWM_DMA_DIS);
54 regmap_write(apwm->regmap, AUDPWM_XFER, AUDPWM_XFER_STOP);
55 }
56 }
57
rockchip_audio_pwm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)58 static int rockchip_audio_pwm_hw_params(struct snd_pcm_substream *substream,
59 struct snd_pcm_hw_params *params,
60 struct snd_soc_dai *dai)
61 {
62 struct rk_audio_pwm_dev *apwm = to_info(dai);
63 unsigned long rate;
64 int ret;
65
66 rate = params_rate(params) << apwm->sample_width_bits;
67 if (apwm->interpolat_points) {
68 rate *= (apwm->interpolat_points + 1);
69 regmap_write(apwm->regmap, AUDPWM_PWM_CFG,
70 AUDPWM_LINEAR_INTERP_EN |
71 AUDPWM_INTERP_RATE(apwm->interpolat_points));
72 }
73 if (!rate)
74 return -EINVAL;
75 ret = clk_set_rate(apwm->clk, rate);
76 if (ret)
77 return -EINVAL;
78
79 regmap_write(apwm->regmap, AUDPWM_SRC_CFG,
80 AUDPWM_SRC_WIDTH(params_width(params)));
81 regmap_write(apwm->regmap, AUDPWM_PWM_CFG,
82 AUDPWM_SAMPLE_WIDTH(apwm->sample_width_bits));
83 regmap_write(apwm->regmap, AUDPWM_FIFO_CFG,
84 AUDPWM_DMA_WATERMARK(16));
85
86 return 0;
87 }
88
rockchip_audio_pwm_trigger(struct snd_pcm_substream * substream,int cmd,struct snd_soc_dai * dai)89 static int rockchip_audio_pwm_trigger(struct snd_pcm_substream *substream,
90 int cmd, struct snd_soc_dai *dai)
91 {
92 struct rk_audio_pwm_dev *apwm = to_info(dai);
93 int ret = 0;
94
95 switch (cmd) {
96 case SNDRV_PCM_TRIGGER_START:
97 case SNDRV_PCM_TRIGGER_RESUME:
98 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
99 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
100 rockchip_audio_pwm_xfer(apwm, 1);
101 break;
102 case SNDRV_PCM_TRIGGER_SUSPEND:
103 case SNDRV_PCM_TRIGGER_STOP:
104 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
105 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
106 rockchip_audio_pwm_xfer(apwm, 0);
107 break;
108 default:
109 ret = -EINVAL;
110 break;
111 }
112
113 return ret;
114 }
115
rockchip_audio_pwm_dai_probe(struct snd_soc_dai * dai)116 static int rockchip_audio_pwm_dai_probe(struct snd_soc_dai *dai)
117 {
118 struct rk_audio_pwm_dev *apwm = to_info(dai);
119
120 dai->playback_dma_data = &apwm->playback_dma_data;
121
122 return 0;
123 }
124
125 static const struct snd_soc_dai_ops rockchip_audio_pwm_dai_ops = {
126 .trigger = rockchip_audio_pwm_trigger,
127 .hw_params = rockchip_audio_pwm_hw_params,
128 };
129
130 #define ROCKCHIP_AUDIO_PWM_RATES SNDRV_PCM_RATE_8000_48000
131 #define ROCKCHIP_AUDIO_PWM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
132 SNDRV_PCM_FMTBIT_S24_LE | \
133 SNDRV_PCM_FMTBIT_S32_LE)
134
135 static struct snd_soc_dai_driver rockchip_audio_pwm_dai = {
136 .probe = rockchip_audio_pwm_dai_probe,
137 .playback = {
138 .stream_name = "Playback",
139 .channels_min = 1,
140 .channels_max = 2,
141 .rates = ROCKCHIP_AUDIO_PWM_RATES,
142 .formats = ROCKCHIP_AUDIO_PWM_FORMATS,
143 },
144 .ops = &rockchip_audio_pwm_dai_ops,
145 };
146
147 static const struct snd_soc_component_driver rockchip_audio_pwm_component = {
148 .name = "rockchip-audio-pwm",
149 };
150
rockchip_audio_pwm_runtime_suspend(struct device * dev)151 static int __maybe_unused rockchip_audio_pwm_runtime_suspend(struct device *dev)
152 {
153 struct rk_audio_pwm_dev *apwm = dev_get_drvdata(dev);
154
155 regcache_cache_only(apwm->regmap, true);
156 clk_disable_unprepare(apwm->clk);
157 clk_disable_unprepare(apwm->hclk);
158
159 return 0;
160 }
161
rockchip_audio_pwm_runtime_resume(struct device * dev)162 static int __maybe_unused rockchip_audio_pwm_runtime_resume(struct device *dev)
163 {
164 struct rk_audio_pwm_dev *apwm = dev_get_drvdata(dev);
165 int ret;
166
167 ret = clk_prepare_enable(apwm->clk);
168 if (ret)
169 return ret;
170
171 ret = clk_prepare_enable(apwm->hclk);
172 if (ret)
173 return ret;
174
175 regcache_cache_only(apwm->regmap, false);
176 regcache_mark_dirty(apwm->regmap);
177 ret = regcache_sync(apwm->regmap);
178 if (ret) {
179 clk_disable_unprepare(apwm->clk);
180 clk_disable_unprepare(apwm->hclk);
181 }
182
183 return 0;
184 }
185
rockchip_audio_pwm_wr_reg(struct device * dev,unsigned int reg)186 static bool rockchip_audio_pwm_wr_reg(struct device *dev, unsigned int reg)
187 {
188 switch (reg) {
189 case AUDPWM_XFER:
190 case AUDPWM_SRC_CFG:
191 case AUDPWM_PWM_CFG:
192 case AUDPWM_FIFO_CFG:
193 case AUDPWM_FIFO_INT_EN:
194 case AUDPWM_FIFO_INT_ST:
195 case AUDPWM_FIFO_ENTRY:
196 return true;
197 default:
198 return false;
199 }
200 }
201
rockchip_audio_pwm_rd_reg(struct device * dev,unsigned int reg)202 static bool rockchip_audio_pwm_rd_reg(struct device *dev, unsigned int reg)
203 {
204 switch (reg) {
205 case AUDPWM_VERSION:
206 case AUDPWM_XFER:
207 case AUDPWM_SRC_CFG:
208 case AUDPWM_PWM_CFG:
209 case AUDPWM_PWM_ST:
210 case AUDPWM_PWM_BUF_01:
211 case AUDPWM_PWM_BUF_23:
212 case AUDPWM_FIFO_CFG:
213 case AUDPWM_FIFO_LVL:
214 case AUDPWM_FIFO_INT_EN:
215 case AUDPWM_FIFO_INT_ST:
216 return true;
217 default:
218 return false;
219 }
220 }
221
rockchip_audio_pwm_volatile_reg(struct device * dev,unsigned int reg)222 static bool rockchip_audio_pwm_volatile_reg(struct device *dev,
223 unsigned int reg)
224 {
225 switch (reg) {
226 case AUDPWM_XFER:
227 case AUDPWM_PWM_ST:
228 case AUDPWM_PWM_BUF_01:
229 case AUDPWM_PWM_BUF_23:
230 case AUDPWM_FIFO_LVL:
231 case AUDPWM_FIFO_INT_ST:
232 return true;
233 default:
234 return false;
235 }
236 }
237
238 static const struct regmap_config rockchip_audio_pwm_config = {
239 .reg_bits = 32,
240 .reg_stride = 4,
241 .val_bits = 32,
242 .max_register = AUDPWM_FIFO_ENTRY,
243 .writeable_reg = rockchip_audio_pwm_wr_reg,
244 .readable_reg = rockchip_audio_pwm_rd_reg,
245 .volatile_reg = rockchip_audio_pwm_volatile_reg,
246 .cache_type = REGCACHE_FLAT,
247 };
248
249 static const struct of_device_id rockchip_audio_pwm_match[] = {
250 { .compatible = "rockchip,audio-pwm-v1" },
251 {},
252 };
253 MODULE_DEVICE_TABLE(of, rockchip_audio_pwm_match);
254
rockchip_audio_pwm_probe(struct platform_device * pdev)255 static int rockchip_audio_pwm_probe(struct platform_device *pdev)
256 {
257 struct device_node *np = pdev->dev.of_node;
258 struct rk_audio_pwm_dev *apwm;
259 struct resource *res;
260 void __iomem *regs;
261 int ret;
262 int val;
263
264 apwm = devm_kzalloc(&pdev->dev, sizeof(*apwm), GFP_KERNEL);
265 if (!apwm)
266 return -ENOMEM;
267
268 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
269 regs = devm_ioremap_resource(&pdev->dev, res);
270 if (IS_ERR(regs))
271 return PTR_ERR(regs);
272
273 apwm->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
274 &rockchip_audio_pwm_config);
275 if (IS_ERR(apwm->regmap))
276 return PTR_ERR(apwm->regmap);
277
278 apwm->playback_dma_data.addr = res->start + AUDPWM_FIFO_ENTRY;
279 apwm->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
280 apwm->playback_dma_data.maxburst = AUDIO_PWM_DMA_BURST_SIZE;
281
282 apwm->dev = &pdev->dev;
283 dev_set_drvdata(&pdev->dev, apwm);
284
285 apwm->clk = devm_clk_get(&pdev->dev, "clk");
286 if (IS_ERR(apwm->clk))
287 return PTR_ERR(apwm->clk);
288
289 apwm->hclk = devm_clk_get(&pdev->dev, "hclk");
290 if (IS_ERR(apwm->hclk))
291 return PTR_ERR(apwm->hclk);
292
293 pm_runtime_enable(&pdev->dev);
294 if (!pm_runtime_enabled(&pdev->dev)) {
295 ret = rockchip_audio_pwm_runtime_resume(&pdev->dev);
296 if (ret)
297 goto err_pm_disable;
298 }
299
300 apwm->sample_width_bits = 8;
301 of_property_read_u32(np, "rockchip,sample-width-bits", &val);
302 if (val >= 8 && val <= 11)
303 apwm->sample_width_bits = val;
304
305 of_property_read_u32(np, "rockchip,interpolat-points",
306 &apwm->interpolat_points);
307
308 apwm->spk_ctl_gpio = devm_gpiod_get_optional(&pdev->dev, "spk-ctl",
309 GPIOD_OUT_LOW);
310
311 if (!apwm->spk_ctl_gpio) {
312 dev_info(&pdev->dev, "no need spk-ctl gpio\n");
313 } else if (IS_ERR(apwm->spk_ctl_gpio)) {
314 ret = PTR_ERR(apwm->spk_ctl_gpio);
315 dev_err(&pdev->dev, "fail to request gpio spk-ctl\n");
316 goto err_suspend;
317 }
318
319 ret = devm_snd_soc_register_component(&pdev->dev,
320 &rockchip_audio_pwm_component,
321 &rockchip_audio_pwm_dai, 1);
322 if (ret) {
323 dev_err(&pdev->dev, "could not register dai: %d\n", ret);
324 goto err_suspend;
325 }
326
327 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
328 if (ret) {
329 dev_err(&pdev->dev, "could not register pcm: %d\n", ret);
330 goto err_suspend;
331 }
332
333 return 0;
334
335 err_suspend:
336 if (!pm_runtime_status_suspended(&pdev->dev))
337 rockchip_audio_pwm_runtime_suspend(&pdev->dev);
338 err_pm_disable:
339 pm_runtime_disable(&pdev->dev);
340
341 return ret;
342 }
343
rockchip_audio_pwm_remove(struct platform_device * pdev)344 static int rockchip_audio_pwm_remove(struct platform_device *pdev)
345 {
346 pm_runtime_disable(&pdev->dev);
347 if (!pm_runtime_status_suspended(&pdev->dev))
348 rockchip_audio_pwm_runtime_suspend(&pdev->dev);
349
350 return 0;
351 }
352
353 static const struct dev_pm_ops rockchip_audio_pwm_pm_ops = {
354 SET_RUNTIME_PM_OPS(rockchip_audio_pwm_runtime_suspend,
355 rockchip_audio_pwm_runtime_resume, NULL)
356 };
357
358 static struct platform_driver rockchip_audio_pwm_driver = {
359 .probe = rockchip_audio_pwm_probe,
360 .remove = rockchip_audio_pwm_remove,
361 .driver = {
362 .name = "rockchip-audio-pwm",
363 .of_match_table = of_match_ptr(rockchip_audio_pwm_match),
364 .pm = &rockchip_audio_pwm_pm_ops,
365 },
366 };
367
368 module_platform_driver(rockchip_audio_pwm_driver);
369
370 MODULE_AUTHOR("Sugar Zhang <sugar.zhang@rock-chips.com>");
371 MODULE_DESCRIPTION("Rockchip Audio PWM Driver");
372 MODULE_LICENSE("GPL v2");
373