1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2020 The Linux Foundation. All rights reserved.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * lpass-hdmi.c -- ALSA SoC HDMI-CPU DAI driver for QTi LPASS HDMI
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <sound/pcm_params.h>
12*4882a593Smuzhiyun #include <linux/regmap.h>
13*4882a593Smuzhiyun #include <sound/soc.h>
14*4882a593Smuzhiyun #include <sound/soc-dai.h>
15*4882a593Smuzhiyun #include <dt-bindings/sound/sc7180-lpass.h>
16*4882a593Smuzhiyun #include "lpass-lpaif-reg.h"
17*4882a593Smuzhiyun #include "lpass.h"
18*4882a593Smuzhiyun
lpass_hdmi_daiops_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)19*4882a593Smuzhiyun static int lpass_hdmi_daiops_hw_params(struct snd_pcm_substream *substream,
20*4882a593Smuzhiyun struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
23*4882a593Smuzhiyun snd_pcm_format_t format = params_format(params);
24*4882a593Smuzhiyun unsigned int rate = params_rate(params);
25*4882a593Smuzhiyun unsigned int channels = params_channels(params);
26*4882a593Smuzhiyun unsigned int ret;
27*4882a593Smuzhiyun int bitwidth;
28*4882a593Smuzhiyun unsigned int word_length;
29*4882a593Smuzhiyun unsigned int ch_sts_buf0;
30*4882a593Smuzhiyun unsigned int ch_sts_buf1;
31*4882a593Smuzhiyun unsigned int data_format;
32*4882a593Smuzhiyun unsigned int sampling_freq;
33*4882a593Smuzhiyun unsigned int ch = 0;
34*4882a593Smuzhiyun struct lpass_dp_metadata_ctl *meta_ctl = drvdata->meta_ctl;
35*4882a593Smuzhiyun struct lpass_sstream_ctl *sstream_ctl = drvdata->sstream_ctl;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun bitwidth = snd_pcm_format_width(format);
38*4882a593Smuzhiyun if (bitwidth < 0) {
39*4882a593Smuzhiyun dev_err(dai->dev, "%s invalid bit width given : %d\n",
40*4882a593Smuzhiyun __func__, bitwidth);
41*4882a593Smuzhiyun return bitwidth;
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun switch (bitwidth) {
45*4882a593Smuzhiyun case 16:
46*4882a593Smuzhiyun word_length = LPASS_DP_AUDIO_BITWIDTH16;
47*4882a593Smuzhiyun break;
48*4882a593Smuzhiyun case 24:
49*4882a593Smuzhiyun word_length = LPASS_DP_AUDIO_BITWIDTH24;
50*4882a593Smuzhiyun break;
51*4882a593Smuzhiyun default:
52*4882a593Smuzhiyun dev_err(dai->dev, "%s invalid bit width given : %d\n",
53*4882a593Smuzhiyun __func__, bitwidth);
54*4882a593Smuzhiyun return -EINVAL;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun switch (rate) {
58*4882a593Smuzhiyun case 32000:
59*4882a593Smuzhiyun sampling_freq = LPASS_SAMPLING_FREQ32;
60*4882a593Smuzhiyun break;
61*4882a593Smuzhiyun case 44100:
62*4882a593Smuzhiyun sampling_freq = LPASS_SAMPLING_FREQ44;
63*4882a593Smuzhiyun break;
64*4882a593Smuzhiyun case 48000:
65*4882a593Smuzhiyun sampling_freq = LPASS_SAMPLING_FREQ48;
66*4882a593Smuzhiyun break;
67*4882a593Smuzhiyun default:
68*4882a593Smuzhiyun dev_err(dai->dev, "%s invalid bit width given : %d\n",
69*4882a593Smuzhiyun __func__, bitwidth);
70*4882a593Smuzhiyun return -EINVAL;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun data_format = LPASS_DATA_FORMAT_LINEAR;
73*4882a593Smuzhiyun ch_sts_buf0 = (((data_format << LPASS_DATA_FORMAT_SHIFT) & LPASS_DATA_FORMAT_MASK)
74*4882a593Smuzhiyun | ((sampling_freq << LPASS_FREQ_BIT_SHIFT) & LPASS_FREQ_BIT_MASK));
75*4882a593Smuzhiyun ch_sts_buf1 = (word_length) & LPASS_WORDLENGTH_MASK;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun ret = regmap_field_write(drvdata->tx_ctl->soft_reset, LPASS_TX_CTL_RESET);
78*4882a593Smuzhiyun if (ret)
79*4882a593Smuzhiyun return ret;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun ret = regmap_field_write(drvdata->tx_ctl->soft_reset, LPASS_TX_CTL_CLEAR);
82*4882a593Smuzhiyun if (ret)
83*4882a593Smuzhiyun return ret;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun ret = regmap_field_write(drvdata->hdmitx_legacy_en, LPASS_HDMITX_LEGACY_DISABLE);
86*4882a593Smuzhiyun if (ret)
87*4882a593Smuzhiyun return ret;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun ret = regmap_field_write(drvdata->hdmitx_parity_calc_en, HDMITX_PARITY_CALC_EN);
90*4882a593Smuzhiyun if (ret)
91*4882a593Smuzhiyun return ret;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun ret = regmap_field_write(drvdata->vbit_ctl->replace_vbit, REPLACE_VBIT);
94*4882a593Smuzhiyun if (ret)
95*4882a593Smuzhiyun return ret;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun ret = regmap_field_write(drvdata->vbit_ctl->vbit_stream, LINEAR_PCM_DATA);
98*4882a593Smuzhiyun if (ret)
99*4882a593Smuzhiyun return ret;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun ret = regmap_field_write(drvdata->hdmitx_ch_msb[0], ch_sts_buf1);
102*4882a593Smuzhiyun if (ret)
103*4882a593Smuzhiyun return ret;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun ret = regmap_field_write(drvdata->hdmitx_ch_lsb[0], ch_sts_buf0);
106*4882a593Smuzhiyun if (ret)
107*4882a593Smuzhiyun return ret;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun ret = regmap_field_write(drvdata->hdmi_tx_dmactl[0]->use_hw_chs, HW_MODE);
110*4882a593Smuzhiyun if (ret)
111*4882a593Smuzhiyun return ret;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun ret = regmap_field_write(drvdata->hdmi_tx_dmactl[0]->hw_chs_sel, SW_MODE);
114*4882a593Smuzhiyun if (ret)
115*4882a593Smuzhiyun return ret;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun ret = regmap_field_write(drvdata->hdmi_tx_dmactl[0]->use_hw_usr, HW_MODE);
118*4882a593Smuzhiyun if (ret)
119*4882a593Smuzhiyun return ret;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun ret = regmap_field_write(drvdata->hdmi_tx_dmactl[0]->hw_usr_sel, SW_MODE);
122*4882a593Smuzhiyun if (ret)
123*4882a593Smuzhiyun return ret;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun ret = regmap_field_write(meta_ctl->mute, LPASS_MUTE_ENABLE);
126*4882a593Smuzhiyun if (ret)
127*4882a593Smuzhiyun return ret;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun ret = regmap_field_write(meta_ctl->as_sdp_cc, channels - 1);
130*4882a593Smuzhiyun if (ret)
131*4882a593Smuzhiyun return ret;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun ret = regmap_field_write(meta_ctl->as_sdp_ct, LPASS_META_DEFAULT_VAL);
134*4882a593Smuzhiyun if (ret)
135*4882a593Smuzhiyun return ret;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun ret = regmap_field_write(meta_ctl->aif_db4, LPASS_META_DEFAULT_VAL);
138*4882a593Smuzhiyun if (ret)
139*4882a593Smuzhiyun return ret;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun ret = regmap_field_write(meta_ctl->frequency, sampling_freq);
142*4882a593Smuzhiyun if (ret)
143*4882a593Smuzhiyun return ret;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun ret = regmap_field_write(meta_ctl->mst_index, LPASS_META_DEFAULT_VAL);
146*4882a593Smuzhiyun if (ret)
147*4882a593Smuzhiyun return ret;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun ret = regmap_field_write(meta_ctl->dptx_index, LPASS_META_DEFAULT_VAL);
150*4882a593Smuzhiyun if (ret)
151*4882a593Smuzhiyun return ret;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun ret = regmap_field_write(sstream_ctl->sstream_en, LPASS_SSTREAM_DISABLE);
154*4882a593Smuzhiyun if (ret)
155*4882a593Smuzhiyun return ret;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun ret = regmap_field_write(sstream_ctl->dma_sel, ch);
158*4882a593Smuzhiyun if (ret)
159*4882a593Smuzhiyun return ret;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun ret = regmap_field_write(sstream_ctl->auto_bbit_en, LPASS_SSTREAM_DEFAULT_ENABLE);
162*4882a593Smuzhiyun if (ret)
163*4882a593Smuzhiyun return ret;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun ret = regmap_field_write(sstream_ctl->layout, LPASS_SSTREAM_DEFAULT_DISABLE);
166*4882a593Smuzhiyun if (ret)
167*4882a593Smuzhiyun return ret;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun ret = regmap_field_write(sstream_ctl->layout_sp, LPASS_LAYOUT_SP_DEFAULT);
170*4882a593Smuzhiyun if (ret)
171*4882a593Smuzhiyun return ret;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun ret = regmap_field_write(sstream_ctl->dp_audio, LPASS_SSTREAM_DEFAULT_ENABLE);
174*4882a593Smuzhiyun if (ret)
175*4882a593Smuzhiyun return ret;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun ret = regmap_field_write(sstream_ctl->set_sp_on_en, LPASS_SSTREAM_DEFAULT_ENABLE);
178*4882a593Smuzhiyun if (ret)
179*4882a593Smuzhiyun return ret;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun ret = regmap_field_write(sstream_ctl->dp_sp_b_hw_en, LPASS_SSTREAM_DEFAULT_ENABLE);
182*4882a593Smuzhiyun if (ret)
183*4882a593Smuzhiyun return ret;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun ret = regmap_field_write(sstream_ctl->dp_staffing_en, LPASS_SSTREAM_DEFAULT_ENABLE);
186*4882a593Smuzhiyun if (ret)
187*4882a593Smuzhiyun return ret;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun return ret;
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
lpass_hdmi_daiops_prepare(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)192*4882a593Smuzhiyun static int lpass_hdmi_daiops_prepare(struct snd_pcm_substream *substream,
193*4882a593Smuzhiyun struct snd_soc_dai *dai)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun int ret;
196*4882a593Smuzhiyun struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun ret = regmap_field_write(drvdata->sstream_ctl->sstream_en, LPASS_SSTREAM_ENABLE);
199*4882a593Smuzhiyun if (ret)
200*4882a593Smuzhiyun return ret;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun ret = regmap_field_write(drvdata->meta_ctl->mute, LPASS_MUTE_DISABLE);
203*4882a593Smuzhiyun if (ret)
204*4882a593Smuzhiyun return ret;
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun return ret;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun
lpass_hdmi_daiops_trigger(struct snd_pcm_substream * substream,int cmd,struct snd_soc_dai * dai)209*4882a593Smuzhiyun static int lpass_hdmi_daiops_trigger(struct snd_pcm_substream *substream,
210*4882a593Smuzhiyun int cmd, struct snd_soc_dai *dai)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
213*4882a593Smuzhiyun struct lpass_dp_metadata_ctl *meta_ctl = drvdata->meta_ctl;
214*4882a593Smuzhiyun struct lpass_sstream_ctl *sstream_ctl = drvdata->sstream_ctl;
215*4882a593Smuzhiyun int ret = -EINVAL;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun switch (cmd) {
218*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_START:
219*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_RESUME:
220*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
221*4882a593Smuzhiyun ret = regmap_field_write(sstream_ctl->sstream_en, LPASS_SSTREAM_ENABLE);
222*4882a593Smuzhiyun if (ret)
223*4882a593Smuzhiyun return ret;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun ret = regmap_field_write(meta_ctl->mute, LPASS_MUTE_DISABLE);
226*4882a593Smuzhiyun if (ret)
227*4882a593Smuzhiyun return ret;
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun break;
230*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_STOP:
231*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_SUSPEND:
232*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
233*4882a593Smuzhiyun ret = regmap_field_write(sstream_ctl->sstream_en, LPASS_SSTREAM_DISABLE);
234*4882a593Smuzhiyun if (ret)
235*4882a593Smuzhiyun return ret;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun ret = regmap_field_write(meta_ctl->mute, LPASS_MUTE_ENABLE);
238*4882a593Smuzhiyun if (ret)
239*4882a593Smuzhiyun return ret;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun ret = regmap_field_write(sstream_ctl->dp_audio, 0);
242*4882a593Smuzhiyun if (ret)
243*4882a593Smuzhiyun return ret;
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun break;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun return ret;
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun const struct snd_soc_dai_ops asoc_qcom_lpass_hdmi_dai_ops = {
251*4882a593Smuzhiyun .hw_params = lpass_hdmi_daiops_hw_params,
252*4882a593Smuzhiyun .prepare = lpass_hdmi_daiops_prepare,
253*4882a593Smuzhiyun .trigger = lpass_hdmi_daiops_trigger,
254*4882a593Smuzhiyun };
255*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(asoc_qcom_lpass_hdmi_dai_ops);
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun MODULE_DESCRIPTION("QTi LPASS HDMI Driver");
258*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
259