1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Author: Nicolas Pitre
6*4882a593Smuzhiyun * Created: Dec 02, 2004
7*4882a593Smuzhiyun * Copyright: MontaVista Software Inc.
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/io.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/dmaengine.h>
15*4882a593Smuzhiyun #include <linux/dma/pxa-dma.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <sound/ac97/controller.h>
18*4882a593Smuzhiyun #include <sound/core.h>
19*4882a593Smuzhiyun #include <sound/ac97_codec.h>
20*4882a593Smuzhiyun #include <sound/soc.h>
21*4882a593Smuzhiyun #include <sound/pxa2xx-lib.h>
22*4882a593Smuzhiyun #include <sound/dmaengine_pcm.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #include <mach/hardware.h>
25*4882a593Smuzhiyun #include <mach/regs-ac97.h>
26*4882a593Smuzhiyun #include <mach/audio.h>
27*4882a593Smuzhiyun
pxa2xx_ac97_warm_reset(struct ac97_controller * adrv)28*4882a593Smuzhiyun static void pxa2xx_ac97_warm_reset(struct ac97_controller *adrv)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun pxa2xx_ac97_try_warm_reset();
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun pxa2xx_ac97_finish_reset();
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
pxa2xx_ac97_cold_reset(struct ac97_controller * adrv)35*4882a593Smuzhiyun static void pxa2xx_ac97_cold_reset(struct ac97_controller *adrv)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun pxa2xx_ac97_try_cold_reset();
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun pxa2xx_ac97_finish_reset();
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
pxa2xx_ac97_read_actrl(struct ac97_controller * adrv,int slot,unsigned short reg)42*4882a593Smuzhiyun static int pxa2xx_ac97_read_actrl(struct ac97_controller *adrv, int slot,
43*4882a593Smuzhiyun unsigned short reg)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun return pxa2xx_ac97_read(slot, reg);
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
pxa2xx_ac97_write_actrl(struct ac97_controller * adrv,int slot,unsigned short reg,unsigned short val)48*4882a593Smuzhiyun static int pxa2xx_ac97_write_actrl(struct ac97_controller *adrv, int slot,
49*4882a593Smuzhiyun unsigned short reg, unsigned short val)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun return pxa2xx_ac97_write(slot, reg, val);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun static struct ac97_controller_ops pxa2xx_ac97_ops = {
55*4882a593Smuzhiyun .read = pxa2xx_ac97_read_actrl,
56*4882a593Smuzhiyun .write = pxa2xx_ac97_write_actrl,
57*4882a593Smuzhiyun .warm_reset = pxa2xx_ac97_warm_reset,
58*4882a593Smuzhiyun .reset = pxa2xx_ac97_cold_reset,
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_stereo_in = {
62*4882a593Smuzhiyun .addr = __PREG(PCDR),
63*4882a593Smuzhiyun .addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
64*4882a593Smuzhiyun .chan_name = "pcm_pcm_stereo_in",
65*4882a593Smuzhiyun .maxburst = 32,
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_stereo_out = {
69*4882a593Smuzhiyun .addr = __PREG(PCDR),
70*4882a593Smuzhiyun .addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
71*4882a593Smuzhiyun .chan_name = "pcm_pcm_stereo_out",
72*4882a593Smuzhiyun .maxburst = 32,
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_aux_mono_out = {
76*4882a593Smuzhiyun .addr = __PREG(MODR),
77*4882a593Smuzhiyun .addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES,
78*4882a593Smuzhiyun .chan_name = "pcm_aux_mono_out",
79*4882a593Smuzhiyun .maxburst = 16,
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_aux_mono_in = {
83*4882a593Smuzhiyun .addr = __PREG(MODR),
84*4882a593Smuzhiyun .addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES,
85*4882a593Smuzhiyun .chan_name = "pcm_aux_mono_in",
86*4882a593Smuzhiyun .maxburst = 16,
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_mic_mono_in = {
90*4882a593Smuzhiyun .addr = __PREG(MCDR),
91*4882a593Smuzhiyun .addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES,
92*4882a593Smuzhiyun .chan_name = "pcm_aux_mic_mono",
93*4882a593Smuzhiyun .maxburst = 16,
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun
pxa2xx_ac97_hifi_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * cpu_dai)96*4882a593Smuzhiyun static int pxa2xx_ac97_hifi_startup(struct snd_pcm_substream *substream,
97*4882a593Smuzhiyun struct snd_soc_dai *cpu_dai)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun struct snd_dmaengine_dai_dma_data *dma_data;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
102*4882a593Smuzhiyun dma_data = &pxa2xx_ac97_pcm_stereo_out;
103*4882a593Smuzhiyun else
104*4882a593Smuzhiyun dma_data = &pxa2xx_ac97_pcm_stereo_in;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun snd_soc_dai_set_dma_data(cpu_dai, substream, dma_data);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun return 0;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
pxa2xx_ac97_aux_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * cpu_dai)111*4882a593Smuzhiyun static int pxa2xx_ac97_aux_startup(struct snd_pcm_substream *substream,
112*4882a593Smuzhiyun struct snd_soc_dai *cpu_dai)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun struct snd_dmaengine_dai_dma_data *dma_data;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
117*4882a593Smuzhiyun dma_data = &pxa2xx_ac97_pcm_aux_mono_out;
118*4882a593Smuzhiyun else
119*4882a593Smuzhiyun dma_data = &pxa2xx_ac97_pcm_aux_mono_in;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun snd_soc_dai_set_dma_data(cpu_dai, substream, dma_data);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun return 0;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
pxa2xx_ac97_mic_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * cpu_dai)126*4882a593Smuzhiyun static int pxa2xx_ac97_mic_startup(struct snd_pcm_substream *substream,
127*4882a593Smuzhiyun struct snd_soc_dai *cpu_dai)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
130*4882a593Smuzhiyun return -ENODEV;
131*4882a593Smuzhiyun snd_soc_dai_set_dma_data(cpu_dai, substream,
132*4882a593Smuzhiyun &pxa2xx_ac97_pcm_mic_mono_in);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun return 0;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun #define PXA2XX_AC97_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
138*4882a593Smuzhiyun SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
139*4882a593Smuzhiyun SNDRV_PCM_RATE_48000)
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun static const struct snd_soc_dai_ops pxa_ac97_hifi_dai_ops = {
142*4882a593Smuzhiyun .startup = pxa2xx_ac97_hifi_startup,
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun static const struct snd_soc_dai_ops pxa_ac97_aux_dai_ops = {
146*4882a593Smuzhiyun .startup = pxa2xx_ac97_aux_startup,
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun static const struct snd_soc_dai_ops pxa_ac97_mic_dai_ops = {
150*4882a593Smuzhiyun .startup = pxa2xx_ac97_mic_startup,
151*4882a593Smuzhiyun };
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun /*
154*4882a593Smuzhiyun * There is only 1 physical AC97 interface for pxa2xx, but it
155*4882a593Smuzhiyun * has extra fifo's that can be used for aux DACs and ADCs.
156*4882a593Smuzhiyun */
157*4882a593Smuzhiyun static struct snd_soc_dai_driver pxa_ac97_dai_driver[] = {
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun .name = "pxa2xx-ac97",
160*4882a593Smuzhiyun .playback = {
161*4882a593Smuzhiyun .stream_name = "AC97 Playback",
162*4882a593Smuzhiyun .channels_min = 2,
163*4882a593Smuzhiyun .channels_max = 2,
164*4882a593Smuzhiyun .rates = PXA2XX_AC97_RATES,
165*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S16_LE,},
166*4882a593Smuzhiyun .capture = {
167*4882a593Smuzhiyun .stream_name = "AC97 Capture",
168*4882a593Smuzhiyun .channels_min = 2,
169*4882a593Smuzhiyun .channels_max = 2,
170*4882a593Smuzhiyun .rates = PXA2XX_AC97_RATES,
171*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S16_LE,},
172*4882a593Smuzhiyun .ops = &pxa_ac97_hifi_dai_ops,
173*4882a593Smuzhiyun },
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun .name = "pxa2xx-ac97-aux",
176*4882a593Smuzhiyun .playback = {
177*4882a593Smuzhiyun .stream_name = "AC97 Aux Playback",
178*4882a593Smuzhiyun .channels_min = 1,
179*4882a593Smuzhiyun .channels_max = 1,
180*4882a593Smuzhiyun .rates = PXA2XX_AC97_RATES,
181*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S16_LE,},
182*4882a593Smuzhiyun .capture = {
183*4882a593Smuzhiyun .stream_name = "AC97 Aux Capture",
184*4882a593Smuzhiyun .channels_min = 1,
185*4882a593Smuzhiyun .channels_max = 1,
186*4882a593Smuzhiyun .rates = PXA2XX_AC97_RATES,
187*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S16_LE,},
188*4882a593Smuzhiyun .ops = &pxa_ac97_aux_dai_ops,
189*4882a593Smuzhiyun },
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun .name = "pxa2xx-ac97-mic",
192*4882a593Smuzhiyun .capture = {
193*4882a593Smuzhiyun .stream_name = "AC97 Mic Capture",
194*4882a593Smuzhiyun .channels_min = 1,
195*4882a593Smuzhiyun .channels_max = 1,
196*4882a593Smuzhiyun .rates = PXA2XX_AC97_RATES,
197*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S16_LE,},
198*4882a593Smuzhiyun .ops = &pxa_ac97_mic_dai_ops,
199*4882a593Smuzhiyun },
200*4882a593Smuzhiyun };
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun static const struct snd_soc_component_driver pxa_ac97_component = {
203*4882a593Smuzhiyun .name = "pxa-ac97",
204*4882a593Smuzhiyun .pcm_construct = pxa2xx_soc_pcm_new,
205*4882a593Smuzhiyun .pcm_destruct = pxa2xx_soc_pcm_free,
206*4882a593Smuzhiyun .open = pxa2xx_soc_pcm_open,
207*4882a593Smuzhiyun .close = pxa2xx_soc_pcm_close,
208*4882a593Smuzhiyun .hw_params = pxa2xx_soc_pcm_hw_params,
209*4882a593Smuzhiyun .hw_free = pxa2xx_soc_pcm_hw_free,
210*4882a593Smuzhiyun .prepare = pxa2xx_soc_pcm_prepare,
211*4882a593Smuzhiyun .trigger = pxa2xx_soc_pcm_trigger,
212*4882a593Smuzhiyun .pointer = pxa2xx_soc_pcm_pointer,
213*4882a593Smuzhiyun .mmap = pxa2xx_soc_pcm_mmap,
214*4882a593Smuzhiyun };
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun #ifdef CONFIG_OF
217*4882a593Smuzhiyun static const struct of_device_id pxa2xx_ac97_dt_ids[] = {
218*4882a593Smuzhiyun { .compatible = "marvell,pxa250-ac97", },
219*4882a593Smuzhiyun { .compatible = "marvell,pxa270-ac97", },
220*4882a593Smuzhiyun { .compatible = "marvell,pxa300-ac97", },
221*4882a593Smuzhiyun { }
222*4882a593Smuzhiyun };
223*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, pxa2xx_ac97_dt_ids);
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun #endif
226*4882a593Smuzhiyun
pxa2xx_ac97_dev_probe(struct platform_device * pdev)227*4882a593Smuzhiyun static int pxa2xx_ac97_dev_probe(struct platform_device *pdev)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun int ret;
230*4882a593Smuzhiyun struct ac97_controller *ctrl;
231*4882a593Smuzhiyun pxa2xx_audio_ops_t *pdata = pdev->dev.platform_data;
232*4882a593Smuzhiyun void **codecs_pdata;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun if (pdev->id != -1) {
235*4882a593Smuzhiyun dev_err(&pdev->dev, "PXA2xx has only one AC97 port.\n");
236*4882a593Smuzhiyun return -ENXIO;
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun ret = pxa2xx_ac97_hw_probe(pdev);
240*4882a593Smuzhiyun if (ret) {
241*4882a593Smuzhiyun dev_err(&pdev->dev, "PXA2xx AC97 hw probe error (%d)\n", ret);
242*4882a593Smuzhiyun return ret;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun codecs_pdata = pdata ? pdata->codec_pdata : NULL;
246*4882a593Smuzhiyun ctrl = snd_ac97_controller_register(&pxa2xx_ac97_ops, &pdev->dev,
247*4882a593Smuzhiyun AC97_SLOTS_AVAILABLE_ALL,
248*4882a593Smuzhiyun codecs_pdata);
249*4882a593Smuzhiyun if (IS_ERR(ctrl))
250*4882a593Smuzhiyun return PTR_ERR(ctrl);
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun platform_set_drvdata(pdev, ctrl);
253*4882a593Smuzhiyun /* Punt most of the init to the SoC probe; we may need the machine
254*4882a593Smuzhiyun * driver to do interesting things with the clocking to get us up
255*4882a593Smuzhiyun * and running.
256*4882a593Smuzhiyun */
257*4882a593Smuzhiyun return devm_snd_soc_register_component(&pdev->dev, &pxa_ac97_component,
258*4882a593Smuzhiyun pxa_ac97_dai_driver, ARRAY_SIZE(pxa_ac97_dai_driver));
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
pxa2xx_ac97_dev_remove(struct platform_device * pdev)261*4882a593Smuzhiyun static int pxa2xx_ac97_dev_remove(struct platform_device *pdev)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun struct ac97_controller *ctrl = platform_get_drvdata(pdev);
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun snd_ac97_controller_unregister(ctrl);
266*4882a593Smuzhiyun pxa2xx_ac97_hw_remove(pdev);
267*4882a593Smuzhiyun return 0;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
pxa2xx_ac97_dev_suspend(struct device * dev)271*4882a593Smuzhiyun static int pxa2xx_ac97_dev_suspend(struct device *dev)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun return pxa2xx_ac97_hw_suspend();
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun
pxa2xx_ac97_dev_resume(struct device * dev)276*4882a593Smuzhiyun static int pxa2xx_ac97_dev_resume(struct device *dev)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun return pxa2xx_ac97_hw_resume();
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(pxa2xx_ac97_pm_ops,
282*4882a593Smuzhiyun pxa2xx_ac97_dev_suspend, pxa2xx_ac97_dev_resume);
283*4882a593Smuzhiyun #endif
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun static struct platform_driver pxa2xx_ac97_driver = {
286*4882a593Smuzhiyun .probe = pxa2xx_ac97_dev_probe,
287*4882a593Smuzhiyun .remove = pxa2xx_ac97_dev_remove,
288*4882a593Smuzhiyun .driver = {
289*4882a593Smuzhiyun .name = "pxa2xx-ac97",
290*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
291*4882a593Smuzhiyun .pm = &pxa2xx_ac97_pm_ops,
292*4882a593Smuzhiyun #endif
293*4882a593Smuzhiyun .of_match_table = of_match_ptr(pxa2xx_ac97_dt_ids),
294*4882a593Smuzhiyun },
295*4882a593Smuzhiyun };
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun module_platform_driver(pxa2xx_ac97_driver);
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun MODULE_AUTHOR("Nicolas Pitre");
300*4882a593Smuzhiyun MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
301*4882a593Smuzhiyun MODULE_LICENSE("GPL");
302*4882a593Smuzhiyun MODULE_ALIAS("platform:pxa2xx-ac97");
303