1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _MXS_SAIF_H 8*4882a593Smuzhiyun #define _MXS_SAIF_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define SAIF_CTRL 0x0 11*4882a593Smuzhiyun #define SAIF_STAT 0x10 12*4882a593Smuzhiyun #define SAIF_DATA 0x20 13*4882a593Smuzhiyun #define SAIF_VERSION 0X30 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* SAIF_CTRL */ 16*4882a593Smuzhiyun #define BM_SAIF_CTRL_SFTRST 0x80000000 17*4882a593Smuzhiyun #define BM_SAIF_CTRL_CLKGATE 0x40000000 18*4882a593Smuzhiyun #define BP_SAIF_CTRL_BITCLK_MULT_RATE 27 19*4882a593Smuzhiyun #define BM_SAIF_CTRL_BITCLK_MULT_RATE 0x38000000 20*4882a593Smuzhiyun #define BF_SAIF_CTRL_BITCLK_MULT_RATE(v) \ 21*4882a593Smuzhiyun (((v) << 27) & BM_SAIF_CTRL_BITCLK_MULT_RATE) 22*4882a593Smuzhiyun #define BM_SAIF_CTRL_BITCLK_BASE_RATE 0x04000000 23*4882a593Smuzhiyun #define BM_SAIF_CTRL_FIFO_ERROR_IRQ_EN 0x02000000 24*4882a593Smuzhiyun #define BM_SAIF_CTRL_FIFO_SERVICE_IRQ_EN 0x01000000 25*4882a593Smuzhiyun #define BP_SAIF_CTRL_RSRVD2 21 26*4882a593Smuzhiyun #define BM_SAIF_CTRL_RSRVD2 0x00E00000 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define BP_SAIF_CTRL_DMAWAIT_COUNT 16 29*4882a593Smuzhiyun #define BM_SAIF_CTRL_DMAWAIT_COUNT 0x001F0000 30*4882a593Smuzhiyun #define BF_SAIF_CTRL_DMAWAIT_COUNT(v) \ 31*4882a593Smuzhiyun (((v) << 16) & BM_SAIF_CTRL_DMAWAIT_COUNT) 32*4882a593Smuzhiyun #define BP_SAIF_CTRL_CHANNEL_NUM_SELECT 14 33*4882a593Smuzhiyun #define BM_SAIF_CTRL_CHANNEL_NUM_SELECT 0x0000C000 34*4882a593Smuzhiyun #define BF_SAIF_CTRL_CHANNEL_NUM_SELECT(v) \ 35*4882a593Smuzhiyun (((v) << 14) & BM_SAIF_CTRL_CHANNEL_NUM_SELECT) 36*4882a593Smuzhiyun #define BM_SAIF_CTRL_LRCLK_PULSE 0x00002000 37*4882a593Smuzhiyun #define BM_SAIF_CTRL_BIT_ORDER 0x00001000 38*4882a593Smuzhiyun #define BM_SAIF_CTRL_DELAY 0x00000800 39*4882a593Smuzhiyun #define BM_SAIF_CTRL_JUSTIFY 0x00000400 40*4882a593Smuzhiyun #define BM_SAIF_CTRL_LRCLK_POLARITY 0x00000200 41*4882a593Smuzhiyun #define BM_SAIF_CTRL_BITCLK_EDGE 0x00000100 42*4882a593Smuzhiyun #define BP_SAIF_CTRL_WORD_LENGTH 4 43*4882a593Smuzhiyun #define BM_SAIF_CTRL_WORD_LENGTH 0x000000F0 44*4882a593Smuzhiyun #define BF_SAIF_CTRL_WORD_LENGTH(v) \ 45*4882a593Smuzhiyun (((v) << 4) & BM_SAIF_CTRL_WORD_LENGTH) 46*4882a593Smuzhiyun #define BM_SAIF_CTRL_BITCLK_48XFS_ENABLE 0x00000008 47*4882a593Smuzhiyun #define BM_SAIF_CTRL_SLAVE_MODE 0x00000004 48*4882a593Smuzhiyun #define BM_SAIF_CTRL_READ_MODE 0x00000002 49*4882a593Smuzhiyun #define BM_SAIF_CTRL_RUN 0x00000001 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* SAIF_STAT */ 52*4882a593Smuzhiyun #define BM_SAIF_STAT_PRESENT 0x80000000 53*4882a593Smuzhiyun #define BP_SAIF_STAT_RSRVD2 17 54*4882a593Smuzhiyun #define BM_SAIF_STAT_RSRVD2 0x7FFE0000 55*4882a593Smuzhiyun #define BF_SAIF_STAT_RSRVD2(v) \ 56*4882a593Smuzhiyun (((v) << 17) & BM_SAIF_STAT_RSRVD2) 57*4882a593Smuzhiyun #define BM_SAIF_STAT_DMA_PREQ 0x00010000 58*4882a593Smuzhiyun #define BP_SAIF_STAT_RSRVD1 7 59*4882a593Smuzhiyun #define BM_SAIF_STAT_RSRVD1 0x0000FF80 60*4882a593Smuzhiyun #define BF_SAIF_STAT_RSRVD1(v) \ 61*4882a593Smuzhiyun (((v) << 7) & BM_SAIF_STAT_RSRVD1) 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun #define BM_SAIF_STAT_FIFO_UNDERFLOW_IRQ 0x00000040 64*4882a593Smuzhiyun #define BM_SAIF_STAT_FIFO_OVERFLOW_IRQ 0x00000020 65*4882a593Smuzhiyun #define BM_SAIF_STAT_FIFO_SERVICE_IRQ 0x00000010 66*4882a593Smuzhiyun #define BP_SAIF_STAT_RSRVD0 1 67*4882a593Smuzhiyun #define BM_SAIF_STAT_RSRVD0 0x0000000E 68*4882a593Smuzhiyun #define BF_SAIF_STAT_RSRVD0(v) \ 69*4882a593Smuzhiyun (((v) << 1) & BM_SAIF_STAT_RSRVD0) 70*4882a593Smuzhiyun #define BM_SAIF_STAT_BUSY 0x00000001 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun /* SAFI_DATA */ 73*4882a593Smuzhiyun #define BP_SAIF_DATA_PCM_RIGHT 16 74*4882a593Smuzhiyun #define BM_SAIF_DATA_PCM_RIGHT 0xFFFF0000 75*4882a593Smuzhiyun #define BF_SAIF_DATA_PCM_RIGHT(v) \ 76*4882a593Smuzhiyun (((v) << 16) & BM_SAIF_DATA_PCM_RIGHT) 77*4882a593Smuzhiyun #define BP_SAIF_DATA_PCM_LEFT 0 78*4882a593Smuzhiyun #define BM_SAIF_DATA_PCM_LEFT 0x0000FFFF 79*4882a593Smuzhiyun #define BF_SAIF_DATA_PCM_LEFT(v) \ 80*4882a593Smuzhiyun (((v) << 0) & BM_SAIF_DATA_PCM_LEFT) 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun /* SAIF_VERSION */ 83*4882a593Smuzhiyun #define BP_SAIF_VERSION_MAJOR 24 84*4882a593Smuzhiyun #define BM_SAIF_VERSION_MAJOR 0xFF000000 85*4882a593Smuzhiyun #define BF_SAIF_VERSION_MAJOR(v) \ 86*4882a593Smuzhiyun (((v) << 24) & BM_SAIF_VERSION_MAJOR) 87*4882a593Smuzhiyun #define BP_SAIF_VERSION_MINOR 16 88*4882a593Smuzhiyun #define BM_SAIF_VERSION_MINOR 0x00FF0000 89*4882a593Smuzhiyun #define BF_SAIF_VERSION_MINOR(v) \ 90*4882a593Smuzhiyun (((v) << 16) & BM_SAIF_VERSION_MINOR) 91*4882a593Smuzhiyun #define BP_SAIF_VERSION_STEP 0 92*4882a593Smuzhiyun #define BM_SAIF_VERSION_STEP 0x0000FFFF 93*4882a593Smuzhiyun #define BF_SAIF_VERSION_STEP(v) \ 94*4882a593Smuzhiyun (((v) << 0) & BM_SAIF_VERSION_STEP) 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun #define MXS_SAIF_MCLK 0 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun #include "mxs-pcm.h" 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun struct mxs_saif { 101*4882a593Smuzhiyun struct device *dev; 102*4882a593Smuzhiyun struct clk *clk; 103*4882a593Smuzhiyun unsigned int mclk; 104*4882a593Smuzhiyun unsigned int mclk_in_use; 105*4882a593Smuzhiyun void __iomem *base; 106*4882a593Smuzhiyun unsigned int id; 107*4882a593Smuzhiyun unsigned int master_id; 108*4882a593Smuzhiyun unsigned int cur_rate; 109*4882a593Smuzhiyun unsigned int ongoing; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun u32 fifo_underrun; 112*4882a593Smuzhiyun u32 fifo_overrun; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun enum { 115*4882a593Smuzhiyun MXS_SAIF_STATE_STOPPED, 116*4882a593Smuzhiyun MXS_SAIF_STATE_RUNNING, 117*4882a593Smuzhiyun } state; 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun extern int mxs_saif_put_mclk(unsigned int saif_id); 121*4882a593Smuzhiyun extern int mxs_saif_get_mclk(unsigned int saif_id, unsigned int mclk, 122*4882a593Smuzhiyun unsigned int rate); 123*4882a593Smuzhiyun #endif 124