1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Copyright (c) 2020 BayLibre, SAS.
4*4882a593Smuzhiyun // Author: Jerome Brunet <jbrunet@baylibre.com>
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/bitfield.h>
7*4882a593Smuzhiyun #include <linux/clk.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <sound/pcm_params.h>
10*4882a593Smuzhiyun #include <linux/regmap.h>
11*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
12*4882a593Smuzhiyun #include <linux/reset.h>
13*4882a593Smuzhiyun #include <sound/soc.h>
14*4882a593Smuzhiyun #include <sound/soc-dai.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <dt-bindings/sound/meson-g12a-toacodec.h>
17*4882a593Smuzhiyun #include "axg-tdm.h"
18*4882a593Smuzhiyun #include "meson-codec-glue.h"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define G12A_TOACODEC_DRV_NAME "g12a-toacodec"
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define TOACODEC_CTRL0 0x0
23*4882a593Smuzhiyun #define CTRL0_ENABLE_SHIFT 31
24*4882a593Smuzhiyun #define CTRL0_DAT_SEL_SHIFT 14
25*4882a593Smuzhiyun #define CTRL0_DAT_SEL (0x3 << CTRL0_DAT_SEL_SHIFT)
26*4882a593Smuzhiyun #define CTRL0_LANE_SEL 12
27*4882a593Smuzhiyun #define CTRL0_LRCLK_SEL GENMASK(9, 8)
28*4882a593Smuzhiyun #define CTRL0_BLK_CAP_INV BIT(7)
29*4882a593Smuzhiyun #define CTRL0_BCLK_O_INV BIT(6)
30*4882a593Smuzhiyun #define CTRL0_BCLK_SEL GENMASK(5, 4)
31*4882a593Smuzhiyun #define CTRL0_MCLK_SEL GENMASK(2, 0)
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #define TOACODEC_OUT_CHMAX 2
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun static const char * const g12a_toacodec_mux_texts[] = {
36*4882a593Smuzhiyun "I2S A", "I2S B", "I2S C",
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun
g12a_toacodec_mux_put_enum(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)39*4882a593Smuzhiyun static int g12a_toacodec_mux_put_enum(struct snd_kcontrol *kcontrol,
40*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun struct snd_soc_component *component =
43*4882a593Smuzhiyun snd_soc_dapm_kcontrol_component(kcontrol);
44*4882a593Smuzhiyun struct snd_soc_dapm_context *dapm =
45*4882a593Smuzhiyun snd_soc_dapm_kcontrol_dapm(kcontrol);
46*4882a593Smuzhiyun struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
47*4882a593Smuzhiyun unsigned int mux, changed;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun mux = snd_soc_enum_item_to_val(e, ucontrol->value.enumerated.item[0]);
50*4882a593Smuzhiyun changed = snd_soc_component_test_bits(component, e->reg,
51*4882a593Smuzhiyun CTRL0_DAT_SEL,
52*4882a593Smuzhiyun FIELD_PREP(CTRL0_DAT_SEL, mux));
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun if (!changed)
55*4882a593Smuzhiyun return 0;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun /* Force disconnect of the mux while updating */
58*4882a593Smuzhiyun snd_soc_dapm_mux_update_power(dapm, kcontrol, 0, NULL, NULL);
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun snd_soc_component_update_bits(component, e->reg,
61*4882a593Smuzhiyun CTRL0_DAT_SEL |
62*4882a593Smuzhiyun CTRL0_LRCLK_SEL |
63*4882a593Smuzhiyun CTRL0_BCLK_SEL,
64*4882a593Smuzhiyun FIELD_PREP(CTRL0_DAT_SEL, mux) |
65*4882a593Smuzhiyun FIELD_PREP(CTRL0_LRCLK_SEL, mux) |
66*4882a593Smuzhiyun FIELD_PREP(CTRL0_BCLK_SEL, mux));
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /*
69*4882a593Smuzhiyun * FIXME:
70*4882a593Smuzhiyun * On this soc, the glue gets the MCLK directly from the clock
71*4882a593Smuzhiyun * controller instead of going the through the TDM interface.
72*4882a593Smuzhiyun *
73*4882a593Smuzhiyun * Here we assume interface A uses clock A, etc ... While it is
74*4882a593Smuzhiyun * true for now, it could be different. Instead the glue should
75*4882a593Smuzhiyun * find out the clock used by the interface and select the same
76*4882a593Smuzhiyun * source. For that, we will need regmap backed clock mux which
77*4882a593Smuzhiyun * is a work in progress
78*4882a593Smuzhiyun */
79*4882a593Smuzhiyun snd_soc_component_update_bits(component, e->reg,
80*4882a593Smuzhiyun CTRL0_MCLK_SEL,
81*4882a593Smuzhiyun FIELD_PREP(CTRL0_MCLK_SEL, mux));
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun snd_soc_dapm_mux_update_power(dapm, kcontrol, mux, e, NULL);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun return 0;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(g12a_toacodec_mux_enum, TOACODEC_CTRL0,
89*4882a593Smuzhiyun CTRL0_DAT_SEL_SHIFT,
90*4882a593Smuzhiyun g12a_toacodec_mux_texts);
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun static const struct snd_kcontrol_new g12a_toacodec_mux =
93*4882a593Smuzhiyun SOC_DAPM_ENUM_EXT("Source", g12a_toacodec_mux_enum,
94*4882a593Smuzhiyun snd_soc_dapm_get_enum_double,
95*4882a593Smuzhiyun g12a_toacodec_mux_put_enum);
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun static const struct snd_kcontrol_new g12a_toacodec_out_enable =
98*4882a593Smuzhiyun SOC_DAPM_SINGLE_AUTODISABLE("Switch", TOACODEC_CTRL0,
99*4882a593Smuzhiyun CTRL0_ENABLE_SHIFT, 1, 0);
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun static const struct snd_soc_dapm_widget g12a_toacodec_widgets[] = {
102*4882a593Smuzhiyun SND_SOC_DAPM_MUX("SRC", SND_SOC_NOPM, 0, 0,
103*4882a593Smuzhiyun &g12a_toacodec_mux),
104*4882a593Smuzhiyun SND_SOC_DAPM_SWITCH("OUT EN", SND_SOC_NOPM, 0, 0,
105*4882a593Smuzhiyun &g12a_toacodec_out_enable),
106*4882a593Smuzhiyun };
107*4882a593Smuzhiyun
g12a_toacodec_input_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)108*4882a593Smuzhiyun static int g12a_toacodec_input_hw_params(struct snd_pcm_substream *substream,
109*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
110*4882a593Smuzhiyun struct snd_soc_dai *dai)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun struct meson_codec_glue_input *data;
113*4882a593Smuzhiyun int ret;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun ret = meson_codec_glue_input_hw_params(substream, params, dai);
116*4882a593Smuzhiyun if (ret)
117*4882a593Smuzhiyun return ret;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun /* The glue will provide 1 lane out of the 4 to the output */
120*4882a593Smuzhiyun data = meson_codec_glue_input_get_data(dai);
121*4882a593Smuzhiyun data->params.channels_min = min_t(unsigned int, TOACODEC_OUT_CHMAX,
122*4882a593Smuzhiyun data->params.channels_min);
123*4882a593Smuzhiyun data->params.channels_max = min_t(unsigned int, TOACODEC_OUT_CHMAX,
124*4882a593Smuzhiyun data->params.channels_max);
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun return 0;
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun static const struct snd_soc_dai_ops g12a_toacodec_input_ops = {
130*4882a593Smuzhiyun .hw_params = g12a_toacodec_input_hw_params,
131*4882a593Smuzhiyun .set_fmt = meson_codec_glue_input_set_fmt,
132*4882a593Smuzhiyun };
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun static const struct snd_soc_dai_ops g12a_toacodec_output_ops = {
135*4882a593Smuzhiyun .startup = meson_codec_glue_output_startup,
136*4882a593Smuzhiyun };
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun #define TOACODEC_STREAM(xname, xsuffix, xchmax) \
139*4882a593Smuzhiyun { \
140*4882a593Smuzhiyun .stream_name = xname " " xsuffix, \
141*4882a593Smuzhiyun .channels_min = 1, \
142*4882a593Smuzhiyun .channels_max = (xchmax), \
143*4882a593Smuzhiyun .rate_min = 5512, \
144*4882a593Smuzhiyun .rate_max = 192000, \
145*4882a593Smuzhiyun .formats = AXG_TDM_FORMATS, \
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun #define TOACODEC_INPUT(xname, xid) { \
149*4882a593Smuzhiyun .name = xname, \
150*4882a593Smuzhiyun .id = (xid), \
151*4882a593Smuzhiyun .playback = TOACODEC_STREAM(xname, "Playback", 8), \
152*4882a593Smuzhiyun .ops = &g12a_toacodec_input_ops, \
153*4882a593Smuzhiyun .probe = meson_codec_glue_input_dai_probe, \
154*4882a593Smuzhiyun .remove = meson_codec_glue_input_dai_remove, \
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun #define TOACODEC_OUTPUT(xname, xid) { \
158*4882a593Smuzhiyun .name = xname, \
159*4882a593Smuzhiyun .id = (xid), \
160*4882a593Smuzhiyun .capture = TOACODEC_STREAM(xname, "Capture", TOACODEC_OUT_CHMAX), \
161*4882a593Smuzhiyun .ops = &g12a_toacodec_output_ops, \
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun static struct snd_soc_dai_driver g12a_toacodec_dai_drv[] = {
165*4882a593Smuzhiyun TOACODEC_INPUT("IN A", TOACODEC_IN_A),
166*4882a593Smuzhiyun TOACODEC_INPUT("IN B", TOACODEC_IN_B),
167*4882a593Smuzhiyun TOACODEC_INPUT("IN C", TOACODEC_IN_C),
168*4882a593Smuzhiyun TOACODEC_OUTPUT("OUT", TOACODEC_OUT),
169*4882a593Smuzhiyun };
170*4882a593Smuzhiyun
g12a_toacodec_component_probe(struct snd_soc_component * c)171*4882a593Smuzhiyun static int g12a_toacodec_component_probe(struct snd_soc_component *c)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun /* Initialize the static clock parameters */
174*4882a593Smuzhiyun return snd_soc_component_write(c, TOACODEC_CTRL0,
175*4882a593Smuzhiyun CTRL0_BLK_CAP_INV);
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun static const struct snd_soc_dapm_route g12a_toacodec_routes[] = {
179*4882a593Smuzhiyun { "SRC", "I2S A", "IN A Playback" },
180*4882a593Smuzhiyun { "SRC", "I2S B", "IN B Playback" },
181*4882a593Smuzhiyun { "SRC", "I2S C", "IN C Playback" },
182*4882a593Smuzhiyun { "OUT EN", "Switch", "SRC" },
183*4882a593Smuzhiyun { "OUT Capture", NULL, "OUT EN" },
184*4882a593Smuzhiyun };
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun static const struct snd_kcontrol_new g12a_toacodec_controls[] = {
187*4882a593Smuzhiyun SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL, 3, 0),
188*4882a593Smuzhiyun };
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun static const struct snd_soc_component_driver g12a_toacodec_component_drv = {
191*4882a593Smuzhiyun .probe = g12a_toacodec_component_probe,
192*4882a593Smuzhiyun .controls = g12a_toacodec_controls,
193*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(g12a_toacodec_controls),
194*4882a593Smuzhiyun .dapm_widgets = g12a_toacodec_widgets,
195*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(g12a_toacodec_widgets),
196*4882a593Smuzhiyun .dapm_routes = g12a_toacodec_routes,
197*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(g12a_toacodec_routes),
198*4882a593Smuzhiyun .endianness = 1,
199*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
200*4882a593Smuzhiyun };
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun static const struct regmap_config g12a_toacodec_regmap_cfg = {
203*4882a593Smuzhiyun .reg_bits = 32,
204*4882a593Smuzhiyun .val_bits = 32,
205*4882a593Smuzhiyun .reg_stride = 4,
206*4882a593Smuzhiyun };
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun static const struct of_device_id g12a_toacodec_of_match[] = {
209*4882a593Smuzhiyun { .compatible = "amlogic,g12a-toacodec", },
210*4882a593Smuzhiyun {}
211*4882a593Smuzhiyun };
212*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, g12a_toacodec_of_match);
213*4882a593Smuzhiyun
g12a_toacodec_probe(struct platform_device * pdev)214*4882a593Smuzhiyun static int g12a_toacodec_probe(struct platform_device *pdev)
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun struct device *dev = &pdev->dev;
217*4882a593Smuzhiyun void __iomem *regs;
218*4882a593Smuzhiyun struct regmap *map;
219*4882a593Smuzhiyun int ret;
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun ret = device_reset(dev);
222*4882a593Smuzhiyun if (ret)
223*4882a593Smuzhiyun return ret;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun regs = devm_platform_ioremap_resource(pdev, 0);
226*4882a593Smuzhiyun if (IS_ERR(regs))
227*4882a593Smuzhiyun return PTR_ERR(regs);
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun map = devm_regmap_init_mmio(dev, regs, &g12a_toacodec_regmap_cfg);
230*4882a593Smuzhiyun if (IS_ERR(map)) {
231*4882a593Smuzhiyun dev_err(dev, "failed to init regmap: %ld\n",
232*4882a593Smuzhiyun PTR_ERR(map));
233*4882a593Smuzhiyun return PTR_ERR(map);
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun return devm_snd_soc_register_component(dev,
237*4882a593Smuzhiyun &g12a_toacodec_component_drv, g12a_toacodec_dai_drv,
238*4882a593Smuzhiyun ARRAY_SIZE(g12a_toacodec_dai_drv));
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun static struct platform_driver g12a_toacodec_pdrv = {
242*4882a593Smuzhiyun .driver = {
243*4882a593Smuzhiyun .name = G12A_TOACODEC_DRV_NAME,
244*4882a593Smuzhiyun .of_match_table = g12a_toacodec_of_match,
245*4882a593Smuzhiyun },
246*4882a593Smuzhiyun .probe = g12a_toacodec_probe,
247*4882a593Smuzhiyun };
248*4882a593Smuzhiyun module_platform_driver(g12a_toacodec_pdrv);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
251*4882a593Smuzhiyun MODULE_DESCRIPTION("Amlogic G12a To Internal DAC Codec Driver");
252*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
253