1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Copyright (c) 2020 BayLibre, SAS.
4*4882a593Smuzhiyun // Author: Jerome Brunet <jbrunet@baylibre.com>
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/bitfield.h>
7*4882a593Smuzhiyun #include <sound/pcm_params.h>
8*4882a593Smuzhiyun #include <sound/soc.h>
9*4882a593Smuzhiyun #include <sound/soc-dai.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <dt-bindings/sound/meson-aiu.h>
12*4882a593Smuzhiyun #include "aiu.h"
13*4882a593Smuzhiyun #include "meson-codec-glue.h"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define CTRL_CLK_SEL GENMASK(1, 0)
16*4882a593Smuzhiyun #define CTRL_DATA_SEL_SHIFT 4
17*4882a593Smuzhiyun #define CTRL_DATA_SEL (0x3 << CTRL_DATA_SEL_SHIFT)
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun static const char * const aiu_codec_ctrl_mux_texts[] = {
20*4882a593Smuzhiyun "DISABLED", "PCM", "I2S",
21*4882a593Smuzhiyun };
22*4882a593Smuzhiyun
aiu_codec_ctrl_mux_put_enum(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)23*4882a593Smuzhiyun static int aiu_codec_ctrl_mux_put_enum(struct snd_kcontrol *kcontrol,
24*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun struct snd_soc_component *component =
27*4882a593Smuzhiyun snd_soc_dapm_kcontrol_component(kcontrol);
28*4882a593Smuzhiyun struct snd_soc_dapm_context *dapm =
29*4882a593Smuzhiyun snd_soc_dapm_kcontrol_dapm(kcontrol);
30*4882a593Smuzhiyun struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
31*4882a593Smuzhiyun unsigned int mux, changed;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun mux = snd_soc_enum_item_to_val(e, ucontrol->value.enumerated.item[0]);
34*4882a593Smuzhiyun changed = snd_soc_component_test_bits(component, e->reg,
35*4882a593Smuzhiyun CTRL_DATA_SEL,
36*4882a593Smuzhiyun FIELD_PREP(CTRL_DATA_SEL, mux));
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun if (!changed)
39*4882a593Smuzhiyun return 0;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /* Force disconnect of the mux while updating */
42*4882a593Smuzhiyun snd_soc_dapm_mux_update_power(dapm, kcontrol, 0, NULL, NULL);
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun /* Reset the source first */
45*4882a593Smuzhiyun snd_soc_component_update_bits(component, e->reg,
46*4882a593Smuzhiyun CTRL_CLK_SEL |
47*4882a593Smuzhiyun CTRL_DATA_SEL,
48*4882a593Smuzhiyun FIELD_PREP(CTRL_CLK_SEL, 0) |
49*4882a593Smuzhiyun FIELD_PREP(CTRL_DATA_SEL, 0));
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* Set the appropriate source */
52*4882a593Smuzhiyun snd_soc_component_update_bits(component, e->reg,
53*4882a593Smuzhiyun CTRL_CLK_SEL |
54*4882a593Smuzhiyun CTRL_DATA_SEL,
55*4882a593Smuzhiyun FIELD_PREP(CTRL_CLK_SEL, mux) |
56*4882a593Smuzhiyun FIELD_PREP(CTRL_DATA_SEL, mux));
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun snd_soc_dapm_mux_update_power(dapm, kcontrol, mux, e, NULL);
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun return 1;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(aiu_hdmi_ctrl_mux_enum, AIU_HDMI_CLK_DATA_CTRL,
64*4882a593Smuzhiyun CTRL_DATA_SEL_SHIFT,
65*4882a593Smuzhiyun aiu_codec_ctrl_mux_texts);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun static const struct snd_kcontrol_new aiu_hdmi_ctrl_mux =
68*4882a593Smuzhiyun SOC_DAPM_ENUM_EXT("HDMI Source", aiu_hdmi_ctrl_mux_enum,
69*4882a593Smuzhiyun snd_soc_dapm_get_enum_double,
70*4882a593Smuzhiyun aiu_codec_ctrl_mux_put_enum);
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun static const struct snd_soc_dapm_widget aiu_hdmi_ctrl_widgets[] = {
73*4882a593Smuzhiyun SND_SOC_DAPM_MUX("HDMI CTRL SRC", SND_SOC_NOPM, 0, 0,
74*4882a593Smuzhiyun &aiu_hdmi_ctrl_mux),
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun static const struct snd_soc_dai_ops aiu_codec_ctrl_input_ops = {
78*4882a593Smuzhiyun .hw_params = meson_codec_glue_input_hw_params,
79*4882a593Smuzhiyun .set_fmt = meson_codec_glue_input_set_fmt,
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun static const struct snd_soc_dai_ops aiu_codec_ctrl_output_ops = {
83*4882a593Smuzhiyun .startup = meson_codec_glue_output_startup,
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun #define AIU_CODEC_CTRL_FORMATS \
87*4882a593Smuzhiyun (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
88*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE | \
89*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S32_LE)
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun #define AIU_CODEC_CTRL_STREAM(xname, xsuffix) \
92*4882a593Smuzhiyun { \
93*4882a593Smuzhiyun .stream_name = xname " " xsuffix, \
94*4882a593Smuzhiyun .channels_min = 1, \
95*4882a593Smuzhiyun .channels_max = 8, \
96*4882a593Smuzhiyun .rate_min = 5512, \
97*4882a593Smuzhiyun .rate_max = 192000, \
98*4882a593Smuzhiyun .formats = AIU_CODEC_CTRL_FORMATS, \
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun #define AIU_CODEC_CTRL_INPUT(xname) { \
102*4882a593Smuzhiyun .name = "CODEC CTRL " xname, \
103*4882a593Smuzhiyun .playback = AIU_CODEC_CTRL_STREAM(xname, "Playback"), \
104*4882a593Smuzhiyun .ops = &aiu_codec_ctrl_input_ops, \
105*4882a593Smuzhiyun .probe = meson_codec_glue_input_dai_probe, \
106*4882a593Smuzhiyun .remove = meson_codec_glue_input_dai_remove, \
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun #define AIU_CODEC_CTRL_OUTPUT(xname) { \
110*4882a593Smuzhiyun .name = "CODEC CTRL " xname, \
111*4882a593Smuzhiyun .capture = AIU_CODEC_CTRL_STREAM(xname, "Capture"), \
112*4882a593Smuzhiyun .ops = &aiu_codec_ctrl_output_ops, \
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun static struct snd_soc_dai_driver aiu_hdmi_ctrl_dai_drv[] = {
116*4882a593Smuzhiyun [CTRL_I2S] = AIU_CODEC_CTRL_INPUT("HDMI I2S IN"),
117*4882a593Smuzhiyun [CTRL_PCM] = AIU_CODEC_CTRL_INPUT("HDMI PCM IN"),
118*4882a593Smuzhiyun [CTRL_OUT] = AIU_CODEC_CTRL_OUTPUT("HDMI OUT"),
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun static const struct snd_soc_dapm_route aiu_hdmi_ctrl_routes[] = {
122*4882a593Smuzhiyun { "HDMI CTRL SRC", "I2S", "HDMI I2S IN Playback" },
123*4882a593Smuzhiyun { "HDMI CTRL SRC", "PCM", "HDMI PCM IN Playback" },
124*4882a593Smuzhiyun { "HDMI OUT Capture", NULL, "HDMI CTRL SRC" },
125*4882a593Smuzhiyun };
126*4882a593Smuzhiyun
aiu_hdmi_of_xlate_dai_name(struct snd_soc_component * component,struct of_phandle_args * args,const char ** dai_name)127*4882a593Smuzhiyun static int aiu_hdmi_of_xlate_dai_name(struct snd_soc_component *component,
128*4882a593Smuzhiyun struct of_phandle_args *args,
129*4882a593Smuzhiyun const char **dai_name)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun return aiu_of_xlate_dai_name(component, args, dai_name, AIU_HDMI);
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun static const struct snd_soc_component_driver aiu_hdmi_ctrl_component = {
135*4882a593Smuzhiyun .name = "AIU HDMI Codec Control",
136*4882a593Smuzhiyun .dapm_widgets = aiu_hdmi_ctrl_widgets,
137*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(aiu_hdmi_ctrl_widgets),
138*4882a593Smuzhiyun .dapm_routes = aiu_hdmi_ctrl_routes,
139*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(aiu_hdmi_ctrl_routes),
140*4882a593Smuzhiyun .of_xlate_dai_name = aiu_hdmi_of_xlate_dai_name,
141*4882a593Smuzhiyun .endianness = 1,
142*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun
aiu_hdmi_ctrl_register_component(struct device * dev)145*4882a593Smuzhiyun int aiu_hdmi_ctrl_register_component(struct device *dev)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun return snd_soc_register_component(dev, &aiu_hdmi_ctrl_component,
148*4882a593Smuzhiyun aiu_hdmi_ctrl_dai_drv,
149*4882a593Smuzhiyun ARRAY_SIZE(aiu_hdmi_ctrl_dai_drv));
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun
152