1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * mt8173_afe_common.h -- Mediatek 8173 audio driver common definitions 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2015 MediaTek Inc. 6*4882a593Smuzhiyun * Author: Koro Chen <koro.chen@mediatek.com> 7*4882a593Smuzhiyun * Sascha Hauer <s.hauer@pengutronix.de> 8*4882a593Smuzhiyun * Hidalgo Huang <hidalgo.huang@mediatek.com> 9*4882a593Smuzhiyun * Ir Lian <ir.lian@mediatek.com> 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #ifndef _MT8173_AFE_COMMON_H_ 13*4882a593Smuzhiyun #define _MT8173_AFE_COMMON_H_ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #include <linux/clk.h> 16*4882a593Smuzhiyun #include <linux/regmap.h> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun enum { 19*4882a593Smuzhiyun MT8173_AFE_MEMIF_DL1, 20*4882a593Smuzhiyun MT8173_AFE_MEMIF_DL2, 21*4882a593Smuzhiyun MT8173_AFE_MEMIF_VUL, 22*4882a593Smuzhiyun MT8173_AFE_MEMIF_DAI, 23*4882a593Smuzhiyun MT8173_AFE_MEMIF_AWB, 24*4882a593Smuzhiyun MT8173_AFE_MEMIF_MOD_DAI, 25*4882a593Smuzhiyun MT8173_AFE_MEMIF_HDMI, 26*4882a593Smuzhiyun MT8173_AFE_MEMIF_NUM, 27*4882a593Smuzhiyun MT8173_AFE_IO_MOD_PCM1 = MT8173_AFE_MEMIF_NUM, 28*4882a593Smuzhiyun MT8173_AFE_IO_MOD_PCM2, 29*4882a593Smuzhiyun MT8173_AFE_IO_PMIC, 30*4882a593Smuzhiyun MT8173_AFE_IO_I2S, 31*4882a593Smuzhiyun MT8173_AFE_IO_2ND_I2S, 32*4882a593Smuzhiyun MT8173_AFE_IO_HW_GAIN1, 33*4882a593Smuzhiyun MT8173_AFE_IO_HW_GAIN2, 34*4882a593Smuzhiyun MT8173_AFE_IO_MRG_O, 35*4882a593Smuzhiyun MT8173_AFE_IO_MRG_I, 36*4882a593Smuzhiyun MT8173_AFE_IO_DAIBT, 37*4882a593Smuzhiyun MT8173_AFE_IO_HDMI, 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun enum { 41*4882a593Smuzhiyun MT8173_AFE_IRQ_DL1, 42*4882a593Smuzhiyun MT8173_AFE_IRQ_DL2, 43*4882a593Smuzhiyun MT8173_AFE_IRQ_VUL, 44*4882a593Smuzhiyun MT8173_AFE_IRQ_DAI, 45*4882a593Smuzhiyun MT8173_AFE_IRQ_AWB, 46*4882a593Smuzhiyun MT8173_AFE_IRQ_MOD_DAI, 47*4882a593Smuzhiyun MT8173_AFE_IRQ_HDMI, 48*4882a593Smuzhiyun MT8173_AFE_IRQ_NUM, 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun enum { 52*4882a593Smuzhiyun MT8173_CLK_INFRASYS_AUD, 53*4882a593Smuzhiyun MT8173_CLK_TOP_PDN_AUD, 54*4882a593Smuzhiyun MT8173_CLK_TOP_PDN_AUD_BUS, 55*4882a593Smuzhiyun MT8173_CLK_I2S0_M, 56*4882a593Smuzhiyun MT8173_CLK_I2S1_M, 57*4882a593Smuzhiyun MT8173_CLK_I2S2_M, 58*4882a593Smuzhiyun MT8173_CLK_I2S3_M, 59*4882a593Smuzhiyun MT8173_CLK_I2S3_B, 60*4882a593Smuzhiyun MT8173_CLK_BCK0, 61*4882a593Smuzhiyun MT8173_CLK_BCK1, 62*4882a593Smuzhiyun MT8173_CLK_NUM 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun #endif 66