1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // MediaTek ALSA SoC Audio DAI I2S Control
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (c) 2018 MediaTek Inc.
6*4882a593Smuzhiyun // Author: KaiChieh Chuang <kaichieh.chuang@mediatek.com>
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/regmap.h>
9*4882a593Smuzhiyun #include <sound/pcm_params.h>
10*4882a593Smuzhiyun #include "mt6797-afe-common.h"
11*4882a593Smuzhiyun #include "mt6797-interconnection.h"
12*4882a593Smuzhiyun #include "mt6797-reg.h"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun enum AUD_TX_LCH_RPT {
15*4882a593Smuzhiyun AUD_TX_LCH_RPT_NO_REPEAT = 0,
16*4882a593Smuzhiyun AUD_TX_LCH_RPT_REPEAT = 1
17*4882a593Smuzhiyun };
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun enum AUD_VBT_16K_MODE {
20*4882a593Smuzhiyun AUD_VBT_16K_MODE_DISABLE = 0,
21*4882a593Smuzhiyun AUD_VBT_16K_MODE_ENABLE = 1
22*4882a593Smuzhiyun };
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun enum AUD_EXT_MODEM {
25*4882a593Smuzhiyun AUD_EXT_MODEM_SELECT_INTERNAL = 0,
26*4882a593Smuzhiyun AUD_EXT_MODEM_SELECT_EXTERNAL = 1
27*4882a593Smuzhiyun };
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun enum AUD_PCM_SYNC_TYPE {
30*4882a593Smuzhiyun /* bck sync length = 1 */
31*4882a593Smuzhiyun AUD_PCM_ONE_BCK_CYCLE_SYNC = 0,
32*4882a593Smuzhiyun /* bck sync length = PCM_INTF_CON1[9:13] */
33*4882a593Smuzhiyun AUD_PCM_EXTENDED_BCK_CYCLE_SYNC = 1
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun enum AUD_BT_MODE {
37*4882a593Smuzhiyun AUD_BT_MODE_DUAL_MIC_ON_TX = 0,
38*4882a593Smuzhiyun AUD_BT_MODE_SINGLE_MIC_ON_TX = 1
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun enum AUD_PCM_AFIFO_SRC {
42*4882a593Smuzhiyun /* slave mode & external modem uses different crystal */
43*4882a593Smuzhiyun AUD_PCM_AFIFO_ASRC = 0,
44*4882a593Smuzhiyun /* slave mode & external modem uses the same crystal */
45*4882a593Smuzhiyun AUD_PCM_AFIFO_AFIFO = 1
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun enum AUD_PCM_CLOCK_SOURCE {
49*4882a593Smuzhiyun AUD_PCM_CLOCK_MASTER_MODE = 0,
50*4882a593Smuzhiyun AUD_PCM_CLOCK_SLAVE_MODE = 1
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun enum AUD_PCM_WLEN {
54*4882a593Smuzhiyun AUD_PCM_WLEN_PCM_32_BCK_CYCLES = 0,
55*4882a593Smuzhiyun AUD_PCM_WLEN_PCM_64_BCK_CYCLES = 1
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun enum AUD_PCM_MODE {
59*4882a593Smuzhiyun AUD_PCM_MODE_PCM_MODE_8K = 0,
60*4882a593Smuzhiyun AUD_PCM_MODE_PCM_MODE_16K = 1,
61*4882a593Smuzhiyun AUD_PCM_MODE_PCM_MODE_32K = 2,
62*4882a593Smuzhiyun AUD_PCM_MODE_PCM_MODE_48K = 3,
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun enum AUD_PCM_FMT {
66*4882a593Smuzhiyun AUD_PCM_FMT_I2S = 0,
67*4882a593Smuzhiyun AUD_PCM_FMT_EIAJ = 1,
68*4882a593Smuzhiyun AUD_PCM_FMT_PCM_MODE_A = 2,
69*4882a593Smuzhiyun AUD_PCM_FMT_PCM_MODE_B = 3
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun enum AUD_BCLK_OUT_INV {
73*4882a593Smuzhiyun AUD_BCLK_OUT_INV_NO_INVERSE = 0,
74*4882a593Smuzhiyun AUD_BCLK_OUT_INV_INVERSE = 1
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun enum AUD_PCM_EN {
78*4882a593Smuzhiyun AUD_PCM_EN_DISABLE = 0,
79*4882a593Smuzhiyun AUD_PCM_EN_ENABLE = 1
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /* dai component */
83*4882a593Smuzhiyun static const struct snd_kcontrol_new mtk_pcm_1_playback_ch1_mix[] = {
84*4882a593Smuzhiyun SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN7,
85*4882a593Smuzhiyun I_ADDA_UL_CH1, 1, 0),
86*4882a593Smuzhiyun SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1", AFE_CONN7,
87*4882a593Smuzhiyun I_DL2_CH1, 1, 0),
88*4882a593Smuzhiyun };
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun static const struct snd_kcontrol_new mtk_pcm_1_playback_ch2_mix[] = {
91*4882a593Smuzhiyun SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN8,
92*4882a593Smuzhiyun I_ADDA_UL_CH2, 1, 0),
93*4882a593Smuzhiyun SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2", AFE_CONN8,
94*4882a593Smuzhiyun I_DL2_CH2, 1, 0),
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun static const struct snd_kcontrol_new mtk_pcm_1_playback_ch4_mix[] = {
98*4882a593Smuzhiyun SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN27,
99*4882a593Smuzhiyun I_DL1_CH1, 1, 0),
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun static const struct snd_kcontrol_new mtk_pcm_2_playback_ch1_mix[] = {
103*4882a593Smuzhiyun SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN17,
104*4882a593Smuzhiyun I_ADDA_UL_CH1, 1, 0),
105*4882a593Smuzhiyun SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1", AFE_CONN17,
106*4882a593Smuzhiyun I_DL2_CH1, 1, 0),
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun static const struct snd_kcontrol_new mtk_pcm_2_playback_ch2_mix[] = {
110*4882a593Smuzhiyun SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN18,
111*4882a593Smuzhiyun I_ADDA_UL_CH2, 1, 0),
112*4882a593Smuzhiyun SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2", AFE_CONN18,
113*4882a593Smuzhiyun I_DL2_CH2, 1, 0),
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun static const struct snd_kcontrol_new mtk_pcm_2_playback_ch4_mix[] = {
117*4882a593Smuzhiyun SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN24,
118*4882a593Smuzhiyun I_DL1_CH1, 1, 0),
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun static const struct snd_soc_dapm_widget mtk_dai_pcm_widgets[] = {
122*4882a593Smuzhiyun /* inter-connections */
123*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("PCM_1_PB_CH1", SND_SOC_NOPM, 0, 0,
124*4882a593Smuzhiyun mtk_pcm_1_playback_ch1_mix,
125*4882a593Smuzhiyun ARRAY_SIZE(mtk_pcm_1_playback_ch1_mix)),
126*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("PCM_1_PB_CH2", SND_SOC_NOPM, 0, 0,
127*4882a593Smuzhiyun mtk_pcm_1_playback_ch2_mix,
128*4882a593Smuzhiyun ARRAY_SIZE(mtk_pcm_1_playback_ch2_mix)),
129*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("PCM_1_PB_CH4", SND_SOC_NOPM, 0, 0,
130*4882a593Smuzhiyun mtk_pcm_1_playback_ch4_mix,
131*4882a593Smuzhiyun ARRAY_SIZE(mtk_pcm_1_playback_ch4_mix)),
132*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("PCM_2_PB_CH1", SND_SOC_NOPM, 0, 0,
133*4882a593Smuzhiyun mtk_pcm_2_playback_ch1_mix,
134*4882a593Smuzhiyun ARRAY_SIZE(mtk_pcm_2_playback_ch1_mix)),
135*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("PCM_2_PB_CH2", SND_SOC_NOPM, 0, 0,
136*4882a593Smuzhiyun mtk_pcm_2_playback_ch2_mix,
137*4882a593Smuzhiyun ARRAY_SIZE(mtk_pcm_2_playback_ch2_mix)),
138*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("PCM_2_PB_CH4", SND_SOC_NOPM, 0, 0,
139*4882a593Smuzhiyun mtk_pcm_2_playback_ch4_mix,
140*4882a593Smuzhiyun ARRAY_SIZE(mtk_pcm_2_playback_ch4_mix)),
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("PCM_1_EN", PCM_INTF_CON1, PCM_EN_SFT, 0,
143*4882a593Smuzhiyun NULL, 0),
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("PCM_2_EN", PCM2_INTF_CON, PCM2_EN_SFT, 0,
146*4882a593Smuzhiyun NULL, 0),
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("MD1_TO_AFE"),
149*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("MD2_TO_AFE"),
150*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("AFE_TO_MD1"),
151*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("AFE_TO_MD2"),
152*4882a593Smuzhiyun };
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun static const struct snd_soc_dapm_route mtk_dai_pcm_routes[] = {
155*4882a593Smuzhiyun {"PCM 1 Playback", NULL, "PCM_1_PB_CH1"},
156*4882a593Smuzhiyun {"PCM 1 Playback", NULL, "PCM_1_PB_CH2"},
157*4882a593Smuzhiyun {"PCM 1 Playback", NULL, "PCM_1_PB_CH4"},
158*4882a593Smuzhiyun {"PCM 2 Playback", NULL, "PCM_2_PB_CH1"},
159*4882a593Smuzhiyun {"PCM 2 Playback", NULL, "PCM_2_PB_CH2"},
160*4882a593Smuzhiyun {"PCM 2 Playback", NULL, "PCM_2_PB_CH4"},
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun {"PCM 1 Playback", NULL, "PCM_1_EN"},
163*4882a593Smuzhiyun {"PCM 2 Playback", NULL, "PCM_2_EN"},
164*4882a593Smuzhiyun {"PCM 1 Capture", NULL, "PCM_1_EN"},
165*4882a593Smuzhiyun {"PCM 2 Capture", NULL, "PCM_2_EN"},
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun {"AFE_TO_MD1", NULL, "PCM 2 Playback"},
168*4882a593Smuzhiyun {"AFE_TO_MD2", NULL, "PCM 1 Playback"},
169*4882a593Smuzhiyun {"PCM 2 Capture", NULL, "MD1_TO_AFE"},
170*4882a593Smuzhiyun {"PCM 1 Capture", NULL, "MD2_TO_AFE"},
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun {"PCM_1_PB_CH1", "DL2_CH1", "DL2"},
173*4882a593Smuzhiyun {"PCM_1_PB_CH2", "DL2_CH2", "DL2"},
174*4882a593Smuzhiyun {"PCM_1_PB_CH4", "DL1_CH1", "DL1"},
175*4882a593Smuzhiyun {"PCM_2_PB_CH1", "DL2_CH1", "DL2"},
176*4882a593Smuzhiyun {"PCM_2_PB_CH2", "DL2_CH2", "DL2"},
177*4882a593Smuzhiyun {"PCM_2_PB_CH4", "DL1_CH1", "DL1"},
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun /* dai ops */
mtk_dai_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)181*4882a593Smuzhiyun static int mtk_dai_pcm_hw_params(struct snd_pcm_substream *substream,
182*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
183*4882a593Smuzhiyun struct snd_soc_dai *dai)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
186*4882a593Smuzhiyun unsigned int rate = params_rate(params);
187*4882a593Smuzhiyun unsigned int rate_reg = mt6797_rate_transform(afe->dev, rate, dai->id);
188*4882a593Smuzhiyun unsigned int pcm_con = 0;
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun dev_dbg(afe->dev, "%s(), id %d, stream %d, rate %d, rate_reg %d, widget active p %d, c %d\n",
191*4882a593Smuzhiyun __func__,
192*4882a593Smuzhiyun dai->id,
193*4882a593Smuzhiyun substream->stream,
194*4882a593Smuzhiyun rate,
195*4882a593Smuzhiyun rate_reg,
196*4882a593Smuzhiyun dai->playback_widget->active,
197*4882a593Smuzhiyun dai->capture_widget->active);
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun if (dai->playback_widget->active || dai->capture_widget->active)
200*4882a593Smuzhiyun return 0;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun switch (dai->id) {
203*4882a593Smuzhiyun case MT6797_DAI_PCM_1:
204*4882a593Smuzhiyun pcm_con |= AUD_BCLK_OUT_INV_NO_INVERSE << PCM_BCLK_OUT_INV_SFT;
205*4882a593Smuzhiyun pcm_con |= AUD_TX_LCH_RPT_NO_REPEAT << PCM_TX_LCH_RPT_SFT;
206*4882a593Smuzhiyun pcm_con |= AUD_VBT_16K_MODE_DISABLE << PCM_VBT_16K_MODE_SFT;
207*4882a593Smuzhiyun pcm_con |= AUD_EXT_MODEM_SELECT_INTERNAL << PCM_EXT_MODEM_SFT;
208*4882a593Smuzhiyun pcm_con |= 0 << PCM_SYNC_LENGTH_SFT;
209*4882a593Smuzhiyun pcm_con |= AUD_PCM_ONE_BCK_CYCLE_SYNC << PCM_SYNC_TYPE_SFT;
210*4882a593Smuzhiyun pcm_con |= AUD_BT_MODE_DUAL_MIC_ON_TX << PCM_BT_MODE_SFT;
211*4882a593Smuzhiyun pcm_con |= AUD_PCM_AFIFO_AFIFO << PCM_BYP_ASRC_SFT;
212*4882a593Smuzhiyun pcm_con |= AUD_PCM_CLOCK_SLAVE_MODE << PCM_SLAVE_SFT;
213*4882a593Smuzhiyun pcm_con |= rate_reg << PCM_MODE_SFT;
214*4882a593Smuzhiyun pcm_con |= AUD_PCM_FMT_PCM_MODE_B << PCM_FMT_SFT;
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun regmap_update_bits(afe->regmap, PCM_INTF_CON1,
217*4882a593Smuzhiyun 0xfffffffe, pcm_con);
218*4882a593Smuzhiyun break;
219*4882a593Smuzhiyun case MT6797_DAI_PCM_2:
220*4882a593Smuzhiyun pcm_con |= AUD_TX_LCH_RPT_NO_REPEAT << PCM2_TX_LCH_RPT_SFT;
221*4882a593Smuzhiyun pcm_con |= AUD_VBT_16K_MODE_DISABLE << PCM2_VBT_16K_MODE_SFT;
222*4882a593Smuzhiyun pcm_con |= AUD_BT_MODE_DUAL_MIC_ON_TX << PCM2_BT_MODE_SFT;
223*4882a593Smuzhiyun pcm_con |= AUD_PCM_AFIFO_AFIFO << PCM2_AFIFO_SFT;
224*4882a593Smuzhiyun pcm_con |= AUD_PCM_WLEN_PCM_32_BCK_CYCLES << PCM2_WLEN_SFT;
225*4882a593Smuzhiyun pcm_con |= rate_reg << PCM2_MODE_SFT;
226*4882a593Smuzhiyun pcm_con |= AUD_PCM_FMT_PCM_MODE_B << PCM2_FMT_SFT;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun regmap_update_bits(afe->regmap, PCM2_INTF_CON,
229*4882a593Smuzhiyun 0xfffffffe, pcm_con);
230*4882a593Smuzhiyun break;
231*4882a593Smuzhiyun default:
232*4882a593Smuzhiyun dev_warn(afe->dev, "%s(), id %d not support\n",
233*4882a593Smuzhiyun __func__, dai->id);
234*4882a593Smuzhiyun return -EINVAL;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun return 0;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun static const struct snd_soc_dai_ops mtk_dai_pcm_ops = {
241*4882a593Smuzhiyun .hw_params = mtk_dai_pcm_hw_params,
242*4882a593Smuzhiyun };
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun /* dai driver */
245*4882a593Smuzhiyun #define MTK_PCM_RATES (SNDRV_PCM_RATE_8000 |\
246*4882a593Smuzhiyun SNDRV_PCM_RATE_16000 |\
247*4882a593Smuzhiyun SNDRV_PCM_RATE_32000 |\
248*4882a593Smuzhiyun SNDRV_PCM_RATE_48000)
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun #define MTK_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
251*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_LE |\
252*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S32_LE)
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun static struct snd_soc_dai_driver mtk_dai_pcm_driver[] = {
255*4882a593Smuzhiyun {
256*4882a593Smuzhiyun .name = "PCM 1",
257*4882a593Smuzhiyun .id = MT6797_DAI_PCM_1,
258*4882a593Smuzhiyun .playback = {
259*4882a593Smuzhiyun .stream_name = "PCM 1 Playback",
260*4882a593Smuzhiyun .channels_min = 1,
261*4882a593Smuzhiyun .channels_max = 2,
262*4882a593Smuzhiyun .rates = MTK_PCM_RATES,
263*4882a593Smuzhiyun .formats = MTK_PCM_FORMATS,
264*4882a593Smuzhiyun },
265*4882a593Smuzhiyun .capture = {
266*4882a593Smuzhiyun .stream_name = "PCM 1 Capture",
267*4882a593Smuzhiyun .channels_min = 1,
268*4882a593Smuzhiyun .channels_max = 2,
269*4882a593Smuzhiyun .rates = MTK_PCM_RATES,
270*4882a593Smuzhiyun .formats = MTK_PCM_FORMATS,
271*4882a593Smuzhiyun },
272*4882a593Smuzhiyun .ops = &mtk_dai_pcm_ops,
273*4882a593Smuzhiyun .symmetric_rates = 1,
274*4882a593Smuzhiyun .symmetric_samplebits = 1,
275*4882a593Smuzhiyun },
276*4882a593Smuzhiyun {
277*4882a593Smuzhiyun .name = "PCM 2",
278*4882a593Smuzhiyun .id = MT6797_DAI_PCM_2,
279*4882a593Smuzhiyun .playback = {
280*4882a593Smuzhiyun .stream_name = "PCM 2 Playback",
281*4882a593Smuzhiyun .channels_min = 1,
282*4882a593Smuzhiyun .channels_max = 2,
283*4882a593Smuzhiyun .rates = MTK_PCM_RATES,
284*4882a593Smuzhiyun .formats = MTK_PCM_FORMATS,
285*4882a593Smuzhiyun },
286*4882a593Smuzhiyun .capture = {
287*4882a593Smuzhiyun .stream_name = "PCM 2 Capture",
288*4882a593Smuzhiyun .channels_min = 1,
289*4882a593Smuzhiyun .channels_max = 2,
290*4882a593Smuzhiyun .rates = MTK_PCM_RATES,
291*4882a593Smuzhiyun .formats = MTK_PCM_FORMATS,
292*4882a593Smuzhiyun },
293*4882a593Smuzhiyun .ops = &mtk_dai_pcm_ops,
294*4882a593Smuzhiyun .symmetric_rates = 1,
295*4882a593Smuzhiyun .symmetric_samplebits = 1,
296*4882a593Smuzhiyun },
297*4882a593Smuzhiyun };
298*4882a593Smuzhiyun
mt6797_dai_pcm_register(struct mtk_base_afe * afe)299*4882a593Smuzhiyun int mt6797_dai_pcm_register(struct mtk_base_afe *afe)
300*4882a593Smuzhiyun {
301*4882a593Smuzhiyun struct mtk_base_afe_dai *dai;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
304*4882a593Smuzhiyun if (!dai)
305*4882a593Smuzhiyun return -ENOMEM;
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun list_add(&dai->list, &afe->sub_dais);
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun dai->dai_drivers = mtk_dai_pcm_driver;
310*4882a593Smuzhiyun dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_pcm_driver);
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun dai->dapm_widgets = mtk_dai_pcm_widgets;
313*4882a593Smuzhiyun dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_pcm_widgets);
314*4882a593Smuzhiyun dai->dapm_routes = mtk_dai_pcm_routes;
315*4882a593Smuzhiyun dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_pcm_routes);
316*4882a593Smuzhiyun return 0;
317*4882a593Smuzhiyun }
318