1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * mt2701-cs42448.c -- MT2701 CS42448 ALSA SoC machine driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2016 MediaTek Inc.
6*4882a593Smuzhiyun * Author: Ir Lian <ir.lian@mediatek.com>
7*4882a593Smuzhiyun * Garlic Tseng <garlic.tseng@mediatek.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <sound/soc.h>
12*4882a593Smuzhiyun #include <linux/delay.h>
13*4882a593Smuzhiyun #include <linux/gpio.h>
14*4882a593Smuzhiyun #include <linux/pinctrl/consumer.h>
15*4882a593Smuzhiyun #include <linux/of_gpio.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include "mt2701-afe-common.h"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun struct mt2701_cs42448_private {
20*4882a593Smuzhiyun int i2s1_in_mux;
21*4882a593Smuzhiyun int i2s1_in_mux_gpio_sel_1;
22*4882a593Smuzhiyun int i2s1_in_mux_gpio_sel_2;
23*4882a593Smuzhiyun };
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun static const char * const i2sin_mux_switch_text[] = {
26*4882a593Smuzhiyun "ADC_SDOUT2",
27*4882a593Smuzhiyun "ADC_SDOUT3",
28*4882a593Smuzhiyun "I2S_IN_1",
29*4882a593Smuzhiyun "I2S_IN_2",
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun static const struct soc_enum i2sin_mux_enum =
33*4882a593Smuzhiyun SOC_ENUM_SINGLE_EXT(4, i2sin_mux_switch_text);
34*4882a593Smuzhiyun
mt2701_cs42448_i2sin1_mux_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)35*4882a593Smuzhiyun static int mt2701_cs42448_i2sin1_mux_get(struct snd_kcontrol *kcontrol,
36*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun struct snd_soc_card *card = snd_kcontrol_chip(kcontrol);
39*4882a593Smuzhiyun struct mt2701_cs42448_private *priv = snd_soc_card_get_drvdata(card);
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun ucontrol->value.integer.value[0] = priv->i2s1_in_mux;
42*4882a593Smuzhiyun return 0;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
mt2701_cs42448_i2sin1_mux_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)45*4882a593Smuzhiyun static int mt2701_cs42448_i2sin1_mux_set(struct snd_kcontrol *kcontrol,
46*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun struct snd_soc_card *card = snd_kcontrol_chip(kcontrol);
49*4882a593Smuzhiyun struct mt2701_cs42448_private *priv = snd_soc_card_get_drvdata(card);
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun if (ucontrol->value.integer.value[0] == priv->i2s1_in_mux)
52*4882a593Smuzhiyun return 0;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun switch (ucontrol->value.integer.value[0]) {
55*4882a593Smuzhiyun case 0:
56*4882a593Smuzhiyun gpio_set_value(priv->i2s1_in_mux_gpio_sel_1, 0);
57*4882a593Smuzhiyun gpio_set_value(priv->i2s1_in_mux_gpio_sel_2, 0);
58*4882a593Smuzhiyun break;
59*4882a593Smuzhiyun case 1:
60*4882a593Smuzhiyun gpio_set_value(priv->i2s1_in_mux_gpio_sel_1, 1);
61*4882a593Smuzhiyun gpio_set_value(priv->i2s1_in_mux_gpio_sel_2, 0);
62*4882a593Smuzhiyun break;
63*4882a593Smuzhiyun case 2:
64*4882a593Smuzhiyun gpio_set_value(priv->i2s1_in_mux_gpio_sel_1, 0);
65*4882a593Smuzhiyun gpio_set_value(priv->i2s1_in_mux_gpio_sel_2, 1);
66*4882a593Smuzhiyun break;
67*4882a593Smuzhiyun case 3:
68*4882a593Smuzhiyun gpio_set_value(priv->i2s1_in_mux_gpio_sel_1, 1);
69*4882a593Smuzhiyun gpio_set_value(priv->i2s1_in_mux_gpio_sel_2, 1);
70*4882a593Smuzhiyun break;
71*4882a593Smuzhiyun default:
72*4882a593Smuzhiyun dev_warn(card->dev, "%s invalid setting\n", __func__);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun priv->i2s1_in_mux = ucontrol->value.integer.value[0];
76*4882a593Smuzhiyun return 0;
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun static const struct snd_soc_dapm_widget
80*4882a593Smuzhiyun mt2701_cs42448_asoc_card_dapm_widgets[] = {
81*4882a593Smuzhiyun SND_SOC_DAPM_LINE("Line Out Jack", NULL),
82*4882a593Smuzhiyun SND_SOC_DAPM_MIC("AMIC", NULL),
83*4882a593Smuzhiyun SND_SOC_DAPM_LINE("Tuner In", NULL),
84*4882a593Smuzhiyun SND_SOC_DAPM_LINE("Satellite Tuner In", NULL),
85*4882a593Smuzhiyun SND_SOC_DAPM_LINE("AUX In", NULL),
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun static const struct snd_kcontrol_new mt2701_cs42448_controls[] = {
89*4882a593Smuzhiyun SOC_DAPM_PIN_SWITCH("Line Out Jack"),
90*4882a593Smuzhiyun SOC_DAPM_PIN_SWITCH("AMIC"),
91*4882a593Smuzhiyun SOC_DAPM_PIN_SWITCH("Tuner In"),
92*4882a593Smuzhiyun SOC_DAPM_PIN_SWITCH("Satellite Tuner In"),
93*4882a593Smuzhiyun SOC_DAPM_PIN_SWITCH("AUX In"),
94*4882a593Smuzhiyun SOC_ENUM_EXT("I2SIN1_MUX_Switch", i2sin_mux_enum,
95*4882a593Smuzhiyun mt2701_cs42448_i2sin1_mux_get,
96*4882a593Smuzhiyun mt2701_cs42448_i2sin1_mux_set),
97*4882a593Smuzhiyun };
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun static const unsigned int mt2701_cs42448_sampling_rates[] = {48000};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list mt2701_cs42448_constraints_rates = {
102*4882a593Smuzhiyun .count = ARRAY_SIZE(mt2701_cs42448_sampling_rates),
103*4882a593Smuzhiyun .list = mt2701_cs42448_sampling_rates,
104*4882a593Smuzhiyun .mask = 0,
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun
mt2701_cs42448_fe_ops_startup(struct snd_pcm_substream * substream)107*4882a593Smuzhiyun static int mt2701_cs42448_fe_ops_startup(struct snd_pcm_substream *substream)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun int err;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun err = snd_pcm_hw_constraint_list(substream->runtime, 0,
112*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_RATE,
113*4882a593Smuzhiyun &mt2701_cs42448_constraints_rates);
114*4882a593Smuzhiyun if (err < 0) {
115*4882a593Smuzhiyun dev_err(substream->pcm->card->dev,
116*4882a593Smuzhiyun "%s snd_pcm_hw_constraint_list failed: 0x%x\n",
117*4882a593Smuzhiyun __func__, err);
118*4882a593Smuzhiyun return err;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun return 0;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun static const struct snd_soc_ops mt2701_cs42448_48k_fe_ops = {
124*4882a593Smuzhiyun .startup = mt2701_cs42448_fe_ops_startup,
125*4882a593Smuzhiyun };
126*4882a593Smuzhiyun
mt2701_cs42448_be_ops_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params)127*4882a593Smuzhiyun static int mt2701_cs42448_be_ops_hw_params(struct snd_pcm_substream *substream,
128*4882a593Smuzhiyun struct snd_pcm_hw_params *params)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
131*4882a593Smuzhiyun struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
132*4882a593Smuzhiyun struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
133*4882a593Smuzhiyun unsigned int mclk_rate;
134*4882a593Smuzhiyun unsigned int rate = params_rate(params);
135*4882a593Smuzhiyun unsigned int div_mclk_over_bck = rate > 192000 ? 2 : 4;
136*4882a593Smuzhiyun unsigned int div_bck_over_lrck = 64;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun mclk_rate = rate * div_bck_over_lrck * div_mclk_over_bck;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /* mt2701 mclk */
141*4882a593Smuzhiyun snd_soc_dai_set_sysclk(cpu_dai, 0, mclk_rate, SND_SOC_CLOCK_OUT);
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun /* codec mclk */
144*4882a593Smuzhiyun snd_soc_dai_set_sysclk(codec_dai, 0, mclk_rate, SND_SOC_CLOCK_IN);
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun return 0;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun static struct snd_soc_ops mt2701_cs42448_be_ops = {
150*4882a593Smuzhiyun .hw_params = mt2701_cs42448_be_ops_hw_params
151*4882a593Smuzhiyun };
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun enum {
154*4882a593Smuzhiyun DAI_LINK_FE_MULTI_CH_OUT,
155*4882a593Smuzhiyun DAI_LINK_FE_PCM0_IN,
156*4882a593Smuzhiyun DAI_LINK_FE_PCM1_IN,
157*4882a593Smuzhiyun DAI_LINK_FE_BT_OUT,
158*4882a593Smuzhiyun DAI_LINK_FE_BT_IN,
159*4882a593Smuzhiyun DAI_LINK_BE_I2S0,
160*4882a593Smuzhiyun DAI_LINK_BE_I2S1,
161*4882a593Smuzhiyun DAI_LINK_BE_I2S2,
162*4882a593Smuzhiyun DAI_LINK_BE_I2S3,
163*4882a593Smuzhiyun DAI_LINK_BE_MRG_BT,
164*4882a593Smuzhiyun };
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(fe_multi_ch_out,
167*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("PCM_multi")),
168*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_DUMMY()),
169*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_EMPTY()));
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(fe_pcm0_in,
172*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("PCM0")),
173*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_DUMMY()),
174*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_EMPTY()));
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(fe_pcm1_in,
177*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("PCM1")),
178*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_DUMMY()),
179*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_EMPTY()));
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(fe_bt_out,
182*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("PCM_BT_DL")),
183*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_DUMMY()),
184*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_EMPTY()));
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(fe_bt_in,
187*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("PCM_BT_UL")),
188*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_DUMMY()),
189*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_EMPTY()));
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(be_i2s0,
192*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("I2S0")),
193*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "cs42448")),
194*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_EMPTY()));
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(be_i2s1,
197*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("I2S1")),
198*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "cs42448")),
199*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_EMPTY()));
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(be_i2s2,
202*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("I2S2")),
203*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "cs42448")),
204*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_EMPTY()));
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(be_i2s3,
207*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("I2S3")),
208*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "cs42448")),
209*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_EMPTY()));
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(be_mrg_bt,
212*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("MRG BT")),
213*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "bt-sco-pcm-wb")),
214*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_EMPTY()));
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun static struct snd_soc_dai_link mt2701_cs42448_dai_links[] = {
217*4882a593Smuzhiyun /* FE */
218*4882a593Smuzhiyun [DAI_LINK_FE_MULTI_CH_OUT] = {
219*4882a593Smuzhiyun .name = "mt2701-cs42448-multi-ch-out",
220*4882a593Smuzhiyun .stream_name = "mt2701-cs42448-multi-ch-out",
221*4882a593Smuzhiyun .trigger = {SND_SOC_DPCM_TRIGGER_POST,
222*4882a593Smuzhiyun SND_SOC_DPCM_TRIGGER_POST},
223*4882a593Smuzhiyun .ops = &mt2701_cs42448_48k_fe_ops,
224*4882a593Smuzhiyun .dynamic = 1,
225*4882a593Smuzhiyun .dpcm_playback = 1,
226*4882a593Smuzhiyun SND_SOC_DAILINK_REG(fe_multi_ch_out),
227*4882a593Smuzhiyun },
228*4882a593Smuzhiyun [DAI_LINK_FE_PCM0_IN] = {
229*4882a593Smuzhiyun .name = "mt2701-cs42448-pcm0",
230*4882a593Smuzhiyun .stream_name = "mt2701-cs42448-pcm0-data-UL",
231*4882a593Smuzhiyun .trigger = {SND_SOC_DPCM_TRIGGER_POST,
232*4882a593Smuzhiyun SND_SOC_DPCM_TRIGGER_POST},
233*4882a593Smuzhiyun .ops = &mt2701_cs42448_48k_fe_ops,
234*4882a593Smuzhiyun .dynamic = 1,
235*4882a593Smuzhiyun .dpcm_capture = 1,
236*4882a593Smuzhiyun SND_SOC_DAILINK_REG(fe_pcm0_in),
237*4882a593Smuzhiyun },
238*4882a593Smuzhiyun [DAI_LINK_FE_PCM1_IN] = {
239*4882a593Smuzhiyun .name = "mt2701-cs42448-pcm1-data-UL",
240*4882a593Smuzhiyun .stream_name = "mt2701-cs42448-pcm1-data-UL",
241*4882a593Smuzhiyun .trigger = {SND_SOC_DPCM_TRIGGER_POST,
242*4882a593Smuzhiyun SND_SOC_DPCM_TRIGGER_POST},
243*4882a593Smuzhiyun .ops = &mt2701_cs42448_48k_fe_ops,
244*4882a593Smuzhiyun .dynamic = 1,
245*4882a593Smuzhiyun .dpcm_capture = 1,
246*4882a593Smuzhiyun SND_SOC_DAILINK_REG(fe_pcm1_in),
247*4882a593Smuzhiyun },
248*4882a593Smuzhiyun [DAI_LINK_FE_BT_OUT] = {
249*4882a593Smuzhiyun .name = "mt2701-cs42448-pcm-BT-out",
250*4882a593Smuzhiyun .stream_name = "mt2701-cs42448-pcm-BT",
251*4882a593Smuzhiyun .trigger = {SND_SOC_DPCM_TRIGGER_POST,
252*4882a593Smuzhiyun SND_SOC_DPCM_TRIGGER_POST},
253*4882a593Smuzhiyun .dynamic = 1,
254*4882a593Smuzhiyun .dpcm_playback = 1,
255*4882a593Smuzhiyun SND_SOC_DAILINK_REG(fe_bt_out),
256*4882a593Smuzhiyun },
257*4882a593Smuzhiyun [DAI_LINK_FE_BT_IN] = {
258*4882a593Smuzhiyun .name = "mt2701-cs42448-pcm-BT-in",
259*4882a593Smuzhiyun .stream_name = "mt2701-cs42448-pcm-BT",
260*4882a593Smuzhiyun .trigger = {SND_SOC_DPCM_TRIGGER_POST,
261*4882a593Smuzhiyun SND_SOC_DPCM_TRIGGER_POST},
262*4882a593Smuzhiyun .dynamic = 1,
263*4882a593Smuzhiyun .dpcm_capture = 1,
264*4882a593Smuzhiyun SND_SOC_DAILINK_REG(fe_bt_in),
265*4882a593Smuzhiyun },
266*4882a593Smuzhiyun /* BE */
267*4882a593Smuzhiyun [DAI_LINK_BE_I2S0] = {
268*4882a593Smuzhiyun .name = "mt2701-cs42448-I2S0",
269*4882a593Smuzhiyun .no_pcm = 1,
270*4882a593Smuzhiyun .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
271*4882a593Smuzhiyun | SND_SOC_DAIFMT_GATED,
272*4882a593Smuzhiyun .ops = &mt2701_cs42448_be_ops,
273*4882a593Smuzhiyun .dpcm_playback = 1,
274*4882a593Smuzhiyun .dpcm_capture = 1,
275*4882a593Smuzhiyun SND_SOC_DAILINK_REG(be_i2s0),
276*4882a593Smuzhiyun },
277*4882a593Smuzhiyun [DAI_LINK_BE_I2S1] = {
278*4882a593Smuzhiyun .name = "mt2701-cs42448-I2S1",
279*4882a593Smuzhiyun .no_pcm = 1,
280*4882a593Smuzhiyun .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
281*4882a593Smuzhiyun | SND_SOC_DAIFMT_GATED,
282*4882a593Smuzhiyun .ops = &mt2701_cs42448_be_ops,
283*4882a593Smuzhiyun .dpcm_playback = 1,
284*4882a593Smuzhiyun .dpcm_capture = 1,
285*4882a593Smuzhiyun SND_SOC_DAILINK_REG(be_i2s1),
286*4882a593Smuzhiyun },
287*4882a593Smuzhiyun [DAI_LINK_BE_I2S2] = {
288*4882a593Smuzhiyun .name = "mt2701-cs42448-I2S2",
289*4882a593Smuzhiyun .no_pcm = 1,
290*4882a593Smuzhiyun .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
291*4882a593Smuzhiyun | SND_SOC_DAIFMT_GATED,
292*4882a593Smuzhiyun .ops = &mt2701_cs42448_be_ops,
293*4882a593Smuzhiyun .dpcm_playback = 1,
294*4882a593Smuzhiyun .dpcm_capture = 1,
295*4882a593Smuzhiyun SND_SOC_DAILINK_REG(be_i2s2),
296*4882a593Smuzhiyun },
297*4882a593Smuzhiyun [DAI_LINK_BE_I2S3] = {
298*4882a593Smuzhiyun .name = "mt2701-cs42448-I2S3",
299*4882a593Smuzhiyun .no_pcm = 1,
300*4882a593Smuzhiyun .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
301*4882a593Smuzhiyun | SND_SOC_DAIFMT_GATED,
302*4882a593Smuzhiyun .ops = &mt2701_cs42448_be_ops,
303*4882a593Smuzhiyun .dpcm_playback = 1,
304*4882a593Smuzhiyun .dpcm_capture = 1,
305*4882a593Smuzhiyun SND_SOC_DAILINK_REG(be_i2s3),
306*4882a593Smuzhiyun },
307*4882a593Smuzhiyun [DAI_LINK_BE_MRG_BT] = {
308*4882a593Smuzhiyun .name = "mt2701-cs42448-MRG-BT",
309*4882a593Smuzhiyun .no_pcm = 1,
310*4882a593Smuzhiyun .dpcm_playback = 1,
311*4882a593Smuzhiyun .dpcm_capture = 1,
312*4882a593Smuzhiyun SND_SOC_DAILINK_REG(be_mrg_bt),
313*4882a593Smuzhiyun },
314*4882a593Smuzhiyun };
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun static struct snd_soc_card mt2701_cs42448_soc_card = {
317*4882a593Smuzhiyun .name = "mt2701-cs42448",
318*4882a593Smuzhiyun .owner = THIS_MODULE,
319*4882a593Smuzhiyun .dai_link = mt2701_cs42448_dai_links,
320*4882a593Smuzhiyun .num_links = ARRAY_SIZE(mt2701_cs42448_dai_links),
321*4882a593Smuzhiyun .controls = mt2701_cs42448_controls,
322*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(mt2701_cs42448_controls),
323*4882a593Smuzhiyun .dapm_widgets = mt2701_cs42448_asoc_card_dapm_widgets,
324*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(mt2701_cs42448_asoc_card_dapm_widgets),
325*4882a593Smuzhiyun };
326*4882a593Smuzhiyun
mt2701_cs42448_machine_probe(struct platform_device * pdev)327*4882a593Smuzhiyun static int mt2701_cs42448_machine_probe(struct platform_device *pdev)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun struct snd_soc_card *card = &mt2701_cs42448_soc_card;
330*4882a593Smuzhiyun int ret;
331*4882a593Smuzhiyun int i;
332*4882a593Smuzhiyun struct device_node *platform_node, *codec_node, *codec_node_bt_mrg;
333*4882a593Smuzhiyun struct mt2701_cs42448_private *priv =
334*4882a593Smuzhiyun devm_kzalloc(&pdev->dev, sizeof(struct mt2701_cs42448_private),
335*4882a593Smuzhiyun GFP_KERNEL);
336*4882a593Smuzhiyun struct device *dev = &pdev->dev;
337*4882a593Smuzhiyun struct snd_soc_dai_link *dai_link;
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun if (!priv)
340*4882a593Smuzhiyun return -ENOMEM;
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun platform_node = of_parse_phandle(pdev->dev.of_node,
343*4882a593Smuzhiyun "mediatek,platform", 0);
344*4882a593Smuzhiyun if (!platform_node) {
345*4882a593Smuzhiyun dev_err(&pdev->dev, "Property 'platform' missing or invalid\n");
346*4882a593Smuzhiyun return -EINVAL;
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun for_each_card_prelinks(card, i, dai_link) {
349*4882a593Smuzhiyun if (dai_link->platforms->name)
350*4882a593Smuzhiyun continue;
351*4882a593Smuzhiyun dai_link->platforms->of_node = platform_node;
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun card->dev = dev;
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun codec_node = of_parse_phandle(pdev->dev.of_node,
357*4882a593Smuzhiyun "mediatek,audio-codec", 0);
358*4882a593Smuzhiyun if (!codec_node) {
359*4882a593Smuzhiyun dev_err(&pdev->dev,
360*4882a593Smuzhiyun "Property 'audio-codec' missing or invalid\n");
361*4882a593Smuzhiyun return -EINVAL;
362*4882a593Smuzhiyun }
363*4882a593Smuzhiyun for_each_card_prelinks(card, i, dai_link) {
364*4882a593Smuzhiyun if (dai_link->codecs->name)
365*4882a593Smuzhiyun continue;
366*4882a593Smuzhiyun dai_link->codecs->of_node = codec_node;
367*4882a593Smuzhiyun }
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun codec_node_bt_mrg = of_parse_phandle(pdev->dev.of_node,
370*4882a593Smuzhiyun "mediatek,audio-codec-bt-mrg", 0);
371*4882a593Smuzhiyun if (!codec_node_bt_mrg) {
372*4882a593Smuzhiyun dev_err(&pdev->dev,
373*4882a593Smuzhiyun "Property 'audio-codec-bt-mrg' missing or invalid\n");
374*4882a593Smuzhiyun return -EINVAL;
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun mt2701_cs42448_dai_links[DAI_LINK_BE_MRG_BT].codecs->of_node
377*4882a593Smuzhiyun = codec_node_bt_mrg;
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun ret = snd_soc_of_parse_audio_routing(card, "audio-routing");
380*4882a593Smuzhiyun if (ret) {
381*4882a593Smuzhiyun dev_err(&pdev->dev, "failed to parse audio-routing: %d\n", ret);
382*4882a593Smuzhiyun return ret;
383*4882a593Smuzhiyun }
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun priv->i2s1_in_mux_gpio_sel_1 =
386*4882a593Smuzhiyun of_get_named_gpio(dev->of_node, "i2s1-in-sel-gpio1", 0);
387*4882a593Smuzhiyun if (gpio_is_valid(priv->i2s1_in_mux_gpio_sel_1)) {
388*4882a593Smuzhiyun ret = devm_gpio_request(dev, priv->i2s1_in_mux_gpio_sel_1,
389*4882a593Smuzhiyun "i2s1_in_mux_gpio_sel_1");
390*4882a593Smuzhiyun if (ret)
391*4882a593Smuzhiyun dev_warn(&pdev->dev, "%s devm_gpio_request fail %d\n",
392*4882a593Smuzhiyun __func__, ret);
393*4882a593Smuzhiyun gpio_direction_output(priv->i2s1_in_mux_gpio_sel_1, 0);
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun priv->i2s1_in_mux_gpio_sel_2 =
397*4882a593Smuzhiyun of_get_named_gpio(dev->of_node, "i2s1-in-sel-gpio2", 0);
398*4882a593Smuzhiyun if (gpio_is_valid(priv->i2s1_in_mux_gpio_sel_2)) {
399*4882a593Smuzhiyun ret = devm_gpio_request(dev, priv->i2s1_in_mux_gpio_sel_2,
400*4882a593Smuzhiyun "i2s1_in_mux_gpio_sel_2");
401*4882a593Smuzhiyun if (ret)
402*4882a593Smuzhiyun dev_warn(&pdev->dev, "%s devm_gpio_request fail2 %d\n",
403*4882a593Smuzhiyun __func__, ret);
404*4882a593Smuzhiyun gpio_direction_output(priv->i2s1_in_mux_gpio_sel_2, 0);
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun snd_soc_card_set_drvdata(card, priv);
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun ret = devm_snd_soc_register_card(&pdev->dev, card);
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun if (ret)
411*4882a593Smuzhiyun dev_err(&pdev->dev, "%s snd_soc_register_card fail %d\n",
412*4882a593Smuzhiyun __func__, ret);
413*4882a593Smuzhiyun return ret;
414*4882a593Smuzhiyun }
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun #ifdef CONFIG_OF
417*4882a593Smuzhiyun static const struct of_device_id mt2701_cs42448_machine_dt_match[] = {
418*4882a593Smuzhiyun {.compatible = "mediatek,mt2701-cs42448-machine",},
419*4882a593Smuzhiyun {}
420*4882a593Smuzhiyun };
421*4882a593Smuzhiyun #endif
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun static struct platform_driver mt2701_cs42448_machine = {
424*4882a593Smuzhiyun .driver = {
425*4882a593Smuzhiyun .name = "mt2701-cs42448",
426*4882a593Smuzhiyun #ifdef CONFIG_OF
427*4882a593Smuzhiyun .of_match_table = mt2701_cs42448_machine_dt_match,
428*4882a593Smuzhiyun #endif
429*4882a593Smuzhiyun },
430*4882a593Smuzhiyun .probe = mt2701_cs42448_machine_probe,
431*4882a593Smuzhiyun };
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun module_platform_driver(mt2701_cs42448_machine);
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun /* Module information */
436*4882a593Smuzhiyun MODULE_DESCRIPTION("MT2701 CS42448 ALSA SoC machine driver");
437*4882a593Smuzhiyun MODULE_AUTHOR("Ir Lian <ir.lian@mediatek.com>");
438*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
439*4882a593Smuzhiyun MODULE_ALIAS("mt2701 cs42448 soc card");
440