1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun #ifndef _JZ4740_I2S_H 4*4882a593Smuzhiyun #define _JZ4740_I2S_H 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun /* I2S clock source */ 7*4882a593Smuzhiyun #define JZ4740_I2S_CLKSRC_EXT 0 8*4882a593Smuzhiyun #define JZ4740_I2S_CLKSRC_PLL 1 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define JZ4740_I2S_BIT_CLK 0 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #endif 13