1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Intel Skylake I2S Machine Driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2014-2015, Intel Corporation. All rights reserved.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Modified from:
8*4882a593Smuzhiyun * Intel Broadwell Wildcatpoint SST Audio
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Copyright (C) 2013, Intel Corporation. All rights reserved.
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <sound/core.h>
16*4882a593Smuzhiyun #include <sound/pcm.h>
17*4882a593Smuzhiyun #include <sound/soc.h>
18*4882a593Smuzhiyun #include <sound/jack.h>
19*4882a593Smuzhiyun #include <sound/pcm_params.h>
20*4882a593Smuzhiyun #include "../../codecs/rt286.h"
21*4882a593Smuzhiyun #include "../../codecs/hdac_hdmi.h"
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun static struct snd_soc_jack skylake_headset;
24*4882a593Smuzhiyun static struct snd_soc_jack skylake_hdmi[3];
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun struct skl_hdmi_pcm {
27*4882a593Smuzhiyun struct list_head head;
28*4882a593Smuzhiyun struct snd_soc_dai *codec_dai;
29*4882a593Smuzhiyun int device;
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun struct skl_rt286_private {
33*4882a593Smuzhiyun struct list_head hdmi_pcm_list;
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun enum {
37*4882a593Smuzhiyun SKL_DPCM_AUDIO_PB = 0,
38*4882a593Smuzhiyun SKL_DPCM_AUDIO_DB_PB,
39*4882a593Smuzhiyun SKL_DPCM_AUDIO_CP,
40*4882a593Smuzhiyun SKL_DPCM_AUDIO_REF_CP,
41*4882a593Smuzhiyun SKL_DPCM_AUDIO_DMIC_CP,
42*4882a593Smuzhiyun SKL_DPCM_AUDIO_HDMI1_PB,
43*4882a593Smuzhiyun SKL_DPCM_AUDIO_HDMI2_PB,
44*4882a593Smuzhiyun SKL_DPCM_AUDIO_HDMI3_PB,
45*4882a593Smuzhiyun };
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /* Headset jack detection DAPM pins */
48*4882a593Smuzhiyun static struct snd_soc_jack_pin skylake_headset_pins[] = {
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun .pin = "Mic Jack",
51*4882a593Smuzhiyun .mask = SND_JACK_MICROPHONE,
52*4882a593Smuzhiyun },
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun .pin = "Headphone Jack",
55*4882a593Smuzhiyun .mask = SND_JACK_HEADPHONE,
56*4882a593Smuzhiyun },
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun static const struct snd_kcontrol_new skylake_controls[] = {
60*4882a593Smuzhiyun SOC_DAPM_PIN_SWITCH("Speaker"),
61*4882a593Smuzhiyun SOC_DAPM_PIN_SWITCH("Headphone Jack"),
62*4882a593Smuzhiyun SOC_DAPM_PIN_SWITCH("Mic Jack"),
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun static const struct snd_soc_dapm_widget skylake_widgets[] = {
66*4882a593Smuzhiyun SND_SOC_DAPM_HP("Headphone Jack", NULL),
67*4882a593Smuzhiyun SND_SOC_DAPM_SPK("Speaker", NULL),
68*4882a593Smuzhiyun SND_SOC_DAPM_MIC("Mic Jack", NULL),
69*4882a593Smuzhiyun SND_SOC_DAPM_MIC("DMIC2", NULL),
70*4882a593Smuzhiyun SND_SOC_DAPM_MIC("SoC DMIC", NULL),
71*4882a593Smuzhiyun SND_SOC_DAPM_SPK("HDMI1", NULL),
72*4882a593Smuzhiyun SND_SOC_DAPM_SPK("HDMI2", NULL),
73*4882a593Smuzhiyun SND_SOC_DAPM_SPK("HDMI3", NULL),
74*4882a593Smuzhiyun };
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun static const struct snd_soc_dapm_route skylake_rt286_map[] = {
77*4882a593Smuzhiyun /* speaker */
78*4882a593Smuzhiyun {"Speaker", NULL, "SPOR"},
79*4882a593Smuzhiyun {"Speaker", NULL, "SPOL"},
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun /* HP jack connectors - unknown if we have jack deteck */
82*4882a593Smuzhiyun {"Headphone Jack", NULL, "HPO Pin"},
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /* other jacks */
85*4882a593Smuzhiyun {"MIC1", NULL, "Mic Jack"},
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /* digital mics */
88*4882a593Smuzhiyun {"DMIC1 Pin", NULL, "DMIC2"},
89*4882a593Smuzhiyun {"DMic", NULL, "SoC DMIC"},
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /* CODEC BE connections */
92*4882a593Smuzhiyun { "AIF1 Playback", NULL, "ssp0 Tx"},
93*4882a593Smuzhiyun { "ssp0 Tx", NULL, "codec0_out"},
94*4882a593Smuzhiyun { "ssp0 Tx", NULL, "codec1_out"},
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun { "codec0_in", NULL, "ssp0 Rx" },
97*4882a593Smuzhiyun { "codec1_in", NULL, "ssp0 Rx" },
98*4882a593Smuzhiyun { "ssp0 Rx", NULL, "AIF1 Capture" },
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun { "dmic01_hifi", NULL, "DMIC01 Rx" },
101*4882a593Smuzhiyun { "DMIC01 Rx", NULL, "DMIC AIF" },
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun { "hifi3", NULL, "iDisp3 Tx"},
104*4882a593Smuzhiyun { "iDisp3 Tx", NULL, "iDisp3_out"},
105*4882a593Smuzhiyun { "hifi2", NULL, "iDisp2 Tx"},
106*4882a593Smuzhiyun { "iDisp2 Tx", NULL, "iDisp2_out"},
107*4882a593Smuzhiyun { "hifi1", NULL, "iDisp1 Tx"},
108*4882a593Smuzhiyun { "iDisp1 Tx", NULL, "iDisp1_out"},
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun };
111*4882a593Smuzhiyun
skylake_rt286_fe_init(struct snd_soc_pcm_runtime * rtd)112*4882a593Smuzhiyun static int skylake_rt286_fe_init(struct snd_soc_pcm_runtime *rtd)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun struct snd_soc_dapm_context *dapm;
115*4882a593Smuzhiyun struct snd_soc_component *component = asoc_rtd_to_cpu(rtd, 0)->component;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun dapm = snd_soc_component_get_dapm(component);
118*4882a593Smuzhiyun snd_soc_dapm_ignore_suspend(dapm, "Reference Capture");
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun return 0;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
skylake_rt286_codec_init(struct snd_soc_pcm_runtime * rtd)123*4882a593Smuzhiyun static int skylake_rt286_codec_init(struct snd_soc_pcm_runtime *rtd)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun struct snd_soc_component *component = asoc_rtd_to_codec(rtd, 0)->component;
126*4882a593Smuzhiyun int ret;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun ret = snd_soc_card_jack_new(rtd->card, "Headset",
129*4882a593Smuzhiyun SND_JACK_HEADSET | SND_JACK_BTN_0,
130*4882a593Smuzhiyun &skylake_headset,
131*4882a593Smuzhiyun skylake_headset_pins, ARRAY_SIZE(skylake_headset_pins));
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun if (ret)
134*4882a593Smuzhiyun return ret;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun rt286_mic_detect(component, &skylake_headset);
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun snd_soc_dapm_ignore_suspend(&rtd->card->dapm, "SoC DMIC");
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun return 0;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
skylake_hdmi_init(struct snd_soc_pcm_runtime * rtd)143*4882a593Smuzhiyun static int skylake_hdmi_init(struct snd_soc_pcm_runtime *rtd)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun struct skl_rt286_private *ctx = snd_soc_card_get_drvdata(rtd->card);
146*4882a593Smuzhiyun struct snd_soc_dai *dai = asoc_rtd_to_codec(rtd, 0);
147*4882a593Smuzhiyun struct skl_hdmi_pcm *pcm;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun pcm = devm_kzalloc(rtd->card->dev, sizeof(*pcm), GFP_KERNEL);
150*4882a593Smuzhiyun if (!pcm)
151*4882a593Smuzhiyun return -ENOMEM;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun pcm->device = SKL_DPCM_AUDIO_HDMI1_PB + dai->id;
154*4882a593Smuzhiyun pcm->codec_dai = dai;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun list_add_tail(&pcm->head, &ctx->hdmi_pcm_list);
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun return 0;
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun static const unsigned int rates[] = {
162*4882a593Smuzhiyun 48000,
163*4882a593Smuzhiyun };
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_rates = {
166*4882a593Smuzhiyun .count = ARRAY_SIZE(rates),
167*4882a593Smuzhiyun .list = rates,
168*4882a593Smuzhiyun .mask = 0,
169*4882a593Smuzhiyun };
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun static const unsigned int channels[] = {
172*4882a593Smuzhiyun 2,
173*4882a593Smuzhiyun };
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_channels = {
176*4882a593Smuzhiyun .count = ARRAY_SIZE(channels),
177*4882a593Smuzhiyun .list = channels,
178*4882a593Smuzhiyun .mask = 0,
179*4882a593Smuzhiyun };
180*4882a593Smuzhiyun
skl_fe_startup(struct snd_pcm_substream * substream)181*4882a593Smuzhiyun static int skl_fe_startup(struct snd_pcm_substream *substream)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun /*
186*4882a593Smuzhiyun * on this platform for PCM device we support,
187*4882a593Smuzhiyun * 48Khz
188*4882a593Smuzhiyun * stereo
189*4882a593Smuzhiyun * 16 bit audio
190*4882a593Smuzhiyun */
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun runtime->hw.channels_max = 2;
193*4882a593Smuzhiyun snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
194*4882a593Smuzhiyun &constraints_channels);
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE;
197*4882a593Smuzhiyun snd_pcm_hw_constraint_msbits(runtime, 0, 16, 16);
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun snd_pcm_hw_constraint_list(runtime, 0,
200*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_RATE, &constraints_rates);
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun return 0;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun static const struct snd_soc_ops skylake_rt286_fe_ops = {
206*4882a593Smuzhiyun .startup = skl_fe_startup,
207*4882a593Smuzhiyun };
208*4882a593Smuzhiyun
skylake_ssp0_fixup(struct snd_soc_pcm_runtime * rtd,struct snd_pcm_hw_params * params)209*4882a593Smuzhiyun static int skylake_ssp0_fixup(struct snd_soc_pcm_runtime *rtd,
210*4882a593Smuzhiyun struct snd_pcm_hw_params *params)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun struct snd_interval *rate = hw_param_interval(params,
213*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_RATE);
214*4882a593Smuzhiyun struct snd_interval *chan = hw_param_interval(params,
215*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_CHANNELS);
216*4882a593Smuzhiyun struct snd_mask *fmt = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun /* The output is 48KHz, stereo, 16bits */
219*4882a593Smuzhiyun rate->min = rate->max = 48000;
220*4882a593Smuzhiyun chan->min = chan->max = 2;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun /* set SSP0 to 24 bit */
223*4882a593Smuzhiyun snd_mask_none(fmt);
224*4882a593Smuzhiyun snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S24_LE);
225*4882a593Smuzhiyun return 0;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
skylake_rt286_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params)228*4882a593Smuzhiyun static int skylake_rt286_hw_params(struct snd_pcm_substream *substream,
229*4882a593Smuzhiyun struct snd_pcm_hw_params *params)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
232*4882a593Smuzhiyun struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
233*4882a593Smuzhiyun int ret;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun ret = snd_soc_dai_set_sysclk(codec_dai, RT286_SCLK_S_PLL, 24000000,
236*4882a593Smuzhiyun SND_SOC_CLOCK_IN);
237*4882a593Smuzhiyun if (ret < 0)
238*4882a593Smuzhiyun dev_err(rtd->dev, "set codec sysclk failed: %d\n", ret);
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun return ret;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun static const struct snd_soc_ops skylake_rt286_ops = {
244*4882a593Smuzhiyun .hw_params = skylake_rt286_hw_params,
245*4882a593Smuzhiyun };
246*4882a593Smuzhiyun
skylake_dmic_fixup(struct snd_soc_pcm_runtime * rtd,struct snd_pcm_hw_params * params)247*4882a593Smuzhiyun static int skylake_dmic_fixup(struct snd_soc_pcm_runtime *rtd,
248*4882a593Smuzhiyun struct snd_pcm_hw_params *params)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun struct snd_interval *chan = hw_param_interval(params,
251*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_CHANNELS);
252*4882a593Smuzhiyun if (params_channels(params) == 2)
253*4882a593Smuzhiyun chan->min = chan->max = 2;
254*4882a593Smuzhiyun else
255*4882a593Smuzhiyun chan->min = chan->max = 4;
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun return 0;
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun static const unsigned int channels_dmic[] = {
261*4882a593Smuzhiyun 2, 4,
262*4882a593Smuzhiyun };
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_dmic_channels = {
265*4882a593Smuzhiyun .count = ARRAY_SIZE(channels_dmic),
266*4882a593Smuzhiyun .list = channels_dmic,
267*4882a593Smuzhiyun .mask = 0,
268*4882a593Smuzhiyun };
269*4882a593Smuzhiyun
skylake_dmic_startup(struct snd_pcm_substream * substream)270*4882a593Smuzhiyun static int skylake_dmic_startup(struct snd_pcm_substream *substream)
271*4882a593Smuzhiyun {
272*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun runtime->hw.channels_max = 4;
275*4882a593Smuzhiyun snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
276*4882a593Smuzhiyun &constraints_dmic_channels);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun return snd_pcm_hw_constraint_list(substream->runtime, 0,
279*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_RATE, &constraints_rates);
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun static const struct snd_soc_ops skylake_dmic_ops = {
283*4882a593Smuzhiyun .startup = skylake_dmic_startup,
284*4882a593Smuzhiyun };
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(dummy,
287*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_DUMMY()));
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(system,
290*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("System Pin")));
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(deepbuffer,
293*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("Deepbuffer Pin")));
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(reference,
296*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("Reference Pin")));
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(dmic,
299*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("DMIC Pin")));
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(hdmi1,
302*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("HDMI1 Pin")));
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(hdmi2,
305*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("HDMI2 Pin")));
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(hdmi3,
308*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("HDMI3 Pin")));
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(ssp0_pin,
311*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("SSP0 Pin")));
312*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(ssp0_codec,
313*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC("i2c-INT343A:00", "rt286-aif1")));
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(dmic01_pin,
316*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("DMIC01 Pin")));
317*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(dmic_codec,
318*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC("dmic-codec", "dmic-hifi")));
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(idisp1_pin,
321*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("iDisp1 Pin")));
322*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(idisp1_codec,
323*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC("ehdaudio0D2", "intel-hdmi-hifi1")));
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(idisp2_pin,
326*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("iDisp2 Pin")));
327*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(idisp2_codec,
328*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC("ehdaudio0D2", "intel-hdmi-hifi2")));
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(idisp3_pin,
331*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("iDisp3 Pin")));
332*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(idisp3_codec,
333*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC("ehdaudio0D2", "intel-hdmi-hifi3")));
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(platform,
336*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_PLATFORM("0000:00:1f.3")));
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun /* skylake digital audio interface glue - connects codec <--> CPU */
339*4882a593Smuzhiyun static struct snd_soc_dai_link skylake_rt286_dais[] = {
340*4882a593Smuzhiyun /* Front End DAI links */
341*4882a593Smuzhiyun [SKL_DPCM_AUDIO_PB] = {
342*4882a593Smuzhiyun .name = "Skl Audio Port",
343*4882a593Smuzhiyun .stream_name = "Audio",
344*4882a593Smuzhiyun .nonatomic = 1,
345*4882a593Smuzhiyun .dynamic = 1,
346*4882a593Smuzhiyun .init = skylake_rt286_fe_init,
347*4882a593Smuzhiyun .trigger = {
348*4882a593Smuzhiyun SND_SOC_DPCM_TRIGGER_POST,
349*4882a593Smuzhiyun SND_SOC_DPCM_TRIGGER_POST
350*4882a593Smuzhiyun },
351*4882a593Smuzhiyun .dpcm_playback = 1,
352*4882a593Smuzhiyun .ops = &skylake_rt286_fe_ops,
353*4882a593Smuzhiyun SND_SOC_DAILINK_REG(system, dummy, platform),
354*4882a593Smuzhiyun },
355*4882a593Smuzhiyun [SKL_DPCM_AUDIO_DB_PB] = {
356*4882a593Smuzhiyun .name = "Skl Deepbuffer Port",
357*4882a593Smuzhiyun .stream_name = "Deep Buffer Audio",
358*4882a593Smuzhiyun .nonatomic = 1,
359*4882a593Smuzhiyun .dynamic = 1,
360*4882a593Smuzhiyun .trigger = {
361*4882a593Smuzhiyun SND_SOC_DPCM_TRIGGER_POST,
362*4882a593Smuzhiyun SND_SOC_DPCM_TRIGGER_POST
363*4882a593Smuzhiyun },
364*4882a593Smuzhiyun .dpcm_playback = 1,
365*4882a593Smuzhiyun .ops = &skylake_rt286_fe_ops,
366*4882a593Smuzhiyun SND_SOC_DAILINK_REG(deepbuffer, dummy, platform),
367*4882a593Smuzhiyun },
368*4882a593Smuzhiyun [SKL_DPCM_AUDIO_CP] = {
369*4882a593Smuzhiyun .name = "Skl Audio Capture Port",
370*4882a593Smuzhiyun .stream_name = "Audio Record",
371*4882a593Smuzhiyun .nonatomic = 1,
372*4882a593Smuzhiyun .dynamic = 1,
373*4882a593Smuzhiyun .trigger = {
374*4882a593Smuzhiyun SND_SOC_DPCM_TRIGGER_POST,
375*4882a593Smuzhiyun SND_SOC_DPCM_TRIGGER_POST
376*4882a593Smuzhiyun },
377*4882a593Smuzhiyun .dpcm_capture = 1,
378*4882a593Smuzhiyun .ops = &skylake_rt286_fe_ops,
379*4882a593Smuzhiyun SND_SOC_DAILINK_REG(system, dummy, platform),
380*4882a593Smuzhiyun },
381*4882a593Smuzhiyun [SKL_DPCM_AUDIO_REF_CP] = {
382*4882a593Smuzhiyun .name = "Skl Audio Reference cap",
383*4882a593Smuzhiyun .stream_name = "refcap",
384*4882a593Smuzhiyun .init = NULL,
385*4882a593Smuzhiyun .dpcm_capture = 1,
386*4882a593Smuzhiyun .nonatomic = 1,
387*4882a593Smuzhiyun .dynamic = 1,
388*4882a593Smuzhiyun SND_SOC_DAILINK_REG(reference, dummy, platform),
389*4882a593Smuzhiyun },
390*4882a593Smuzhiyun [SKL_DPCM_AUDIO_DMIC_CP] = {
391*4882a593Smuzhiyun .name = "Skl Audio DMIC cap",
392*4882a593Smuzhiyun .stream_name = "dmiccap",
393*4882a593Smuzhiyun .init = NULL,
394*4882a593Smuzhiyun .dpcm_capture = 1,
395*4882a593Smuzhiyun .nonatomic = 1,
396*4882a593Smuzhiyun .dynamic = 1,
397*4882a593Smuzhiyun .ops = &skylake_dmic_ops,
398*4882a593Smuzhiyun SND_SOC_DAILINK_REG(dmic, dummy, platform),
399*4882a593Smuzhiyun },
400*4882a593Smuzhiyun [SKL_DPCM_AUDIO_HDMI1_PB] = {
401*4882a593Smuzhiyun .name = "Skl HDMI Port1",
402*4882a593Smuzhiyun .stream_name = "Hdmi1",
403*4882a593Smuzhiyun .dpcm_playback = 1,
404*4882a593Smuzhiyun .init = NULL,
405*4882a593Smuzhiyun .nonatomic = 1,
406*4882a593Smuzhiyun .dynamic = 1,
407*4882a593Smuzhiyun SND_SOC_DAILINK_REG(hdmi1, dummy, platform),
408*4882a593Smuzhiyun },
409*4882a593Smuzhiyun [SKL_DPCM_AUDIO_HDMI2_PB] = {
410*4882a593Smuzhiyun .name = "Skl HDMI Port2",
411*4882a593Smuzhiyun .stream_name = "Hdmi2",
412*4882a593Smuzhiyun .dpcm_playback = 1,
413*4882a593Smuzhiyun .init = NULL,
414*4882a593Smuzhiyun .nonatomic = 1,
415*4882a593Smuzhiyun .dynamic = 1,
416*4882a593Smuzhiyun SND_SOC_DAILINK_REG(hdmi2, dummy, platform),
417*4882a593Smuzhiyun },
418*4882a593Smuzhiyun [SKL_DPCM_AUDIO_HDMI3_PB] = {
419*4882a593Smuzhiyun .name = "Skl HDMI Port3",
420*4882a593Smuzhiyun .stream_name = "Hdmi3",
421*4882a593Smuzhiyun .dpcm_playback = 1,
422*4882a593Smuzhiyun .init = NULL,
423*4882a593Smuzhiyun .nonatomic = 1,
424*4882a593Smuzhiyun .dynamic = 1,
425*4882a593Smuzhiyun SND_SOC_DAILINK_REG(hdmi3, dummy, platform),
426*4882a593Smuzhiyun },
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun /* Back End DAI links */
429*4882a593Smuzhiyun {
430*4882a593Smuzhiyun /* SSP0 - Codec */
431*4882a593Smuzhiyun .name = "SSP0-Codec",
432*4882a593Smuzhiyun .id = 0,
433*4882a593Smuzhiyun .no_pcm = 1,
434*4882a593Smuzhiyun .init = skylake_rt286_codec_init,
435*4882a593Smuzhiyun .dai_fmt = SND_SOC_DAIFMT_I2S |
436*4882a593Smuzhiyun SND_SOC_DAIFMT_NB_NF |
437*4882a593Smuzhiyun SND_SOC_DAIFMT_CBS_CFS,
438*4882a593Smuzhiyun .ignore_pmdown_time = 1,
439*4882a593Smuzhiyun .be_hw_params_fixup = skylake_ssp0_fixup,
440*4882a593Smuzhiyun .ops = &skylake_rt286_ops,
441*4882a593Smuzhiyun .dpcm_playback = 1,
442*4882a593Smuzhiyun .dpcm_capture = 1,
443*4882a593Smuzhiyun SND_SOC_DAILINK_REG(ssp0_pin, ssp0_codec, platform),
444*4882a593Smuzhiyun },
445*4882a593Smuzhiyun {
446*4882a593Smuzhiyun .name = "dmic01",
447*4882a593Smuzhiyun .id = 1,
448*4882a593Smuzhiyun .be_hw_params_fixup = skylake_dmic_fixup,
449*4882a593Smuzhiyun .ignore_suspend = 1,
450*4882a593Smuzhiyun .dpcm_capture = 1,
451*4882a593Smuzhiyun .no_pcm = 1,
452*4882a593Smuzhiyun SND_SOC_DAILINK_REG(dmic01_pin, dmic_codec, platform),
453*4882a593Smuzhiyun },
454*4882a593Smuzhiyun {
455*4882a593Smuzhiyun .name = "iDisp1",
456*4882a593Smuzhiyun .id = 2,
457*4882a593Smuzhiyun .init = skylake_hdmi_init,
458*4882a593Smuzhiyun .dpcm_playback = 1,
459*4882a593Smuzhiyun .no_pcm = 1,
460*4882a593Smuzhiyun SND_SOC_DAILINK_REG(idisp1_pin, idisp1_codec, platform),
461*4882a593Smuzhiyun },
462*4882a593Smuzhiyun {
463*4882a593Smuzhiyun .name = "iDisp2",
464*4882a593Smuzhiyun .id = 3,
465*4882a593Smuzhiyun .init = skylake_hdmi_init,
466*4882a593Smuzhiyun .dpcm_playback = 1,
467*4882a593Smuzhiyun .no_pcm = 1,
468*4882a593Smuzhiyun SND_SOC_DAILINK_REG(idisp2_pin, idisp2_codec, platform),
469*4882a593Smuzhiyun },
470*4882a593Smuzhiyun {
471*4882a593Smuzhiyun .name = "iDisp3",
472*4882a593Smuzhiyun .id = 4,
473*4882a593Smuzhiyun .init = skylake_hdmi_init,
474*4882a593Smuzhiyun .dpcm_playback = 1,
475*4882a593Smuzhiyun .no_pcm = 1,
476*4882a593Smuzhiyun SND_SOC_DAILINK_REG(idisp3_pin, idisp3_codec, platform),
477*4882a593Smuzhiyun },
478*4882a593Smuzhiyun };
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun #define NAME_SIZE 32
skylake_card_late_probe(struct snd_soc_card * card)481*4882a593Smuzhiyun static int skylake_card_late_probe(struct snd_soc_card *card)
482*4882a593Smuzhiyun {
483*4882a593Smuzhiyun struct skl_rt286_private *ctx = snd_soc_card_get_drvdata(card);
484*4882a593Smuzhiyun struct skl_hdmi_pcm *pcm;
485*4882a593Smuzhiyun struct snd_soc_component *component = NULL;
486*4882a593Smuzhiyun int err, i = 0;
487*4882a593Smuzhiyun char jack_name[NAME_SIZE];
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun list_for_each_entry(pcm, &ctx->hdmi_pcm_list, head) {
490*4882a593Smuzhiyun component = pcm->codec_dai->component;
491*4882a593Smuzhiyun snprintf(jack_name, sizeof(jack_name),
492*4882a593Smuzhiyun "HDMI/DP, pcm=%d Jack", pcm->device);
493*4882a593Smuzhiyun err = snd_soc_card_jack_new(card, jack_name,
494*4882a593Smuzhiyun SND_JACK_AVOUT, &skylake_hdmi[i],
495*4882a593Smuzhiyun NULL, 0);
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun if (err)
498*4882a593Smuzhiyun return err;
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun err = hdac_hdmi_jack_init(pcm->codec_dai, pcm->device,
501*4882a593Smuzhiyun &skylake_hdmi[i]);
502*4882a593Smuzhiyun if (err < 0)
503*4882a593Smuzhiyun return err;
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun i++;
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun if (!component)
509*4882a593Smuzhiyun return -EINVAL;
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun return hdac_hdmi_jack_port_init(component, &card->dapm);
512*4882a593Smuzhiyun }
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun /* skylake audio machine driver for SPT + RT286S */
515*4882a593Smuzhiyun static struct snd_soc_card skylake_rt286 = {
516*4882a593Smuzhiyun .name = "skylake-rt286",
517*4882a593Smuzhiyun .owner = THIS_MODULE,
518*4882a593Smuzhiyun .dai_link = skylake_rt286_dais,
519*4882a593Smuzhiyun .num_links = ARRAY_SIZE(skylake_rt286_dais),
520*4882a593Smuzhiyun .controls = skylake_controls,
521*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(skylake_controls),
522*4882a593Smuzhiyun .dapm_widgets = skylake_widgets,
523*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(skylake_widgets),
524*4882a593Smuzhiyun .dapm_routes = skylake_rt286_map,
525*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(skylake_rt286_map),
526*4882a593Smuzhiyun .fully_routed = true,
527*4882a593Smuzhiyun .late_probe = skylake_card_late_probe,
528*4882a593Smuzhiyun };
529*4882a593Smuzhiyun
skylake_audio_probe(struct platform_device * pdev)530*4882a593Smuzhiyun static int skylake_audio_probe(struct platform_device *pdev)
531*4882a593Smuzhiyun {
532*4882a593Smuzhiyun struct skl_rt286_private *ctx;
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
535*4882a593Smuzhiyun if (!ctx)
536*4882a593Smuzhiyun return -ENOMEM;
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun INIT_LIST_HEAD(&ctx->hdmi_pcm_list);
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun skylake_rt286.dev = &pdev->dev;
541*4882a593Smuzhiyun snd_soc_card_set_drvdata(&skylake_rt286, ctx);
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun return devm_snd_soc_register_card(&pdev->dev, &skylake_rt286);
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun static const struct platform_device_id skl_board_ids[] = {
547*4882a593Smuzhiyun { .name = "skl_alc286s_i2s" },
548*4882a593Smuzhiyun { .name = "kbl_alc286s_i2s" },
549*4882a593Smuzhiyun { }
550*4882a593Smuzhiyun };
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun static struct platform_driver skylake_audio = {
553*4882a593Smuzhiyun .probe = skylake_audio_probe,
554*4882a593Smuzhiyun .driver = {
555*4882a593Smuzhiyun .name = "skl_alc286s_i2s",
556*4882a593Smuzhiyun .pm = &snd_soc_pm_ops,
557*4882a593Smuzhiyun },
558*4882a593Smuzhiyun .id_table = skl_board_ids,
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun };
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun module_platform_driver(skylake_audio)
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun /* Module information */
565*4882a593Smuzhiyun MODULE_AUTHOR("Omair Mohammed Abdullah <omair.m.abdullah@intel.com>");
566*4882a593Smuzhiyun MODULE_DESCRIPTION("Intel SST Audio for Skylake");
567*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
568*4882a593Smuzhiyun MODULE_ALIAS("platform:skl_alc286s_i2s");
569*4882a593Smuzhiyun MODULE_ALIAS("platform:kbl_alc286s_i2s");
570