xref: /OK3568_Linux_fs/kernel/sound/soc/intel/boards/skl_nau88l25_ssm4567.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Intel Skylake I2S Machine Driver for NAU88L25+SSM4567
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2015, Intel Corporation. All rights reserved.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Modified from:
8*4882a593Smuzhiyun  *   Intel Skylake I2S Machine Driver for NAU88L25 and SSM4567
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  *   Copyright (C) 2015, Intel Corporation. All rights reserved.
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <sound/core.h>
16*4882a593Smuzhiyun #include <sound/pcm.h>
17*4882a593Smuzhiyun #include <sound/soc.h>
18*4882a593Smuzhiyun #include <sound/soc-acpi.h>
19*4882a593Smuzhiyun #include <sound/jack.h>
20*4882a593Smuzhiyun #include <sound/pcm_params.h>
21*4882a593Smuzhiyun #include "../../codecs/nau8825.h"
22*4882a593Smuzhiyun #include "../../codecs/hdac_hdmi.h"
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define SKL_NUVOTON_CODEC_DAI	"nau8825-hifi"
25*4882a593Smuzhiyun #define SKL_SSM_CODEC_DAI	"ssm4567-hifi"
26*4882a593Smuzhiyun #define DMIC_CH(p)     p->list[p->count-1]
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun static struct snd_soc_jack skylake_headset;
29*4882a593Smuzhiyun static struct snd_soc_card skylake_audio_card;
30*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list *dmic_constraints;
31*4882a593Smuzhiyun static struct snd_soc_jack skylake_hdmi[3];
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun struct skl_hdmi_pcm {
34*4882a593Smuzhiyun 	struct list_head head;
35*4882a593Smuzhiyun 	struct snd_soc_dai *codec_dai;
36*4882a593Smuzhiyun 	int device;
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun struct skl_nau88125_private {
40*4882a593Smuzhiyun 	struct list_head hdmi_pcm_list;
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun enum {
43*4882a593Smuzhiyun 	SKL_DPCM_AUDIO_PB = 0,
44*4882a593Smuzhiyun 	SKL_DPCM_AUDIO_CP,
45*4882a593Smuzhiyun 	SKL_DPCM_AUDIO_REF_CP,
46*4882a593Smuzhiyun 	SKL_DPCM_AUDIO_DMIC_CP,
47*4882a593Smuzhiyun 	SKL_DPCM_AUDIO_HDMI1_PB,
48*4882a593Smuzhiyun 	SKL_DPCM_AUDIO_HDMI2_PB,
49*4882a593Smuzhiyun 	SKL_DPCM_AUDIO_HDMI3_PB,
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun static const struct snd_kcontrol_new skylake_controls[] = {
53*4882a593Smuzhiyun 	SOC_DAPM_PIN_SWITCH("Headphone Jack"),
54*4882a593Smuzhiyun 	SOC_DAPM_PIN_SWITCH("Headset Mic"),
55*4882a593Smuzhiyun 	SOC_DAPM_PIN_SWITCH("Left Speaker"),
56*4882a593Smuzhiyun 	SOC_DAPM_PIN_SWITCH("Right Speaker"),
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun 
platform_clock_control(struct snd_soc_dapm_widget * w,struct snd_kcontrol * k,int event)59*4882a593Smuzhiyun static int platform_clock_control(struct snd_soc_dapm_widget *w,
60*4882a593Smuzhiyun 		struct snd_kcontrol *k, int  event)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun 	struct snd_soc_dapm_context *dapm = w->dapm;
63*4882a593Smuzhiyun 	struct snd_soc_card *card = dapm->card;
64*4882a593Smuzhiyun 	struct snd_soc_dai *codec_dai;
65*4882a593Smuzhiyun 	int ret;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	codec_dai = snd_soc_card_get_codec_dai(card, SKL_NUVOTON_CODEC_DAI);
68*4882a593Smuzhiyun 	if (!codec_dai) {
69*4882a593Smuzhiyun 		dev_err(card->dev, "Codec dai not found\n");
70*4882a593Smuzhiyun 		return -EIO;
71*4882a593Smuzhiyun 	}
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	if (SND_SOC_DAPM_EVENT_ON(event)) {
74*4882a593Smuzhiyun 		ret = snd_soc_dai_set_sysclk(codec_dai,
75*4882a593Smuzhiyun 				NAU8825_CLK_MCLK, 24000000, SND_SOC_CLOCK_IN);
76*4882a593Smuzhiyun 		if (ret < 0) {
77*4882a593Smuzhiyun 			dev_err(card->dev, "set sysclk err = %d\n", ret);
78*4882a593Smuzhiyun 			return -EIO;
79*4882a593Smuzhiyun 		}
80*4882a593Smuzhiyun 	} else {
81*4882a593Smuzhiyun 		ret = snd_soc_dai_set_sysclk(codec_dai,
82*4882a593Smuzhiyun 				NAU8825_CLK_INTERNAL, 0, SND_SOC_CLOCK_IN);
83*4882a593Smuzhiyun 		if (ret < 0) {
84*4882a593Smuzhiyun 			dev_err(card->dev, "set sysclk err = %d\n", ret);
85*4882a593Smuzhiyun 			return -EIO;
86*4882a593Smuzhiyun 		}
87*4882a593Smuzhiyun 	}
88*4882a593Smuzhiyun 	return ret;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun static const struct snd_soc_dapm_widget skylake_widgets[] = {
92*4882a593Smuzhiyun 	SND_SOC_DAPM_HP("Headphone Jack", NULL),
93*4882a593Smuzhiyun 	SND_SOC_DAPM_MIC("Headset Mic", NULL),
94*4882a593Smuzhiyun 	SND_SOC_DAPM_SPK("Left Speaker", NULL),
95*4882a593Smuzhiyun 	SND_SOC_DAPM_SPK("Right Speaker", NULL),
96*4882a593Smuzhiyun 	SND_SOC_DAPM_MIC("SoC DMIC", NULL),
97*4882a593Smuzhiyun 	SND_SOC_DAPM_SPK("DP1", NULL),
98*4882a593Smuzhiyun 	SND_SOC_DAPM_SPK("DP2", NULL),
99*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
100*4882a593Smuzhiyun 			platform_clock_control, SND_SOC_DAPM_PRE_PMU |
101*4882a593Smuzhiyun 			SND_SOC_DAPM_POST_PMD),
102*4882a593Smuzhiyun };
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun static const struct snd_soc_dapm_route skylake_map[] = {
105*4882a593Smuzhiyun 	/* HP jack connectors - unknown if we have jack detection */
106*4882a593Smuzhiyun 	{"Headphone Jack", NULL, "HPOL"},
107*4882a593Smuzhiyun 	{"Headphone Jack", NULL, "HPOR"},
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	/* speaker */
110*4882a593Smuzhiyun 	{"Left Speaker", NULL, "Left OUT"},
111*4882a593Smuzhiyun 	{"Right Speaker", NULL, "Right OUT"},
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	/* other jacks */
114*4882a593Smuzhiyun 	{"MIC", NULL, "Headset Mic"},
115*4882a593Smuzhiyun 	{"DMic", NULL, "SoC DMIC"},
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	/* CODEC BE connections */
118*4882a593Smuzhiyun 	{ "Left Playback", NULL, "ssp0 Tx"},
119*4882a593Smuzhiyun 	{ "Right Playback", NULL, "ssp0 Tx"},
120*4882a593Smuzhiyun 	{ "ssp0 Tx", NULL, "codec0_out"},
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	/* IV feedback path */
123*4882a593Smuzhiyun 	{ "codec0_lp_in", NULL, "ssp0 Rx"},
124*4882a593Smuzhiyun 	{ "ssp0 Rx", NULL, "Left Capture Sense" },
125*4882a593Smuzhiyun 	{ "ssp0 Rx", NULL, "Right Capture Sense" },
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	{ "Playback", NULL, "ssp1 Tx"},
128*4882a593Smuzhiyun 	{ "ssp1 Tx", NULL, "codec1_out"},
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	{ "codec0_in", NULL, "ssp1 Rx" },
131*4882a593Smuzhiyun 	{ "ssp1 Rx", NULL, "Capture" },
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	/* DMIC */
134*4882a593Smuzhiyun 	{ "dmic01_hifi", NULL, "DMIC01 Rx" },
135*4882a593Smuzhiyun 	{ "DMIC01 Rx", NULL, "DMIC AIF" },
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	{ "hifi3", NULL, "iDisp3 Tx"},
138*4882a593Smuzhiyun 	{ "iDisp3 Tx", NULL, "iDisp3_out"},
139*4882a593Smuzhiyun 	{ "hifi2", NULL, "iDisp2 Tx"},
140*4882a593Smuzhiyun 	{ "iDisp2 Tx", NULL, "iDisp2_out"},
141*4882a593Smuzhiyun 	{ "hifi1", NULL, "iDisp1 Tx"},
142*4882a593Smuzhiyun 	{ "iDisp1 Tx", NULL, "iDisp1_out"},
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	{ "Headphone Jack", NULL, "Platform Clock" },
145*4882a593Smuzhiyun 	{ "Headset Mic", NULL, "Platform Clock" },
146*4882a593Smuzhiyun };
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun static struct snd_soc_codec_conf ssm4567_codec_conf[] = {
149*4882a593Smuzhiyun 	{
150*4882a593Smuzhiyun 		.dlc = COMP_CODEC_CONF("i2c-INT343B:00"),
151*4882a593Smuzhiyun 		.name_prefix = "Left",
152*4882a593Smuzhiyun 	},
153*4882a593Smuzhiyun 	{
154*4882a593Smuzhiyun 		.dlc = COMP_CODEC_CONF("i2c-INT343B:01"),
155*4882a593Smuzhiyun 		.name_prefix = "Right",
156*4882a593Smuzhiyun 	},
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun 
skylake_ssm4567_codec_init(struct snd_soc_pcm_runtime * rtd)159*4882a593Smuzhiyun static int skylake_ssm4567_codec_init(struct snd_soc_pcm_runtime *rtd)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun 	int ret;
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	/* Slot 1 for left */
164*4882a593Smuzhiyun 	ret = snd_soc_dai_set_tdm_slot(asoc_rtd_to_codec(rtd, 0), 0x01, 0x01, 2, 48);
165*4882a593Smuzhiyun 	if (ret < 0)
166*4882a593Smuzhiyun 		return ret;
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	/* Slot 2 for right */
169*4882a593Smuzhiyun 	ret = snd_soc_dai_set_tdm_slot(asoc_rtd_to_codec(rtd, 1), 0x02, 0x02, 2, 48);
170*4882a593Smuzhiyun 	if (ret < 0)
171*4882a593Smuzhiyun 		return ret;
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	return ret;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun 
skylake_nau8825_codec_init(struct snd_soc_pcm_runtime * rtd)176*4882a593Smuzhiyun static int skylake_nau8825_codec_init(struct snd_soc_pcm_runtime *rtd)
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun 	int ret;
179*4882a593Smuzhiyun 	struct snd_soc_component *component = asoc_rtd_to_codec(rtd, 0)->component;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	/*
182*4882a593Smuzhiyun 	 * 4 buttons here map to the google Reference headset
183*4882a593Smuzhiyun 	 * The use of these buttons can be decided by the user space.
184*4882a593Smuzhiyun 	 */
185*4882a593Smuzhiyun 	ret = snd_soc_card_jack_new(&skylake_audio_card, "Headset Jack",
186*4882a593Smuzhiyun 		SND_JACK_HEADSET | SND_JACK_BTN_0 | SND_JACK_BTN_1 |
187*4882a593Smuzhiyun 		SND_JACK_BTN_2 | SND_JACK_BTN_3, &skylake_headset,
188*4882a593Smuzhiyun 		NULL, 0);
189*4882a593Smuzhiyun 	if (ret) {
190*4882a593Smuzhiyun 		dev_err(rtd->dev, "Headset Jack creation failed %d\n", ret);
191*4882a593Smuzhiyun 		return ret;
192*4882a593Smuzhiyun 	}
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	nau8825_enable_jack_detect(component, &skylake_headset);
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	snd_soc_dapm_ignore_suspend(&rtd->card->dapm, "SoC DMIC");
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	return ret;
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun 
skylake_hdmi1_init(struct snd_soc_pcm_runtime * rtd)201*4882a593Smuzhiyun static int skylake_hdmi1_init(struct snd_soc_pcm_runtime *rtd)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun 	struct skl_nau88125_private *ctx = snd_soc_card_get_drvdata(rtd->card);
204*4882a593Smuzhiyun 	struct snd_soc_dai *dai = asoc_rtd_to_codec(rtd, 0);
205*4882a593Smuzhiyun 	struct skl_hdmi_pcm *pcm;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	pcm = devm_kzalloc(rtd->card->dev, sizeof(*pcm), GFP_KERNEL);
208*4882a593Smuzhiyun 	if (!pcm)
209*4882a593Smuzhiyun 		return -ENOMEM;
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	pcm->device = SKL_DPCM_AUDIO_HDMI1_PB;
212*4882a593Smuzhiyun 	pcm->codec_dai = dai;
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	list_add_tail(&pcm->head, &ctx->hdmi_pcm_list);
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	return 0;
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun 
skylake_hdmi2_init(struct snd_soc_pcm_runtime * rtd)219*4882a593Smuzhiyun static int skylake_hdmi2_init(struct snd_soc_pcm_runtime *rtd)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun 	struct skl_nau88125_private *ctx = snd_soc_card_get_drvdata(rtd->card);
222*4882a593Smuzhiyun 	struct snd_soc_dai *dai = asoc_rtd_to_codec(rtd, 0);
223*4882a593Smuzhiyun 	struct skl_hdmi_pcm *pcm;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	pcm = devm_kzalloc(rtd->card->dev, sizeof(*pcm), GFP_KERNEL);
226*4882a593Smuzhiyun 	if (!pcm)
227*4882a593Smuzhiyun 		return -ENOMEM;
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	pcm->device = SKL_DPCM_AUDIO_HDMI2_PB;
230*4882a593Smuzhiyun 	pcm->codec_dai = dai;
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	list_add_tail(&pcm->head, &ctx->hdmi_pcm_list);
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	return 0;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 
skylake_hdmi3_init(struct snd_soc_pcm_runtime * rtd)238*4882a593Smuzhiyun static int skylake_hdmi3_init(struct snd_soc_pcm_runtime *rtd)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun 	struct skl_nau88125_private *ctx = snd_soc_card_get_drvdata(rtd->card);
241*4882a593Smuzhiyun 	struct snd_soc_dai *dai = asoc_rtd_to_codec(rtd, 0);
242*4882a593Smuzhiyun 	struct skl_hdmi_pcm *pcm;
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	pcm = devm_kzalloc(rtd->card->dev, sizeof(*pcm), GFP_KERNEL);
245*4882a593Smuzhiyun 	if (!pcm)
246*4882a593Smuzhiyun 		return -ENOMEM;
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	pcm->device = SKL_DPCM_AUDIO_HDMI3_PB;
249*4882a593Smuzhiyun 	pcm->codec_dai = dai;
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	list_add_tail(&pcm->head, &ctx->hdmi_pcm_list);
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	return 0;
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun 
skylake_nau8825_fe_init(struct snd_soc_pcm_runtime * rtd)256*4882a593Smuzhiyun static int skylake_nau8825_fe_init(struct snd_soc_pcm_runtime *rtd)
257*4882a593Smuzhiyun {
258*4882a593Smuzhiyun 	struct snd_soc_dapm_context *dapm;
259*4882a593Smuzhiyun 	struct snd_soc_component *component = asoc_rtd_to_cpu(rtd, 0)->component;
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	dapm = snd_soc_component_get_dapm(component);
262*4882a593Smuzhiyun 	snd_soc_dapm_ignore_suspend(dapm, "Reference Capture");
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	return 0;
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun static const unsigned int rates[] = {
268*4882a593Smuzhiyun 	48000,
269*4882a593Smuzhiyun };
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_rates = {
272*4882a593Smuzhiyun 	.count = ARRAY_SIZE(rates),
273*4882a593Smuzhiyun 	.list  = rates,
274*4882a593Smuzhiyun 	.mask = 0,
275*4882a593Smuzhiyun };
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun static const unsigned int channels[] = {
278*4882a593Smuzhiyun 	2,
279*4882a593Smuzhiyun };
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_channels = {
282*4882a593Smuzhiyun 	.count = ARRAY_SIZE(channels),
283*4882a593Smuzhiyun 	.list = channels,
284*4882a593Smuzhiyun 	.mask = 0,
285*4882a593Smuzhiyun };
286*4882a593Smuzhiyun 
skl_fe_startup(struct snd_pcm_substream * substream)287*4882a593Smuzhiyun static int skl_fe_startup(struct snd_pcm_substream *substream)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 	/*
292*4882a593Smuzhiyun 	 * on this platform for PCM device we support,
293*4882a593Smuzhiyun 	 *	48Khz
294*4882a593Smuzhiyun 	 *	stereo
295*4882a593Smuzhiyun 	 *	16 bit audio
296*4882a593Smuzhiyun 	 */
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	runtime->hw.channels_max = 2;
299*4882a593Smuzhiyun 	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
300*4882a593Smuzhiyun 					   &constraints_channels);
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE;
303*4882a593Smuzhiyun 	snd_pcm_hw_constraint_msbits(runtime, 0, 16, 16);
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	snd_pcm_hw_constraint_list(runtime, 0,
306*4882a593Smuzhiyun 				SNDRV_PCM_HW_PARAM_RATE, &constraints_rates);
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	return 0;
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun static const struct snd_soc_ops skylake_nau8825_fe_ops = {
312*4882a593Smuzhiyun 	.startup = skl_fe_startup,
313*4882a593Smuzhiyun };
314*4882a593Smuzhiyun 
skylake_ssp_fixup(struct snd_soc_pcm_runtime * rtd,struct snd_pcm_hw_params * params)315*4882a593Smuzhiyun static int skylake_ssp_fixup(struct snd_soc_pcm_runtime *rtd,
316*4882a593Smuzhiyun 			struct snd_pcm_hw_params *params)
317*4882a593Smuzhiyun {
318*4882a593Smuzhiyun 	struct snd_interval *rate = hw_param_interval(params,
319*4882a593Smuzhiyun 			SNDRV_PCM_HW_PARAM_RATE);
320*4882a593Smuzhiyun 	struct snd_interval *chan = hw_param_interval(params,
321*4882a593Smuzhiyun 						SNDRV_PCM_HW_PARAM_CHANNELS);
322*4882a593Smuzhiyun 	struct snd_mask *fmt = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT);
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	/* The ADSP will covert the FE rate to 48k, stereo */
325*4882a593Smuzhiyun 	rate->min = rate->max = 48000;
326*4882a593Smuzhiyun 	chan->min = chan->max = 2;
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	/* set SSP0 to 24 bit */
329*4882a593Smuzhiyun 	snd_mask_none(fmt);
330*4882a593Smuzhiyun 	snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S24_LE);
331*4882a593Smuzhiyun 	return 0;
332*4882a593Smuzhiyun }
333*4882a593Smuzhiyun 
skylake_dmic_fixup(struct snd_soc_pcm_runtime * rtd,struct snd_pcm_hw_params * params)334*4882a593Smuzhiyun static int skylake_dmic_fixup(struct snd_soc_pcm_runtime *rtd,
335*4882a593Smuzhiyun 			struct snd_pcm_hw_params *params)
336*4882a593Smuzhiyun {
337*4882a593Smuzhiyun 	struct snd_interval *chan = hw_param_interval(params,
338*4882a593Smuzhiyun 						SNDRV_PCM_HW_PARAM_CHANNELS);
339*4882a593Smuzhiyun 	if (params_channels(params) == 2 || DMIC_CH(dmic_constraints) == 2)
340*4882a593Smuzhiyun 		chan->min = chan->max = 2;
341*4882a593Smuzhiyun 	else
342*4882a593Smuzhiyun 		chan->min = chan->max = 4;
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	return 0;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun 
skylake_nau8825_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params)347*4882a593Smuzhiyun static int skylake_nau8825_hw_params(struct snd_pcm_substream *substream,
348*4882a593Smuzhiyun 	struct snd_pcm_hw_params *params)
349*4882a593Smuzhiyun {
350*4882a593Smuzhiyun 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
351*4882a593Smuzhiyun 	struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
352*4882a593Smuzhiyun 	int ret;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	ret = snd_soc_dai_set_sysclk(codec_dai,
355*4882a593Smuzhiyun 			NAU8825_CLK_MCLK, 24000000, SND_SOC_CLOCK_IN);
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	if (ret < 0)
358*4882a593Smuzhiyun 		dev_err(rtd->dev, "snd_soc_dai_set_sysclk err = %d\n", ret);
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	return ret;
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun static const struct snd_soc_ops skylake_nau8825_ops = {
364*4882a593Smuzhiyun 	.hw_params = skylake_nau8825_hw_params,
365*4882a593Smuzhiyun };
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun static const unsigned int channels_dmic[] = {
368*4882a593Smuzhiyun 	2, 4,
369*4882a593Smuzhiyun };
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_dmic_channels = {
372*4882a593Smuzhiyun 	.count = ARRAY_SIZE(channels_dmic),
373*4882a593Smuzhiyun 	.list = channels_dmic,
374*4882a593Smuzhiyun 	.mask = 0,
375*4882a593Smuzhiyun };
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun static const unsigned int dmic_2ch[] = {
378*4882a593Smuzhiyun 	2,
379*4882a593Smuzhiyun };
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_dmic_2ch = {
382*4882a593Smuzhiyun 	.count = ARRAY_SIZE(dmic_2ch),
383*4882a593Smuzhiyun 	.list = dmic_2ch,
384*4882a593Smuzhiyun 	.mask = 0,
385*4882a593Smuzhiyun };
386*4882a593Smuzhiyun 
skylake_dmic_startup(struct snd_pcm_substream * substream)387*4882a593Smuzhiyun static int skylake_dmic_startup(struct snd_pcm_substream *substream)
388*4882a593Smuzhiyun {
389*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 	runtime->hw.channels_max = DMIC_CH(dmic_constraints);
392*4882a593Smuzhiyun 	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
393*4882a593Smuzhiyun 			dmic_constraints);
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	return snd_pcm_hw_constraint_list(substream->runtime, 0,
396*4882a593Smuzhiyun 			SNDRV_PCM_HW_PARAM_RATE, &constraints_rates);
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun static const struct snd_soc_ops skylake_dmic_ops = {
400*4882a593Smuzhiyun 	.startup = skylake_dmic_startup,
401*4882a593Smuzhiyun };
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun static const unsigned int rates_16000[] = {
404*4882a593Smuzhiyun 	16000,
405*4882a593Smuzhiyun };
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_16000 = {
408*4882a593Smuzhiyun 	.count = ARRAY_SIZE(rates_16000),
409*4882a593Smuzhiyun 	.list  = rates_16000,
410*4882a593Smuzhiyun };
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun static const unsigned int ch_mono[] = {
413*4882a593Smuzhiyun 	1,
414*4882a593Smuzhiyun };
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_refcap = {
417*4882a593Smuzhiyun 	.count = ARRAY_SIZE(ch_mono),
418*4882a593Smuzhiyun 	.list  = ch_mono,
419*4882a593Smuzhiyun };
420*4882a593Smuzhiyun 
skylake_refcap_startup(struct snd_pcm_substream * substream)421*4882a593Smuzhiyun static int skylake_refcap_startup(struct snd_pcm_substream *substream)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun 	substream->runtime->hw.channels_max = 1;
424*4882a593Smuzhiyun 	snd_pcm_hw_constraint_list(substream->runtime, 0,
425*4882a593Smuzhiyun 					SNDRV_PCM_HW_PARAM_CHANNELS,
426*4882a593Smuzhiyun 					&constraints_refcap);
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	return snd_pcm_hw_constraint_list(substream->runtime, 0,
429*4882a593Smuzhiyun 			SNDRV_PCM_HW_PARAM_RATE,
430*4882a593Smuzhiyun 			&constraints_16000);
431*4882a593Smuzhiyun }
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun static const struct snd_soc_ops skylake_refcap_ops = {
434*4882a593Smuzhiyun 	.startup = skylake_refcap_startup,
435*4882a593Smuzhiyun };
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(dummy,
438*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_DUMMY()));
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(system,
441*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CPU("System Pin")));
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(reference,
444*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CPU("Reference Pin")));
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(dmic,
447*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CPU("DMIC Pin")));
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(hdmi1,
450*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CPU("HDMI1 Pin")));
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(hdmi2,
453*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CPU("HDMI2 Pin")));
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(hdmi3,
456*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CPU("HDMI3 Pin")));
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(ssp0_pin,
459*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CPU("SSP0 Pin")));
460*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(ssp0_codec,
461*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(
462*4882a593Smuzhiyun 	/* Left */	COMP_CODEC("i2c-INT343B:00", SKL_SSM_CODEC_DAI),
463*4882a593Smuzhiyun 	/* Right */	COMP_CODEC("i2c-INT343B:01", SKL_SSM_CODEC_DAI)));
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(ssp1_pin,
466*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CPU("SSP1 Pin")));
467*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(ssp1_codec,
468*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CODEC("i2c-10508825:00", SKL_NUVOTON_CODEC_DAI)));
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(dmic01_pin,
471*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CPU("DMIC01 Pin")));
472*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(dmic_codec,
473*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CODEC("dmic-codec", "dmic-hifi")));
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(idisp1_pin,
476*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CPU("iDisp1 Pin")));
477*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(idisp1_codec,
478*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CODEC("ehdaudio0D2", "intel-hdmi-hifi1")));
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(idisp2_pin,
481*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CPU("iDisp2 Pin")));
482*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(idisp2_codec,
483*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CODEC("ehdaudio0D2", "intel-hdmi-hifi2")));
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(idisp3_pin,
486*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CPU("iDisp3 Pin")));
487*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(idisp3_codec,
488*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_CODEC("ehdaudio0D2", "intel-hdmi-hifi3")));
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun SND_SOC_DAILINK_DEF(platform,
491*4882a593Smuzhiyun 	DAILINK_COMP_ARRAY(COMP_PLATFORM("0000:00:1f.3")));
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun /* skylake digital audio interface glue - connects codec <--> CPU */
494*4882a593Smuzhiyun static struct snd_soc_dai_link skylake_dais[] = {
495*4882a593Smuzhiyun 	/* Front End DAI links */
496*4882a593Smuzhiyun 	[SKL_DPCM_AUDIO_PB] = {
497*4882a593Smuzhiyun 		.name = "Skl Audio Port",
498*4882a593Smuzhiyun 		.stream_name = "Audio",
499*4882a593Smuzhiyun 		.dynamic = 1,
500*4882a593Smuzhiyun 		.nonatomic = 1,
501*4882a593Smuzhiyun 		.init = skylake_nau8825_fe_init,
502*4882a593Smuzhiyun 		.trigger = {
503*4882a593Smuzhiyun 			SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST},
504*4882a593Smuzhiyun 		.dpcm_playback = 1,
505*4882a593Smuzhiyun 		.ops = &skylake_nau8825_fe_ops,
506*4882a593Smuzhiyun 		SND_SOC_DAILINK_REG(system, dummy, platform),
507*4882a593Smuzhiyun 	},
508*4882a593Smuzhiyun 	[SKL_DPCM_AUDIO_CP] = {
509*4882a593Smuzhiyun 		.name = "Skl Audio Capture Port",
510*4882a593Smuzhiyun 		.stream_name = "Audio Record",
511*4882a593Smuzhiyun 		.dynamic = 1,
512*4882a593Smuzhiyun 		.nonatomic = 1,
513*4882a593Smuzhiyun 		.trigger = {
514*4882a593Smuzhiyun 			SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST},
515*4882a593Smuzhiyun 		.dpcm_capture = 1,
516*4882a593Smuzhiyun 		.ops = &skylake_nau8825_fe_ops,
517*4882a593Smuzhiyun 		SND_SOC_DAILINK_REG(system, dummy, platform),
518*4882a593Smuzhiyun 	},
519*4882a593Smuzhiyun 	[SKL_DPCM_AUDIO_REF_CP] = {
520*4882a593Smuzhiyun 		.name = "Skl Audio Reference cap",
521*4882a593Smuzhiyun 		.stream_name = "Wake on Voice",
522*4882a593Smuzhiyun 		.init = NULL,
523*4882a593Smuzhiyun 		.dpcm_capture = 1,
524*4882a593Smuzhiyun 		.nonatomic = 1,
525*4882a593Smuzhiyun 		.dynamic = 1,
526*4882a593Smuzhiyun 		.ops = &skylake_refcap_ops,
527*4882a593Smuzhiyun 		SND_SOC_DAILINK_REG(reference, dummy, platform),
528*4882a593Smuzhiyun 	},
529*4882a593Smuzhiyun 	[SKL_DPCM_AUDIO_DMIC_CP] = {
530*4882a593Smuzhiyun 		.name = "Skl Audio DMIC cap",
531*4882a593Smuzhiyun 		.stream_name = "dmiccap",
532*4882a593Smuzhiyun 		.init = NULL,
533*4882a593Smuzhiyun 		.dpcm_capture = 1,
534*4882a593Smuzhiyun 		.nonatomic = 1,
535*4882a593Smuzhiyun 		.dynamic = 1,
536*4882a593Smuzhiyun 		.ops = &skylake_dmic_ops,
537*4882a593Smuzhiyun 		SND_SOC_DAILINK_REG(dmic, dummy, platform),
538*4882a593Smuzhiyun 	},
539*4882a593Smuzhiyun 	[SKL_DPCM_AUDIO_HDMI1_PB] = {
540*4882a593Smuzhiyun 		.name = "Skl HDMI Port1",
541*4882a593Smuzhiyun 		.stream_name = "Hdmi1",
542*4882a593Smuzhiyun 		.dpcm_playback = 1,
543*4882a593Smuzhiyun 		.init = NULL,
544*4882a593Smuzhiyun 		.trigger = {
545*4882a593Smuzhiyun 			SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST},
546*4882a593Smuzhiyun 		.nonatomic = 1,
547*4882a593Smuzhiyun 		.dynamic = 1,
548*4882a593Smuzhiyun 		SND_SOC_DAILINK_REG(hdmi1, dummy, platform),
549*4882a593Smuzhiyun 	},
550*4882a593Smuzhiyun 	[SKL_DPCM_AUDIO_HDMI2_PB] = {
551*4882a593Smuzhiyun 		.name = "Skl HDMI Port2",
552*4882a593Smuzhiyun 		.stream_name = "Hdmi2",
553*4882a593Smuzhiyun 		.dpcm_playback = 1,
554*4882a593Smuzhiyun 		.init = NULL,
555*4882a593Smuzhiyun 		.trigger = {
556*4882a593Smuzhiyun 			SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST},
557*4882a593Smuzhiyun 		.nonatomic = 1,
558*4882a593Smuzhiyun 		.dynamic = 1,
559*4882a593Smuzhiyun 		SND_SOC_DAILINK_REG(hdmi2, dummy, platform),
560*4882a593Smuzhiyun 	},
561*4882a593Smuzhiyun 	[SKL_DPCM_AUDIO_HDMI3_PB] = {
562*4882a593Smuzhiyun 		.name = "Skl HDMI Port3",
563*4882a593Smuzhiyun 		.stream_name = "Hdmi3",
564*4882a593Smuzhiyun 		.trigger = {
565*4882a593Smuzhiyun 			SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST},
566*4882a593Smuzhiyun 		.dpcm_playback = 1,
567*4882a593Smuzhiyun 		.init = NULL,
568*4882a593Smuzhiyun 		.nonatomic = 1,
569*4882a593Smuzhiyun 		.dynamic = 1,
570*4882a593Smuzhiyun 		SND_SOC_DAILINK_REG(hdmi3, dummy, platform),
571*4882a593Smuzhiyun 	},
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun 	/* Back End DAI links */
574*4882a593Smuzhiyun 	{
575*4882a593Smuzhiyun 		/* SSP0 - Codec */
576*4882a593Smuzhiyun 		.name = "SSP0-Codec",
577*4882a593Smuzhiyun 		.id = 0,
578*4882a593Smuzhiyun 		.no_pcm = 1,
579*4882a593Smuzhiyun 		.dai_fmt = SND_SOC_DAIFMT_DSP_A |
580*4882a593Smuzhiyun 			SND_SOC_DAIFMT_IB_NF |
581*4882a593Smuzhiyun 			SND_SOC_DAIFMT_CBS_CFS,
582*4882a593Smuzhiyun 		.init = skylake_ssm4567_codec_init,
583*4882a593Smuzhiyun 		.ignore_pmdown_time = 1,
584*4882a593Smuzhiyun 		.be_hw_params_fixup = skylake_ssp_fixup,
585*4882a593Smuzhiyun 		.dpcm_playback = 1,
586*4882a593Smuzhiyun 		.dpcm_capture = 1,
587*4882a593Smuzhiyun 		SND_SOC_DAILINK_REG(ssp0_pin, ssp0_codec, platform),
588*4882a593Smuzhiyun 	},
589*4882a593Smuzhiyun 	{
590*4882a593Smuzhiyun 		/* SSP1 - Codec */
591*4882a593Smuzhiyun 		.name = "SSP1-Codec",
592*4882a593Smuzhiyun 		.id = 1,
593*4882a593Smuzhiyun 		.no_pcm = 1,
594*4882a593Smuzhiyun 		.init = skylake_nau8825_codec_init,
595*4882a593Smuzhiyun 		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
596*4882a593Smuzhiyun 			SND_SOC_DAIFMT_CBS_CFS,
597*4882a593Smuzhiyun 		.ignore_pmdown_time = 1,
598*4882a593Smuzhiyun 		.be_hw_params_fixup = skylake_ssp_fixup,
599*4882a593Smuzhiyun 		.ops = &skylake_nau8825_ops,
600*4882a593Smuzhiyun 		.dpcm_playback = 1,
601*4882a593Smuzhiyun 		.dpcm_capture = 1,
602*4882a593Smuzhiyun 		SND_SOC_DAILINK_REG(ssp1_pin, ssp1_codec, platform),
603*4882a593Smuzhiyun 	},
604*4882a593Smuzhiyun 	{
605*4882a593Smuzhiyun 		.name = "dmic01",
606*4882a593Smuzhiyun 		.id = 2,
607*4882a593Smuzhiyun 		.ignore_suspend = 1,
608*4882a593Smuzhiyun 		.be_hw_params_fixup = skylake_dmic_fixup,
609*4882a593Smuzhiyun 		.dpcm_capture = 1,
610*4882a593Smuzhiyun 		.no_pcm = 1,
611*4882a593Smuzhiyun 		SND_SOC_DAILINK_REG(dmic01_pin, dmic_codec, platform),
612*4882a593Smuzhiyun 	},
613*4882a593Smuzhiyun 	{
614*4882a593Smuzhiyun 		.name = "iDisp1",
615*4882a593Smuzhiyun 		.id = 3,
616*4882a593Smuzhiyun 		.dpcm_playback = 1,
617*4882a593Smuzhiyun 		.init = skylake_hdmi1_init,
618*4882a593Smuzhiyun 		.no_pcm = 1,
619*4882a593Smuzhiyun 		SND_SOC_DAILINK_REG(idisp1_pin, idisp1_codec, platform),
620*4882a593Smuzhiyun 	},
621*4882a593Smuzhiyun 	{
622*4882a593Smuzhiyun 		.name = "iDisp2",
623*4882a593Smuzhiyun 		.id = 4,
624*4882a593Smuzhiyun 		.init = skylake_hdmi2_init,
625*4882a593Smuzhiyun 		.dpcm_playback = 1,
626*4882a593Smuzhiyun 		.no_pcm = 1,
627*4882a593Smuzhiyun 		SND_SOC_DAILINK_REG(idisp2_pin, idisp2_codec, platform),
628*4882a593Smuzhiyun 	},
629*4882a593Smuzhiyun 	{
630*4882a593Smuzhiyun 		.name = "iDisp3",
631*4882a593Smuzhiyun 		.id = 5,
632*4882a593Smuzhiyun 		.init = skylake_hdmi3_init,
633*4882a593Smuzhiyun 		.dpcm_playback = 1,
634*4882a593Smuzhiyun 		.no_pcm = 1,
635*4882a593Smuzhiyun 		SND_SOC_DAILINK_REG(idisp3_pin, idisp3_codec, platform),
636*4882a593Smuzhiyun 	},
637*4882a593Smuzhiyun };
638*4882a593Smuzhiyun 
639*4882a593Smuzhiyun #define NAME_SIZE	32
skylake_card_late_probe(struct snd_soc_card * card)640*4882a593Smuzhiyun static int skylake_card_late_probe(struct snd_soc_card *card)
641*4882a593Smuzhiyun {
642*4882a593Smuzhiyun 	struct skl_nau88125_private *ctx = snd_soc_card_get_drvdata(card);
643*4882a593Smuzhiyun 	struct skl_hdmi_pcm *pcm;
644*4882a593Smuzhiyun 	struct snd_soc_component *component = NULL;
645*4882a593Smuzhiyun 	int err, i = 0;
646*4882a593Smuzhiyun 	char jack_name[NAME_SIZE];
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun 	list_for_each_entry(pcm, &ctx->hdmi_pcm_list, head) {
649*4882a593Smuzhiyun 		component = pcm->codec_dai->component;
650*4882a593Smuzhiyun 		snprintf(jack_name, sizeof(jack_name),
651*4882a593Smuzhiyun 			"HDMI/DP, pcm=%d Jack", pcm->device);
652*4882a593Smuzhiyun 		err = snd_soc_card_jack_new(card, jack_name,
653*4882a593Smuzhiyun 					SND_JACK_AVOUT,
654*4882a593Smuzhiyun 					&skylake_hdmi[i],
655*4882a593Smuzhiyun 					NULL, 0);
656*4882a593Smuzhiyun 
657*4882a593Smuzhiyun 		if (err)
658*4882a593Smuzhiyun 			return err;
659*4882a593Smuzhiyun 
660*4882a593Smuzhiyun 		err = hdac_hdmi_jack_init(pcm->codec_dai, pcm->device,
661*4882a593Smuzhiyun 						&skylake_hdmi[i]);
662*4882a593Smuzhiyun 		if (err < 0)
663*4882a593Smuzhiyun 			return err;
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun 		i++;
666*4882a593Smuzhiyun 	}
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun 	if (!component)
669*4882a593Smuzhiyun 		return -EINVAL;
670*4882a593Smuzhiyun 
671*4882a593Smuzhiyun 	return hdac_hdmi_jack_port_init(component, &card->dapm);
672*4882a593Smuzhiyun }
673*4882a593Smuzhiyun 
674*4882a593Smuzhiyun /* skylake audio machine driver for SPT + NAU88L25 */
675*4882a593Smuzhiyun static struct snd_soc_card skylake_audio_card = {
676*4882a593Smuzhiyun 	.name = "sklnau8825adi",
677*4882a593Smuzhiyun 	.owner = THIS_MODULE,
678*4882a593Smuzhiyun 	.dai_link = skylake_dais,
679*4882a593Smuzhiyun 	.num_links = ARRAY_SIZE(skylake_dais),
680*4882a593Smuzhiyun 	.controls = skylake_controls,
681*4882a593Smuzhiyun 	.num_controls = ARRAY_SIZE(skylake_controls),
682*4882a593Smuzhiyun 	.dapm_widgets = skylake_widgets,
683*4882a593Smuzhiyun 	.num_dapm_widgets = ARRAY_SIZE(skylake_widgets),
684*4882a593Smuzhiyun 	.dapm_routes = skylake_map,
685*4882a593Smuzhiyun 	.num_dapm_routes = ARRAY_SIZE(skylake_map),
686*4882a593Smuzhiyun 	.codec_conf = ssm4567_codec_conf,
687*4882a593Smuzhiyun 	.num_configs = ARRAY_SIZE(ssm4567_codec_conf),
688*4882a593Smuzhiyun 	.fully_routed = true,
689*4882a593Smuzhiyun 	.disable_route_checks = true,
690*4882a593Smuzhiyun 	.late_probe = skylake_card_late_probe,
691*4882a593Smuzhiyun };
692*4882a593Smuzhiyun 
skylake_audio_probe(struct platform_device * pdev)693*4882a593Smuzhiyun static int skylake_audio_probe(struct platform_device *pdev)
694*4882a593Smuzhiyun {
695*4882a593Smuzhiyun 	struct skl_nau88125_private *ctx;
696*4882a593Smuzhiyun 	struct snd_soc_acpi_mach *mach;
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun 	ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
699*4882a593Smuzhiyun 	if (!ctx)
700*4882a593Smuzhiyun 		return -ENOMEM;
701*4882a593Smuzhiyun 
702*4882a593Smuzhiyun 	INIT_LIST_HEAD(&ctx->hdmi_pcm_list);
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 	skylake_audio_card.dev = &pdev->dev;
705*4882a593Smuzhiyun 	snd_soc_card_set_drvdata(&skylake_audio_card, ctx);
706*4882a593Smuzhiyun 
707*4882a593Smuzhiyun 	mach = pdev->dev.platform_data;
708*4882a593Smuzhiyun 	if (mach)
709*4882a593Smuzhiyun 		dmic_constraints = mach->mach_params.dmic_num == 2 ?
710*4882a593Smuzhiyun 			&constraints_dmic_2ch : &constraints_dmic_channels;
711*4882a593Smuzhiyun 
712*4882a593Smuzhiyun 	return devm_snd_soc_register_card(&pdev->dev, &skylake_audio_card);
713*4882a593Smuzhiyun }
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun static const struct platform_device_id skl_board_ids[] = {
716*4882a593Smuzhiyun 	{ .name = "skl_n88l25_s4567" },
717*4882a593Smuzhiyun 	{ .name = "kbl_n88l25_s4567" },
718*4882a593Smuzhiyun 	{ }
719*4882a593Smuzhiyun };
720*4882a593Smuzhiyun 
721*4882a593Smuzhiyun static struct platform_driver skylake_audio = {
722*4882a593Smuzhiyun 	.probe = skylake_audio_probe,
723*4882a593Smuzhiyun 	.driver = {
724*4882a593Smuzhiyun 		.name = "skl_n88l25_s4567",
725*4882a593Smuzhiyun 		.pm = &snd_soc_pm_ops,
726*4882a593Smuzhiyun 	},
727*4882a593Smuzhiyun 	.id_table = skl_board_ids,
728*4882a593Smuzhiyun };
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun module_platform_driver(skylake_audio)
731*4882a593Smuzhiyun 
732*4882a593Smuzhiyun /* Module information */
733*4882a593Smuzhiyun MODULE_AUTHOR("Conrad Cooke  <conrad.cooke@intel.com>");
734*4882a593Smuzhiyun MODULE_AUTHOR("Harsha Priya <harshapriya.n@intel.com>");
735*4882a593Smuzhiyun MODULE_AUTHOR("Naveen M <naveen.m@intel.com>");
736*4882a593Smuzhiyun MODULE_AUTHOR("Sathya Prakash M R <sathya.prakash.m.r@intel.com>");
737*4882a593Smuzhiyun MODULE_AUTHOR("Yong Zhi <yong.zhi@intel.com>");
738*4882a593Smuzhiyun MODULE_DESCRIPTION("Intel Audio Machine driver for SKL with NAU88L25 and SSM4567 in I2S Mode");
739*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
740*4882a593Smuzhiyun MODULE_ALIAS("platform:skl_n88l25_s4567");
741*4882a593Smuzhiyun MODULE_ALIAS("platform:kbl_n88l25_s4567");
742