1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * sst.c - Intel SST Driver for audio engine
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2008-14 Intel Corp
6*4882a593Smuzhiyun * Authors: Vinod Koul <vinod.koul@intel.com>
7*4882a593Smuzhiyun * Harsha Priya <priya.harsha@intel.com>
8*4882a593Smuzhiyun * Dharageswari R <dharageswari.r@intel.com>
9*4882a593Smuzhiyun * KP Jeeja <jeeja.kp@intel.com>
10*4882a593Smuzhiyun * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/fs.h>
16*4882a593Smuzhiyun #include <linux/interrupt.h>
17*4882a593Smuzhiyun #include <linux/io.h>
18*4882a593Smuzhiyun #include <linux/firmware.h>
19*4882a593Smuzhiyun #include <linux/pm_runtime.h>
20*4882a593Smuzhiyun #include <linux/pm_qos.h>
21*4882a593Smuzhiyun #include <linux/async.h>
22*4882a593Smuzhiyun #include <linux/acpi.h>
23*4882a593Smuzhiyun #include <linux/sysfs.h>
24*4882a593Smuzhiyun #include <sound/core.h>
25*4882a593Smuzhiyun #include <sound/soc.h>
26*4882a593Smuzhiyun #include <asm/platform_sst_audio.h>
27*4882a593Smuzhiyun #include "../sst-mfld-platform.h"
28*4882a593Smuzhiyun #include "sst.h"
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun MODULE_AUTHOR("Vinod Koul <vinod.koul@intel.com>");
31*4882a593Smuzhiyun MODULE_AUTHOR("Harsha Priya <priya.harsha@intel.com>");
32*4882a593Smuzhiyun MODULE_DESCRIPTION("Intel (R) SST(R) Audio Engine Driver");
33*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
34*4882a593Smuzhiyun
sst_is_process_reply(u32 msg_id)35*4882a593Smuzhiyun static inline bool sst_is_process_reply(u32 msg_id)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun return ((msg_id & PROCESS_MSG) ? true : false);
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun
sst_validate_mailbox_size(unsigned int size)40*4882a593Smuzhiyun static inline bool sst_validate_mailbox_size(unsigned int size)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun return ((size <= SST_MAILBOX_SIZE) ? true : false);
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
intel_sst_interrupt_mrfld(int irq,void * context)45*4882a593Smuzhiyun static irqreturn_t intel_sst_interrupt_mrfld(int irq, void *context)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun union interrupt_reg_mrfld isr;
48*4882a593Smuzhiyun union ipc_header_mrfld header;
49*4882a593Smuzhiyun union sst_imr_reg_mrfld imr;
50*4882a593Smuzhiyun struct ipc_post *msg = NULL;
51*4882a593Smuzhiyun unsigned int size;
52*4882a593Smuzhiyun struct intel_sst_drv *drv = (struct intel_sst_drv *) context;
53*4882a593Smuzhiyun irqreturn_t retval = IRQ_HANDLED;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /* Interrupt arrived, check src */
56*4882a593Smuzhiyun isr.full = sst_shim_read64(drv->shim, SST_ISRX);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun if (isr.part.done_interrupt) {
59*4882a593Smuzhiyun /* Clear done bit */
60*4882a593Smuzhiyun spin_lock(&drv->ipc_spin_lock);
61*4882a593Smuzhiyun header.full = sst_shim_read64(drv->shim,
62*4882a593Smuzhiyun drv->ipc_reg.ipcx);
63*4882a593Smuzhiyun header.p.header_high.part.done = 0;
64*4882a593Smuzhiyun sst_shim_write64(drv->shim, drv->ipc_reg.ipcx, header.full);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /* write 1 to clear status register */;
67*4882a593Smuzhiyun isr.part.done_interrupt = 1;
68*4882a593Smuzhiyun sst_shim_write64(drv->shim, SST_ISRX, isr.full);
69*4882a593Smuzhiyun spin_unlock(&drv->ipc_spin_lock);
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /* we can send more messages to DSP so trigger work */
72*4882a593Smuzhiyun queue_work(drv->post_msg_wq, &drv->ipc_post_msg_wq);
73*4882a593Smuzhiyun retval = IRQ_HANDLED;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun if (isr.part.busy_interrupt) {
77*4882a593Smuzhiyun /* message from dsp so copy that */
78*4882a593Smuzhiyun spin_lock(&drv->ipc_spin_lock);
79*4882a593Smuzhiyun imr.full = sst_shim_read64(drv->shim, SST_IMRX);
80*4882a593Smuzhiyun imr.part.busy_interrupt = 1;
81*4882a593Smuzhiyun sst_shim_write64(drv->shim, SST_IMRX, imr.full);
82*4882a593Smuzhiyun spin_unlock(&drv->ipc_spin_lock);
83*4882a593Smuzhiyun header.full = sst_shim_read64(drv->shim, drv->ipc_reg.ipcd);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun if (sst_create_ipc_msg(&msg, header.p.header_high.part.large)) {
86*4882a593Smuzhiyun drv->ops->clear_interrupt(drv);
87*4882a593Smuzhiyun return IRQ_HANDLED;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun if (header.p.header_high.part.large) {
91*4882a593Smuzhiyun size = header.p.header_low_payload;
92*4882a593Smuzhiyun if (sst_validate_mailbox_size(size)) {
93*4882a593Smuzhiyun memcpy_fromio(msg->mailbox_data,
94*4882a593Smuzhiyun drv->mailbox + drv->mailbox_recv_offset, size);
95*4882a593Smuzhiyun } else {
96*4882a593Smuzhiyun dev_err(drv->dev,
97*4882a593Smuzhiyun "Mailbox not copied, payload size is: %u\n", size);
98*4882a593Smuzhiyun header.p.header_low_payload = 0;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun msg->mrfld_header = header;
103*4882a593Smuzhiyun msg->is_process_reply =
104*4882a593Smuzhiyun sst_is_process_reply(header.p.header_high.part.msg_id);
105*4882a593Smuzhiyun spin_lock(&drv->rx_msg_lock);
106*4882a593Smuzhiyun list_add_tail(&msg->node, &drv->rx_list);
107*4882a593Smuzhiyun spin_unlock(&drv->rx_msg_lock);
108*4882a593Smuzhiyun drv->ops->clear_interrupt(drv);
109*4882a593Smuzhiyun retval = IRQ_WAKE_THREAD;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun return retval;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
intel_sst_irq_thread_mrfld(int irq,void * context)114*4882a593Smuzhiyun static irqreturn_t intel_sst_irq_thread_mrfld(int irq, void *context)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun struct intel_sst_drv *drv = (struct intel_sst_drv *) context;
117*4882a593Smuzhiyun struct ipc_post *__msg, *msg = NULL;
118*4882a593Smuzhiyun unsigned long irq_flags;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun spin_lock_irqsave(&drv->rx_msg_lock, irq_flags);
121*4882a593Smuzhiyun if (list_empty(&drv->rx_list)) {
122*4882a593Smuzhiyun spin_unlock_irqrestore(&drv->rx_msg_lock, irq_flags);
123*4882a593Smuzhiyun return IRQ_HANDLED;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun list_for_each_entry_safe(msg, __msg, &drv->rx_list, node) {
127*4882a593Smuzhiyun list_del(&msg->node);
128*4882a593Smuzhiyun spin_unlock_irqrestore(&drv->rx_msg_lock, irq_flags);
129*4882a593Smuzhiyun if (msg->is_process_reply)
130*4882a593Smuzhiyun drv->ops->process_message(msg);
131*4882a593Smuzhiyun else
132*4882a593Smuzhiyun drv->ops->process_reply(drv, msg);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun if (msg->is_large)
135*4882a593Smuzhiyun kfree(msg->mailbox_data);
136*4882a593Smuzhiyun kfree(msg);
137*4882a593Smuzhiyun spin_lock_irqsave(&drv->rx_msg_lock, irq_flags);
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun spin_unlock_irqrestore(&drv->rx_msg_lock, irq_flags);
140*4882a593Smuzhiyun return IRQ_HANDLED;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
sst_save_dsp_context_v2(struct intel_sst_drv * sst)143*4882a593Smuzhiyun static int sst_save_dsp_context_v2(struct intel_sst_drv *sst)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun int ret = 0;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun ret = sst_prepare_and_post_msg(sst, SST_TASK_ID_MEDIA, IPC_CMD,
148*4882a593Smuzhiyun IPC_PREP_D3, PIPE_RSVD, 0, NULL, NULL,
149*4882a593Smuzhiyun true, true, false, true);
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun if (ret < 0) {
152*4882a593Smuzhiyun dev_err(sst->dev, "not suspending FW!!, Err: %d\n", ret);
153*4882a593Smuzhiyun return -EIO;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun return 0;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun static struct intel_sst_ops mrfld_ops = {
161*4882a593Smuzhiyun .interrupt = intel_sst_interrupt_mrfld,
162*4882a593Smuzhiyun .irq_thread = intel_sst_irq_thread_mrfld,
163*4882a593Smuzhiyun .clear_interrupt = intel_sst_clear_intr_mrfld,
164*4882a593Smuzhiyun .start = sst_start_mrfld,
165*4882a593Smuzhiyun .reset = intel_sst_reset_dsp_mrfld,
166*4882a593Smuzhiyun .post_message = sst_post_message_mrfld,
167*4882a593Smuzhiyun .process_reply = sst_process_reply_mrfld,
168*4882a593Smuzhiyun .save_dsp_context = sst_save_dsp_context_v2,
169*4882a593Smuzhiyun .alloc_stream = sst_alloc_stream_mrfld,
170*4882a593Smuzhiyun .post_download = sst_post_download_mrfld,
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun
sst_driver_ops(struct intel_sst_drv * sst)173*4882a593Smuzhiyun int sst_driver_ops(struct intel_sst_drv *sst)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun switch (sst->dev_id) {
177*4882a593Smuzhiyun case SST_MRFLD_PCI_ID:
178*4882a593Smuzhiyun case SST_BYT_ACPI_ID:
179*4882a593Smuzhiyun case SST_CHV_ACPI_ID:
180*4882a593Smuzhiyun sst->tstamp = SST_TIME_STAMP_MRFLD;
181*4882a593Smuzhiyun sst->ops = &mrfld_ops;
182*4882a593Smuzhiyun return 0;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun default:
185*4882a593Smuzhiyun dev_err(sst->dev,
186*4882a593Smuzhiyun "SST Driver capabilities missing for dev_id: %x",
187*4882a593Smuzhiyun sst->dev_id);
188*4882a593Smuzhiyun return -EINVAL;
189*4882a593Smuzhiyun };
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
sst_process_pending_msg(struct work_struct * work)192*4882a593Smuzhiyun void sst_process_pending_msg(struct work_struct *work)
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun struct intel_sst_drv *ctx = container_of(work,
195*4882a593Smuzhiyun struct intel_sst_drv, ipc_post_msg_wq);
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun ctx->ops->post_message(ctx, NULL, false);
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun
sst_workqueue_init(struct intel_sst_drv * ctx)200*4882a593Smuzhiyun static int sst_workqueue_init(struct intel_sst_drv *ctx)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun INIT_LIST_HEAD(&ctx->memcpy_list);
203*4882a593Smuzhiyun INIT_LIST_HEAD(&ctx->rx_list);
204*4882a593Smuzhiyun INIT_LIST_HEAD(&ctx->ipc_dispatch_list);
205*4882a593Smuzhiyun INIT_LIST_HEAD(&ctx->block_list);
206*4882a593Smuzhiyun INIT_WORK(&ctx->ipc_post_msg_wq, sst_process_pending_msg);
207*4882a593Smuzhiyun init_waitqueue_head(&ctx->wait_queue);
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun ctx->post_msg_wq =
210*4882a593Smuzhiyun create_singlethread_workqueue("sst_post_msg_wq");
211*4882a593Smuzhiyun if (!ctx->post_msg_wq)
212*4882a593Smuzhiyun return -EBUSY;
213*4882a593Smuzhiyun return 0;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
sst_init_locks(struct intel_sst_drv * ctx)216*4882a593Smuzhiyun static void sst_init_locks(struct intel_sst_drv *ctx)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun mutex_init(&ctx->sst_lock);
219*4882a593Smuzhiyun spin_lock_init(&ctx->rx_msg_lock);
220*4882a593Smuzhiyun spin_lock_init(&ctx->ipc_spin_lock);
221*4882a593Smuzhiyun spin_lock_init(&ctx->block_lock);
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
sst_alloc_drv_context(struct intel_sst_drv ** ctx,struct device * dev,unsigned int dev_id)224*4882a593Smuzhiyun int sst_alloc_drv_context(struct intel_sst_drv **ctx,
225*4882a593Smuzhiyun struct device *dev, unsigned int dev_id)
226*4882a593Smuzhiyun {
227*4882a593Smuzhiyun *ctx = devm_kzalloc(dev, sizeof(struct intel_sst_drv), GFP_KERNEL);
228*4882a593Smuzhiyun if (!(*ctx))
229*4882a593Smuzhiyun return -ENOMEM;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun (*ctx)->dev = dev;
232*4882a593Smuzhiyun (*ctx)->dev_id = dev_id;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun return 0;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(sst_alloc_drv_context);
237*4882a593Smuzhiyun
firmware_version_show(struct device * dev,struct device_attribute * attr,char * buf)238*4882a593Smuzhiyun static ssize_t firmware_version_show(struct device *dev,
239*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun struct intel_sst_drv *ctx = dev_get_drvdata(dev);
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun if (ctx->fw_version.type == 0 && ctx->fw_version.major == 0 &&
244*4882a593Smuzhiyun ctx->fw_version.minor == 0 && ctx->fw_version.build == 0)
245*4882a593Smuzhiyun return sprintf(buf, "FW not yet loaded\n");
246*4882a593Smuzhiyun else
247*4882a593Smuzhiyun return sprintf(buf, "v%02x.%02x.%02x.%02x\n",
248*4882a593Smuzhiyun ctx->fw_version.type, ctx->fw_version.major,
249*4882a593Smuzhiyun ctx->fw_version.minor, ctx->fw_version.build);
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun static DEVICE_ATTR_RO(firmware_version);
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun static const struct attribute *sst_fw_version_attrs[] = {
256*4882a593Smuzhiyun &dev_attr_firmware_version.attr,
257*4882a593Smuzhiyun NULL,
258*4882a593Smuzhiyun };
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun static const struct attribute_group sst_fw_version_attr_group = {
261*4882a593Smuzhiyun .attrs = (struct attribute **)sst_fw_version_attrs,
262*4882a593Smuzhiyun };
263*4882a593Smuzhiyun
sst_context_init(struct intel_sst_drv * ctx)264*4882a593Smuzhiyun int sst_context_init(struct intel_sst_drv *ctx)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun int ret = 0, i;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun if (!ctx->pdata)
269*4882a593Smuzhiyun return -EINVAL;
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun if (!ctx->pdata->probe_data)
272*4882a593Smuzhiyun return -EINVAL;
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun memcpy(&ctx->info, ctx->pdata->probe_data, sizeof(ctx->info));
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun ret = sst_driver_ops(ctx);
277*4882a593Smuzhiyun if (ret != 0)
278*4882a593Smuzhiyun return -EINVAL;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun sst_init_locks(ctx);
281*4882a593Smuzhiyun sst_set_fw_state_locked(ctx, SST_RESET);
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun /* pvt_id 0 reserved for async messages */
284*4882a593Smuzhiyun ctx->pvt_id = 1;
285*4882a593Smuzhiyun ctx->stream_cnt = 0;
286*4882a593Smuzhiyun ctx->fw_in_mem = NULL;
287*4882a593Smuzhiyun /* we use memcpy, so set to 0 */
288*4882a593Smuzhiyun ctx->use_dma = 0;
289*4882a593Smuzhiyun ctx->use_lli = 0;
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun if (sst_workqueue_init(ctx))
292*4882a593Smuzhiyun return -EINVAL;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun ctx->mailbox_recv_offset = ctx->pdata->ipc_info->mbox_recv_off;
295*4882a593Smuzhiyun ctx->ipc_reg.ipcx = SST_IPCX + ctx->pdata->ipc_info->ipc_offset;
296*4882a593Smuzhiyun ctx->ipc_reg.ipcd = SST_IPCD + ctx->pdata->ipc_info->ipc_offset;
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun dev_info(ctx->dev, "Got drv data max stream %d\n",
299*4882a593Smuzhiyun ctx->info.max_streams);
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun for (i = 1; i <= ctx->info.max_streams; i++) {
302*4882a593Smuzhiyun struct stream_info *stream = &ctx->streams[i];
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun memset(stream, 0, sizeof(*stream));
305*4882a593Smuzhiyun stream->pipe_id = PIPE_RSVD;
306*4882a593Smuzhiyun mutex_init(&stream->lock);
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun /* Register the ISR */
310*4882a593Smuzhiyun ret = devm_request_threaded_irq(ctx->dev, ctx->irq_num, ctx->ops->interrupt,
311*4882a593Smuzhiyun ctx->ops->irq_thread, 0, SST_DRV_NAME,
312*4882a593Smuzhiyun ctx);
313*4882a593Smuzhiyun if (ret)
314*4882a593Smuzhiyun goto do_free_mem;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun dev_dbg(ctx->dev, "Registered IRQ %#x\n", ctx->irq_num);
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun /* default intr are unmasked so set this as masked */
319*4882a593Smuzhiyun sst_shim_write64(ctx->shim, SST_IMRX, 0xFFFF0038);
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun ctx->qos = devm_kzalloc(ctx->dev,
322*4882a593Smuzhiyun sizeof(struct pm_qos_request), GFP_KERNEL);
323*4882a593Smuzhiyun if (!ctx->qos) {
324*4882a593Smuzhiyun ret = -ENOMEM;
325*4882a593Smuzhiyun goto do_free_mem;
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun cpu_latency_qos_add_request(ctx->qos, PM_QOS_DEFAULT_VALUE);
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun dev_dbg(ctx->dev, "Requesting FW %s now...\n", ctx->firmware_name);
330*4882a593Smuzhiyun ret = request_firmware_nowait(THIS_MODULE, true, ctx->firmware_name,
331*4882a593Smuzhiyun ctx->dev, GFP_KERNEL, ctx, sst_firmware_load_cb);
332*4882a593Smuzhiyun if (ret) {
333*4882a593Smuzhiyun dev_err(ctx->dev, "Firmware download failed:%d\n", ret);
334*4882a593Smuzhiyun goto do_free_mem;
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun ret = sysfs_create_group(&ctx->dev->kobj,
338*4882a593Smuzhiyun &sst_fw_version_attr_group);
339*4882a593Smuzhiyun if (ret) {
340*4882a593Smuzhiyun dev_err(ctx->dev,
341*4882a593Smuzhiyun "Unable to create sysfs\n");
342*4882a593Smuzhiyun goto err_sysfs;
343*4882a593Smuzhiyun }
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun sst_register(ctx->dev);
346*4882a593Smuzhiyun return 0;
347*4882a593Smuzhiyun err_sysfs:
348*4882a593Smuzhiyun sysfs_remove_group(&ctx->dev->kobj, &sst_fw_version_attr_group);
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun do_free_mem:
351*4882a593Smuzhiyun destroy_workqueue(ctx->post_msg_wq);
352*4882a593Smuzhiyun return ret;
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(sst_context_init);
355*4882a593Smuzhiyun
sst_context_cleanup(struct intel_sst_drv * ctx)356*4882a593Smuzhiyun void sst_context_cleanup(struct intel_sst_drv *ctx)
357*4882a593Smuzhiyun {
358*4882a593Smuzhiyun pm_runtime_get_noresume(ctx->dev);
359*4882a593Smuzhiyun pm_runtime_disable(ctx->dev);
360*4882a593Smuzhiyun sst_unregister(ctx->dev);
361*4882a593Smuzhiyun sst_set_fw_state_locked(ctx, SST_SHUTDOWN);
362*4882a593Smuzhiyun sysfs_remove_group(&ctx->dev->kobj, &sst_fw_version_attr_group);
363*4882a593Smuzhiyun flush_scheduled_work();
364*4882a593Smuzhiyun destroy_workqueue(ctx->post_msg_wq);
365*4882a593Smuzhiyun cpu_latency_qos_remove_request(ctx->qos);
366*4882a593Smuzhiyun kfree(ctx->fw_sg_list.src);
367*4882a593Smuzhiyun kfree(ctx->fw_sg_list.dst);
368*4882a593Smuzhiyun ctx->fw_sg_list.list_len = 0;
369*4882a593Smuzhiyun kfree(ctx->fw_in_mem);
370*4882a593Smuzhiyun ctx->fw_in_mem = NULL;
371*4882a593Smuzhiyun sst_memcpy_free_resources(ctx);
372*4882a593Smuzhiyun }
373*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(sst_context_cleanup);
374*4882a593Smuzhiyun
sst_configure_runtime_pm(struct intel_sst_drv * ctx)375*4882a593Smuzhiyun void sst_configure_runtime_pm(struct intel_sst_drv *ctx)
376*4882a593Smuzhiyun {
377*4882a593Smuzhiyun pm_runtime_set_autosuspend_delay(ctx->dev, SST_SUSPEND_DELAY);
378*4882a593Smuzhiyun pm_runtime_use_autosuspend(ctx->dev);
379*4882a593Smuzhiyun /*
380*4882a593Smuzhiyun * For acpi devices, the actual physical device state is
381*4882a593Smuzhiyun * initially active. So change the state to active before
382*4882a593Smuzhiyun * enabling the pm
383*4882a593Smuzhiyun */
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun if (!acpi_disabled)
386*4882a593Smuzhiyun pm_runtime_set_active(ctx->dev);
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun pm_runtime_enable(ctx->dev);
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun if (acpi_disabled)
391*4882a593Smuzhiyun pm_runtime_set_active(ctx->dev);
392*4882a593Smuzhiyun else
393*4882a593Smuzhiyun pm_runtime_put_noidle(ctx->dev);
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(sst_configure_runtime_pm);
396*4882a593Smuzhiyun
intel_sst_runtime_suspend(struct device * dev)397*4882a593Smuzhiyun static int intel_sst_runtime_suspend(struct device *dev)
398*4882a593Smuzhiyun {
399*4882a593Smuzhiyun int ret = 0;
400*4882a593Smuzhiyun struct intel_sst_drv *ctx = dev_get_drvdata(dev);
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun if (ctx->sst_state == SST_RESET) {
403*4882a593Smuzhiyun dev_dbg(dev, "LPE is already in RESET state, No action\n");
404*4882a593Smuzhiyun return 0;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun /* save fw context */
407*4882a593Smuzhiyun if (ctx->ops->save_dsp_context(ctx))
408*4882a593Smuzhiyun return -EBUSY;
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun /* Move the SST state to Reset */
411*4882a593Smuzhiyun sst_set_fw_state_locked(ctx, SST_RESET);
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun synchronize_irq(ctx->irq_num);
414*4882a593Smuzhiyun flush_workqueue(ctx->post_msg_wq);
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun ctx->ops->reset(ctx);
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun return ret;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun
intel_sst_suspend(struct device * dev)421*4882a593Smuzhiyun static int intel_sst_suspend(struct device *dev)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun struct intel_sst_drv *ctx = dev_get_drvdata(dev);
424*4882a593Smuzhiyun struct sst_fw_save *fw_save;
425*4882a593Smuzhiyun int i, ret;
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun /* check first if we are already in SW reset */
428*4882a593Smuzhiyun if (ctx->sst_state == SST_RESET)
429*4882a593Smuzhiyun return 0;
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun /*
432*4882a593Smuzhiyun * check if any stream is active and running
433*4882a593Smuzhiyun * they should already by suspend by soc_suspend
434*4882a593Smuzhiyun */
435*4882a593Smuzhiyun for (i = 1; i <= ctx->info.max_streams; i++) {
436*4882a593Smuzhiyun struct stream_info *stream = &ctx->streams[i];
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun if (stream->status == STREAM_RUNNING) {
439*4882a593Smuzhiyun dev_err(dev, "stream %d is running, can't suspend, abort\n", i);
440*4882a593Smuzhiyun return -EBUSY;
441*4882a593Smuzhiyun }
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun if (ctx->pdata->streams_lost_on_suspend) {
444*4882a593Smuzhiyun stream->resume_status = stream->status;
445*4882a593Smuzhiyun stream->resume_prev = stream->prev;
446*4882a593Smuzhiyun if (stream->status != STREAM_UN_INIT)
447*4882a593Smuzhiyun sst_free_stream(ctx, i);
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun }
450*4882a593Smuzhiyun synchronize_irq(ctx->irq_num);
451*4882a593Smuzhiyun flush_workqueue(ctx->post_msg_wq);
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun /* Move the SST state to Reset */
454*4882a593Smuzhiyun sst_set_fw_state_locked(ctx, SST_RESET);
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun /* tell DSP we are suspending */
457*4882a593Smuzhiyun if (ctx->ops->save_dsp_context(ctx))
458*4882a593Smuzhiyun return -EBUSY;
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun /* save the memories */
461*4882a593Smuzhiyun fw_save = kzalloc(sizeof(*fw_save), GFP_KERNEL);
462*4882a593Smuzhiyun if (!fw_save)
463*4882a593Smuzhiyun return -ENOMEM;
464*4882a593Smuzhiyun fw_save->iram = kvzalloc(ctx->iram_end - ctx->iram_base, GFP_KERNEL);
465*4882a593Smuzhiyun if (!fw_save->iram) {
466*4882a593Smuzhiyun ret = -ENOMEM;
467*4882a593Smuzhiyun goto iram;
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun fw_save->dram = kvzalloc(ctx->dram_end - ctx->dram_base, GFP_KERNEL);
470*4882a593Smuzhiyun if (!fw_save->dram) {
471*4882a593Smuzhiyun ret = -ENOMEM;
472*4882a593Smuzhiyun goto dram;
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun fw_save->sram = kvzalloc(SST_MAILBOX_SIZE, GFP_KERNEL);
475*4882a593Smuzhiyun if (!fw_save->sram) {
476*4882a593Smuzhiyun ret = -ENOMEM;
477*4882a593Smuzhiyun goto sram;
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun fw_save->ddr = kvzalloc(ctx->ddr_end - ctx->ddr_base, GFP_KERNEL);
481*4882a593Smuzhiyun if (!fw_save->ddr) {
482*4882a593Smuzhiyun ret = -ENOMEM;
483*4882a593Smuzhiyun goto ddr;
484*4882a593Smuzhiyun }
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun memcpy32_fromio(fw_save->iram, ctx->iram, ctx->iram_end - ctx->iram_base);
487*4882a593Smuzhiyun memcpy32_fromio(fw_save->dram, ctx->dram, ctx->dram_end - ctx->dram_base);
488*4882a593Smuzhiyun memcpy32_fromio(fw_save->sram, ctx->mailbox, SST_MAILBOX_SIZE);
489*4882a593Smuzhiyun memcpy32_fromio(fw_save->ddr, ctx->ddr, ctx->ddr_end - ctx->ddr_base);
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun ctx->fw_save = fw_save;
492*4882a593Smuzhiyun ctx->ops->reset(ctx);
493*4882a593Smuzhiyun return 0;
494*4882a593Smuzhiyun ddr:
495*4882a593Smuzhiyun kvfree(fw_save->sram);
496*4882a593Smuzhiyun sram:
497*4882a593Smuzhiyun kvfree(fw_save->dram);
498*4882a593Smuzhiyun dram:
499*4882a593Smuzhiyun kvfree(fw_save->iram);
500*4882a593Smuzhiyun iram:
501*4882a593Smuzhiyun kfree(fw_save);
502*4882a593Smuzhiyun return ret;
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun
intel_sst_resume(struct device * dev)505*4882a593Smuzhiyun static int intel_sst_resume(struct device *dev)
506*4882a593Smuzhiyun {
507*4882a593Smuzhiyun struct intel_sst_drv *ctx = dev_get_drvdata(dev);
508*4882a593Smuzhiyun struct sst_fw_save *fw_save = ctx->fw_save;
509*4882a593Smuzhiyun struct sst_block *block;
510*4882a593Smuzhiyun int i, ret = 0;
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun if (!fw_save)
513*4882a593Smuzhiyun return 0;
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun sst_set_fw_state_locked(ctx, SST_FW_LOADING);
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun /* we have to restore the memory saved */
518*4882a593Smuzhiyun ctx->ops->reset(ctx);
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun ctx->fw_save = NULL;
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun memcpy32_toio(ctx->iram, fw_save->iram, ctx->iram_end - ctx->iram_base);
523*4882a593Smuzhiyun memcpy32_toio(ctx->dram, fw_save->dram, ctx->dram_end - ctx->dram_base);
524*4882a593Smuzhiyun memcpy32_toio(ctx->mailbox, fw_save->sram, SST_MAILBOX_SIZE);
525*4882a593Smuzhiyun memcpy32_toio(ctx->ddr, fw_save->ddr, ctx->ddr_end - ctx->ddr_base);
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun kvfree(fw_save->sram);
528*4882a593Smuzhiyun kvfree(fw_save->dram);
529*4882a593Smuzhiyun kvfree(fw_save->iram);
530*4882a593Smuzhiyun kvfree(fw_save->ddr);
531*4882a593Smuzhiyun kfree(fw_save);
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun block = sst_create_block(ctx, 0, FW_DWNL_ID);
534*4882a593Smuzhiyun if (block == NULL)
535*4882a593Smuzhiyun return -ENOMEM;
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun /* start and wait for ack */
539*4882a593Smuzhiyun ctx->ops->start(ctx);
540*4882a593Smuzhiyun ret = sst_wait_timeout(ctx, block);
541*4882a593Smuzhiyun if (ret) {
542*4882a593Smuzhiyun dev_err(ctx->dev, "fw download failed %d\n", ret);
543*4882a593Smuzhiyun /* FW download failed due to timeout */
544*4882a593Smuzhiyun ret = -EBUSY;
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun } else {
547*4882a593Smuzhiyun sst_set_fw_state_locked(ctx, SST_FW_RUNNING);
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun if (ctx->pdata->streams_lost_on_suspend) {
551*4882a593Smuzhiyun for (i = 1; i <= ctx->info.max_streams; i++) {
552*4882a593Smuzhiyun struct stream_info *stream = &ctx->streams[i];
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun if (stream->resume_status != STREAM_UN_INIT) {
555*4882a593Smuzhiyun dev_dbg(ctx->dev, "Re-allocing stream %d status %d prev %d\n",
556*4882a593Smuzhiyun i, stream->resume_status,
557*4882a593Smuzhiyun stream->resume_prev);
558*4882a593Smuzhiyun sst_realloc_stream(ctx, i);
559*4882a593Smuzhiyun stream->status = stream->resume_status;
560*4882a593Smuzhiyun stream->prev = stream->resume_prev;
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun }
563*4882a593Smuzhiyun }
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun sst_free_block(ctx, block);
566*4882a593Smuzhiyun return ret;
567*4882a593Smuzhiyun }
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun const struct dev_pm_ops intel_sst_pm = {
570*4882a593Smuzhiyun .suspend = intel_sst_suspend,
571*4882a593Smuzhiyun .resume = intel_sst_resume,
572*4882a593Smuzhiyun .runtime_suspend = intel_sst_runtime_suspend,
573*4882a593Smuzhiyun };
574*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(intel_sst_pm);
575