xref: /OK3568_Linux_fs/kernel/sound/soc/img/img-spdif-in.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * IMG SPDIF input controller driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2015 Imagination Technologies Ltd.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: Damien Horsley <Damien.Horsley@imgtec.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/clk.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/of.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/pm_runtime.h>
17*4882a593Smuzhiyun #include <linux/reset.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <sound/core.h>
20*4882a593Smuzhiyun #include <sound/dmaengine_pcm.h>
21*4882a593Smuzhiyun #include <sound/initval.h>
22*4882a593Smuzhiyun #include <sound/pcm.h>
23*4882a593Smuzhiyun #include <sound/pcm_params.h>
24*4882a593Smuzhiyun #include <sound/soc.h>
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define IMG_SPDIF_IN_RX_FIFO_OFFSET		0
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #define IMG_SPDIF_IN_CTL			0x4
29*4882a593Smuzhiyun #define IMG_SPDIF_IN_CTL_LOCKLO_MASK		0xff
30*4882a593Smuzhiyun #define IMG_SPDIF_IN_CTL_LOCKLO_SHIFT		0
31*4882a593Smuzhiyun #define IMG_SPDIF_IN_CTL_LOCKHI_MASK		0xff00
32*4882a593Smuzhiyun #define IMG_SPDIF_IN_CTL_LOCKHI_SHIFT		8
33*4882a593Smuzhiyun #define IMG_SPDIF_IN_CTL_TRK_MASK		0xff0000
34*4882a593Smuzhiyun #define IMG_SPDIF_IN_CTL_TRK_SHIFT		16
35*4882a593Smuzhiyun #define IMG_SPDIF_IN_CTL_SRD_MASK		0x70000000
36*4882a593Smuzhiyun #define IMG_SPDIF_IN_CTL_SRD_SHIFT		28
37*4882a593Smuzhiyun #define IMG_SPDIF_IN_CTL_SRT_MASK		BIT(31)
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #define IMG_SPDIF_IN_STATUS			0x8
40*4882a593Smuzhiyun #define IMG_SPDIF_IN_STATUS_SAM_MASK		0x7000
41*4882a593Smuzhiyun #define IMG_SPDIF_IN_STATUS_SAM_SHIFT		12
42*4882a593Smuzhiyun #define IMG_SPDIF_IN_STATUS_LOCK_MASK		BIT(15)
43*4882a593Smuzhiyun #define IMG_SPDIF_IN_STATUS_LOCK_SHIFT		15
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #define IMG_SPDIF_IN_CLKGEN			0x1c
46*4882a593Smuzhiyun #define IMG_SPDIF_IN_CLKGEN_NOM_MASK		0x3ff
47*4882a593Smuzhiyun #define IMG_SPDIF_IN_CLKGEN_NOM_SHIFT		0
48*4882a593Smuzhiyun #define IMG_SPDIF_IN_CLKGEN_HLD_MASK		0x3ff0000
49*4882a593Smuzhiyun #define IMG_SPDIF_IN_CLKGEN_HLD_SHIFT		16
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun #define IMG_SPDIF_IN_CSL			0x20
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun #define IMG_SPDIF_IN_CSH			0x24
54*4882a593Smuzhiyun #define IMG_SPDIF_IN_CSH_MASK			0xff
55*4882a593Smuzhiyun #define IMG_SPDIF_IN_CSH_SHIFT			0
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun #define IMG_SPDIF_IN_SOFT_RESET			0x28
58*4882a593Smuzhiyun #define IMG_SPDIF_IN_SOFT_RESET_MASK		BIT(0)
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun #define IMG_SPDIF_IN_ACLKGEN_START		0x2c
61*4882a593Smuzhiyun #define IMG_SPDIF_IN_ACLKGEN_NOM_MASK		0x3ff
62*4882a593Smuzhiyun #define IMG_SPDIF_IN_ACLKGEN_NOM_SHIFT		0
63*4882a593Smuzhiyun #define IMG_SPDIF_IN_ACLKGEN_HLD_MASK		0xffc00
64*4882a593Smuzhiyun #define IMG_SPDIF_IN_ACLKGEN_HLD_SHIFT		10
65*4882a593Smuzhiyun #define IMG_SPDIF_IN_ACLKGEN_TRK_MASK		0xff00000
66*4882a593Smuzhiyun #define IMG_SPDIF_IN_ACLKGEN_TRK_SHIFT		20
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun #define IMG_SPDIF_IN_NUM_ACLKGEN		4
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun struct img_spdif_in {
71*4882a593Smuzhiyun 	spinlock_t lock;
72*4882a593Smuzhiyun 	void __iomem *base;
73*4882a593Smuzhiyun 	struct clk *clk_sys;
74*4882a593Smuzhiyun 	struct snd_dmaengine_dai_dma_data dma_data;
75*4882a593Smuzhiyun 	struct device *dev;
76*4882a593Smuzhiyun 	unsigned int trk;
77*4882a593Smuzhiyun 	bool multi_freq;
78*4882a593Smuzhiyun 	int lock_acquire;
79*4882a593Smuzhiyun 	int lock_release;
80*4882a593Smuzhiyun 	unsigned int single_freq;
81*4882a593Smuzhiyun 	unsigned int multi_freqs[IMG_SPDIF_IN_NUM_ACLKGEN];
82*4882a593Smuzhiyun 	bool active;
83*4882a593Smuzhiyun 	u32 suspend_clkgen;
84*4882a593Smuzhiyun 	u32 suspend_ctl;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	/* Write-only registers */
87*4882a593Smuzhiyun 	unsigned int aclkgen_regs[IMG_SPDIF_IN_NUM_ACLKGEN];
88*4882a593Smuzhiyun };
89*4882a593Smuzhiyun 
img_spdif_in_runtime_suspend(struct device * dev)90*4882a593Smuzhiyun static int img_spdif_in_runtime_suspend(struct device *dev)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun 	struct img_spdif_in *spdif = dev_get_drvdata(dev);
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	clk_disable_unprepare(spdif->clk_sys);
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	return 0;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun 
img_spdif_in_runtime_resume(struct device * dev)99*4882a593Smuzhiyun static int img_spdif_in_runtime_resume(struct device *dev)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun 	struct img_spdif_in *spdif = dev_get_drvdata(dev);
102*4882a593Smuzhiyun 	int ret;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	ret = clk_prepare_enable(spdif->clk_sys);
105*4882a593Smuzhiyun 	if (ret) {
106*4882a593Smuzhiyun 		dev_err(dev, "Unable to enable sys clock\n");
107*4882a593Smuzhiyun 		return ret;
108*4882a593Smuzhiyun 	}
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	return 0;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun 
img_spdif_in_writel(struct img_spdif_in * spdif,u32 val,u32 reg)113*4882a593Smuzhiyun static inline void img_spdif_in_writel(struct img_spdif_in *spdif,
114*4882a593Smuzhiyun 					u32 val, u32 reg)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun 	writel(val, spdif->base + reg);
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun 
img_spdif_in_readl(struct img_spdif_in * spdif,u32 reg)119*4882a593Smuzhiyun static inline u32 img_spdif_in_readl(struct img_spdif_in *spdif, u32 reg)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun 	return readl(spdif->base + reg);
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun 
img_spdif_in_aclkgen_writel(struct img_spdif_in * spdif,u32 index)124*4882a593Smuzhiyun static inline void img_spdif_in_aclkgen_writel(struct img_spdif_in *spdif,
125*4882a593Smuzhiyun 						u32 index)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun 	img_spdif_in_writel(spdif, spdif->aclkgen_regs[index],
128*4882a593Smuzhiyun 			IMG_SPDIF_IN_ACLKGEN_START + (index * 0x4));
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun 
img_spdif_in_check_max_rate(struct img_spdif_in * spdif,unsigned int sample_rate,unsigned long * actual_freq)131*4882a593Smuzhiyun static int img_spdif_in_check_max_rate(struct img_spdif_in *spdif,
132*4882a593Smuzhiyun 		unsigned int sample_rate, unsigned long *actual_freq)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun 	unsigned long min_freq, freq_t;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	/* Clock rate must be at least 24x the bit rate */
137*4882a593Smuzhiyun 	min_freq = sample_rate * 2 * 32 * 24;
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	freq_t = clk_get_rate(spdif->clk_sys);
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	if (freq_t < min_freq)
142*4882a593Smuzhiyun 		return -EINVAL;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	*actual_freq = freq_t;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	return 0;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun 
img_spdif_in_do_clkgen_calc(unsigned int rate,unsigned int * pnom,unsigned int * phld,unsigned long clk_rate)149*4882a593Smuzhiyun static int img_spdif_in_do_clkgen_calc(unsigned int rate, unsigned int *pnom,
150*4882a593Smuzhiyun 		unsigned int *phld, unsigned long clk_rate)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun 	unsigned int ori, nom, hld;
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	/*
155*4882a593Smuzhiyun 	 * Calculate oversampling ratio, nominal phase increment and hold
156*4882a593Smuzhiyun 	 * increment for the given rate / frequency
157*4882a593Smuzhiyun 	 */
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	if (!rate)
160*4882a593Smuzhiyun 		return -EINVAL;
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	ori = clk_rate / (rate * 64);
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	if (!ori)
165*4882a593Smuzhiyun 		return -EINVAL;
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	nom = (4096 / ori) + 1;
168*4882a593Smuzhiyun 	do
169*4882a593Smuzhiyun 		hld = 4096 - (--nom * (ori - 1));
170*4882a593Smuzhiyun 	while (hld < 120);
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	*pnom = nom;
173*4882a593Smuzhiyun 	*phld = hld;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	return 0;
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun 
img_spdif_in_do_clkgen_single(struct img_spdif_in * spdif,unsigned int rate)178*4882a593Smuzhiyun static int img_spdif_in_do_clkgen_single(struct img_spdif_in *spdif,
179*4882a593Smuzhiyun 		unsigned int rate)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun 	unsigned int nom, hld;
182*4882a593Smuzhiyun 	unsigned long flags, clk_rate;
183*4882a593Smuzhiyun 	int ret = 0;
184*4882a593Smuzhiyun 	u32 reg;
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	ret = img_spdif_in_check_max_rate(spdif, rate, &clk_rate);
187*4882a593Smuzhiyun 	if (ret)
188*4882a593Smuzhiyun 		return ret;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	ret = img_spdif_in_do_clkgen_calc(rate, &nom, &hld, clk_rate);
191*4882a593Smuzhiyun 	if (ret)
192*4882a593Smuzhiyun 		return ret;
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	reg = (nom << IMG_SPDIF_IN_CLKGEN_NOM_SHIFT) &
195*4882a593Smuzhiyun 		IMG_SPDIF_IN_CLKGEN_NOM_MASK;
196*4882a593Smuzhiyun 	reg |= (hld << IMG_SPDIF_IN_CLKGEN_HLD_SHIFT) &
197*4882a593Smuzhiyun 		IMG_SPDIF_IN_CLKGEN_HLD_MASK;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	spin_lock_irqsave(&spdif->lock, flags);
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	if (spdif->active) {
202*4882a593Smuzhiyun 		spin_unlock_irqrestore(&spdif->lock, flags);
203*4882a593Smuzhiyun 		return -EBUSY;
204*4882a593Smuzhiyun 	}
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CLKGEN);
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun 	spdif->single_freq = rate;
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	spin_unlock_irqrestore(&spdif->lock, flags);
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	return 0;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun 
img_spdif_in_do_clkgen_multi(struct img_spdif_in * spdif,unsigned int multi_freqs[])215*4882a593Smuzhiyun static int img_spdif_in_do_clkgen_multi(struct img_spdif_in *spdif,
216*4882a593Smuzhiyun 		unsigned int multi_freqs[])
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun 	unsigned int nom, hld, rate, max_rate = 0;
219*4882a593Smuzhiyun 	unsigned long flags, clk_rate;
220*4882a593Smuzhiyun 	int i, ret = 0;
221*4882a593Smuzhiyun 	u32 reg, trk_reg, temp_regs[IMG_SPDIF_IN_NUM_ACLKGEN];
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++)
224*4882a593Smuzhiyun 		if (multi_freqs[i] > max_rate)
225*4882a593Smuzhiyun 			max_rate = multi_freqs[i];
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	ret = img_spdif_in_check_max_rate(spdif, max_rate, &clk_rate);
228*4882a593Smuzhiyun 	if (ret)
229*4882a593Smuzhiyun 		return ret;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++) {
232*4882a593Smuzhiyun 		rate = multi_freqs[i];
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 		ret = img_spdif_in_do_clkgen_calc(rate, &nom, &hld, clk_rate);
235*4882a593Smuzhiyun 		if (ret)
236*4882a593Smuzhiyun 			return ret;
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 		reg = (nom << IMG_SPDIF_IN_ACLKGEN_NOM_SHIFT) &
239*4882a593Smuzhiyun 			IMG_SPDIF_IN_ACLKGEN_NOM_MASK;
240*4882a593Smuzhiyun 		reg |= (hld << IMG_SPDIF_IN_ACLKGEN_HLD_SHIFT) &
241*4882a593Smuzhiyun 			IMG_SPDIF_IN_ACLKGEN_HLD_MASK;
242*4882a593Smuzhiyun 		temp_regs[i] = reg;
243*4882a593Smuzhiyun 	}
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	spin_lock_irqsave(&spdif->lock, flags);
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	if (spdif->active) {
248*4882a593Smuzhiyun 		spin_unlock_irqrestore(&spdif->lock, flags);
249*4882a593Smuzhiyun 		return -EBUSY;
250*4882a593Smuzhiyun 	}
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	trk_reg = spdif->trk << IMG_SPDIF_IN_ACLKGEN_TRK_SHIFT;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++) {
255*4882a593Smuzhiyun 		spdif->aclkgen_regs[i] = temp_regs[i] | trk_reg;
256*4882a593Smuzhiyun 		img_spdif_in_aclkgen_writel(spdif, i);
257*4882a593Smuzhiyun 	}
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	spdif->multi_freq = true;
260*4882a593Smuzhiyun 	spdif->multi_freqs[0] = multi_freqs[0];
261*4882a593Smuzhiyun 	spdif->multi_freqs[1] = multi_freqs[1];
262*4882a593Smuzhiyun 	spdif->multi_freqs[2] = multi_freqs[2];
263*4882a593Smuzhiyun 	spdif->multi_freqs[3] = multi_freqs[3];
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	spin_unlock_irqrestore(&spdif->lock, flags);
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	return 0;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun 
img_spdif_in_iec958_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)270*4882a593Smuzhiyun static int img_spdif_in_iec958_info(struct snd_kcontrol *kcontrol,
271*4882a593Smuzhiyun 		struct snd_ctl_elem_info *uinfo)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
274*4882a593Smuzhiyun 	uinfo->count = 1;
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	return 0;
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun 
img_spdif_in_get_status_mask(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)279*4882a593Smuzhiyun static int img_spdif_in_get_status_mask(struct snd_kcontrol *kcontrol,
280*4882a593Smuzhiyun 				       struct snd_ctl_elem_value *ucontrol)
281*4882a593Smuzhiyun {
282*4882a593Smuzhiyun 	ucontrol->value.iec958.status[0] = 0xff;
283*4882a593Smuzhiyun 	ucontrol->value.iec958.status[1] = 0xff;
284*4882a593Smuzhiyun 	ucontrol->value.iec958.status[2] = 0xff;
285*4882a593Smuzhiyun 	ucontrol->value.iec958.status[3] = 0xff;
286*4882a593Smuzhiyun 	ucontrol->value.iec958.status[4] = 0xff;
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	return 0;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun 
img_spdif_in_get_status(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)291*4882a593Smuzhiyun static int img_spdif_in_get_status(struct snd_kcontrol *kcontrol,
292*4882a593Smuzhiyun 				  struct snd_ctl_elem_value *ucontrol)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun 	struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
295*4882a593Smuzhiyun 	struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
296*4882a593Smuzhiyun 	u32 reg;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CSL);
299*4882a593Smuzhiyun 	ucontrol->value.iec958.status[0] = reg & 0xff;
300*4882a593Smuzhiyun 	ucontrol->value.iec958.status[1] = (reg >> 8) & 0xff;
301*4882a593Smuzhiyun 	ucontrol->value.iec958.status[2] = (reg >> 16) & 0xff;
302*4882a593Smuzhiyun 	ucontrol->value.iec958.status[3] = (reg >> 24) & 0xff;
303*4882a593Smuzhiyun 	reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CSH);
304*4882a593Smuzhiyun 	ucontrol->value.iec958.status[4] = (reg & IMG_SPDIF_IN_CSH_MASK)
305*4882a593Smuzhiyun 		>> IMG_SPDIF_IN_CSH_SHIFT;
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	return 0;
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun 
img_spdif_in_info_multi_freq(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)310*4882a593Smuzhiyun static int img_spdif_in_info_multi_freq(struct snd_kcontrol *kcontrol,
311*4882a593Smuzhiyun 		struct snd_ctl_elem_info *uinfo)
312*4882a593Smuzhiyun {
313*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
314*4882a593Smuzhiyun 	uinfo->count = IMG_SPDIF_IN_NUM_ACLKGEN;
315*4882a593Smuzhiyun 	uinfo->value.integer.min = 0;
316*4882a593Smuzhiyun 	uinfo->value.integer.max = LONG_MAX;
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	return 0;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun 
img_spdif_in_get_multi_freq(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)321*4882a593Smuzhiyun static int img_spdif_in_get_multi_freq(struct snd_kcontrol *kcontrol,
322*4882a593Smuzhiyun 				  struct snd_ctl_elem_value *ucontrol)
323*4882a593Smuzhiyun {
324*4882a593Smuzhiyun 	struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
325*4882a593Smuzhiyun 	struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
326*4882a593Smuzhiyun 	unsigned long flags;
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	spin_lock_irqsave(&spdif->lock, flags);
329*4882a593Smuzhiyun 	if (spdif->multi_freq) {
330*4882a593Smuzhiyun 		ucontrol->value.integer.value[0] = spdif->multi_freqs[0];
331*4882a593Smuzhiyun 		ucontrol->value.integer.value[1] = spdif->multi_freqs[1];
332*4882a593Smuzhiyun 		ucontrol->value.integer.value[2] = spdif->multi_freqs[2];
333*4882a593Smuzhiyun 		ucontrol->value.integer.value[3] = spdif->multi_freqs[3];
334*4882a593Smuzhiyun 	} else {
335*4882a593Smuzhiyun 		ucontrol->value.integer.value[0] = 0;
336*4882a593Smuzhiyun 		ucontrol->value.integer.value[1] = 0;
337*4882a593Smuzhiyun 		ucontrol->value.integer.value[2] = 0;
338*4882a593Smuzhiyun 		ucontrol->value.integer.value[3] = 0;
339*4882a593Smuzhiyun 	}
340*4882a593Smuzhiyun 	spin_unlock_irqrestore(&spdif->lock, flags);
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	return 0;
343*4882a593Smuzhiyun }
344*4882a593Smuzhiyun 
img_spdif_in_set_multi_freq(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)345*4882a593Smuzhiyun static int img_spdif_in_set_multi_freq(struct snd_kcontrol *kcontrol,
346*4882a593Smuzhiyun 				  struct snd_ctl_elem_value *ucontrol)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun 	struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
349*4882a593Smuzhiyun 	struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
350*4882a593Smuzhiyun 	unsigned int multi_freqs[IMG_SPDIF_IN_NUM_ACLKGEN];
351*4882a593Smuzhiyun 	bool multi_freq;
352*4882a593Smuzhiyun 	unsigned long flags;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	if ((ucontrol->value.integer.value[0] == 0) &&
355*4882a593Smuzhiyun 			(ucontrol->value.integer.value[1] == 0) &&
356*4882a593Smuzhiyun 			(ucontrol->value.integer.value[2] == 0) &&
357*4882a593Smuzhiyun 			(ucontrol->value.integer.value[3] == 0)) {
358*4882a593Smuzhiyun 		multi_freq = false;
359*4882a593Smuzhiyun 	} else {
360*4882a593Smuzhiyun 		multi_freqs[0] = ucontrol->value.integer.value[0];
361*4882a593Smuzhiyun 		multi_freqs[1] = ucontrol->value.integer.value[1];
362*4882a593Smuzhiyun 		multi_freqs[2] = ucontrol->value.integer.value[2];
363*4882a593Smuzhiyun 		multi_freqs[3] = ucontrol->value.integer.value[3];
364*4882a593Smuzhiyun 		multi_freq = true;
365*4882a593Smuzhiyun 	}
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	if (multi_freq)
368*4882a593Smuzhiyun 		return img_spdif_in_do_clkgen_multi(spdif, multi_freqs);
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 	spin_lock_irqsave(&spdif->lock, flags);
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 	if (spdif->active) {
373*4882a593Smuzhiyun 		spin_unlock_irqrestore(&spdif->lock, flags);
374*4882a593Smuzhiyun 		return -EBUSY;
375*4882a593Smuzhiyun 	}
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun 	spdif->multi_freq = false;
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun 	spin_unlock_irqrestore(&spdif->lock, flags);
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	return 0;
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun 
img_spdif_in_info_lock_freq(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)384*4882a593Smuzhiyun static int img_spdif_in_info_lock_freq(struct snd_kcontrol *kcontrol,
385*4882a593Smuzhiyun 		struct snd_ctl_elem_info *uinfo)
386*4882a593Smuzhiyun {
387*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
388*4882a593Smuzhiyun 	uinfo->count = 1;
389*4882a593Smuzhiyun 	uinfo->value.integer.min = 0;
390*4882a593Smuzhiyun 	uinfo->value.integer.max = LONG_MAX;
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	return 0;
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun 
img_spdif_in_get_lock_freq(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * uc)395*4882a593Smuzhiyun static int img_spdif_in_get_lock_freq(struct snd_kcontrol *kcontrol,
396*4882a593Smuzhiyun 				  struct snd_ctl_elem_value *uc)
397*4882a593Smuzhiyun {
398*4882a593Smuzhiyun 	struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
399*4882a593Smuzhiyun 	struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
400*4882a593Smuzhiyun 	u32 reg;
401*4882a593Smuzhiyun 	int i;
402*4882a593Smuzhiyun 	unsigned long flags;
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun 	spin_lock_irqsave(&spdif->lock, flags);
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_STATUS);
407*4882a593Smuzhiyun 	if (reg & IMG_SPDIF_IN_STATUS_LOCK_MASK) {
408*4882a593Smuzhiyun 		if (spdif->multi_freq) {
409*4882a593Smuzhiyun 			i = ((reg & IMG_SPDIF_IN_STATUS_SAM_MASK) >>
410*4882a593Smuzhiyun 					IMG_SPDIF_IN_STATUS_SAM_SHIFT) - 1;
411*4882a593Smuzhiyun 			uc->value.integer.value[0] = spdif->multi_freqs[i];
412*4882a593Smuzhiyun 		} else {
413*4882a593Smuzhiyun 			uc->value.integer.value[0] = spdif->single_freq;
414*4882a593Smuzhiyun 		}
415*4882a593Smuzhiyun 	} else {
416*4882a593Smuzhiyun 		uc->value.integer.value[0] = 0;
417*4882a593Smuzhiyun 	}
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	spin_unlock_irqrestore(&spdif->lock, flags);
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun 	return 0;
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun 
img_spdif_in_info_trk(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)424*4882a593Smuzhiyun static int img_spdif_in_info_trk(struct snd_kcontrol *kcontrol,
425*4882a593Smuzhiyun 		struct snd_ctl_elem_info *uinfo)
426*4882a593Smuzhiyun {
427*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
428*4882a593Smuzhiyun 	uinfo->count = 1;
429*4882a593Smuzhiyun 	uinfo->value.integer.min = 0;
430*4882a593Smuzhiyun 	uinfo->value.integer.max = 255;
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 	return 0;
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun 
img_spdif_in_get_trk(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)435*4882a593Smuzhiyun static int img_spdif_in_get_trk(struct snd_kcontrol *kcontrol,
436*4882a593Smuzhiyun 				  struct snd_ctl_elem_value *ucontrol)
437*4882a593Smuzhiyun {
438*4882a593Smuzhiyun 	struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
439*4882a593Smuzhiyun 	struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
440*4882a593Smuzhiyun 
441*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = spdif->trk;
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	return 0;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun 
img_spdif_in_set_trk(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)446*4882a593Smuzhiyun static int img_spdif_in_set_trk(struct snd_kcontrol *kcontrol,
447*4882a593Smuzhiyun 				  struct snd_ctl_elem_value *ucontrol)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun 	struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
450*4882a593Smuzhiyun 	struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
451*4882a593Smuzhiyun 	unsigned long flags;
452*4882a593Smuzhiyun 	int i;
453*4882a593Smuzhiyun 	u32 reg;
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun 	spin_lock_irqsave(&spdif->lock, flags);
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	if (spdif->active) {
458*4882a593Smuzhiyun 		spin_unlock_irqrestore(&spdif->lock, flags);
459*4882a593Smuzhiyun 		return -EBUSY;
460*4882a593Smuzhiyun 	}
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun 	spdif->trk = ucontrol->value.integer.value[0];
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
465*4882a593Smuzhiyun 	reg &= ~IMG_SPDIF_IN_CTL_TRK_MASK;
466*4882a593Smuzhiyun 	reg |= spdif->trk << IMG_SPDIF_IN_CTL_TRK_SHIFT;
467*4882a593Smuzhiyun 	img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++) {
470*4882a593Smuzhiyun 		spdif->aclkgen_regs[i] = (spdif->aclkgen_regs[i] &
471*4882a593Smuzhiyun 			~IMG_SPDIF_IN_ACLKGEN_TRK_MASK) |
472*4882a593Smuzhiyun 			(spdif->trk << IMG_SPDIF_IN_ACLKGEN_TRK_SHIFT);
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 		img_spdif_in_aclkgen_writel(spdif, i);
475*4882a593Smuzhiyun 	}
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	spin_unlock_irqrestore(&spdif->lock, flags);
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 	return 0;
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun 
img_spdif_in_info_lock(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)482*4882a593Smuzhiyun static int img_spdif_in_info_lock(struct snd_kcontrol *kcontrol,
483*4882a593Smuzhiyun 		struct snd_ctl_elem_info *uinfo)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
486*4882a593Smuzhiyun 	uinfo->count = 1;
487*4882a593Smuzhiyun 	uinfo->value.integer.min = -128;
488*4882a593Smuzhiyun 	uinfo->value.integer.max = 127;
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 	return 0;
491*4882a593Smuzhiyun }
492*4882a593Smuzhiyun 
img_spdif_in_get_lock_acquire(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)493*4882a593Smuzhiyun static int img_spdif_in_get_lock_acquire(struct snd_kcontrol *kcontrol,
494*4882a593Smuzhiyun 				  struct snd_ctl_elem_value *ucontrol)
495*4882a593Smuzhiyun {
496*4882a593Smuzhiyun 	struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
497*4882a593Smuzhiyun 	struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = spdif->lock_acquire;
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 	return 0;
502*4882a593Smuzhiyun }
503*4882a593Smuzhiyun 
img_spdif_in_set_lock_acquire(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)504*4882a593Smuzhiyun static int img_spdif_in_set_lock_acquire(struct snd_kcontrol *kcontrol,
505*4882a593Smuzhiyun 				  struct snd_ctl_elem_value *ucontrol)
506*4882a593Smuzhiyun {
507*4882a593Smuzhiyun 	struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
508*4882a593Smuzhiyun 	struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
509*4882a593Smuzhiyun 	unsigned long flags;
510*4882a593Smuzhiyun 	u32 reg;
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun 	spin_lock_irqsave(&spdif->lock, flags);
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun 	if (spdif->active) {
515*4882a593Smuzhiyun 		spin_unlock_irqrestore(&spdif->lock, flags);
516*4882a593Smuzhiyun 		return -EBUSY;
517*4882a593Smuzhiyun 	}
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun 	spdif->lock_acquire = ucontrol->value.integer.value[0];
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 	reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
522*4882a593Smuzhiyun 	reg &= ~IMG_SPDIF_IN_CTL_LOCKHI_MASK;
523*4882a593Smuzhiyun 	reg |= (spdif->lock_acquire << IMG_SPDIF_IN_CTL_LOCKHI_SHIFT) &
524*4882a593Smuzhiyun 		IMG_SPDIF_IN_CTL_LOCKHI_MASK;
525*4882a593Smuzhiyun 	img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 	spin_unlock_irqrestore(&spdif->lock, flags);
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun 	return 0;
530*4882a593Smuzhiyun }
531*4882a593Smuzhiyun 
img_spdif_in_get_lock_release(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)532*4882a593Smuzhiyun static int img_spdif_in_get_lock_release(struct snd_kcontrol *kcontrol,
533*4882a593Smuzhiyun 				  struct snd_ctl_elem_value *ucontrol)
534*4882a593Smuzhiyun {
535*4882a593Smuzhiyun 	struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
536*4882a593Smuzhiyun 	struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = spdif->lock_release;
539*4882a593Smuzhiyun 
540*4882a593Smuzhiyun 	return 0;
541*4882a593Smuzhiyun }
542*4882a593Smuzhiyun 
img_spdif_in_set_lock_release(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)543*4882a593Smuzhiyun static int img_spdif_in_set_lock_release(struct snd_kcontrol *kcontrol,
544*4882a593Smuzhiyun 				  struct snd_ctl_elem_value *ucontrol)
545*4882a593Smuzhiyun {
546*4882a593Smuzhiyun 	struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
547*4882a593Smuzhiyun 	struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
548*4882a593Smuzhiyun 	unsigned long flags;
549*4882a593Smuzhiyun 	u32 reg;
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun 	spin_lock_irqsave(&spdif->lock, flags);
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun 	if (spdif->active) {
554*4882a593Smuzhiyun 		spin_unlock_irqrestore(&spdif->lock, flags);
555*4882a593Smuzhiyun 		return -EBUSY;
556*4882a593Smuzhiyun 	}
557*4882a593Smuzhiyun 
558*4882a593Smuzhiyun 	spdif->lock_release = ucontrol->value.integer.value[0];
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun 	reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
561*4882a593Smuzhiyun 	reg &= ~IMG_SPDIF_IN_CTL_LOCKLO_MASK;
562*4882a593Smuzhiyun 	reg |= (spdif->lock_release << IMG_SPDIF_IN_CTL_LOCKLO_SHIFT) &
563*4882a593Smuzhiyun 		IMG_SPDIF_IN_CTL_LOCKLO_MASK;
564*4882a593Smuzhiyun 	img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun 	spin_unlock_irqrestore(&spdif->lock, flags);
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun 	return 0;
569*4882a593Smuzhiyun }
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun static struct snd_kcontrol_new img_spdif_in_controls[] = {
572*4882a593Smuzhiyun 	{
573*4882a593Smuzhiyun 		.access = SNDRV_CTL_ELEM_ACCESS_READ,
574*4882a593Smuzhiyun 		.iface = SNDRV_CTL_ELEM_IFACE_PCM,
575*4882a593Smuzhiyun 		.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
576*4882a593Smuzhiyun 		.info = img_spdif_in_iec958_info,
577*4882a593Smuzhiyun 		.get = img_spdif_in_get_status_mask
578*4882a593Smuzhiyun 	},
579*4882a593Smuzhiyun 	{
580*4882a593Smuzhiyun 		.access = SNDRV_CTL_ELEM_ACCESS_READ |
581*4882a593Smuzhiyun 			SNDRV_CTL_ELEM_ACCESS_VOLATILE,
582*4882a593Smuzhiyun 		.iface = SNDRV_CTL_ELEM_IFACE_PCM,
583*4882a593Smuzhiyun 		.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
584*4882a593Smuzhiyun 		.info = img_spdif_in_iec958_info,
585*4882a593Smuzhiyun 		.get = img_spdif_in_get_status
586*4882a593Smuzhiyun 	},
587*4882a593Smuzhiyun 	{
588*4882a593Smuzhiyun 		.iface = SNDRV_CTL_ELEM_IFACE_PCM,
589*4882a593Smuzhiyun 		.name = "SPDIF In Multi Frequency Acquire",
590*4882a593Smuzhiyun 		.info = img_spdif_in_info_multi_freq,
591*4882a593Smuzhiyun 		.get = img_spdif_in_get_multi_freq,
592*4882a593Smuzhiyun 		.put = img_spdif_in_set_multi_freq
593*4882a593Smuzhiyun 	},
594*4882a593Smuzhiyun 	{
595*4882a593Smuzhiyun 		.access = SNDRV_CTL_ELEM_ACCESS_READ |
596*4882a593Smuzhiyun 			SNDRV_CTL_ELEM_ACCESS_VOLATILE,
597*4882a593Smuzhiyun 		.iface = SNDRV_CTL_ELEM_IFACE_PCM,
598*4882a593Smuzhiyun 		.name = "SPDIF In Lock Frequency",
599*4882a593Smuzhiyun 		.info = img_spdif_in_info_lock_freq,
600*4882a593Smuzhiyun 		.get = img_spdif_in_get_lock_freq
601*4882a593Smuzhiyun 	},
602*4882a593Smuzhiyun 	{
603*4882a593Smuzhiyun 		.iface = SNDRV_CTL_ELEM_IFACE_PCM,
604*4882a593Smuzhiyun 		.name = "SPDIF In Lock TRK",
605*4882a593Smuzhiyun 		.info = img_spdif_in_info_trk,
606*4882a593Smuzhiyun 		.get = img_spdif_in_get_trk,
607*4882a593Smuzhiyun 		.put = img_spdif_in_set_trk
608*4882a593Smuzhiyun 	},
609*4882a593Smuzhiyun 	{
610*4882a593Smuzhiyun 		.iface = SNDRV_CTL_ELEM_IFACE_PCM,
611*4882a593Smuzhiyun 		.name = "SPDIF In Lock Acquire Threshold",
612*4882a593Smuzhiyun 		.info = img_spdif_in_info_lock,
613*4882a593Smuzhiyun 		.get = img_spdif_in_get_lock_acquire,
614*4882a593Smuzhiyun 		.put = img_spdif_in_set_lock_acquire
615*4882a593Smuzhiyun 	},
616*4882a593Smuzhiyun 	{
617*4882a593Smuzhiyun 		.iface = SNDRV_CTL_ELEM_IFACE_PCM,
618*4882a593Smuzhiyun 		.name = "SPDIF In Lock Release Threshold",
619*4882a593Smuzhiyun 		.info = img_spdif_in_info_lock,
620*4882a593Smuzhiyun 		.get = img_spdif_in_get_lock_release,
621*4882a593Smuzhiyun 		.put = img_spdif_in_set_lock_release
622*4882a593Smuzhiyun 	}
623*4882a593Smuzhiyun };
624*4882a593Smuzhiyun 
img_spdif_in_trigger(struct snd_pcm_substream * substream,int cmd,struct snd_soc_dai * dai)625*4882a593Smuzhiyun static int img_spdif_in_trigger(struct snd_pcm_substream *substream, int cmd,
626*4882a593Smuzhiyun 	struct snd_soc_dai *dai)
627*4882a593Smuzhiyun {
628*4882a593Smuzhiyun 	unsigned long flags;
629*4882a593Smuzhiyun 	struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(dai);
630*4882a593Smuzhiyun 	int ret = 0;
631*4882a593Smuzhiyun 	u32 reg;
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun 	spin_lock_irqsave(&spdif->lock, flags);
634*4882a593Smuzhiyun 
635*4882a593Smuzhiyun 	switch (cmd) {
636*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_START:
637*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_RESUME:
638*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
639*4882a593Smuzhiyun 		reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
640*4882a593Smuzhiyun 		if (spdif->multi_freq)
641*4882a593Smuzhiyun 			reg &= ~IMG_SPDIF_IN_CTL_SRD_MASK;
642*4882a593Smuzhiyun 		else
643*4882a593Smuzhiyun 			reg |= (1UL << IMG_SPDIF_IN_CTL_SRD_SHIFT);
644*4882a593Smuzhiyun 		reg |= IMG_SPDIF_IN_CTL_SRT_MASK;
645*4882a593Smuzhiyun 		img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
646*4882a593Smuzhiyun 		spdif->active = true;
647*4882a593Smuzhiyun 		break;
648*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_STOP:
649*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_SUSPEND:
650*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
651*4882a593Smuzhiyun 		reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
652*4882a593Smuzhiyun 		reg &= ~IMG_SPDIF_IN_CTL_SRT_MASK;
653*4882a593Smuzhiyun 		img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
654*4882a593Smuzhiyun 		spdif->active = false;
655*4882a593Smuzhiyun 		break;
656*4882a593Smuzhiyun 	default:
657*4882a593Smuzhiyun 		ret = -EINVAL;
658*4882a593Smuzhiyun 	}
659*4882a593Smuzhiyun 
660*4882a593Smuzhiyun 	spin_unlock_irqrestore(&spdif->lock, flags);
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun 	return ret;
663*4882a593Smuzhiyun }
664*4882a593Smuzhiyun 
img_spdif_in_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)665*4882a593Smuzhiyun static int img_spdif_in_hw_params(struct snd_pcm_substream *substream,
666*4882a593Smuzhiyun 	struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
667*4882a593Smuzhiyun {
668*4882a593Smuzhiyun 	struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(dai);
669*4882a593Smuzhiyun 	unsigned int rate, channels;
670*4882a593Smuzhiyun 	snd_pcm_format_t format;
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 	rate = params_rate(params);
673*4882a593Smuzhiyun 	channels = params_channels(params);
674*4882a593Smuzhiyun 	format = params_format(params);
675*4882a593Smuzhiyun 
676*4882a593Smuzhiyun 	if (format != SNDRV_PCM_FORMAT_S32_LE)
677*4882a593Smuzhiyun 		return -EINVAL;
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun 	if (channels != 2)
680*4882a593Smuzhiyun 		return -EINVAL;
681*4882a593Smuzhiyun 
682*4882a593Smuzhiyun 	return img_spdif_in_do_clkgen_single(spdif, rate);
683*4882a593Smuzhiyun }
684*4882a593Smuzhiyun 
685*4882a593Smuzhiyun static const struct snd_soc_dai_ops img_spdif_in_dai_ops = {
686*4882a593Smuzhiyun 	.trigger = img_spdif_in_trigger,
687*4882a593Smuzhiyun 	.hw_params = img_spdif_in_hw_params
688*4882a593Smuzhiyun };
689*4882a593Smuzhiyun 
img_spdif_in_dai_probe(struct snd_soc_dai * dai)690*4882a593Smuzhiyun static int img_spdif_in_dai_probe(struct snd_soc_dai *dai)
691*4882a593Smuzhiyun {
692*4882a593Smuzhiyun 	struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(dai);
693*4882a593Smuzhiyun 
694*4882a593Smuzhiyun 	snd_soc_dai_init_dma_data(dai, NULL, &spdif->dma_data);
695*4882a593Smuzhiyun 
696*4882a593Smuzhiyun 	snd_soc_add_dai_controls(dai, img_spdif_in_controls,
697*4882a593Smuzhiyun 			ARRAY_SIZE(img_spdif_in_controls));
698*4882a593Smuzhiyun 
699*4882a593Smuzhiyun 	return 0;
700*4882a593Smuzhiyun }
701*4882a593Smuzhiyun 
702*4882a593Smuzhiyun static struct snd_soc_dai_driver img_spdif_in_dai = {
703*4882a593Smuzhiyun 	.probe = img_spdif_in_dai_probe,
704*4882a593Smuzhiyun 	.capture = {
705*4882a593Smuzhiyun 		.channels_min = 2,
706*4882a593Smuzhiyun 		.channels_max = 2,
707*4882a593Smuzhiyun 		.rates = SNDRV_PCM_RATE_8000_192000,
708*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S32_LE
709*4882a593Smuzhiyun 	},
710*4882a593Smuzhiyun 	.ops = &img_spdif_in_dai_ops
711*4882a593Smuzhiyun };
712*4882a593Smuzhiyun 
713*4882a593Smuzhiyun static const struct snd_soc_component_driver img_spdif_in_component = {
714*4882a593Smuzhiyun 	.name = "img-spdif-in"
715*4882a593Smuzhiyun };
716*4882a593Smuzhiyun 
img_spdif_in_probe(struct platform_device * pdev)717*4882a593Smuzhiyun static int img_spdif_in_probe(struct platform_device *pdev)
718*4882a593Smuzhiyun {
719*4882a593Smuzhiyun 	struct img_spdif_in *spdif;
720*4882a593Smuzhiyun 	struct resource *res;
721*4882a593Smuzhiyun 	void __iomem *base;
722*4882a593Smuzhiyun 	int ret;
723*4882a593Smuzhiyun 	struct reset_control *rst;
724*4882a593Smuzhiyun 	u32 reg;
725*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
726*4882a593Smuzhiyun 
727*4882a593Smuzhiyun 	spdif = devm_kzalloc(&pdev->dev, sizeof(*spdif), GFP_KERNEL);
728*4882a593Smuzhiyun 	if (!spdif)
729*4882a593Smuzhiyun 		return -ENOMEM;
730*4882a593Smuzhiyun 
731*4882a593Smuzhiyun 	platform_set_drvdata(pdev, spdif);
732*4882a593Smuzhiyun 
733*4882a593Smuzhiyun 	spdif->dev = &pdev->dev;
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
736*4882a593Smuzhiyun 	base = devm_ioremap_resource(&pdev->dev, res);
737*4882a593Smuzhiyun 	if (IS_ERR(base))
738*4882a593Smuzhiyun 		return PTR_ERR(base);
739*4882a593Smuzhiyun 
740*4882a593Smuzhiyun 	spdif->base = base;
741*4882a593Smuzhiyun 
742*4882a593Smuzhiyun 	spdif->clk_sys = devm_clk_get(dev, "sys");
743*4882a593Smuzhiyun 	if (IS_ERR(spdif->clk_sys)) {
744*4882a593Smuzhiyun 		if (PTR_ERR(spdif->clk_sys) != -EPROBE_DEFER)
745*4882a593Smuzhiyun 			dev_err(dev, "Failed to acquire clock 'sys'\n");
746*4882a593Smuzhiyun 		return PTR_ERR(spdif->clk_sys);
747*4882a593Smuzhiyun 	}
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun 	pm_runtime_enable(&pdev->dev);
750*4882a593Smuzhiyun 	if (!pm_runtime_enabled(&pdev->dev)) {
751*4882a593Smuzhiyun 		ret = img_spdif_in_runtime_resume(&pdev->dev);
752*4882a593Smuzhiyun 		if (ret)
753*4882a593Smuzhiyun 			goto err_pm_disable;
754*4882a593Smuzhiyun 	}
755*4882a593Smuzhiyun 	ret = pm_runtime_get_sync(&pdev->dev);
756*4882a593Smuzhiyun 	if (ret < 0) {
757*4882a593Smuzhiyun 		pm_runtime_put_noidle(&pdev->dev);
758*4882a593Smuzhiyun 		goto err_suspend;
759*4882a593Smuzhiyun 	}
760*4882a593Smuzhiyun 
761*4882a593Smuzhiyun 	rst = devm_reset_control_get_exclusive(&pdev->dev, "rst");
762*4882a593Smuzhiyun 	if (IS_ERR(rst)) {
763*4882a593Smuzhiyun 		if (PTR_ERR(rst) == -EPROBE_DEFER) {
764*4882a593Smuzhiyun 			ret = -EPROBE_DEFER;
765*4882a593Smuzhiyun 			goto err_pm_put;
766*4882a593Smuzhiyun 		}
767*4882a593Smuzhiyun 		dev_dbg(dev, "No top level reset found\n");
768*4882a593Smuzhiyun 		img_spdif_in_writel(spdif, IMG_SPDIF_IN_SOFT_RESET_MASK,
769*4882a593Smuzhiyun 				IMG_SPDIF_IN_SOFT_RESET);
770*4882a593Smuzhiyun 		img_spdif_in_writel(spdif, 0, IMG_SPDIF_IN_SOFT_RESET);
771*4882a593Smuzhiyun 	} else {
772*4882a593Smuzhiyun 		reset_control_assert(rst);
773*4882a593Smuzhiyun 		reset_control_deassert(rst);
774*4882a593Smuzhiyun 	}
775*4882a593Smuzhiyun 
776*4882a593Smuzhiyun 	spin_lock_init(&spdif->lock);
777*4882a593Smuzhiyun 
778*4882a593Smuzhiyun 	spdif->dma_data.addr = res->start + IMG_SPDIF_IN_RX_FIFO_OFFSET;
779*4882a593Smuzhiyun 	spdif->dma_data.addr_width = 4;
780*4882a593Smuzhiyun 	spdif->dma_data.maxburst = 4;
781*4882a593Smuzhiyun 	spdif->trk = 0x80;
782*4882a593Smuzhiyun 	spdif->lock_acquire = 4;
783*4882a593Smuzhiyun 	spdif->lock_release = -128;
784*4882a593Smuzhiyun 
785*4882a593Smuzhiyun 	reg = (spdif->lock_acquire << IMG_SPDIF_IN_CTL_LOCKHI_SHIFT) &
786*4882a593Smuzhiyun 		IMG_SPDIF_IN_CTL_LOCKHI_MASK;
787*4882a593Smuzhiyun 	reg |= (spdif->lock_release << IMG_SPDIF_IN_CTL_LOCKLO_SHIFT) &
788*4882a593Smuzhiyun 		IMG_SPDIF_IN_CTL_LOCKLO_MASK;
789*4882a593Smuzhiyun 	reg |= (spdif->trk << IMG_SPDIF_IN_CTL_TRK_SHIFT) &
790*4882a593Smuzhiyun 		IMG_SPDIF_IN_CTL_TRK_MASK;
791*4882a593Smuzhiyun 	img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
792*4882a593Smuzhiyun 
793*4882a593Smuzhiyun 	pm_runtime_put(&pdev->dev);
794*4882a593Smuzhiyun 
795*4882a593Smuzhiyun 	ret = devm_snd_soc_register_component(&pdev->dev,
796*4882a593Smuzhiyun 			&img_spdif_in_component, &img_spdif_in_dai, 1);
797*4882a593Smuzhiyun 	if (ret)
798*4882a593Smuzhiyun 		goto err_suspend;
799*4882a593Smuzhiyun 
800*4882a593Smuzhiyun 	ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
801*4882a593Smuzhiyun 	if (ret)
802*4882a593Smuzhiyun 		goto err_suspend;
803*4882a593Smuzhiyun 
804*4882a593Smuzhiyun 	return 0;
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun err_pm_put:
807*4882a593Smuzhiyun 	pm_runtime_put(&pdev->dev);
808*4882a593Smuzhiyun err_suspend:
809*4882a593Smuzhiyun 	if (!pm_runtime_enabled(&pdev->dev))
810*4882a593Smuzhiyun 		img_spdif_in_runtime_suspend(&pdev->dev);
811*4882a593Smuzhiyun err_pm_disable:
812*4882a593Smuzhiyun 	pm_runtime_disable(&pdev->dev);
813*4882a593Smuzhiyun 
814*4882a593Smuzhiyun 	return ret;
815*4882a593Smuzhiyun }
816*4882a593Smuzhiyun 
img_spdif_in_dev_remove(struct platform_device * pdev)817*4882a593Smuzhiyun static int img_spdif_in_dev_remove(struct platform_device *pdev)
818*4882a593Smuzhiyun {
819*4882a593Smuzhiyun 	pm_runtime_disable(&pdev->dev);
820*4882a593Smuzhiyun 	if (!pm_runtime_status_suspended(&pdev->dev))
821*4882a593Smuzhiyun 		img_spdif_in_runtime_suspend(&pdev->dev);
822*4882a593Smuzhiyun 
823*4882a593Smuzhiyun 	return 0;
824*4882a593Smuzhiyun }
825*4882a593Smuzhiyun 
826*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
img_spdif_in_suspend(struct device * dev)827*4882a593Smuzhiyun static int img_spdif_in_suspend(struct device *dev)
828*4882a593Smuzhiyun {
829*4882a593Smuzhiyun 	struct img_spdif_in *spdif = dev_get_drvdata(dev);
830*4882a593Smuzhiyun 	int ret;
831*4882a593Smuzhiyun 
832*4882a593Smuzhiyun 	if (pm_runtime_status_suspended(dev)) {
833*4882a593Smuzhiyun 		ret = img_spdif_in_runtime_resume(dev);
834*4882a593Smuzhiyun 		if (ret)
835*4882a593Smuzhiyun 			return ret;
836*4882a593Smuzhiyun 	}
837*4882a593Smuzhiyun 
838*4882a593Smuzhiyun 	spdif->suspend_clkgen = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CLKGEN);
839*4882a593Smuzhiyun 	spdif->suspend_ctl = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
840*4882a593Smuzhiyun 
841*4882a593Smuzhiyun 	img_spdif_in_runtime_suspend(dev);
842*4882a593Smuzhiyun 
843*4882a593Smuzhiyun 	return 0;
844*4882a593Smuzhiyun }
845*4882a593Smuzhiyun 
img_spdif_in_resume(struct device * dev)846*4882a593Smuzhiyun static int img_spdif_in_resume(struct device *dev)
847*4882a593Smuzhiyun {
848*4882a593Smuzhiyun 	struct img_spdif_in *spdif = dev_get_drvdata(dev);
849*4882a593Smuzhiyun 	int i, ret;
850*4882a593Smuzhiyun 
851*4882a593Smuzhiyun 	ret = img_spdif_in_runtime_resume(dev);
852*4882a593Smuzhiyun 	if (ret)
853*4882a593Smuzhiyun 		return ret;
854*4882a593Smuzhiyun 
855*4882a593Smuzhiyun 	for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++)
856*4882a593Smuzhiyun 		img_spdif_in_aclkgen_writel(spdif, i);
857*4882a593Smuzhiyun 
858*4882a593Smuzhiyun 	img_spdif_in_writel(spdif, spdif->suspend_clkgen, IMG_SPDIF_IN_CLKGEN);
859*4882a593Smuzhiyun 	img_spdif_in_writel(spdif, spdif->suspend_ctl, IMG_SPDIF_IN_CTL);
860*4882a593Smuzhiyun 
861*4882a593Smuzhiyun 	if (pm_runtime_status_suspended(dev))
862*4882a593Smuzhiyun 		img_spdif_in_runtime_suspend(dev);
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun 	return 0;
865*4882a593Smuzhiyun }
866*4882a593Smuzhiyun #endif
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun static const struct of_device_id img_spdif_in_of_match[] = {
869*4882a593Smuzhiyun 	{ .compatible = "img,spdif-in" },
870*4882a593Smuzhiyun 	{}
871*4882a593Smuzhiyun };
872*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, img_spdif_in_of_match);
873*4882a593Smuzhiyun 
874*4882a593Smuzhiyun static const struct dev_pm_ops img_spdif_in_pm_ops = {
875*4882a593Smuzhiyun 	SET_RUNTIME_PM_OPS(img_spdif_in_runtime_suspend,
876*4882a593Smuzhiyun 			   img_spdif_in_runtime_resume, NULL)
877*4882a593Smuzhiyun 	SET_SYSTEM_SLEEP_PM_OPS(img_spdif_in_suspend, img_spdif_in_resume)
878*4882a593Smuzhiyun };
879*4882a593Smuzhiyun 
880*4882a593Smuzhiyun static struct platform_driver img_spdif_in_driver = {
881*4882a593Smuzhiyun 	.driver = {
882*4882a593Smuzhiyun 		.name = "img-spdif-in",
883*4882a593Smuzhiyun 		.of_match_table = img_spdif_in_of_match,
884*4882a593Smuzhiyun 		.pm = &img_spdif_in_pm_ops
885*4882a593Smuzhiyun 	},
886*4882a593Smuzhiyun 	.probe = img_spdif_in_probe,
887*4882a593Smuzhiyun 	.remove = img_spdif_in_dev_remove
888*4882a593Smuzhiyun };
889*4882a593Smuzhiyun module_platform_driver(img_spdif_in_driver);
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun MODULE_AUTHOR("Damien Horsley <Damien.Horsley@imgtec.com>");
892*4882a593Smuzhiyun MODULE_DESCRIPTION("IMG SPDIF Input driver");
893*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
894