1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright 2019 NXP 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _FSL_ASRC_COMMON_H 8*4882a593Smuzhiyun #define _FSL_ASRC_COMMON_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* directions */ 11*4882a593Smuzhiyun #define IN 0 12*4882a593Smuzhiyun #define OUT 1 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun enum asrc_pair_index { 15*4882a593Smuzhiyun ASRC_INVALID_PAIR = -1, 16*4882a593Smuzhiyun ASRC_PAIR_A = 0, 17*4882a593Smuzhiyun ASRC_PAIR_B = 1, 18*4882a593Smuzhiyun ASRC_PAIR_C = 2, 19*4882a593Smuzhiyun ASRC_PAIR_D = 3, 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define PAIR_CTX_NUM 0x4 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /** 25*4882a593Smuzhiyun * fsl_asrc_pair: ASRC Pair common data 26*4882a593Smuzhiyun * 27*4882a593Smuzhiyun * @asrc: pointer to its parent module 28*4882a593Smuzhiyun * @error: error record 29*4882a593Smuzhiyun * @index: pair index (ASRC_PAIR_A, ASRC_PAIR_B, ASRC_PAIR_C) 30*4882a593Smuzhiyun * @channels: occupied channel number 31*4882a593Smuzhiyun * @desc: input and output dma descriptors 32*4882a593Smuzhiyun * @dma_chan: inputer and output DMA channels 33*4882a593Smuzhiyun * @dma_data: private dma data 34*4882a593Smuzhiyun * @pos: hardware pointer position 35*4882a593Smuzhiyun * @req_dma_chan: flag to release dev_to_dev chan 36*4882a593Smuzhiyun * @private: pair private area 37*4882a593Smuzhiyun */ 38*4882a593Smuzhiyun struct fsl_asrc_pair { 39*4882a593Smuzhiyun struct fsl_asrc *asrc; 40*4882a593Smuzhiyun unsigned int error; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun enum asrc_pair_index index; 43*4882a593Smuzhiyun unsigned int channels; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun struct dma_async_tx_descriptor *desc[2]; 46*4882a593Smuzhiyun struct dma_chan *dma_chan[2]; 47*4882a593Smuzhiyun struct imx_dma_data dma_data; 48*4882a593Smuzhiyun unsigned int pos; 49*4882a593Smuzhiyun bool req_dma_chan; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun void *private; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun /** 55*4882a593Smuzhiyun * fsl_asrc: ASRC common data 56*4882a593Smuzhiyun * 57*4882a593Smuzhiyun * @dma_params_rx: DMA parameters for receive channel 58*4882a593Smuzhiyun * @dma_params_tx: DMA parameters for transmit channel 59*4882a593Smuzhiyun * @pdev: platform device pointer 60*4882a593Smuzhiyun * @regmap: regmap handler 61*4882a593Smuzhiyun * @paddr: physical address to the base address of registers 62*4882a593Smuzhiyun * @mem_clk: clock source to access register 63*4882a593Smuzhiyun * @ipg_clk: clock source to drive peripheral 64*4882a593Smuzhiyun * @spba_clk: SPBA clock (optional, depending on SoC design) 65*4882a593Smuzhiyun * @lock: spin lock for resource protection 66*4882a593Smuzhiyun * @pair: pair pointers 67*4882a593Smuzhiyun * @channel_avail: non-occupied channel numbers 68*4882a593Smuzhiyun * @asrc_rate: default sample rate for ASoC Back-Ends 69*4882a593Smuzhiyun * @asrc_format: default sample format for ASoC Back-Ends 70*4882a593Smuzhiyun * @use_edma: edma is used 71*4882a593Smuzhiyun * @get_dma_channel: function pointer 72*4882a593Smuzhiyun * @request_pair: function pointer 73*4882a593Smuzhiyun * @release_pair: function pointer 74*4882a593Smuzhiyun * @get_fifo_addr: function pointer 75*4882a593Smuzhiyun * @pair_priv_size: size of pair private struct. 76*4882a593Smuzhiyun * @private: private data structure 77*4882a593Smuzhiyun */ 78*4882a593Smuzhiyun struct fsl_asrc { 79*4882a593Smuzhiyun struct snd_dmaengine_dai_dma_data dma_params_rx; 80*4882a593Smuzhiyun struct snd_dmaengine_dai_dma_data dma_params_tx; 81*4882a593Smuzhiyun struct platform_device *pdev; 82*4882a593Smuzhiyun struct regmap *regmap; 83*4882a593Smuzhiyun unsigned long paddr; 84*4882a593Smuzhiyun struct clk *mem_clk; 85*4882a593Smuzhiyun struct clk *ipg_clk; 86*4882a593Smuzhiyun struct clk *spba_clk; 87*4882a593Smuzhiyun spinlock_t lock; /* spin lock for resource protection */ 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun struct fsl_asrc_pair *pair[PAIR_CTX_NUM]; 90*4882a593Smuzhiyun unsigned int channel_avail; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun int asrc_rate; 93*4882a593Smuzhiyun snd_pcm_format_t asrc_format; 94*4882a593Smuzhiyun bool use_edma; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun struct dma_chan *(*get_dma_channel)(struct fsl_asrc_pair *pair, bool dir); 97*4882a593Smuzhiyun int (*request_pair)(int channels, struct fsl_asrc_pair *pair); 98*4882a593Smuzhiyun void (*release_pair)(struct fsl_asrc_pair *pair); 99*4882a593Smuzhiyun int (*get_fifo_addr)(u8 dir, enum asrc_pair_index index); 100*4882a593Smuzhiyun size_t pair_priv_size; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun void *private; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun #define DRV_NAME "fsl-asrc-dai" 106*4882a593Smuzhiyun extern struct snd_soc_component_driver fsl_asrc_component; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun #endif /* _FSL_ASRC_COMMON_H */ 109