1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * wm8994.h -- WM8994 Soc Audio driver 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef _WM8994_H 7*4882a593Smuzhiyun #define _WM8994_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/clk.h> 10*4882a593Smuzhiyun #include <sound/soc.h> 11*4882a593Smuzhiyun #include <linux/firmware.h> 12*4882a593Smuzhiyun #include <linux/completion.h> 13*4882a593Smuzhiyun #include <linux/workqueue.h> 14*4882a593Smuzhiyun #include <linux/mutex.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #include "wm_hubs.h" 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun enum { 19*4882a593Smuzhiyun WM8994_MCLK1, 20*4882a593Smuzhiyun WM8994_MCLK2, 21*4882a593Smuzhiyun WM8994_NUM_MCLK 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* Sources for AIF1/2 SYSCLK - use with set_dai_sysclk() */ 25*4882a593Smuzhiyun #define WM8994_SYSCLK_MCLK1 1 26*4882a593Smuzhiyun #define WM8994_SYSCLK_MCLK2 2 27*4882a593Smuzhiyun #define WM8994_SYSCLK_FLL1 3 28*4882a593Smuzhiyun #define WM8994_SYSCLK_FLL2 4 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* OPCLK is also configured with set_dai_sysclk, specify division*10 as rate. */ 31*4882a593Smuzhiyun #define WM8994_SYSCLK_OPCLK 5 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #define WM8994_FLL1 1 34*4882a593Smuzhiyun #define WM8994_FLL2 2 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #define WM8994_FLL_SRC_MCLK1 1 37*4882a593Smuzhiyun #define WM8994_FLL_SRC_MCLK2 2 38*4882a593Smuzhiyun #define WM8994_FLL_SRC_LRCLK 3 39*4882a593Smuzhiyun #define WM8994_FLL_SRC_BCLK 4 40*4882a593Smuzhiyun #define WM8994_FLL_SRC_INTERNAL 5 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun enum wm8994_vmid_mode { 43*4882a593Smuzhiyun WM8994_VMID_NORMAL, 44*4882a593Smuzhiyun WM8994_VMID_FORCE, 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun typedef void (*wm1811_micdet_cb)(void *data); 48*4882a593Smuzhiyun typedef void (*wm1811_mic_id_cb)(void *data, u16 status); 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun int wm8994_mic_detect(struct snd_soc_component *component, struct snd_soc_jack *jack, 51*4882a593Smuzhiyun int micbias); 52*4882a593Smuzhiyun int wm8958_mic_detect(struct snd_soc_component *component, struct snd_soc_jack *jack, 53*4882a593Smuzhiyun wm1811_micdet_cb cb, void *det_cb_data, 54*4882a593Smuzhiyun wm1811_mic_id_cb id_cb, void *id_cb_data); 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun int wm8994_vmid_mode(struct snd_soc_component *component, enum wm8994_vmid_mode mode); 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun int wm8958_aif_ev(struct snd_soc_dapm_widget *w, 59*4882a593Smuzhiyun struct snd_kcontrol *kcontrol, int event); 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun void wm8958_dsp2_init(struct snd_soc_component *component); 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun struct wm8994_micdet { 64*4882a593Smuzhiyun struct snd_soc_jack *jack; 65*4882a593Smuzhiyun bool detecting; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* codec private data */ 69*4882a593Smuzhiyun struct wm8994_fll_config { 70*4882a593Smuzhiyun int src; 71*4882a593Smuzhiyun int in; 72*4882a593Smuzhiyun int out; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #define WM8994_NUM_DRC 3 76*4882a593Smuzhiyun #define WM8994_NUM_EQ 3 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun struct wm8994; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun struct wm8994_priv { 81*4882a593Smuzhiyun struct wm_hubs_data hubs; 82*4882a593Smuzhiyun struct wm8994 *wm8994; 83*4882a593Smuzhiyun struct clk_bulk_data mclk[WM8994_NUM_MCLK]; 84*4882a593Smuzhiyun int sysclk[2]; 85*4882a593Smuzhiyun int sysclk_rate[2]; 86*4882a593Smuzhiyun int mclk_rate[2]; 87*4882a593Smuzhiyun int aifclk[2]; 88*4882a593Smuzhiyun int aifdiv[2]; 89*4882a593Smuzhiyun int channels[2]; 90*4882a593Smuzhiyun struct wm8994_fll_config fll[2], fll_suspend[2]; 91*4882a593Smuzhiyun struct completion fll_locked[2]; 92*4882a593Smuzhiyun bool fll_locked_irq; 93*4882a593Smuzhiyun bool fll_byp; 94*4882a593Smuzhiyun bool clk_has_run; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun int vmid_refcount; 97*4882a593Smuzhiyun int active_refcount; 98*4882a593Smuzhiyun enum wm8994_vmid_mode vmid_mode; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun int dac_rates[2]; 101*4882a593Smuzhiyun int lrclk_shared[2]; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun int mbc_ena[3]; 104*4882a593Smuzhiyun int hpf1_ena[3]; 105*4882a593Smuzhiyun int hpf2_ena[3]; 106*4882a593Smuzhiyun int vss_ena[3]; 107*4882a593Smuzhiyun int enh_eq_ena[3]; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun /* Platform dependant DRC configuration */ 110*4882a593Smuzhiyun const char **drc_texts; 111*4882a593Smuzhiyun int drc_cfg[WM8994_NUM_DRC]; 112*4882a593Smuzhiyun struct soc_enum drc_enum; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun /* Platform dependant ReTune mobile configuration */ 115*4882a593Smuzhiyun int num_retune_mobile_texts; 116*4882a593Smuzhiyun const char **retune_mobile_texts; 117*4882a593Smuzhiyun int retune_mobile_cfg[WM8994_NUM_EQ]; 118*4882a593Smuzhiyun struct soc_enum retune_mobile_enum; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun /* Platform dependant MBC configuration */ 121*4882a593Smuzhiyun int mbc_cfg; 122*4882a593Smuzhiyun const char **mbc_texts; 123*4882a593Smuzhiyun struct soc_enum mbc_enum; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun /* Platform dependant VSS configuration */ 126*4882a593Smuzhiyun int vss_cfg; 127*4882a593Smuzhiyun const char **vss_texts; 128*4882a593Smuzhiyun struct soc_enum vss_enum; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun /* Platform dependant VSS HPF configuration */ 131*4882a593Smuzhiyun int vss_hpf_cfg; 132*4882a593Smuzhiyun const char **vss_hpf_texts; 133*4882a593Smuzhiyun struct soc_enum vss_hpf_enum; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun /* Platform dependant enhanced EQ configuration */ 136*4882a593Smuzhiyun int enh_eq_cfg; 137*4882a593Smuzhiyun const char **enh_eq_texts; 138*4882a593Smuzhiyun struct soc_enum enh_eq_enum; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun struct mutex accdet_lock; 141*4882a593Smuzhiyun struct wm8994_micdet micdet[2]; 142*4882a593Smuzhiyun struct delayed_work mic_work; 143*4882a593Smuzhiyun struct delayed_work open_circuit_work; 144*4882a593Smuzhiyun struct delayed_work mic_complete_work; 145*4882a593Smuzhiyun u16 mic_status; 146*4882a593Smuzhiyun bool mic_detecting; 147*4882a593Smuzhiyun bool jack_mic; 148*4882a593Smuzhiyun int btn_mask; 149*4882a593Smuzhiyun bool jackdet; 150*4882a593Smuzhiyun int jackdet_mode; 151*4882a593Smuzhiyun struct delayed_work jackdet_bootstrap; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun int micdet_irq; 154*4882a593Smuzhiyun wm1811_micdet_cb micd_cb; 155*4882a593Smuzhiyun void *micd_cb_data; 156*4882a593Smuzhiyun wm1811_mic_id_cb mic_id_cb; 157*4882a593Smuzhiyun void *mic_id_cb_data; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun unsigned int aif1clk_enable:1; 160*4882a593Smuzhiyun unsigned int aif2clk_enable:1; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun unsigned int aif1clk_disable:1; 163*4882a593Smuzhiyun unsigned int aif2clk_disable:1; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun struct mutex fw_lock; 166*4882a593Smuzhiyun int dsp_active; 167*4882a593Smuzhiyun const struct firmware *cur_fw; 168*4882a593Smuzhiyun const struct firmware *mbc; 169*4882a593Smuzhiyun const struct firmware *mbc_vss; 170*4882a593Smuzhiyun const struct firmware *enh_eq; 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun #endif 174