1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * wm8971.c -- WM8971 ALSA SoC Audio driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2005 Lab126, Inc.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Kenneth Kiraly <kiraly@lab126.com>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Based on wm8753.c by Liam Girdwood
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/moduleparam.h>
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/pm.h>
17*4882a593Smuzhiyun #include <linux/i2c.h>
18*4882a593Smuzhiyun #include <linux/regmap.h>
19*4882a593Smuzhiyun #include <linux/slab.h>
20*4882a593Smuzhiyun #include <sound/core.h>
21*4882a593Smuzhiyun #include <sound/pcm.h>
22*4882a593Smuzhiyun #include <sound/pcm_params.h>
23*4882a593Smuzhiyun #include <sound/soc.h>
24*4882a593Smuzhiyun #include <sound/initval.h>
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #include "wm8971.h"
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #define WM8971_REG_COUNT 43
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /* codec private data */
31*4882a593Smuzhiyun struct wm8971_priv {
32*4882a593Smuzhiyun unsigned int sysclk;
33*4882a593Smuzhiyun struct delayed_work charge_work;
34*4882a593Smuzhiyun struct regmap *regmap;
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun /*
38*4882a593Smuzhiyun * wm8971 register cache
39*4882a593Smuzhiyun * We can't read the WM8971 register space when we
40*4882a593Smuzhiyun * are using 2 wire for device control, so we cache them instead.
41*4882a593Smuzhiyun */
42*4882a593Smuzhiyun static const struct reg_default wm8971_reg_defaults[] = {
43*4882a593Smuzhiyun { 0, 0x0097 },
44*4882a593Smuzhiyun { 1, 0x0097 },
45*4882a593Smuzhiyun { 2, 0x0079 },
46*4882a593Smuzhiyun { 3, 0x0079 },
47*4882a593Smuzhiyun { 4, 0x0000 },
48*4882a593Smuzhiyun { 5, 0x0008 },
49*4882a593Smuzhiyun { 6, 0x0000 },
50*4882a593Smuzhiyun { 7, 0x000a },
51*4882a593Smuzhiyun { 8, 0x0000 },
52*4882a593Smuzhiyun { 9, 0x0000 },
53*4882a593Smuzhiyun { 10, 0x00ff },
54*4882a593Smuzhiyun { 11, 0x00ff },
55*4882a593Smuzhiyun { 12, 0x000f },
56*4882a593Smuzhiyun { 13, 0x000f },
57*4882a593Smuzhiyun { 14, 0x0000 },
58*4882a593Smuzhiyun { 15, 0x0000 },
59*4882a593Smuzhiyun { 16, 0x0000 },
60*4882a593Smuzhiyun { 17, 0x007b },
61*4882a593Smuzhiyun { 18, 0x0000 },
62*4882a593Smuzhiyun { 19, 0x0032 },
63*4882a593Smuzhiyun { 20, 0x0000 },
64*4882a593Smuzhiyun { 21, 0x00c3 },
65*4882a593Smuzhiyun { 22, 0x00c3 },
66*4882a593Smuzhiyun { 23, 0x00c0 },
67*4882a593Smuzhiyun { 24, 0x0000 },
68*4882a593Smuzhiyun { 25, 0x0000 },
69*4882a593Smuzhiyun { 26, 0x0000 },
70*4882a593Smuzhiyun { 27, 0x0000 },
71*4882a593Smuzhiyun { 28, 0x0000 },
72*4882a593Smuzhiyun { 29, 0x0000 },
73*4882a593Smuzhiyun { 30, 0x0000 },
74*4882a593Smuzhiyun { 31, 0x0000 },
75*4882a593Smuzhiyun { 32, 0x0000 },
76*4882a593Smuzhiyun { 33, 0x0000 },
77*4882a593Smuzhiyun { 34, 0x0050 },
78*4882a593Smuzhiyun { 35, 0x0050 },
79*4882a593Smuzhiyun { 36, 0x0050 },
80*4882a593Smuzhiyun { 37, 0x0050 },
81*4882a593Smuzhiyun { 38, 0x0050 },
82*4882a593Smuzhiyun { 39, 0x0050 },
83*4882a593Smuzhiyun { 40, 0x0079 },
84*4882a593Smuzhiyun { 41, 0x0079 },
85*4882a593Smuzhiyun { 42, 0x0079 },
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun #define wm8971_reset(c) snd_soc_component_write(c, WM8971_RESET, 0)
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun /* WM8971 Controls */
91*4882a593Smuzhiyun static const char *wm8971_bass[] = { "Linear Control", "Adaptive Boost" };
92*4882a593Smuzhiyun static const char *wm8971_bass_filter[] = { "130Hz @ 48kHz",
93*4882a593Smuzhiyun "200Hz @ 48kHz" };
94*4882a593Smuzhiyun static const char *wm8971_treble[] = { "8kHz", "4kHz" };
95*4882a593Smuzhiyun static const char *wm8971_alc_func[] = { "Off", "Right", "Left", "Stereo" };
96*4882a593Smuzhiyun static const char *wm8971_ng_type[] = { "Constant PGA Gain",
97*4882a593Smuzhiyun "Mute ADC Output" };
98*4882a593Smuzhiyun static const char *wm8971_deemp[] = { "None", "32kHz", "44.1kHz", "48kHz" };
99*4882a593Smuzhiyun static const char *wm8971_mono_mux[] = {"Stereo", "Mono (Left)",
100*4882a593Smuzhiyun "Mono (Right)", "Digital Mono"};
101*4882a593Smuzhiyun static const char *wm8971_dac_phase[] = { "Non Inverted", "Inverted" };
102*4882a593Smuzhiyun static const char *wm8971_lline_mux[] = {"Line", "NC", "NC", "PGA",
103*4882a593Smuzhiyun "Differential"};
104*4882a593Smuzhiyun static const char *wm8971_rline_mux[] = {"Line", "Mic", "NC", "PGA",
105*4882a593Smuzhiyun "Differential"};
106*4882a593Smuzhiyun static const char *wm8971_lpga_sel[] = {"Line", "NC", "NC", "Differential"};
107*4882a593Smuzhiyun static const char *wm8971_rpga_sel[] = {"Line", "Mic", "NC", "Differential"};
108*4882a593Smuzhiyun static const char *wm8971_adcpol[] = {"Normal", "L Invert", "R Invert",
109*4882a593Smuzhiyun "L + R Invert"};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun static const struct soc_enum wm8971_enum[] = {
112*4882a593Smuzhiyun SOC_ENUM_SINGLE(WM8971_BASS, 7, 2, wm8971_bass), /* 0 */
113*4882a593Smuzhiyun SOC_ENUM_SINGLE(WM8971_BASS, 6, 2, wm8971_bass_filter),
114*4882a593Smuzhiyun SOC_ENUM_SINGLE(WM8971_TREBLE, 6, 2, wm8971_treble),
115*4882a593Smuzhiyun SOC_ENUM_SINGLE(WM8971_ALC1, 7, 4, wm8971_alc_func),
116*4882a593Smuzhiyun SOC_ENUM_SINGLE(WM8971_NGATE, 1, 2, wm8971_ng_type), /* 4 */
117*4882a593Smuzhiyun SOC_ENUM_SINGLE(WM8971_ADCDAC, 1, 4, wm8971_deemp),
118*4882a593Smuzhiyun SOC_ENUM_SINGLE(WM8971_ADCTL1, 4, 4, wm8971_mono_mux),
119*4882a593Smuzhiyun SOC_ENUM_SINGLE(WM8971_ADCTL1, 1, 2, wm8971_dac_phase),
120*4882a593Smuzhiyun SOC_ENUM_SINGLE(WM8971_LOUTM1, 0, 5, wm8971_lline_mux), /* 8 */
121*4882a593Smuzhiyun SOC_ENUM_SINGLE(WM8971_ROUTM1, 0, 5, wm8971_rline_mux),
122*4882a593Smuzhiyun SOC_ENUM_SINGLE(WM8971_LADCIN, 6, 4, wm8971_lpga_sel),
123*4882a593Smuzhiyun SOC_ENUM_SINGLE(WM8971_RADCIN, 6, 4, wm8971_rpga_sel),
124*4882a593Smuzhiyun SOC_ENUM_SINGLE(WM8971_ADCDAC, 5, 4, wm8971_adcpol), /* 12 */
125*4882a593Smuzhiyun SOC_ENUM_SINGLE(WM8971_ADCIN, 6, 4, wm8971_mono_mux),
126*4882a593Smuzhiyun };
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8971_snd_controls[] = {
129*4882a593Smuzhiyun SOC_DOUBLE_R("Capture Volume", WM8971_LINVOL, WM8971_RINVOL, 0, 63, 0),
130*4882a593Smuzhiyun SOC_DOUBLE_R("Capture ZC Switch", WM8971_LINVOL, WM8971_RINVOL,
131*4882a593Smuzhiyun 6, 1, 0),
132*4882a593Smuzhiyun SOC_DOUBLE_R("Capture Switch", WM8971_LINVOL, WM8971_RINVOL, 7, 1, 1),
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8971_LOUT1V,
135*4882a593Smuzhiyun WM8971_ROUT1V, 7, 1, 0),
136*4882a593Smuzhiyun SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8971_LOUT2V,
137*4882a593Smuzhiyun WM8971_ROUT2V, 7, 1, 0),
138*4882a593Smuzhiyun SOC_SINGLE("Mono Playback ZC Switch", WM8971_MOUTV, 7, 1, 0),
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun SOC_DOUBLE_R("PCM Volume", WM8971_LDAC, WM8971_RDAC, 0, 255, 0),
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun SOC_DOUBLE_R("Bypass Left Playback Volume", WM8971_LOUTM1,
143*4882a593Smuzhiyun WM8971_LOUTM2, 4, 7, 1),
144*4882a593Smuzhiyun SOC_DOUBLE_R("Bypass Right Playback Volume", WM8971_ROUTM1,
145*4882a593Smuzhiyun WM8971_ROUTM2, 4, 7, 1),
146*4882a593Smuzhiyun SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8971_MOUTM1,
147*4882a593Smuzhiyun WM8971_MOUTM2, 4, 7, 1),
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun SOC_DOUBLE_R("Headphone Playback Volume", WM8971_LOUT1V,
150*4882a593Smuzhiyun WM8971_ROUT1V, 0, 127, 0),
151*4882a593Smuzhiyun SOC_DOUBLE_R("Speaker Playback Volume", WM8971_LOUT2V,
152*4882a593Smuzhiyun WM8971_ROUT2V, 0, 127, 0),
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun SOC_ENUM("Bass Boost", wm8971_enum[0]),
155*4882a593Smuzhiyun SOC_ENUM("Bass Filter", wm8971_enum[1]),
156*4882a593Smuzhiyun SOC_SINGLE("Bass Volume", WM8971_BASS, 0, 7, 1),
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun SOC_SINGLE("Treble Volume", WM8971_TREBLE, 0, 7, 0),
159*4882a593Smuzhiyun SOC_ENUM("Treble Cut-off", wm8971_enum[2]),
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun SOC_SINGLE("Capture Filter Switch", WM8971_ADCDAC, 0, 1, 1),
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun SOC_SINGLE("ALC Target Volume", WM8971_ALC1, 0, 7, 0),
164*4882a593Smuzhiyun SOC_SINGLE("ALC Max Volume", WM8971_ALC1, 4, 7, 0),
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun SOC_SINGLE("ALC Capture Target Volume", WM8971_ALC1, 0, 7, 0),
167*4882a593Smuzhiyun SOC_SINGLE("ALC Capture Max Volume", WM8971_ALC1, 4, 7, 0),
168*4882a593Smuzhiyun SOC_ENUM("ALC Capture Function", wm8971_enum[3]),
169*4882a593Smuzhiyun SOC_SINGLE("ALC Capture ZC Switch", WM8971_ALC2, 7, 1, 0),
170*4882a593Smuzhiyun SOC_SINGLE("ALC Capture Hold Time", WM8971_ALC2, 0, 15, 0),
171*4882a593Smuzhiyun SOC_SINGLE("ALC Capture Decay Time", WM8971_ALC3, 4, 15, 0),
172*4882a593Smuzhiyun SOC_SINGLE("ALC Capture Attack Time", WM8971_ALC3, 0, 15, 0),
173*4882a593Smuzhiyun SOC_SINGLE("ALC Capture NG Threshold", WM8971_NGATE, 3, 31, 0),
174*4882a593Smuzhiyun SOC_ENUM("ALC Capture NG Type", wm8971_enum[4]),
175*4882a593Smuzhiyun SOC_SINGLE("ALC Capture NG Switch", WM8971_NGATE, 0, 1, 0),
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun SOC_SINGLE("Capture 6dB Attenuate", WM8971_ADCDAC, 8, 1, 0),
178*4882a593Smuzhiyun SOC_SINGLE("Playback 6dB Attenuate", WM8971_ADCDAC, 7, 1, 0),
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun SOC_ENUM("Playback De-emphasis", wm8971_enum[5]),
181*4882a593Smuzhiyun SOC_ENUM("Playback Function", wm8971_enum[6]),
182*4882a593Smuzhiyun SOC_ENUM("Playback Phase", wm8971_enum[7]),
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun SOC_DOUBLE_R("Mic Boost", WM8971_LADCIN, WM8971_RADCIN, 4, 3, 0),
185*4882a593Smuzhiyun };
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun /*
188*4882a593Smuzhiyun * DAPM Controls
189*4882a593Smuzhiyun */
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun /* Left Mixer */
192*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8971_left_mixer_controls[] = {
193*4882a593Smuzhiyun SOC_DAPM_SINGLE("Playback Switch", WM8971_LOUTM1, 8, 1, 0),
194*4882a593Smuzhiyun SOC_DAPM_SINGLE("Left Bypass Switch", WM8971_LOUTM1, 7, 1, 0),
195*4882a593Smuzhiyun SOC_DAPM_SINGLE("Right Playback Switch", WM8971_LOUTM2, 8, 1, 0),
196*4882a593Smuzhiyun SOC_DAPM_SINGLE("Right Bypass Switch", WM8971_LOUTM2, 7, 1, 0),
197*4882a593Smuzhiyun };
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun /* Right Mixer */
200*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8971_right_mixer_controls[] = {
201*4882a593Smuzhiyun SOC_DAPM_SINGLE("Left Playback Switch", WM8971_ROUTM1, 8, 1, 0),
202*4882a593Smuzhiyun SOC_DAPM_SINGLE("Left Bypass Switch", WM8971_ROUTM1, 7, 1, 0),
203*4882a593Smuzhiyun SOC_DAPM_SINGLE("Playback Switch", WM8971_ROUTM2, 8, 1, 0),
204*4882a593Smuzhiyun SOC_DAPM_SINGLE("Right Bypass Switch", WM8971_ROUTM2, 7, 1, 0),
205*4882a593Smuzhiyun };
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun /* Mono Mixer */
208*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8971_mono_mixer_controls[] = {
209*4882a593Smuzhiyun SOC_DAPM_SINGLE("Left Playback Switch", WM8971_MOUTM1, 8, 1, 0),
210*4882a593Smuzhiyun SOC_DAPM_SINGLE("Left Bypass Switch", WM8971_MOUTM1, 7, 1, 0),
211*4882a593Smuzhiyun SOC_DAPM_SINGLE("Right Playback Switch", WM8971_MOUTM2, 8, 1, 0),
212*4882a593Smuzhiyun SOC_DAPM_SINGLE("Right Bypass Switch", WM8971_MOUTM2, 7, 1, 0),
213*4882a593Smuzhiyun };
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun /* Left Line Mux */
216*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8971_left_line_controls =
217*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", wm8971_enum[8]);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun /* Right Line Mux */
220*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8971_right_line_controls =
221*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", wm8971_enum[9]);
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun /* Left PGA Mux */
224*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8971_left_pga_controls =
225*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", wm8971_enum[10]);
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun /* Right PGA Mux */
228*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8971_right_pga_controls =
229*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", wm8971_enum[11]);
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun /* Mono ADC Mux */
232*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8971_monomux_controls =
233*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", wm8971_enum[13]);
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun static const struct snd_soc_dapm_widget wm8971_dapm_widgets[] = {
236*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
237*4882a593Smuzhiyun &wm8971_left_mixer_controls[0],
238*4882a593Smuzhiyun ARRAY_SIZE(wm8971_left_mixer_controls)),
239*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
240*4882a593Smuzhiyun &wm8971_right_mixer_controls[0],
241*4882a593Smuzhiyun ARRAY_SIZE(wm8971_right_mixer_controls)),
242*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Mono Mixer", WM8971_PWR2, 2, 0,
243*4882a593Smuzhiyun &wm8971_mono_mixer_controls[0],
244*4882a593Smuzhiyun ARRAY_SIZE(wm8971_mono_mixer_controls)),
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Right Out 2", WM8971_PWR2, 3, 0, NULL, 0),
247*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Left Out 2", WM8971_PWR2, 4, 0, NULL, 0),
248*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Right Out 1", WM8971_PWR2, 5, 0, NULL, 0),
249*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Left Out 1", WM8971_PWR2, 6, 0, NULL, 0),
250*4882a593Smuzhiyun SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8971_PWR2, 7, 0),
251*4882a593Smuzhiyun SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8971_PWR2, 8, 0),
252*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Mono Out 1", WM8971_PWR2, 2, 0, NULL, 0),
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("Mic Bias", WM8971_PWR1, 1, 0, NULL, 0),
255*4882a593Smuzhiyun SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8971_PWR1, 2, 0),
256*4882a593Smuzhiyun SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8971_PWR1, 3, 0),
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Left PGA Mux", WM8971_PWR1, 5, 0,
259*4882a593Smuzhiyun &wm8971_left_pga_controls),
260*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Right PGA Mux", WM8971_PWR1, 4, 0,
261*4882a593Smuzhiyun &wm8971_right_pga_controls),
262*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
263*4882a593Smuzhiyun &wm8971_left_line_controls),
264*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
265*4882a593Smuzhiyun &wm8971_right_line_controls),
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
268*4882a593Smuzhiyun &wm8971_monomux_controls),
269*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
270*4882a593Smuzhiyun &wm8971_monomux_controls),
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("LOUT1"),
273*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("ROUT1"),
274*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("LOUT2"),
275*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("ROUT2"),
276*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("MONO"),
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LINPUT1"),
279*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("RINPUT1"),
280*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("MIC"),
281*4882a593Smuzhiyun };
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun static const struct snd_soc_dapm_route wm8971_dapm_routes[] = {
284*4882a593Smuzhiyun /* left mixer */
285*4882a593Smuzhiyun {"Left Mixer", "Playback Switch", "Left DAC"},
286*4882a593Smuzhiyun {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
287*4882a593Smuzhiyun {"Left Mixer", "Right Playback Switch", "Right DAC"},
288*4882a593Smuzhiyun {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun /* right mixer */
291*4882a593Smuzhiyun {"Right Mixer", "Left Playback Switch", "Left DAC"},
292*4882a593Smuzhiyun {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
293*4882a593Smuzhiyun {"Right Mixer", "Playback Switch", "Right DAC"},
294*4882a593Smuzhiyun {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun /* left out 1 */
297*4882a593Smuzhiyun {"Left Out 1", NULL, "Left Mixer"},
298*4882a593Smuzhiyun {"LOUT1", NULL, "Left Out 1"},
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun /* left out 2 */
301*4882a593Smuzhiyun {"Left Out 2", NULL, "Left Mixer"},
302*4882a593Smuzhiyun {"LOUT2", NULL, "Left Out 2"},
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun /* right out 1 */
305*4882a593Smuzhiyun {"Right Out 1", NULL, "Right Mixer"},
306*4882a593Smuzhiyun {"ROUT1", NULL, "Right Out 1"},
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun /* right out 2 */
309*4882a593Smuzhiyun {"Right Out 2", NULL, "Right Mixer"},
310*4882a593Smuzhiyun {"ROUT2", NULL, "Right Out 2"},
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun /* mono mixer */
313*4882a593Smuzhiyun {"Mono Mixer", "Left Playback Switch", "Left DAC"},
314*4882a593Smuzhiyun {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
315*4882a593Smuzhiyun {"Mono Mixer", "Right Playback Switch", "Right DAC"},
316*4882a593Smuzhiyun {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun /* mono out */
319*4882a593Smuzhiyun {"Mono Out", NULL, "Mono Mixer"},
320*4882a593Smuzhiyun {"MONO1", NULL, "Mono Out"},
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun /* Left Line Mux */
323*4882a593Smuzhiyun {"Left Line Mux", "Line", "LINPUT1"},
324*4882a593Smuzhiyun {"Left Line Mux", "PGA", "Left PGA Mux"},
325*4882a593Smuzhiyun {"Left Line Mux", "Differential", "Differential Mux"},
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun /* Right Line Mux */
328*4882a593Smuzhiyun {"Right Line Mux", "Line", "RINPUT1"},
329*4882a593Smuzhiyun {"Right Line Mux", "Mic", "MIC"},
330*4882a593Smuzhiyun {"Right Line Mux", "PGA", "Right PGA Mux"},
331*4882a593Smuzhiyun {"Right Line Mux", "Differential", "Differential Mux"},
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun /* Left PGA Mux */
334*4882a593Smuzhiyun {"Left PGA Mux", "Line", "LINPUT1"},
335*4882a593Smuzhiyun {"Left PGA Mux", "Differential", "Differential Mux"},
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun /* Right PGA Mux */
338*4882a593Smuzhiyun {"Right PGA Mux", "Line", "RINPUT1"},
339*4882a593Smuzhiyun {"Right PGA Mux", "Differential", "Differential Mux"},
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun /* Differential Mux */
342*4882a593Smuzhiyun {"Differential Mux", "Line", "LINPUT1"},
343*4882a593Smuzhiyun {"Differential Mux", "Line", "RINPUT1"},
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun /* Left ADC Mux */
346*4882a593Smuzhiyun {"Left ADC Mux", "Stereo", "Left PGA Mux"},
347*4882a593Smuzhiyun {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
348*4882a593Smuzhiyun {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun /* Right ADC Mux */
351*4882a593Smuzhiyun {"Right ADC Mux", "Stereo", "Right PGA Mux"},
352*4882a593Smuzhiyun {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
353*4882a593Smuzhiyun {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun /* ADC */
356*4882a593Smuzhiyun {"Left ADC", NULL, "Left ADC Mux"},
357*4882a593Smuzhiyun {"Right ADC", NULL, "Right ADC Mux"},
358*4882a593Smuzhiyun };
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun struct _coeff_div {
361*4882a593Smuzhiyun u32 mclk;
362*4882a593Smuzhiyun u32 rate;
363*4882a593Smuzhiyun u16 fs;
364*4882a593Smuzhiyun u8 sr:5;
365*4882a593Smuzhiyun u8 usb:1;
366*4882a593Smuzhiyun };
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun /* codec hifi mclk clock divider coefficients */
369*4882a593Smuzhiyun static const struct _coeff_div coeff_div[] = {
370*4882a593Smuzhiyun /* 8k */
371*4882a593Smuzhiyun {12288000, 8000, 1536, 0x6, 0x0},
372*4882a593Smuzhiyun {11289600, 8000, 1408, 0x16, 0x0},
373*4882a593Smuzhiyun {18432000, 8000, 2304, 0x7, 0x0},
374*4882a593Smuzhiyun {16934400, 8000, 2112, 0x17, 0x0},
375*4882a593Smuzhiyun {12000000, 8000, 1500, 0x6, 0x1},
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun /* 11.025k */
378*4882a593Smuzhiyun {11289600, 11025, 1024, 0x18, 0x0},
379*4882a593Smuzhiyun {16934400, 11025, 1536, 0x19, 0x0},
380*4882a593Smuzhiyun {12000000, 11025, 1088, 0x19, 0x1},
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun /* 16k */
383*4882a593Smuzhiyun {12288000, 16000, 768, 0xa, 0x0},
384*4882a593Smuzhiyun {18432000, 16000, 1152, 0xb, 0x0},
385*4882a593Smuzhiyun {12000000, 16000, 750, 0xa, 0x1},
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun /* 22.05k */
388*4882a593Smuzhiyun {11289600, 22050, 512, 0x1a, 0x0},
389*4882a593Smuzhiyun {16934400, 22050, 768, 0x1b, 0x0},
390*4882a593Smuzhiyun {12000000, 22050, 544, 0x1b, 0x1},
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun /* 32k */
393*4882a593Smuzhiyun {12288000, 32000, 384, 0xc, 0x0},
394*4882a593Smuzhiyun {18432000, 32000, 576, 0xd, 0x0},
395*4882a593Smuzhiyun {12000000, 32000, 375, 0xa, 0x1},
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun /* 44.1k */
398*4882a593Smuzhiyun {11289600, 44100, 256, 0x10, 0x0},
399*4882a593Smuzhiyun {16934400, 44100, 384, 0x11, 0x0},
400*4882a593Smuzhiyun {12000000, 44100, 272, 0x11, 0x1},
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun /* 48k */
403*4882a593Smuzhiyun {12288000, 48000, 256, 0x0, 0x0},
404*4882a593Smuzhiyun {18432000, 48000, 384, 0x1, 0x0},
405*4882a593Smuzhiyun {12000000, 48000, 250, 0x0, 0x1},
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun /* 88.2k */
408*4882a593Smuzhiyun {11289600, 88200, 128, 0x1e, 0x0},
409*4882a593Smuzhiyun {16934400, 88200, 192, 0x1f, 0x0},
410*4882a593Smuzhiyun {12000000, 88200, 136, 0x1f, 0x1},
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun /* 96k */
413*4882a593Smuzhiyun {12288000, 96000, 128, 0xe, 0x0},
414*4882a593Smuzhiyun {18432000, 96000, 192, 0xf, 0x0},
415*4882a593Smuzhiyun {12000000, 96000, 125, 0xe, 0x1},
416*4882a593Smuzhiyun };
417*4882a593Smuzhiyun
get_coeff(int mclk,int rate)418*4882a593Smuzhiyun static int get_coeff(int mclk, int rate)
419*4882a593Smuzhiyun {
420*4882a593Smuzhiyun int i;
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
423*4882a593Smuzhiyun if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
424*4882a593Smuzhiyun return i;
425*4882a593Smuzhiyun }
426*4882a593Smuzhiyun return -EINVAL;
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun
wm8971_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)429*4882a593Smuzhiyun static int wm8971_set_dai_sysclk(struct snd_soc_dai *codec_dai,
430*4882a593Smuzhiyun int clk_id, unsigned int freq, int dir)
431*4882a593Smuzhiyun {
432*4882a593Smuzhiyun struct snd_soc_component *component = codec_dai->component;
433*4882a593Smuzhiyun struct wm8971_priv *wm8971 = snd_soc_component_get_drvdata(component);
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun switch (freq) {
436*4882a593Smuzhiyun case 11289600:
437*4882a593Smuzhiyun case 12000000:
438*4882a593Smuzhiyun case 12288000:
439*4882a593Smuzhiyun case 16934400:
440*4882a593Smuzhiyun case 18432000:
441*4882a593Smuzhiyun wm8971->sysclk = freq;
442*4882a593Smuzhiyun return 0;
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun return -EINVAL;
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun
wm8971_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)447*4882a593Smuzhiyun static int wm8971_set_dai_fmt(struct snd_soc_dai *codec_dai,
448*4882a593Smuzhiyun unsigned int fmt)
449*4882a593Smuzhiyun {
450*4882a593Smuzhiyun struct snd_soc_component *component = codec_dai->component;
451*4882a593Smuzhiyun u16 iface = 0;
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun /* set master/slave audio interface */
454*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
455*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBM_CFM:
456*4882a593Smuzhiyun iface = 0x0040;
457*4882a593Smuzhiyun break;
458*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBS_CFS:
459*4882a593Smuzhiyun break;
460*4882a593Smuzhiyun default:
461*4882a593Smuzhiyun return -EINVAL;
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun /* interface format */
465*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
466*4882a593Smuzhiyun case SND_SOC_DAIFMT_I2S:
467*4882a593Smuzhiyun iface |= 0x0002;
468*4882a593Smuzhiyun break;
469*4882a593Smuzhiyun case SND_SOC_DAIFMT_RIGHT_J:
470*4882a593Smuzhiyun break;
471*4882a593Smuzhiyun case SND_SOC_DAIFMT_LEFT_J:
472*4882a593Smuzhiyun iface |= 0x0001;
473*4882a593Smuzhiyun break;
474*4882a593Smuzhiyun case SND_SOC_DAIFMT_DSP_A:
475*4882a593Smuzhiyun iface |= 0x0003;
476*4882a593Smuzhiyun break;
477*4882a593Smuzhiyun case SND_SOC_DAIFMT_DSP_B:
478*4882a593Smuzhiyun iface |= 0x0013;
479*4882a593Smuzhiyun break;
480*4882a593Smuzhiyun default:
481*4882a593Smuzhiyun return -EINVAL;
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun /* clock inversion */
485*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
486*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_NF:
487*4882a593Smuzhiyun break;
488*4882a593Smuzhiyun case SND_SOC_DAIFMT_IB_IF:
489*4882a593Smuzhiyun iface |= 0x0090;
490*4882a593Smuzhiyun break;
491*4882a593Smuzhiyun case SND_SOC_DAIFMT_IB_NF:
492*4882a593Smuzhiyun iface |= 0x0080;
493*4882a593Smuzhiyun break;
494*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_IF:
495*4882a593Smuzhiyun iface |= 0x0010;
496*4882a593Smuzhiyun break;
497*4882a593Smuzhiyun default:
498*4882a593Smuzhiyun return -EINVAL;
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun snd_soc_component_write(component, WM8971_IFACE, iface);
502*4882a593Smuzhiyun return 0;
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun
wm8971_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)505*4882a593Smuzhiyun static int wm8971_pcm_hw_params(struct snd_pcm_substream *substream,
506*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
507*4882a593Smuzhiyun struct snd_soc_dai *dai)
508*4882a593Smuzhiyun {
509*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
510*4882a593Smuzhiyun struct wm8971_priv *wm8971 = snd_soc_component_get_drvdata(component);
511*4882a593Smuzhiyun u16 iface = snd_soc_component_read(component, WM8971_IFACE) & 0x1f3;
512*4882a593Smuzhiyun u16 srate = snd_soc_component_read(component, WM8971_SRATE) & 0x1c0;
513*4882a593Smuzhiyun int coeff = get_coeff(wm8971->sysclk, params_rate(params));
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun /* bit size */
516*4882a593Smuzhiyun switch (params_width(params)) {
517*4882a593Smuzhiyun case 16:
518*4882a593Smuzhiyun break;
519*4882a593Smuzhiyun case 20:
520*4882a593Smuzhiyun iface |= 0x0004;
521*4882a593Smuzhiyun break;
522*4882a593Smuzhiyun case 24:
523*4882a593Smuzhiyun iface |= 0x0008;
524*4882a593Smuzhiyun break;
525*4882a593Smuzhiyun case 32:
526*4882a593Smuzhiyun iface |= 0x000c;
527*4882a593Smuzhiyun break;
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun /* set iface & srate */
531*4882a593Smuzhiyun snd_soc_component_write(component, WM8971_IFACE, iface);
532*4882a593Smuzhiyun if (coeff >= 0)
533*4882a593Smuzhiyun snd_soc_component_write(component, WM8971_SRATE, srate |
534*4882a593Smuzhiyun (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun return 0;
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun
wm8971_mute(struct snd_soc_dai * dai,int mute,int direction)539*4882a593Smuzhiyun static int wm8971_mute(struct snd_soc_dai *dai, int mute, int direction)
540*4882a593Smuzhiyun {
541*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
542*4882a593Smuzhiyun u16 mute_reg = snd_soc_component_read(component, WM8971_ADCDAC) & 0xfff7;
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun if (mute)
545*4882a593Smuzhiyun snd_soc_component_write(component, WM8971_ADCDAC, mute_reg | 0x8);
546*4882a593Smuzhiyun else
547*4882a593Smuzhiyun snd_soc_component_write(component, WM8971_ADCDAC, mute_reg);
548*4882a593Smuzhiyun return 0;
549*4882a593Smuzhiyun }
550*4882a593Smuzhiyun
wm8971_charge_work(struct work_struct * work)551*4882a593Smuzhiyun static void wm8971_charge_work(struct work_struct *work)
552*4882a593Smuzhiyun {
553*4882a593Smuzhiyun struct wm8971_priv *wm8971 =
554*4882a593Smuzhiyun container_of(work, struct wm8971_priv, charge_work.work);
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun /* Set to 500k */
557*4882a593Smuzhiyun regmap_update_bits(wm8971->regmap, WM8971_PWR1, 0x0180, 0x0100);
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun
wm8971_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)560*4882a593Smuzhiyun static int wm8971_set_bias_level(struct snd_soc_component *component,
561*4882a593Smuzhiyun enum snd_soc_bias_level level)
562*4882a593Smuzhiyun {
563*4882a593Smuzhiyun struct wm8971_priv *wm8971 = snd_soc_component_get_drvdata(component);
564*4882a593Smuzhiyun u16 pwr_reg = snd_soc_component_read(component, WM8971_PWR1) & 0xfe3e;
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun switch (level) {
567*4882a593Smuzhiyun case SND_SOC_BIAS_ON:
568*4882a593Smuzhiyun /* set vmid to 50k and unmute dac */
569*4882a593Smuzhiyun snd_soc_component_write(component, WM8971_PWR1, pwr_reg | 0x00c1);
570*4882a593Smuzhiyun break;
571*4882a593Smuzhiyun case SND_SOC_BIAS_PREPARE:
572*4882a593Smuzhiyun /* Wait until fully charged */
573*4882a593Smuzhiyun flush_delayed_work(&wm8971->charge_work);
574*4882a593Smuzhiyun break;
575*4882a593Smuzhiyun case SND_SOC_BIAS_STANDBY:
576*4882a593Smuzhiyun if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
577*4882a593Smuzhiyun snd_soc_component_cache_sync(component);
578*4882a593Smuzhiyun /* charge output caps - set vmid to 5k for quick power up */
579*4882a593Smuzhiyun snd_soc_component_write(component, WM8971_PWR1, pwr_reg | 0x01c0);
580*4882a593Smuzhiyun queue_delayed_work(system_power_efficient_wq,
581*4882a593Smuzhiyun &wm8971->charge_work, msecs_to_jiffies(1000));
582*4882a593Smuzhiyun } else {
583*4882a593Smuzhiyun /* mute dac and set vmid to 500k, enable VREF */
584*4882a593Smuzhiyun snd_soc_component_write(component, WM8971_PWR1, pwr_reg | 0x0140);
585*4882a593Smuzhiyun }
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun break;
588*4882a593Smuzhiyun case SND_SOC_BIAS_OFF:
589*4882a593Smuzhiyun cancel_delayed_work_sync(&wm8971->charge_work);
590*4882a593Smuzhiyun snd_soc_component_write(component, WM8971_PWR1, 0x0001);
591*4882a593Smuzhiyun break;
592*4882a593Smuzhiyun }
593*4882a593Smuzhiyun return 0;
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun #define WM8971_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
597*4882a593Smuzhiyun SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
598*4882a593Smuzhiyun SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun #define WM8971_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
601*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_LE)
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun static const struct snd_soc_dai_ops wm8971_dai_ops = {
604*4882a593Smuzhiyun .hw_params = wm8971_pcm_hw_params,
605*4882a593Smuzhiyun .mute_stream = wm8971_mute,
606*4882a593Smuzhiyun .set_fmt = wm8971_set_dai_fmt,
607*4882a593Smuzhiyun .set_sysclk = wm8971_set_dai_sysclk,
608*4882a593Smuzhiyun .no_capture_mute = 1,
609*4882a593Smuzhiyun };
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun static struct snd_soc_dai_driver wm8971_dai = {
612*4882a593Smuzhiyun .name = "wm8971-hifi",
613*4882a593Smuzhiyun .playback = {
614*4882a593Smuzhiyun .stream_name = "Playback",
615*4882a593Smuzhiyun .channels_min = 1,
616*4882a593Smuzhiyun .channels_max = 2,
617*4882a593Smuzhiyun .rates = WM8971_RATES,
618*4882a593Smuzhiyun .formats = WM8971_FORMATS,},
619*4882a593Smuzhiyun .capture = {
620*4882a593Smuzhiyun .stream_name = "Capture",
621*4882a593Smuzhiyun .channels_min = 1,
622*4882a593Smuzhiyun .channels_max = 2,
623*4882a593Smuzhiyun .rates = WM8971_RATES,
624*4882a593Smuzhiyun .formats = WM8971_FORMATS,},
625*4882a593Smuzhiyun .ops = &wm8971_dai_ops,
626*4882a593Smuzhiyun };
627*4882a593Smuzhiyun
wm8971_probe(struct snd_soc_component * component)628*4882a593Smuzhiyun static int wm8971_probe(struct snd_soc_component *component)
629*4882a593Smuzhiyun {
630*4882a593Smuzhiyun struct wm8971_priv *wm8971 = snd_soc_component_get_drvdata(component);
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun INIT_DELAYED_WORK(&wm8971->charge_work, wm8971_charge_work);
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun wm8971_reset(component);
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun /* set the update bits */
637*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8971_LDAC, 0x0100, 0x0100);
638*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8971_RDAC, 0x0100, 0x0100);
639*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8971_LOUT1V, 0x0100, 0x0100);
640*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8971_ROUT1V, 0x0100, 0x0100);
641*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8971_LOUT2V, 0x0100, 0x0100);
642*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8971_ROUT2V, 0x0100, 0x0100);
643*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8971_LINVOL, 0x0100, 0x0100);
644*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8971_RINVOL, 0x0100, 0x0100);
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun return 0;
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_dev_wm8971 = {
650*4882a593Smuzhiyun .probe = wm8971_probe,
651*4882a593Smuzhiyun .set_bias_level = wm8971_set_bias_level,
652*4882a593Smuzhiyun .controls = wm8971_snd_controls,
653*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(wm8971_snd_controls),
654*4882a593Smuzhiyun .dapm_widgets = wm8971_dapm_widgets,
655*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(wm8971_dapm_widgets),
656*4882a593Smuzhiyun .dapm_routes = wm8971_dapm_routes,
657*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(wm8971_dapm_routes),
658*4882a593Smuzhiyun .suspend_bias_off = 1,
659*4882a593Smuzhiyun .idle_bias_on = 1,
660*4882a593Smuzhiyun .use_pmdown_time = 1,
661*4882a593Smuzhiyun .endianness = 1,
662*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
663*4882a593Smuzhiyun };
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun static const struct regmap_config wm8971_regmap = {
666*4882a593Smuzhiyun .reg_bits = 7,
667*4882a593Smuzhiyun .val_bits = 9,
668*4882a593Smuzhiyun .max_register = WM8971_MOUTV,
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun .reg_defaults = wm8971_reg_defaults,
671*4882a593Smuzhiyun .num_reg_defaults = ARRAY_SIZE(wm8971_reg_defaults),
672*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
673*4882a593Smuzhiyun };
674*4882a593Smuzhiyun
wm8971_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)675*4882a593Smuzhiyun static int wm8971_i2c_probe(struct i2c_client *i2c,
676*4882a593Smuzhiyun const struct i2c_device_id *id)
677*4882a593Smuzhiyun {
678*4882a593Smuzhiyun struct wm8971_priv *wm8971;
679*4882a593Smuzhiyun int ret;
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun wm8971 = devm_kzalloc(&i2c->dev, sizeof(struct wm8971_priv),
682*4882a593Smuzhiyun GFP_KERNEL);
683*4882a593Smuzhiyun if (wm8971 == NULL)
684*4882a593Smuzhiyun return -ENOMEM;
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun wm8971->regmap = devm_regmap_init_i2c(i2c, &wm8971_regmap);
687*4882a593Smuzhiyun if (IS_ERR(wm8971->regmap))
688*4882a593Smuzhiyun return PTR_ERR(wm8971->regmap);
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun i2c_set_clientdata(i2c, wm8971);
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun ret = devm_snd_soc_register_component(&i2c->dev,
693*4882a593Smuzhiyun &soc_component_dev_wm8971, &wm8971_dai, 1);
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun return ret;
696*4882a593Smuzhiyun }
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun static const struct i2c_device_id wm8971_i2c_id[] = {
699*4882a593Smuzhiyun { "wm8971", 0 },
700*4882a593Smuzhiyun { }
701*4882a593Smuzhiyun };
702*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, wm8971_i2c_id);
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun static struct i2c_driver wm8971_i2c_driver = {
705*4882a593Smuzhiyun .driver = {
706*4882a593Smuzhiyun .name = "wm8971",
707*4882a593Smuzhiyun },
708*4882a593Smuzhiyun .probe = wm8971_i2c_probe,
709*4882a593Smuzhiyun .id_table = wm8971_i2c_id,
710*4882a593Smuzhiyun };
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun module_i2c_driver(wm8971_i2c_driver);
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC WM8971 driver");
715*4882a593Smuzhiyun MODULE_AUTHOR("Lab126");
716*4882a593Smuzhiyun MODULE_LICENSE("GPL");
717