1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * wm8776.c -- WM8776 ALSA SoC Audio driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2009-12 Wolfson Microelectronics plc
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * TODO: Input ALC/limiter support
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/moduleparam.h>
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/pm.h>
17*4882a593Smuzhiyun #include <linux/i2c.h>
18*4882a593Smuzhiyun #include <linux/of_device.h>
19*4882a593Smuzhiyun #include <linux/regmap.h>
20*4882a593Smuzhiyun #include <linux/spi/spi.h>
21*4882a593Smuzhiyun #include <linux/slab.h>
22*4882a593Smuzhiyun #include <sound/core.h>
23*4882a593Smuzhiyun #include <sound/pcm.h>
24*4882a593Smuzhiyun #include <sound/pcm_params.h>
25*4882a593Smuzhiyun #include <sound/soc.h>
26*4882a593Smuzhiyun #include <sound/initval.h>
27*4882a593Smuzhiyun #include <sound/tlv.h>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #include "wm8776.h"
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun enum wm8776_chip_type {
32*4882a593Smuzhiyun WM8775 = 1,
33*4882a593Smuzhiyun WM8776,
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun /* codec private data */
37*4882a593Smuzhiyun struct wm8776_priv {
38*4882a593Smuzhiyun struct regmap *regmap;
39*4882a593Smuzhiyun int sysclk[2];
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun static const struct reg_default wm8776_reg_defaults[] = {
43*4882a593Smuzhiyun { 0, 0x79 },
44*4882a593Smuzhiyun { 1, 0x79 },
45*4882a593Smuzhiyun { 2, 0x79 },
46*4882a593Smuzhiyun { 3, 0xff },
47*4882a593Smuzhiyun { 4, 0xff },
48*4882a593Smuzhiyun { 5, 0xff },
49*4882a593Smuzhiyun { 6, 0x00 },
50*4882a593Smuzhiyun { 7, 0x90 },
51*4882a593Smuzhiyun { 8, 0x00 },
52*4882a593Smuzhiyun { 9, 0x00 },
53*4882a593Smuzhiyun { 10, 0x22 },
54*4882a593Smuzhiyun { 11, 0x22 },
55*4882a593Smuzhiyun { 12, 0x22 },
56*4882a593Smuzhiyun { 13, 0x08 },
57*4882a593Smuzhiyun { 14, 0xcf },
58*4882a593Smuzhiyun { 15, 0xcf },
59*4882a593Smuzhiyun { 16, 0x7b },
60*4882a593Smuzhiyun { 17, 0x00 },
61*4882a593Smuzhiyun { 18, 0x32 },
62*4882a593Smuzhiyun { 19, 0x00 },
63*4882a593Smuzhiyun { 20, 0xa6 },
64*4882a593Smuzhiyun { 21, 0x01 },
65*4882a593Smuzhiyun { 22, 0x01 },
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun
wm8776_volatile(struct device * dev,unsigned int reg)68*4882a593Smuzhiyun static bool wm8776_volatile(struct device *dev, unsigned int reg)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun switch (reg) {
71*4882a593Smuzhiyun case WM8776_RESET:
72*4882a593Smuzhiyun return true;
73*4882a593Smuzhiyun default:
74*4882a593Smuzhiyun return false;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
wm8776_reset(struct snd_soc_component * component)78*4882a593Smuzhiyun static int wm8776_reset(struct snd_soc_component *component)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun return snd_soc_component_write(component, WM8776_RESET, 0);
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(hp_tlv, -12100, 100, 1);
84*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
85*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(adc_tlv, -10350, 50, 1);
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8776_snd_controls[] = {
88*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8776_HPLVOL, WM8776_HPRVOL,
89*4882a593Smuzhiyun 0, 127, 0, hp_tlv),
90*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8776_DACLVOL, WM8776_DACRVOL,
91*4882a593Smuzhiyun 0, 255, 0, dac_tlv),
92*4882a593Smuzhiyun SOC_SINGLE("Digital Playback ZC Switch", WM8776_DACCTRL1, 0, 1, 0),
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun SOC_SINGLE("Deemphasis Switch", WM8776_DACCTRL2, 0, 1, 0),
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Capture Volume", WM8776_ADCLVOL, WM8776_ADCRVOL,
97*4882a593Smuzhiyun 0, 255, 0, adc_tlv),
98*4882a593Smuzhiyun SOC_DOUBLE("Capture Switch", WM8776_ADCMUX, 7, 6, 1, 1),
99*4882a593Smuzhiyun SOC_DOUBLE_R("Capture ZC Switch", WM8776_ADCLVOL, WM8776_ADCRVOL, 8, 1, 0),
100*4882a593Smuzhiyun SOC_SINGLE("Capture HPF Switch", WM8776_ADCIFCTRL, 8, 1, 1),
101*4882a593Smuzhiyun };
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun static const struct snd_kcontrol_new inmix_controls[] = {
104*4882a593Smuzhiyun SOC_DAPM_SINGLE("AIN1 Switch", WM8776_ADCMUX, 0, 1, 0),
105*4882a593Smuzhiyun SOC_DAPM_SINGLE("AIN2 Switch", WM8776_ADCMUX, 1, 1, 0),
106*4882a593Smuzhiyun SOC_DAPM_SINGLE("AIN3 Switch", WM8776_ADCMUX, 2, 1, 0),
107*4882a593Smuzhiyun SOC_DAPM_SINGLE("AIN4 Switch", WM8776_ADCMUX, 3, 1, 0),
108*4882a593Smuzhiyun SOC_DAPM_SINGLE("AIN5 Switch", WM8776_ADCMUX, 4, 1, 0),
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun static const struct snd_kcontrol_new outmix_controls[] = {
112*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC Switch", WM8776_OUTMUX, 0, 1, 0),
113*4882a593Smuzhiyun SOC_DAPM_SINGLE("AUX Switch", WM8776_OUTMUX, 1, 1, 0),
114*4882a593Smuzhiyun SOC_DAPM_SINGLE("Bypass Switch", WM8776_OUTMUX, 2, 1, 0),
115*4882a593Smuzhiyun };
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun static const struct snd_soc_dapm_widget wm8776_dapm_widgets[] = {
118*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AUX"),
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AIN1"),
121*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AIN2"),
122*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AIN3"),
123*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AIN4"),
124*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AIN5"),
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Input Mixer", WM8776_PWRDOWN, 6, 1,
127*4882a593Smuzhiyun inmix_controls, ARRAY_SIZE(inmix_controls)),
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun SND_SOC_DAPM_ADC("ADC", "Capture", WM8776_PWRDOWN, 1, 1),
130*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC", "Playback", WM8776_PWRDOWN, 2, 1),
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Output Mixer", SND_SOC_NOPM, 0, 0,
133*4882a593Smuzhiyun outmix_controls, ARRAY_SIZE(outmix_controls)),
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Headphone PGA", WM8776_PWRDOWN, 3, 1, NULL, 0),
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUT"),
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("HPOUTL"),
140*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("HPOUTR"),
141*4882a593Smuzhiyun };
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun static const struct snd_soc_dapm_route routes[] = {
144*4882a593Smuzhiyun { "Input Mixer", "AIN1 Switch", "AIN1" },
145*4882a593Smuzhiyun { "Input Mixer", "AIN2 Switch", "AIN2" },
146*4882a593Smuzhiyun { "Input Mixer", "AIN3 Switch", "AIN3" },
147*4882a593Smuzhiyun { "Input Mixer", "AIN4 Switch", "AIN4" },
148*4882a593Smuzhiyun { "Input Mixer", "AIN5 Switch", "AIN5" },
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun { "ADC", NULL, "Input Mixer" },
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun { "Output Mixer", "DAC Switch", "DAC" },
153*4882a593Smuzhiyun { "Output Mixer", "AUX Switch", "AUX" },
154*4882a593Smuzhiyun { "Output Mixer", "Bypass Switch", "Input Mixer" },
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun { "VOUT", NULL, "Output Mixer" },
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun { "Headphone PGA", NULL, "Output Mixer" },
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun { "HPOUTL", NULL, "Headphone PGA" },
161*4882a593Smuzhiyun { "HPOUTR", NULL, "Headphone PGA" },
162*4882a593Smuzhiyun };
163*4882a593Smuzhiyun
wm8776_set_fmt(struct snd_soc_dai * dai,unsigned int fmt)164*4882a593Smuzhiyun static int wm8776_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
167*4882a593Smuzhiyun int reg, iface, master;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun switch (dai->driver->id) {
170*4882a593Smuzhiyun case WM8776_DAI_DAC:
171*4882a593Smuzhiyun reg = WM8776_DACIFCTRL;
172*4882a593Smuzhiyun master = 0x80;
173*4882a593Smuzhiyun break;
174*4882a593Smuzhiyun case WM8776_DAI_ADC:
175*4882a593Smuzhiyun reg = WM8776_ADCIFCTRL;
176*4882a593Smuzhiyun master = 0x100;
177*4882a593Smuzhiyun break;
178*4882a593Smuzhiyun default:
179*4882a593Smuzhiyun return -EINVAL;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun iface = 0;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
185*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBM_CFM:
186*4882a593Smuzhiyun break;
187*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBS_CFS:
188*4882a593Smuzhiyun master = 0;
189*4882a593Smuzhiyun break;
190*4882a593Smuzhiyun default:
191*4882a593Smuzhiyun return -EINVAL;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
195*4882a593Smuzhiyun case SND_SOC_DAIFMT_I2S:
196*4882a593Smuzhiyun iface |= 0x0002;
197*4882a593Smuzhiyun break;
198*4882a593Smuzhiyun case SND_SOC_DAIFMT_RIGHT_J:
199*4882a593Smuzhiyun break;
200*4882a593Smuzhiyun case SND_SOC_DAIFMT_LEFT_J:
201*4882a593Smuzhiyun iface |= 0x0001;
202*4882a593Smuzhiyun break;
203*4882a593Smuzhiyun default:
204*4882a593Smuzhiyun return -EINVAL;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
208*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_NF:
209*4882a593Smuzhiyun break;
210*4882a593Smuzhiyun case SND_SOC_DAIFMT_IB_IF:
211*4882a593Smuzhiyun iface |= 0x00c;
212*4882a593Smuzhiyun break;
213*4882a593Smuzhiyun case SND_SOC_DAIFMT_IB_NF:
214*4882a593Smuzhiyun iface |= 0x008;
215*4882a593Smuzhiyun break;
216*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_IF:
217*4882a593Smuzhiyun iface |= 0x004;
218*4882a593Smuzhiyun break;
219*4882a593Smuzhiyun default:
220*4882a593Smuzhiyun return -EINVAL;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun /* Finally, write out the values */
224*4882a593Smuzhiyun snd_soc_component_update_bits(component, reg, 0xf, iface);
225*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8776_MSTRCTRL, 0x180, master);
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun return 0;
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun static int mclk_ratios[] = {
231*4882a593Smuzhiyun 128,
232*4882a593Smuzhiyun 192,
233*4882a593Smuzhiyun 256,
234*4882a593Smuzhiyun 384,
235*4882a593Smuzhiyun 512,
236*4882a593Smuzhiyun 768,
237*4882a593Smuzhiyun };
238*4882a593Smuzhiyun
wm8776_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)239*4882a593Smuzhiyun static int wm8776_hw_params(struct snd_pcm_substream *substream,
240*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
241*4882a593Smuzhiyun struct snd_soc_dai *dai)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
244*4882a593Smuzhiyun struct wm8776_priv *wm8776 = snd_soc_component_get_drvdata(component);
245*4882a593Smuzhiyun int iface_reg, iface;
246*4882a593Smuzhiyun int ratio_shift, master;
247*4882a593Smuzhiyun int i;
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun switch (dai->driver->id) {
250*4882a593Smuzhiyun case WM8776_DAI_DAC:
251*4882a593Smuzhiyun iface_reg = WM8776_DACIFCTRL;
252*4882a593Smuzhiyun master = 0x80;
253*4882a593Smuzhiyun ratio_shift = 4;
254*4882a593Smuzhiyun break;
255*4882a593Smuzhiyun case WM8776_DAI_ADC:
256*4882a593Smuzhiyun iface_reg = WM8776_ADCIFCTRL;
257*4882a593Smuzhiyun master = 0x100;
258*4882a593Smuzhiyun ratio_shift = 0;
259*4882a593Smuzhiyun break;
260*4882a593Smuzhiyun default:
261*4882a593Smuzhiyun return -EINVAL;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun /* Set word length */
265*4882a593Smuzhiyun switch (params_width(params)) {
266*4882a593Smuzhiyun case 16:
267*4882a593Smuzhiyun iface = 0;
268*4882a593Smuzhiyun break;
269*4882a593Smuzhiyun case 20:
270*4882a593Smuzhiyun iface = 0x10;
271*4882a593Smuzhiyun break;
272*4882a593Smuzhiyun case 24:
273*4882a593Smuzhiyun iface = 0x20;
274*4882a593Smuzhiyun break;
275*4882a593Smuzhiyun case 32:
276*4882a593Smuzhiyun iface = 0x30;
277*4882a593Smuzhiyun break;
278*4882a593Smuzhiyun default:
279*4882a593Smuzhiyun dev_err(component->dev, "Unsupported sample size: %i\n",
280*4882a593Smuzhiyun params_width(params));
281*4882a593Smuzhiyun return -EINVAL;
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun /* Only need to set MCLK/LRCLK ratio if we're master */
285*4882a593Smuzhiyun if (snd_soc_component_read(component, WM8776_MSTRCTRL) & master) {
286*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(mclk_ratios); i++) {
287*4882a593Smuzhiyun if (wm8776->sysclk[dai->driver->id] / params_rate(params)
288*4882a593Smuzhiyun == mclk_ratios[i])
289*4882a593Smuzhiyun break;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun if (i == ARRAY_SIZE(mclk_ratios)) {
293*4882a593Smuzhiyun dev_err(component->dev,
294*4882a593Smuzhiyun "Unable to configure MCLK ratio %d/%d\n",
295*4882a593Smuzhiyun wm8776->sysclk[dai->driver->id], params_rate(params));
296*4882a593Smuzhiyun return -EINVAL;
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun dev_dbg(component->dev, "MCLK is %dfs\n", mclk_ratios[i]);
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8776_MSTRCTRL,
302*4882a593Smuzhiyun 0x7 << ratio_shift, i << ratio_shift);
303*4882a593Smuzhiyun } else {
304*4882a593Smuzhiyun dev_dbg(component->dev, "DAI in slave mode\n");
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun snd_soc_component_update_bits(component, iface_reg, 0x30, iface);
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun return 0;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
wm8776_mute(struct snd_soc_dai * dai,int mute,int direction)312*4882a593Smuzhiyun static int wm8776_mute(struct snd_soc_dai *dai, int mute, int direction)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun return snd_soc_component_write(component, WM8776_DACMUTE, !!mute);
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun
wm8776_set_sysclk(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)319*4882a593Smuzhiyun static int wm8776_set_sysclk(struct snd_soc_dai *dai,
320*4882a593Smuzhiyun int clk_id, unsigned int freq, int dir)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
323*4882a593Smuzhiyun struct wm8776_priv *wm8776 = snd_soc_component_get_drvdata(component);
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun if (WARN_ON(dai->driver->id >= ARRAY_SIZE(wm8776->sysclk)))
326*4882a593Smuzhiyun return -EINVAL;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun wm8776->sysclk[dai->driver->id] = freq;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun return 0;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun
wm8776_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)333*4882a593Smuzhiyun static int wm8776_set_bias_level(struct snd_soc_component *component,
334*4882a593Smuzhiyun enum snd_soc_bias_level level)
335*4882a593Smuzhiyun {
336*4882a593Smuzhiyun struct wm8776_priv *wm8776 = snd_soc_component_get_drvdata(component);
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun switch (level) {
339*4882a593Smuzhiyun case SND_SOC_BIAS_ON:
340*4882a593Smuzhiyun break;
341*4882a593Smuzhiyun case SND_SOC_BIAS_PREPARE:
342*4882a593Smuzhiyun break;
343*4882a593Smuzhiyun case SND_SOC_BIAS_STANDBY:
344*4882a593Smuzhiyun if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
345*4882a593Smuzhiyun regcache_sync(wm8776->regmap);
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun /* Disable the global powerdown; DAPM does the rest */
348*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8776_PWRDOWN, 1, 0);
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun break;
352*4882a593Smuzhiyun case SND_SOC_BIAS_OFF:
353*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8776_PWRDOWN, 1, 1);
354*4882a593Smuzhiyun break;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun return 0;
358*4882a593Smuzhiyun }
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun #define WM8776_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
361*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun static const struct snd_soc_dai_ops wm8776_dac_ops = {
364*4882a593Smuzhiyun .mute_stream = wm8776_mute,
365*4882a593Smuzhiyun .hw_params = wm8776_hw_params,
366*4882a593Smuzhiyun .set_fmt = wm8776_set_fmt,
367*4882a593Smuzhiyun .set_sysclk = wm8776_set_sysclk,
368*4882a593Smuzhiyun .no_capture_mute = 1,
369*4882a593Smuzhiyun };
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun static const struct snd_soc_dai_ops wm8776_adc_ops = {
372*4882a593Smuzhiyun .hw_params = wm8776_hw_params,
373*4882a593Smuzhiyun .set_fmt = wm8776_set_fmt,
374*4882a593Smuzhiyun .set_sysclk = wm8776_set_sysclk,
375*4882a593Smuzhiyun };
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun static struct snd_soc_dai_driver wm8776_dai[] = {
378*4882a593Smuzhiyun {
379*4882a593Smuzhiyun .name = "wm8776-hifi-playback",
380*4882a593Smuzhiyun .id = WM8776_DAI_DAC,
381*4882a593Smuzhiyun .playback = {
382*4882a593Smuzhiyun .stream_name = "Playback",
383*4882a593Smuzhiyun .channels_min = 2,
384*4882a593Smuzhiyun .channels_max = 2,
385*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_CONTINUOUS,
386*4882a593Smuzhiyun .rate_min = 32000,
387*4882a593Smuzhiyun .rate_max = 192000,
388*4882a593Smuzhiyun .formats = WM8776_FORMATS,
389*4882a593Smuzhiyun },
390*4882a593Smuzhiyun .ops = &wm8776_dac_ops,
391*4882a593Smuzhiyun },
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun .name = "wm8776-hifi-capture",
394*4882a593Smuzhiyun .id = WM8776_DAI_ADC,
395*4882a593Smuzhiyun .capture = {
396*4882a593Smuzhiyun .stream_name = "Capture",
397*4882a593Smuzhiyun .channels_min = 2,
398*4882a593Smuzhiyun .channels_max = 2,
399*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_CONTINUOUS,
400*4882a593Smuzhiyun .rate_min = 32000,
401*4882a593Smuzhiyun .rate_max = 96000,
402*4882a593Smuzhiyun .formats = WM8776_FORMATS,
403*4882a593Smuzhiyun },
404*4882a593Smuzhiyun .ops = &wm8776_adc_ops,
405*4882a593Smuzhiyun },
406*4882a593Smuzhiyun };
407*4882a593Smuzhiyun
wm8776_probe(struct snd_soc_component * component)408*4882a593Smuzhiyun static int wm8776_probe(struct snd_soc_component *component)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun int ret = 0;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun ret = wm8776_reset(component);
413*4882a593Smuzhiyun if (ret < 0) {
414*4882a593Smuzhiyun dev_err(component->dev, "Failed to issue reset: %d\n", ret);
415*4882a593Smuzhiyun return ret;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun /* Latch the update bits; right channel only since we always
419*4882a593Smuzhiyun * update both. */
420*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8776_HPRVOL, 0x100, 0x100);
421*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8776_DACRVOL, 0x100, 0x100);
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun return ret;
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_dev_wm8776 = {
427*4882a593Smuzhiyun .probe = wm8776_probe,
428*4882a593Smuzhiyun .set_bias_level = wm8776_set_bias_level,
429*4882a593Smuzhiyun .controls = wm8776_snd_controls,
430*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(wm8776_snd_controls),
431*4882a593Smuzhiyun .dapm_widgets = wm8776_dapm_widgets,
432*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(wm8776_dapm_widgets),
433*4882a593Smuzhiyun .dapm_routes = routes,
434*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(routes),
435*4882a593Smuzhiyun .suspend_bias_off = 1,
436*4882a593Smuzhiyun .idle_bias_on = 1,
437*4882a593Smuzhiyun .use_pmdown_time = 1,
438*4882a593Smuzhiyun .endianness = 1,
439*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
440*4882a593Smuzhiyun };
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun static const struct of_device_id wm8776_of_match[] = {
443*4882a593Smuzhiyun { .compatible = "wlf,wm8776", },
444*4882a593Smuzhiyun { }
445*4882a593Smuzhiyun };
446*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, wm8776_of_match);
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun static const struct regmap_config wm8776_regmap = {
449*4882a593Smuzhiyun .reg_bits = 7,
450*4882a593Smuzhiyun .val_bits = 9,
451*4882a593Smuzhiyun .max_register = WM8776_RESET,
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun .reg_defaults = wm8776_reg_defaults,
454*4882a593Smuzhiyun .num_reg_defaults = ARRAY_SIZE(wm8776_reg_defaults),
455*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun .volatile_reg = wm8776_volatile,
458*4882a593Smuzhiyun };
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun #if defined(CONFIG_SPI_MASTER)
wm8776_spi_probe(struct spi_device * spi)461*4882a593Smuzhiyun static int wm8776_spi_probe(struct spi_device *spi)
462*4882a593Smuzhiyun {
463*4882a593Smuzhiyun struct wm8776_priv *wm8776;
464*4882a593Smuzhiyun int ret;
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun wm8776 = devm_kzalloc(&spi->dev, sizeof(struct wm8776_priv),
467*4882a593Smuzhiyun GFP_KERNEL);
468*4882a593Smuzhiyun if (wm8776 == NULL)
469*4882a593Smuzhiyun return -ENOMEM;
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun wm8776->regmap = devm_regmap_init_spi(spi, &wm8776_regmap);
472*4882a593Smuzhiyun if (IS_ERR(wm8776->regmap))
473*4882a593Smuzhiyun return PTR_ERR(wm8776->regmap);
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun spi_set_drvdata(spi, wm8776);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun ret = devm_snd_soc_register_component(&spi->dev,
478*4882a593Smuzhiyun &soc_component_dev_wm8776, wm8776_dai, ARRAY_SIZE(wm8776_dai));
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun return ret;
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun static struct spi_driver wm8776_spi_driver = {
484*4882a593Smuzhiyun .driver = {
485*4882a593Smuzhiyun .name = "wm8776",
486*4882a593Smuzhiyun .of_match_table = wm8776_of_match,
487*4882a593Smuzhiyun },
488*4882a593Smuzhiyun .probe = wm8776_spi_probe,
489*4882a593Smuzhiyun };
490*4882a593Smuzhiyun #endif /* CONFIG_SPI_MASTER */
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_I2C)
wm8776_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)493*4882a593Smuzhiyun static int wm8776_i2c_probe(struct i2c_client *i2c,
494*4882a593Smuzhiyun const struct i2c_device_id *id)
495*4882a593Smuzhiyun {
496*4882a593Smuzhiyun struct wm8776_priv *wm8776;
497*4882a593Smuzhiyun int ret;
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun wm8776 = devm_kzalloc(&i2c->dev, sizeof(struct wm8776_priv),
500*4882a593Smuzhiyun GFP_KERNEL);
501*4882a593Smuzhiyun if (wm8776 == NULL)
502*4882a593Smuzhiyun return -ENOMEM;
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun wm8776->regmap = devm_regmap_init_i2c(i2c, &wm8776_regmap);
505*4882a593Smuzhiyun if (IS_ERR(wm8776->regmap))
506*4882a593Smuzhiyun return PTR_ERR(wm8776->regmap);
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun i2c_set_clientdata(i2c, wm8776);
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun ret = devm_snd_soc_register_component(&i2c->dev,
511*4882a593Smuzhiyun &soc_component_dev_wm8776, wm8776_dai, ARRAY_SIZE(wm8776_dai));
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun return ret;
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun static const struct i2c_device_id wm8776_i2c_id[] = {
517*4882a593Smuzhiyun { "wm8775", WM8775 },
518*4882a593Smuzhiyun { "wm8776", WM8776 },
519*4882a593Smuzhiyun { }
520*4882a593Smuzhiyun };
521*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, wm8776_i2c_id);
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun static struct i2c_driver wm8776_i2c_driver = {
524*4882a593Smuzhiyun .driver = {
525*4882a593Smuzhiyun .name = "wm8776",
526*4882a593Smuzhiyun .of_match_table = wm8776_of_match,
527*4882a593Smuzhiyun },
528*4882a593Smuzhiyun .probe = wm8776_i2c_probe,
529*4882a593Smuzhiyun .id_table = wm8776_i2c_id,
530*4882a593Smuzhiyun };
531*4882a593Smuzhiyun #endif
532*4882a593Smuzhiyun
wm8776_modinit(void)533*4882a593Smuzhiyun static int __init wm8776_modinit(void)
534*4882a593Smuzhiyun {
535*4882a593Smuzhiyun int ret = 0;
536*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_I2C)
537*4882a593Smuzhiyun ret = i2c_add_driver(&wm8776_i2c_driver);
538*4882a593Smuzhiyun if (ret != 0) {
539*4882a593Smuzhiyun printk(KERN_ERR "Failed to register wm8776 I2C driver: %d\n",
540*4882a593Smuzhiyun ret);
541*4882a593Smuzhiyun }
542*4882a593Smuzhiyun #endif
543*4882a593Smuzhiyun #if defined(CONFIG_SPI_MASTER)
544*4882a593Smuzhiyun ret = spi_register_driver(&wm8776_spi_driver);
545*4882a593Smuzhiyun if (ret != 0) {
546*4882a593Smuzhiyun printk(KERN_ERR "Failed to register wm8776 SPI driver: %d\n",
547*4882a593Smuzhiyun ret);
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun #endif
550*4882a593Smuzhiyun return ret;
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun module_init(wm8776_modinit);
553*4882a593Smuzhiyun
wm8776_exit(void)554*4882a593Smuzhiyun static void __exit wm8776_exit(void)
555*4882a593Smuzhiyun {
556*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_I2C)
557*4882a593Smuzhiyun i2c_del_driver(&wm8776_i2c_driver);
558*4882a593Smuzhiyun #endif
559*4882a593Smuzhiyun #if defined(CONFIG_SPI_MASTER)
560*4882a593Smuzhiyun spi_unregister_driver(&wm8776_spi_driver);
561*4882a593Smuzhiyun #endif
562*4882a593Smuzhiyun }
563*4882a593Smuzhiyun module_exit(wm8776_exit);
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC WM8776 driver");
566*4882a593Smuzhiyun MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
567*4882a593Smuzhiyun MODULE_LICENSE("GPL");
568