1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * wm8770.c -- WM8770 ALSA SoC Audio driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2010 Wolfson Microelectronics plc
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/moduleparam.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/delay.h>
14*4882a593Smuzhiyun #include <linux/of_device.h>
15*4882a593Smuzhiyun #include <linux/pm.h>
16*4882a593Smuzhiyun #include <linux/spi/spi.h>
17*4882a593Smuzhiyun #include <linux/regmap.h>
18*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
19*4882a593Smuzhiyun #include <linux/slab.h>
20*4882a593Smuzhiyun #include <sound/core.h>
21*4882a593Smuzhiyun #include <sound/pcm.h>
22*4882a593Smuzhiyun #include <sound/pcm_params.h>
23*4882a593Smuzhiyun #include <sound/soc.h>
24*4882a593Smuzhiyun #include <sound/initval.h>
25*4882a593Smuzhiyun #include <sound/tlv.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #include "wm8770.h"
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define WM8770_NUM_SUPPLIES 3
30*4882a593Smuzhiyun static const char *wm8770_supply_names[WM8770_NUM_SUPPLIES] = {
31*4882a593Smuzhiyun "AVDD1",
32*4882a593Smuzhiyun "AVDD2",
33*4882a593Smuzhiyun "DVDD"
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun static const struct reg_default wm8770_reg_defaults[] = {
37*4882a593Smuzhiyun { 0, 0x7f },
38*4882a593Smuzhiyun { 1, 0x7f },
39*4882a593Smuzhiyun { 2, 0x7f },
40*4882a593Smuzhiyun { 3, 0x7f },
41*4882a593Smuzhiyun { 4, 0x7f },
42*4882a593Smuzhiyun { 5, 0x7f },
43*4882a593Smuzhiyun { 6, 0x7f },
44*4882a593Smuzhiyun { 7, 0x7f },
45*4882a593Smuzhiyun { 8, 0x7f },
46*4882a593Smuzhiyun { 9, 0xff },
47*4882a593Smuzhiyun { 10, 0xff },
48*4882a593Smuzhiyun { 11, 0xff },
49*4882a593Smuzhiyun { 12, 0xff },
50*4882a593Smuzhiyun { 13, 0xff },
51*4882a593Smuzhiyun { 14, 0xff },
52*4882a593Smuzhiyun { 15, 0xff },
53*4882a593Smuzhiyun { 16, 0xff },
54*4882a593Smuzhiyun { 17, 0xff },
55*4882a593Smuzhiyun { 18, 0 },
56*4882a593Smuzhiyun { 19, 0x90 },
57*4882a593Smuzhiyun { 20, 0 },
58*4882a593Smuzhiyun { 21, 0 },
59*4882a593Smuzhiyun { 22, 0x22 },
60*4882a593Smuzhiyun { 23, 0x22 },
61*4882a593Smuzhiyun { 24, 0x3e },
62*4882a593Smuzhiyun { 25, 0xc },
63*4882a593Smuzhiyun { 26, 0xc },
64*4882a593Smuzhiyun { 27, 0x100 },
65*4882a593Smuzhiyun { 28, 0x189 },
66*4882a593Smuzhiyun { 29, 0x189 },
67*4882a593Smuzhiyun { 30, 0x8770 },
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun
wm8770_volatile_reg(struct device * dev,unsigned int reg)70*4882a593Smuzhiyun static bool wm8770_volatile_reg(struct device *dev, unsigned int reg)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun switch (reg) {
73*4882a593Smuzhiyun case WM8770_RESET:
74*4882a593Smuzhiyun return true;
75*4882a593Smuzhiyun default:
76*4882a593Smuzhiyun return false;
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun struct wm8770_priv {
81*4882a593Smuzhiyun struct regmap *regmap;
82*4882a593Smuzhiyun struct regulator_bulk_data supplies[WM8770_NUM_SUPPLIES];
83*4882a593Smuzhiyun struct notifier_block disable_nb[WM8770_NUM_SUPPLIES];
84*4882a593Smuzhiyun struct snd_soc_component *component;
85*4882a593Smuzhiyun int sysclk;
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun static int vout12supply_event(struct snd_soc_dapm_widget *w,
89*4882a593Smuzhiyun struct snd_kcontrol *kcontrol, int event);
90*4882a593Smuzhiyun static int vout34supply_event(struct snd_soc_dapm_widget *w,
91*4882a593Smuzhiyun struct snd_kcontrol *kcontrol, int event);
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun /*
94*4882a593Smuzhiyun * We can't use the same notifier block for more than one supply and
95*4882a593Smuzhiyun * there's no way I can see to get from a callback to the caller
96*4882a593Smuzhiyun * except container_of().
97*4882a593Smuzhiyun */
98*4882a593Smuzhiyun #define WM8770_REGULATOR_EVENT(n) \
99*4882a593Smuzhiyun static int wm8770_regulator_event_##n(struct notifier_block *nb, \
100*4882a593Smuzhiyun unsigned long event, void *data) \
101*4882a593Smuzhiyun { \
102*4882a593Smuzhiyun struct wm8770_priv *wm8770 = container_of(nb, struct wm8770_priv, \
103*4882a593Smuzhiyun disable_nb[n]); \
104*4882a593Smuzhiyun if (event & REGULATOR_EVENT_DISABLE) { \
105*4882a593Smuzhiyun regcache_mark_dirty(wm8770->regmap); \
106*4882a593Smuzhiyun } \
107*4882a593Smuzhiyun return 0; \
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun WM8770_REGULATOR_EVENT(0)
111*4882a593Smuzhiyun WM8770_REGULATOR_EVENT(1)
112*4882a593Smuzhiyun WM8770_REGULATOR_EVENT(2)
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(adc_tlv, -1200, 100, 0);
115*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(dac_dig_tlv, -12750, 50, 1);
116*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(dac_alg_tlv, -12700, 100, 1);
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun static const char *dac_phase_text[][2] = {
119*4882a593Smuzhiyun { "DAC1 Normal", "DAC1 Inverted" },
120*4882a593Smuzhiyun { "DAC2 Normal", "DAC2 Inverted" },
121*4882a593Smuzhiyun { "DAC3 Normal", "DAC3 Inverted" },
122*4882a593Smuzhiyun { "DAC4 Normal", "DAC4 Inverted" },
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun static const struct soc_enum dac_phase[] = {
126*4882a593Smuzhiyun SOC_ENUM_DOUBLE(WM8770_DACPHASE, 0, 1, 2, dac_phase_text[0]),
127*4882a593Smuzhiyun SOC_ENUM_DOUBLE(WM8770_DACPHASE, 2, 3, 2, dac_phase_text[1]),
128*4882a593Smuzhiyun SOC_ENUM_DOUBLE(WM8770_DACPHASE, 4, 5, 2, dac_phase_text[2]),
129*4882a593Smuzhiyun SOC_ENUM_DOUBLE(WM8770_DACPHASE, 6, 7, 2, dac_phase_text[3]),
130*4882a593Smuzhiyun };
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8770_snd_controls[] = {
133*4882a593Smuzhiyun /* global DAC playback controls */
134*4882a593Smuzhiyun SOC_SINGLE_TLV("DAC Playback Volume", WM8770_MSDIGVOL, 0, 255, 0,
135*4882a593Smuzhiyun dac_dig_tlv),
136*4882a593Smuzhiyun SOC_SINGLE("DAC Playback Switch", WM8770_DACMUTE, 4, 1, 1),
137*4882a593Smuzhiyun SOC_SINGLE("DAC Playback ZC Switch", WM8770_DACCTRL1, 0, 1, 0),
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun /* global VOUT playback controls */
140*4882a593Smuzhiyun SOC_SINGLE_TLV("VOUT Playback Volume", WM8770_MSALGVOL, 0, 127, 0,
141*4882a593Smuzhiyun dac_alg_tlv),
142*4882a593Smuzhiyun SOC_SINGLE("VOUT Playback ZC Switch", WM8770_MSALGVOL, 7, 1, 0),
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /* VOUT1/2/3/4 specific controls */
145*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("VOUT1 Playback Volume", WM8770_VOUT1LVOL,
146*4882a593Smuzhiyun WM8770_VOUT1RVOL, 0, 127, 0, dac_alg_tlv),
147*4882a593Smuzhiyun SOC_DOUBLE_R("VOUT1 Playback ZC Switch", WM8770_VOUT1LVOL,
148*4882a593Smuzhiyun WM8770_VOUT1RVOL, 7, 1, 0),
149*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("VOUT2 Playback Volume", WM8770_VOUT2LVOL,
150*4882a593Smuzhiyun WM8770_VOUT2RVOL, 0, 127, 0, dac_alg_tlv),
151*4882a593Smuzhiyun SOC_DOUBLE_R("VOUT2 Playback ZC Switch", WM8770_VOUT2LVOL,
152*4882a593Smuzhiyun WM8770_VOUT2RVOL, 7, 1, 0),
153*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("VOUT3 Playback Volume", WM8770_VOUT3LVOL,
154*4882a593Smuzhiyun WM8770_VOUT3RVOL, 0, 127, 0, dac_alg_tlv),
155*4882a593Smuzhiyun SOC_DOUBLE_R("VOUT3 Playback ZC Switch", WM8770_VOUT3LVOL,
156*4882a593Smuzhiyun WM8770_VOUT3RVOL, 7, 1, 0),
157*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("VOUT4 Playback Volume", WM8770_VOUT4LVOL,
158*4882a593Smuzhiyun WM8770_VOUT4RVOL, 0, 127, 0, dac_alg_tlv),
159*4882a593Smuzhiyun SOC_DOUBLE_R("VOUT4 Playback ZC Switch", WM8770_VOUT4LVOL,
160*4882a593Smuzhiyun WM8770_VOUT4RVOL, 7, 1, 0),
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun /* DAC1/2/3/4 specific controls */
163*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("DAC1 Playback Volume", WM8770_DAC1LVOL,
164*4882a593Smuzhiyun WM8770_DAC1RVOL, 0, 255, 0, dac_dig_tlv),
165*4882a593Smuzhiyun SOC_SINGLE("DAC1 Deemphasis Switch", WM8770_DACCTRL2, 0, 1, 0),
166*4882a593Smuzhiyun SOC_ENUM("DAC1 Phase", dac_phase[0]),
167*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("DAC2 Playback Volume", WM8770_DAC2LVOL,
168*4882a593Smuzhiyun WM8770_DAC2RVOL, 0, 255, 0, dac_dig_tlv),
169*4882a593Smuzhiyun SOC_SINGLE("DAC2 Deemphasis Switch", WM8770_DACCTRL2, 1, 1, 0),
170*4882a593Smuzhiyun SOC_ENUM("DAC2 Phase", dac_phase[1]),
171*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("DAC3 Playback Volume", WM8770_DAC3LVOL,
172*4882a593Smuzhiyun WM8770_DAC3RVOL, 0, 255, 0, dac_dig_tlv),
173*4882a593Smuzhiyun SOC_SINGLE("DAC3 Deemphasis Switch", WM8770_DACCTRL2, 2, 1, 0),
174*4882a593Smuzhiyun SOC_ENUM("DAC3 Phase", dac_phase[2]),
175*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("DAC4 Playback Volume", WM8770_DAC4LVOL,
176*4882a593Smuzhiyun WM8770_DAC4RVOL, 0, 255, 0, dac_dig_tlv),
177*4882a593Smuzhiyun SOC_SINGLE("DAC4 Deemphasis Switch", WM8770_DACCTRL2, 3, 1, 0),
178*4882a593Smuzhiyun SOC_ENUM("DAC4 Phase", dac_phase[3]),
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun /* ADC specific controls */
181*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Capture Volume", WM8770_ADCLCTRL, WM8770_ADCRCTRL,
182*4882a593Smuzhiyun 0, 31, 0, adc_tlv),
183*4882a593Smuzhiyun SOC_DOUBLE_R("Capture Switch", WM8770_ADCLCTRL, WM8770_ADCRCTRL,
184*4882a593Smuzhiyun 5, 1, 1),
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun /* other controls */
187*4882a593Smuzhiyun SOC_SINGLE("ADC 128x Oversampling Switch", WM8770_MSTRCTRL, 3, 1, 0),
188*4882a593Smuzhiyun SOC_SINGLE("ADC Highpass Filter Switch", WM8770_IFACECTRL, 8, 1, 1)
189*4882a593Smuzhiyun };
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun static const char *ain_text[] = {
192*4882a593Smuzhiyun "AIN1", "AIN2", "AIN3", "AIN4",
193*4882a593Smuzhiyun "AIN5", "AIN6", "AIN7", "AIN8"
194*4882a593Smuzhiyun };
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun static SOC_ENUM_DOUBLE_DECL(ain_enum,
197*4882a593Smuzhiyun WM8770_ADCMUX, 0, 4, ain_text);
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun static const struct snd_kcontrol_new ain_mux =
200*4882a593Smuzhiyun SOC_DAPM_ENUM("Capture Mux", ain_enum);
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun static const struct snd_kcontrol_new vout1_mix_controls[] = {
203*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC1 Switch", WM8770_OUTMUX1, 0, 1, 0),
204*4882a593Smuzhiyun SOC_DAPM_SINGLE("AUX1 Switch", WM8770_OUTMUX1, 1, 1, 0),
205*4882a593Smuzhiyun SOC_DAPM_SINGLE("Bypass Switch", WM8770_OUTMUX1, 2, 1, 0)
206*4882a593Smuzhiyun };
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun static const struct snd_kcontrol_new vout2_mix_controls[] = {
209*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC2 Switch", WM8770_OUTMUX1, 3, 1, 0),
210*4882a593Smuzhiyun SOC_DAPM_SINGLE("AUX2 Switch", WM8770_OUTMUX1, 4, 1, 0),
211*4882a593Smuzhiyun SOC_DAPM_SINGLE("Bypass Switch", WM8770_OUTMUX1, 5, 1, 0)
212*4882a593Smuzhiyun };
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun static const struct snd_kcontrol_new vout3_mix_controls[] = {
215*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC3 Switch", WM8770_OUTMUX2, 0, 1, 0),
216*4882a593Smuzhiyun SOC_DAPM_SINGLE("AUX3 Switch", WM8770_OUTMUX2, 1, 1, 0),
217*4882a593Smuzhiyun SOC_DAPM_SINGLE("Bypass Switch", WM8770_OUTMUX2, 2, 1, 0)
218*4882a593Smuzhiyun };
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun static const struct snd_kcontrol_new vout4_mix_controls[] = {
221*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC4 Switch", WM8770_OUTMUX2, 3, 1, 0),
222*4882a593Smuzhiyun SOC_DAPM_SINGLE("Bypass Switch", WM8770_OUTMUX2, 4, 1, 0)
223*4882a593Smuzhiyun };
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun static const struct snd_soc_dapm_widget wm8770_dapm_widgets[] = {
226*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AUX1"),
227*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AUX2"),
228*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AUX3"),
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AIN1"),
231*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AIN2"),
232*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AIN3"),
233*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AIN4"),
234*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AIN5"),
235*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AIN6"),
236*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AIN7"),
237*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("AIN8"),
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Capture Mux", WM8770_ADCMUX, 8, 1, &ain_mux),
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun SND_SOC_DAPM_ADC("ADC", "Capture", WM8770_PWDNCTRL, 1, 1),
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC1", "Playback", WM8770_PWDNCTRL, 2, 1),
244*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC2", "Playback", WM8770_PWDNCTRL, 3, 1),
245*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC3", "Playback", WM8770_PWDNCTRL, 4, 1),
246*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC4", "Playback", WM8770_PWDNCTRL, 5, 1),
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("VOUT12 Supply", SND_SOC_NOPM, 0, 0,
249*4882a593Smuzhiyun vout12supply_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
250*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("VOUT34 Supply", SND_SOC_NOPM, 0, 0,
251*4882a593Smuzhiyun vout34supply_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("VOUT1 Mixer", SND_SOC_NOPM, 0, 0,
254*4882a593Smuzhiyun vout1_mix_controls, ARRAY_SIZE(vout1_mix_controls)),
255*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("VOUT2 Mixer", SND_SOC_NOPM, 0, 0,
256*4882a593Smuzhiyun vout2_mix_controls, ARRAY_SIZE(vout2_mix_controls)),
257*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("VOUT3 Mixer", SND_SOC_NOPM, 0, 0,
258*4882a593Smuzhiyun vout3_mix_controls, ARRAY_SIZE(vout3_mix_controls)),
259*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("VOUT4 Mixer", SND_SOC_NOPM, 0, 0,
260*4882a593Smuzhiyun vout4_mix_controls, ARRAY_SIZE(vout4_mix_controls)),
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUT1"),
263*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUT2"),
264*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUT3"),
265*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUT4")
266*4882a593Smuzhiyun };
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun static const struct snd_soc_dapm_route wm8770_intercon[] = {
269*4882a593Smuzhiyun { "Capture Mux", "AIN1", "AIN1" },
270*4882a593Smuzhiyun { "Capture Mux", "AIN2", "AIN2" },
271*4882a593Smuzhiyun { "Capture Mux", "AIN3", "AIN3" },
272*4882a593Smuzhiyun { "Capture Mux", "AIN4", "AIN4" },
273*4882a593Smuzhiyun { "Capture Mux", "AIN5", "AIN5" },
274*4882a593Smuzhiyun { "Capture Mux", "AIN6", "AIN6" },
275*4882a593Smuzhiyun { "Capture Mux", "AIN7", "AIN7" },
276*4882a593Smuzhiyun { "Capture Mux", "AIN8", "AIN8" },
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun { "ADC", NULL, "Capture Mux" },
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun { "VOUT1 Mixer", NULL, "VOUT12 Supply" },
281*4882a593Smuzhiyun { "VOUT1 Mixer", "DAC1 Switch", "DAC1" },
282*4882a593Smuzhiyun { "VOUT1 Mixer", "AUX1 Switch", "AUX1" },
283*4882a593Smuzhiyun { "VOUT1 Mixer", "Bypass Switch", "Capture Mux" },
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun { "VOUT2 Mixer", NULL, "VOUT12 Supply" },
286*4882a593Smuzhiyun { "VOUT2 Mixer", "DAC2 Switch", "DAC2" },
287*4882a593Smuzhiyun { "VOUT2 Mixer", "AUX2 Switch", "AUX2" },
288*4882a593Smuzhiyun { "VOUT2 Mixer", "Bypass Switch", "Capture Mux" },
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun { "VOUT3 Mixer", NULL, "VOUT34 Supply" },
291*4882a593Smuzhiyun { "VOUT3 Mixer", "DAC3 Switch", "DAC3" },
292*4882a593Smuzhiyun { "VOUT3 Mixer", "AUX3 Switch", "AUX3" },
293*4882a593Smuzhiyun { "VOUT3 Mixer", "Bypass Switch", "Capture Mux" },
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun { "VOUT4 Mixer", NULL, "VOUT34 Supply" },
296*4882a593Smuzhiyun { "VOUT4 Mixer", "DAC4 Switch", "DAC4" },
297*4882a593Smuzhiyun { "VOUT4 Mixer", "Bypass Switch", "Capture Mux" },
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun { "VOUT1", NULL, "VOUT1 Mixer" },
300*4882a593Smuzhiyun { "VOUT2", NULL, "VOUT2 Mixer" },
301*4882a593Smuzhiyun { "VOUT3", NULL, "VOUT3 Mixer" },
302*4882a593Smuzhiyun { "VOUT4", NULL, "VOUT4 Mixer" }
303*4882a593Smuzhiyun };
304*4882a593Smuzhiyun
vout12supply_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)305*4882a593Smuzhiyun static int vout12supply_event(struct snd_soc_dapm_widget *w,
306*4882a593Smuzhiyun struct snd_kcontrol *kcontrol, int event)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun switch (event) {
311*4882a593Smuzhiyun case SND_SOC_DAPM_PRE_PMU:
312*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_OUTMUX1, 0x180, 0);
313*4882a593Smuzhiyun break;
314*4882a593Smuzhiyun case SND_SOC_DAPM_POST_PMD:
315*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_OUTMUX1, 0x180, 0x180);
316*4882a593Smuzhiyun break;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun return 0;
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
vout34supply_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)322*4882a593Smuzhiyun static int vout34supply_event(struct snd_soc_dapm_widget *w,
323*4882a593Smuzhiyun struct snd_kcontrol *kcontrol, int event)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun switch (event) {
328*4882a593Smuzhiyun case SND_SOC_DAPM_PRE_PMU:
329*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_OUTMUX2, 0x180, 0);
330*4882a593Smuzhiyun break;
331*4882a593Smuzhiyun case SND_SOC_DAPM_POST_PMD:
332*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_OUTMUX2, 0x180, 0x180);
333*4882a593Smuzhiyun break;
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun return 0;
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun
wm8770_reset(struct snd_soc_component * component)339*4882a593Smuzhiyun static int wm8770_reset(struct snd_soc_component *component)
340*4882a593Smuzhiyun {
341*4882a593Smuzhiyun return snd_soc_component_write(component, WM8770_RESET, 0);
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun
wm8770_set_fmt(struct snd_soc_dai * dai,unsigned int fmt)344*4882a593Smuzhiyun static int wm8770_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
345*4882a593Smuzhiyun {
346*4882a593Smuzhiyun struct snd_soc_component *component;
347*4882a593Smuzhiyun int iface, master;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun component = dai->component;
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
352*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBM_CFM:
353*4882a593Smuzhiyun master = 0x100;
354*4882a593Smuzhiyun break;
355*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBS_CFS:
356*4882a593Smuzhiyun master = 0;
357*4882a593Smuzhiyun break;
358*4882a593Smuzhiyun default:
359*4882a593Smuzhiyun return -EINVAL;
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun iface = 0;
363*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
364*4882a593Smuzhiyun case SND_SOC_DAIFMT_I2S:
365*4882a593Smuzhiyun iface |= 0x2;
366*4882a593Smuzhiyun break;
367*4882a593Smuzhiyun case SND_SOC_DAIFMT_RIGHT_J:
368*4882a593Smuzhiyun break;
369*4882a593Smuzhiyun case SND_SOC_DAIFMT_LEFT_J:
370*4882a593Smuzhiyun iface |= 0x1;
371*4882a593Smuzhiyun break;
372*4882a593Smuzhiyun default:
373*4882a593Smuzhiyun return -EINVAL;
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
377*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_NF:
378*4882a593Smuzhiyun break;
379*4882a593Smuzhiyun case SND_SOC_DAIFMT_IB_IF:
380*4882a593Smuzhiyun iface |= 0xc;
381*4882a593Smuzhiyun break;
382*4882a593Smuzhiyun case SND_SOC_DAIFMT_IB_NF:
383*4882a593Smuzhiyun iface |= 0x8;
384*4882a593Smuzhiyun break;
385*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_IF:
386*4882a593Smuzhiyun iface |= 0x4;
387*4882a593Smuzhiyun break;
388*4882a593Smuzhiyun default:
389*4882a593Smuzhiyun return -EINVAL;
390*4882a593Smuzhiyun }
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_IFACECTRL, 0xf, iface);
393*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_MSTRCTRL, 0x100, master);
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun return 0;
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun static const int mclk_ratios[] = {
399*4882a593Smuzhiyun 128,
400*4882a593Smuzhiyun 192,
401*4882a593Smuzhiyun 256,
402*4882a593Smuzhiyun 384,
403*4882a593Smuzhiyun 512,
404*4882a593Smuzhiyun 768
405*4882a593Smuzhiyun };
406*4882a593Smuzhiyun
wm8770_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)407*4882a593Smuzhiyun static int wm8770_hw_params(struct snd_pcm_substream *substream,
408*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
409*4882a593Smuzhiyun struct snd_soc_dai *dai)
410*4882a593Smuzhiyun {
411*4882a593Smuzhiyun struct snd_soc_component *component;
412*4882a593Smuzhiyun struct wm8770_priv *wm8770;
413*4882a593Smuzhiyun int i;
414*4882a593Smuzhiyun int iface;
415*4882a593Smuzhiyun int shift;
416*4882a593Smuzhiyun int ratio;
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun component = dai->component;
419*4882a593Smuzhiyun wm8770 = snd_soc_component_get_drvdata(component);
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun iface = 0;
422*4882a593Smuzhiyun switch (params_width(params)) {
423*4882a593Smuzhiyun case 16:
424*4882a593Smuzhiyun break;
425*4882a593Smuzhiyun case 20:
426*4882a593Smuzhiyun iface |= 0x10;
427*4882a593Smuzhiyun break;
428*4882a593Smuzhiyun case 24:
429*4882a593Smuzhiyun iface |= 0x20;
430*4882a593Smuzhiyun break;
431*4882a593Smuzhiyun case 32:
432*4882a593Smuzhiyun iface |= 0x30;
433*4882a593Smuzhiyun break;
434*4882a593Smuzhiyun }
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun switch (substream->stream) {
437*4882a593Smuzhiyun case SNDRV_PCM_STREAM_PLAYBACK:
438*4882a593Smuzhiyun i = 0;
439*4882a593Smuzhiyun shift = 4;
440*4882a593Smuzhiyun break;
441*4882a593Smuzhiyun case SNDRV_PCM_STREAM_CAPTURE:
442*4882a593Smuzhiyun i = 2;
443*4882a593Smuzhiyun shift = 0;
444*4882a593Smuzhiyun break;
445*4882a593Smuzhiyun default:
446*4882a593Smuzhiyun return -EINVAL;
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun /* Only need to set MCLK/LRCLK ratio if we're master */
450*4882a593Smuzhiyun if (snd_soc_component_read(component, WM8770_MSTRCTRL) & 0x100) {
451*4882a593Smuzhiyun for (; i < ARRAY_SIZE(mclk_ratios); ++i) {
452*4882a593Smuzhiyun ratio = wm8770->sysclk / params_rate(params);
453*4882a593Smuzhiyun if (ratio == mclk_ratios[i])
454*4882a593Smuzhiyun break;
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun if (i == ARRAY_SIZE(mclk_ratios)) {
458*4882a593Smuzhiyun dev_err(component->dev,
459*4882a593Smuzhiyun "Unable to configure MCLK ratio %d/%d\n",
460*4882a593Smuzhiyun wm8770->sysclk, params_rate(params));
461*4882a593Smuzhiyun return -EINVAL;
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun dev_dbg(component->dev, "MCLK is %dfs\n", mclk_ratios[i]);
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_MSTRCTRL, 0x7 << shift,
467*4882a593Smuzhiyun i << shift);
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_IFACECTRL, 0x30, iface);
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun return 0;
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun
wm8770_mute(struct snd_soc_dai * dai,int mute,int direction)475*4882a593Smuzhiyun static int wm8770_mute(struct snd_soc_dai *dai, int mute, int direction)
476*4882a593Smuzhiyun {
477*4882a593Smuzhiyun struct snd_soc_component *component;
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun component = dai->component;
480*4882a593Smuzhiyun return snd_soc_component_update_bits(component, WM8770_DACMUTE, 0x10,
481*4882a593Smuzhiyun !!mute << 4);
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun
wm8770_set_sysclk(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)484*4882a593Smuzhiyun static int wm8770_set_sysclk(struct snd_soc_dai *dai,
485*4882a593Smuzhiyun int clk_id, unsigned int freq, int dir)
486*4882a593Smuzhiyun {
487*4882a593Smuzhiyun struct snd_soc_component *component;
488*4882a593Smuzhiyun struct wm8770_priv *wm8770;
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun component = dai->component;
491*4882a593Smuzhiyun wm8770 = snd_soc_component_get_drvdata(component);
492*4882a593Smuzhiyun wm8770->sysclk = freq;
493*4882a593Smuzhiyun return 0;
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun
wm8770_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)496*4882a593Smuzhiyun static int wm8770_set_bias_level(struct snd_soc_component *component,
497*4882a593Smuzhiyun enum snd_soc_bias_level level)
498*4882a593Smuzhiyun {
499*4882a593Smuzhiyun int ret;
500*4882a593Smuzhiyun struct wm8770_priv *wm8770;
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun wm8770 = snd_soc_component_get_drvdata(component);
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun switch (level) {
505*4882a593Smuzhiyun case SND_SOC_BIAS_ON:
506*4882a593Smuzhiyun break;
507*4882a593Smuzhiyun case SND_SOC_BIAS_PREPARE:
508*4882a593Smuzhiyun break;
509*4882a593Smuzhiyun case SND_SOC_BIAS_STANDBY:
510*4882a593Smuzhiyun if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
511*4882a593Smuzhiyun ret = regulator_bulk_enable(ARRAY_SIZE(wm8770->supplies),
512*4882a593Smuzhiyun wm8770->supplies);
513*4882a593Smuzhiyun if (ret) {
514*4882a593Smuzhiyun dev_err(component->dev,
515*4882a593Smuzhiyun "Failed to enable supplies: %d\n",
516*4882a593Smuzhiyun ret);
517*4882a593Smuzhiyun return ret;
518*4882a593Smuzhiyun }
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun regcache_sync(wm8770->regmap);
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun /* global powerup */
523*4882a593Smuzhiyun snd_soc_component_write(component, WM8770_PWDNCTRL, 0);
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun break;
526*4882a593Smuzhiyun case SND_SOC_BIAS_OFF:
527*4882a593Smuzhiyun /* global powerdown */
528*4882a593Smuzhiyun snd_soc_component_write(component, WM8770_PWDNCTRL, 1);
529*4882a593Smuzhiyun regulator_bulk_disable(ARRAY_SIZE(wm8770->supplies),
530*4882a593Smuzhiyun wm8770->supplies);
531*4882a593Smuzhiyun break;
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun return 0;
535*4882a593Smuzhiyun }
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun #define WM8770_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
538*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun static const struct snd_soc_dai_ops wm8770_dai_ops = {
541*4882a593Smuzhiyun .mute_stream = wm8770_mute,
542*4882a593Smuzhiyun .hw_params = wm8770_hw_params,
543*4882a593Smuzhiyun .set_fmt = wm8770_set_fmt,
544*4882a593Smuzhiyun .set_sysclk = wm8770_set_sysclk,
545*4882a593Smuzhiyun .no_capture_mute = 1,
546*4882a593Smuzhiyun };
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun static struct snd_soc_dai_driver wm8770_dai = {
549*4882a593Smuzhiyun .name = "wm8770-hifi",
550*4882a593Smuzhiyun .playback = {
551*4882a593Smuzhiyun .stream_name = "Playback",
552*4882a593Smuzhiyun .channels_min = 2,
553*4882a593Smuzhiyun .channels_max = 2,
554*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_8000_192000,
555*4882a593Smuzhiyun .formats = WM8770_FORMATS
556*4882a593Smuzhiyun },
557*4882a593Smuzhiyun .capture = {
558*4882a593Smuzhiyun .stream_name = "Capture",
559*4882a593Smuzhiyun .channels_min = 2,
560*4882a593Smuzhiyun .channels_max = 2,
561*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_8000_96000,
562*4882a593Smuzhiyun .formats = WM8770_FORMATS
563*4882a593Smuzhiyun },
564*4882a593Smuzhiyun .ops = &wm8770_dai_ops,
565*4882a593Smuzhiyun .symmetric_rates = 1
566*4882a593Smuzhiyun };
567*4882a593Smuzhiyun
wm8770_probe(struct snd_soc_component * component)568*4882a593Smuzhiyun static int wm8770_probe(struct snd_soc_component *component)
569*4882a593Smuzhiyun {
570*4882a593Smuzhiyun struct wm8770_priv *wm8770;
571*4882a593Smuzhiyun int ret;
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun wm8770 = snd_soc_component_get_drvdata(component);
574*4882a593Smuzhiyun wm8770->component = component;
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun ret = regulator_bulk_enable(ARRAY_SIZE(wm8770->supplies),
577*4882a593Smuzhiyun wm8770->supplies);
578*4882a593Smuzhiyun if (ret) {
579*4882a593Smuzhiyun dev_err(component->dev, "Failed to enable supplies: %d\n", ret);
580*4882a593Smuzhiyun return ret;
581*4882a593Smuzhiyun }
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun ret = wm8770_reset(component);
584*4882a593Smuzhiyun if (ret < 0) {
585*4882a593Smuzhiyun dev_err(component->dev, "Failed to issue reset: %d\n", ret);
586*4882a593Smuzhiyun goto err_reg_enable;
587*4882a593Smuzhiyun }
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun /* latch the volume update bits */
590*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_MSDIGVOL, 0x100, 0x100);
591*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_MSALGVOL, 0x100, 0x100);
592*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_VOUT1RVOL, 0x100, 0x100);
593*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_VOUT2RVOL, 0x100, 0x100);
594*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_VOUT3RVOL, 0x100, 0x100);
595*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_VOUT4RVOL, 0x100, 0x100);
596*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_DAC1RVOL, 0x100, 0x100);
597*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_DAC2RVOL, 0x100, 0x100);
598*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_DAC3RVOL, 0x100, 0x100);
599*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_DAC4RVOL, 0x100, 0x100);
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun /* mute all DACs */
602*4882a593Smuzhiyun snd_soc_component_update_bits(component, WM8770_DACMUTE, 0x10, 0x10);
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun err_reg_enable:
605*4882a593Smuzhiyun regulator_bulk_disable(ARRAY_SIZE(wm8770->supplies), wm8770->supplies);
606*4882a593Smuzhiyun return ret;
607*4882a593Smuzhiyun }
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_dev_wm8770 = {
610*4882a593Smuzhiyun .probe = wm8770_probe,
611*4882a593Smuzhiyun .set_bias_level = wm8770_set_bias_level,
612*4882a593Smuzhiyun .controls = wm8770_snd_controls,
613*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(wm8770_snd_controls),
614*4882a593Smuzhiyun .dapm_widgets = wm8770_dapm_widgets,
615*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(wm8770_dapm_widgets),
616*4882a593Smuzhiyun .dapm_routes = wm8770_intercon,
617*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(wm8770_intercon),
618*4882a593Smuzhiyun .use_pmdown_time = 1,
619*4882a593Smuzhiyun .endianness = 1,
620*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
621*4882a593Smuzhiyun };
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun static const struct of_device_id wm8770_of_match[] = {
624*4882a593Smuzhiyun { .compatible = "wlf,wm8770", },
625*4882a593Smuzhiyun { }
626*4882a593Smuzhiyun };
627*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, wm8770_of_match);
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun static const struct regmap_config wm8770_regmap = {
630*4882a593Smuzhiyun .reg_bits = 7,
631*4882a593Smuzhiyun .val_bits = 9,
632*4882a593Smuzhiyun .max_register = WM8770_RESET,
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun .reg_defaults = wm8770_reg_defaults,
635*4882a593Smuzhiyun .num_reg_defaults = ARRAY_SIZE(wm8770_reg_defaults),
636*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun .volatile_reg = wm8770_volatile_reg,
639*4882a593Smuzhiyun };
640*4882a593Smuzhiyun
wm8770_spi_probe(struct spi_device * spi)641*4882a593Smuzhiyun static int wm8770_spi_probe(struct spi_device *spi)
642*4882a593Smuzhiyun {
643*4882a593Smuzhiyun struct wm8770_priv *wm8770;
644*4882a593Smuzhiyun int ret, i;
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun wm8770 = devm_kzalloc(&spi->dev, sizeof(struct wm8770_priv),
647*4882a593Smuzhiyun GFP_KERNEL);
648*4882a593Smuzhiyun if (!wm8770)
649*4882a593Smuzhiyun return -ENOMEM;
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(wm8770->supplies); i++)
652*4882a593Smuzhiyun wm8770->supplies[i].supply = wm8770_supply_names[i];
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun ret = devm_regulator_bulk_get(&spi->dev, ARRAY_SIZE(wm8770->supplies),
655*4882a593Smuzhiyun wm8770->supplies);
656*4882a593Smuzhiyun if (ret) {
657*4882a593Smuzhiyun dev_err(&spi->dev, "Failed to request supplies: %d\n", ret);
658*4882a593Smuzhiyun return ret;
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun wm8770->disable_nb[0].notifier_call = wm8770_regulator_event_0;
662*4882a593Smuzhiyun wm8770->disable_nb[1].notifier_call = wm8770_regulator_event_1;
663*4882a593Smuzhiyun wm8770->disable_nb[2].notifier_call = wm8770_regulator_event_2;
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun /* This should really be moved into the regulator core */
666*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(wm8770->supplies); i++) {
667*4882a593Smuzhiyun ret = devm_regulator_register_notifier(
668*4882a593Smuzhiyun wm8770->supplies[i].consumer,
669*4882a593Smuzhiyun &wm8770->disable_nb[i]);
670*4882a593Smuzhiyun if (ret) {
671*4882a593Smuzhiyun dev_err(&spi->dev,
672*4882a593Smuzhiyun "Failed to register regulator notifier: %d\n",
673*4882a593Smuzhiyun ret);
674*4882a593Smuzhiyun }
675*4882a593Smuzhiyun }
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun wm8770->regmap = devm_regmap_init_spi(spi, &wm8770_regmap);
678*4882a593Smuzhiyun if (IS_ERR(wm8770->regmap))
679*4882a593Smuzhiyun return PTR_ERR(wm8770->regmap);
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun spi_set_drvdata(spi, wm8770);
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun ret = devm_snd_soc_register_component(&spi->dev,
684*4882a593Smuzhiyun &soc_component_dev_wm8770, &wm8770_dai, 1);
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun return ret;
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun static struct spi_driver wm8770_spi_driver = {
690*4882a593Smuzhiyun .driver = {
691*4882a593Smuzhiyun .name = "wm8770",
692*4882a593Smuzhiyun .of_match_table = wm8770_of_match,
693*4882a593Smuzhiyun },
694*4882a593Smuzhiyun .probe = wm8770_spi_probe,
695*4882a593Smuzhiyun };
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun module_spi_driver(wm8770_spi_driver);
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC WM8770 driver");
700*4882a593Smuzhiyun MODULE_AUTHOR("Dimitris Papastamos <dp@opensource.wolfsonmicro.com>");
701*4882a593Smuzhiyun MODULE_LICENSE("GPL");
702