xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/wm8741.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * wm8741.c  --  WM8741 ALSA SoC Audio driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2010-1 Wolfson Microelectronics plc
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: Ian Lartey <ian@opensource.wolfsonmicro.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/moduleparam.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/delay.h>
14*4882a593Smuzhiyun #include <linux/pm.h>
15*4882a593Smuzhiyun #include <linux/i2c.h>
16*4882a593Smuzhiyun #include <linux/spi/spi.h>
17*4882a593Smuzhiyun #include <linux/regmap.h>
18*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
19*4882a593Smuzhiyun #include <linux/slab.h>
20*4882a593Smuzhiyun #include <linux/of_device.h>
21*4882a593Smuzhiyun #include <sound/core.h>
22*4882a593Smuzhiyun #include <sound/pcm.h>
23*4882a593Smuzhiyun #include <sound/pcm_params.h>
24*4882a593Smuzhiyun #include <sound/soc.h>
25*4882a593Smuzhiyun #include <sound/initval.h>
26*4882a593Smuzhiyun #include <sound/tlv.h>
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #include "wm8741.h"
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define WM8741_NUM_SUPPLIES 2
31*4882a593Smuzhiyun static const char *wm8741_supply_names[WM8741_NUM_SUPPLIES] = {
32*4882a593Smuzhiyun 	"AVDD",
33*4882a593Smuzhiyun 	"DVDD",
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun /* codec private data */
37*4882a593Smuzhiyun struct wm8741_priv {
38*4882a593Smuzhiyun 	struct wm8741_platform_data pdata;
39*4882a593Smuzhiyun 	struct regmap *regmap;
40*4882a593Smuzhiyun 	struct regulator_bulk_data supplies[WM8741_NUM_SUPPLIES];
41*4882a593Smuzhiyun 	unsigned int sysclk;
42*4882a593Smuzhiyun 	const struct snd_pcm_hw_constraint_list *sysclk_constraints;
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun static const struct reg_default wm8741_reg_defaults[] = {
46*4882a593Smuzhiyun 	{  0, 0x0000 },     /* R0  - DACLLSB Attenuation */
47*4882a593Smuzhiyun 	{  1, 0x0000 },     /* R1  - DACLMSB Attenuation */
48*4882a593Smuzhiyun 	{  2, 0x0000 },     /* R2  - DACRLSB Attenuation */
49*4882a593Smuzhiyun 	{  3, 0x0000 },     /* R3  - DACRMSB Attenuation */
50*4882a593Smuzhiyun 	{  4, 0x0000 },     /* R4  - Volume Control */
51*4882a593Smuzhiyun 	{  5, 0x000A },     /* R5  - Format Control */
52*4882a593Smuzhiyun 	{  6, 0x0000 },     /* R6  - Filter Control */
53*4882a593Smuzhiyun 	{  7, 0x0000 },     /* R7  - Mode Control 1 */
54*4882a593Smuzhiyun 	{  8, 0x0002 },     /* R8  - Mode Control 2 */
55*4882a593Smuzhiyun 	{ 32, 0x0002 },     /* R32 - ADDITONAL_CONTROL_1 */
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun 
wm8741_reset(struct snd_soc_component * component)58*4882a593Smuzhiyun static int wm8741_reset(struct snd_soc_component *component)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun 	return snd_soc_component_write(component, WM8741_RESET, 0);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(dac_tlv_fine, -12700, 13, 0);
64*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 400, 0);
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8741_snd_controls_stereo[] = {
67*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Fine Playback Volume", WM8741_DACLLSB_ATTENUATION,
68*4882a593Smuzhiyun 		 WM8741_DACRLSB_ATTENUATION, 1, 255, 1, dac_tlv_fine),
69*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Playback Volume", WM8741_DACLMSB_ATTENUATION,
70*4882a593Smuzhiyun 		 WM8741_DACRMSB_ATTENUATION, 0, 511, 1, dac_tlv),
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8741_snd_controls_mono_left[] = {
74*4882a593Smuzhiyun SOC_SINGLE_TLV("Fine Playback Volume", WM8741_DACLLSB_ATTENUATION,
75*4882a593Smuzhiyun 		 1, 255, 1, dac_tlv_fine),
76*4882a593Smuzhiyun SOC_SINGLE_TLV("Playback Volume", WM8741_DACLMSB_ATTENUATION,
77*4882a593Smuzhiyun 		 0, 511, 1, dac_tlv),
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8741_snd_controls_mono_right[] = {
81*4882a593Smuzhiyun SOC_SINGLE_TLV("Fine Playback Volume", WM8741_DACRLSB_ATTENUATION,
82*4882a593Smuzhiyun 		1, 255, 1, dac_tlv_fine),
83*4882a593Smuzhiyun SOC_SINGLE_TLV("Playback Volume", WM8741_DACRMSB_ATTENUATION,
84*4882a593Smuzhiyun 		0, 511, 1, dac_tlv),
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun static const struct snd_soc_dapm_widget wm8741_dapm_widgets[] = {
88*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DACL", "Playback", SND_SOC_NOPM, 0, 0),
89*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DACR", "Playback", SND_SOC_NOPM, 0, 0),
90*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUTLP"),
91*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUTLN"),
92*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUTRP"),
93*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUTRN"),
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun static const struct snd_soc_dapm_route wm8741_dapm_routes[] = {
97*4882a593Smuzhiyun 	{ "VOUTLP", NULL, "DACL" },
98*4882a593Smuzhiyun 	{ "VOUTLN", NULL, "DACL" },
99*4882a593Smuzhiyun 	{ "VOUTRP", NULL, "DACR" },
100*4882a593Smuzhiyun 	{ "VOUTRN", NULL, "DACR" },
101*4882a593Smuzhiyun };
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun static const unsigned int rates_11289[] = {
104*4882a593Smuzhiyun 	44100, 88200,
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_11289 = {
108*4882a593Smuzhiyun 	.count	= ARRAY_SIZE(rates_11289),
109*4882a593Smuzhiyun 	.list	= rates_11289,
110*4882a593Smuzhiyun };
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun static const unsigned int rates_12288[] = {
113*4882a593Smuzhiyun 	32000, 48000, 96000,
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_12288 = {
117*4882a593Smuzhiyun 	.count	= ARRAY_SIZE(rates_12288),
118*4882a593Smuzhiyun 	.list	= rates_12288,
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun static const unsigned int rates_16384[] = {
122*4882a593Smuzhiyun 	32000,
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_16384 = {
126*4882a593Smuzhiyun 	.count	= ARRAY_SIZE(rates_16384),
127*4882a593Smuzhiyun 	.list	= rates_16384,
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun static const unsigned int rates_16934[] = {
131*4882a593Smuzhiyun 	44100, 88200,
132*4882a593Smuzhiyun };
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_16934 = {
135*4882a593Smuzhiyun 	.count	= ARRAY_SIZE(rates_16934),
136*4882a593Smuzhiyun 	.list	= rates_16934,
137*4882a593Smuzhiyun };
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun static const unsigned int rates_18432[] = {
140*4882a593Smuzhiyun 	48000, 96000,
141*4882a593Smuzhiyun };
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_18432 = {
144*4882a593Smuzhiyun 	.count	= ARRAY_SIZE(rates_18432),
145*4882a593Smuzhiyun 	.list	= rates_18432,
146*4882a593Smuzhiyun };
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun static const unsigned int rates_22579[] = {
149*4882a593Smuzhiyun 	44100, 88200, 176400
150*4882a593Smuzhiyun };
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_22579 = {
153*4882a593Smuzhiyun 	.count	= ARRAY_SIZE(rates_22579),
154*4882a593Smuzhiyun 	.list	= rates_22579,
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun static const unsigned int rates_24576[] = {
158*4882a593Smuzhiyun 	32000, 48000, 96000, 192000
159*4882a593Smuzhiyun };
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_24576 = {
162*4882a593Smuzhiyun 	.count	= ARRAY_SIZE(rates_24576),
163*4882a593Smuzhiyun 	.list	= rates_24576,
164*4882a593Smuzhiyun };
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun static const unsigned int rates_36864[] = {
167*4882a593Smuzhiyun 	48000, 96000, 192000
168*4882a593Smuzhiyun };
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list constraints_36864 = {
171*4882a593Smuzhiyun 	.count	= ARRAY_SIZE(rates_36864),
172*4882a593Smuzhiyun 	.list	= rates_36864,
173*4882a593Smuzhiyun };
174*4882a593Smuzhiyun 
wm8741_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)175*4882a593Smuzhiyun static int wm8741_startup(struct snd_pcm_substream *substream,
176*4882a593Smuzhiyun 			  struct snd_soc_dai *dai)
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
179*4882a593Smuzhiyun 	struct wm8741_priv *wm8741 = snd_soc_component_get_drvdata(component);
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	if (wm8741->sysclk)
182*4882a593Smuzhiyun 		snd_pcm_hw_constraint_list(substream->runtime, 0,
183*4882a593Smuzhiyun 				SNDRV_PCM_HW_PARAM_RATE,
184*4882a593Smuzhiyun 				wm8741->sysclk_constraints);
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	return 0;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun 
wm8741_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)189*4882a593Smuzhiyun static int wm8741_hw_params(struct snd_pcm_substream *substream,
190*4882a593Smuzhiyun 			    struct snd_pcm_hw_params *params,
191*4882a593Smuzhiyun 			    struct snd_soc_dai *dai)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
194*4882a593Smuzhiyun 	struct wm8741_priv *wm8741 = snd_soc_component_get_drvdata(component);
195*4882a593Smuzhiyun 	unsigned int iface, mode;
196*4882a593Smuzhiyun 	int i;
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	/* The set of sample rates that can be supported depends on the
199*4882a593Smuzhiyun 	 * MCLK supplied to the CODEC - enforce this.
200*4882a593Smuzhiyun 	 */
201*4882a593Smuzhiyun 	if (!wm8741->sysclk) {
202*4882a593Smuzhiyun 		dev_err(component->dev,
203*4882a593Smuzhiyun 			"No MCLK configured, call set_sysclk() on init or in hw_params\n");
204*4882a593Smuzhiyun 		return -EINVAL;
205*4882a593Smuzhiyun 	}
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	/* Find a supported LRCLK rate */
208*4882a593Smuzhiyun 	for (i = 0; i < wm8741->sysclk_constraints->count; i++) {
209*4882a593Smuzhiyun 		if (wm8741->sysclk_constraints->list[i] == params_rate(params))
210*4882a593Smuzhiyun 			break;
211*4882a593Smuzhiyun 	}
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	if (i == wm8741->sysclk_constraints->count) {
214*4882a593Smuzhiyun 		dev_err(component->dev, "LRCLK %d unsupported with MCLK %d\n",
215*4882a593Smuzhiyun 			params_rate(params), wm8741->sysclk);
216*4882a593Smuzhiyun 		return -EINVAL;
217*4882a593Smuzhiyun 	}
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	/* bit size */
220*4882a593Smuzhiyun 	switch (params_width(params)) {
221*4882a593Smuzhiyun 	case 16:
222*4882a593Smuzhiyun 		iface = 0x0;
223*4882a593Smuzhiyun 		break;
224*4882a593Smuzhiyun 	case 20:
225*4882a593Smuzhiyun 		iface = 0x1;
226*4882a593Smuzhiyun 		break;
227*4882a593Smuzhiyun 	case 24:
228*4882a593Smuzhiyun 		iface = 0x2;
229*4882a593Smuzhiyun 		break;
230*4882a593Smuzhiyun 	case 32:
231*4882a593Smuzhiyun 		iface = 0x3;
232*4882a593Smuzhiyun 		break;
233*4882a593Smuzhiyun 	default:
234*4882a593Smuzhiyun 		dev_dbg(component->dev, "wm8741_hw_params:    Unsupported bit size param = %d",
235*4882a593Smuzhiyun 			params_width(params));
236*4882a593Smuzhiyun 		return -EINVAL;
237*4882a593Smuzhiyun 	}
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	/* oversampling rate */
240*4882a593Smuzhiyun 	if (params_rate(params) > 96000)
241*4882a593Smuzhiyun 		mode = 0x40;
242*4882a593Smuzhiyun 	else if (params_rate(params) > 48000)
243*4882a593Smuzhiyun 		mode = 0x20;
244*4882a593Smuzhiyun 	else
245*4882a593Smuzhiyun 		mode = 0x00;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	dev_dbg(component->dev, "wm8741_hw_params:    bit size param = %d, rate param = %d",
248*4882a593Smuzhiyun 		params_width(params), params_rate(params));
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, WM8741_FORMAT_CONTROL, WM8741_IWL_MASK,
251*4882a593Smuzhiyun 			    iface);
252*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, WM8741_MODE_CONTROL_1, WM8741_OSR_MASK,
253*4882a593Smuzhiyun 			    mode);
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	return 0;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun 
wm8741_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)258*4882a593Smuzhiyun static int wm8741_set_dai_sysclk(struct snd_soc_dai *codec_dai,
259*4882a593Smuzhiyun 		int clk_id, unsigned int freq, int dir)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
262*4882a593Smuzhiyun 	struct wm8741_priv *wm8741 = snd_soc_component_get_drvdata(component);
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	dev_dbg(component->dev, "wm8741_set_dai_sysclk info: freq=%dHz\n", freq);
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	switch (freq) {
267*4882a593Smuzhiyun 	case 0:
268*4882a593Smuzhiyun 		wm8741->sysclk_constraints = NULL;
269*4882a593Smuzhiyun 		break;
270*4882a593Smuzhiyun 	case 11289600:
271*4882a593Smuzhiyun 		wm8741->sysclk_constraints = &constraints_11289;
272*4882a593Smuzhiyun 		break;
273*4882a593Smuzhiyun 	case 12288000:
274*4882a593Smuzhiyun 		wm8741->sysclk_constraints = &constraints_12288;
275*4882a593Smuzhiyun 		break;
276*4882a593Smuzhiyun 	case 16384000:
277*4882a593Smuzhiyun 		wm8741->sysclk_constraints = &constraints_16384;
278*4882a593Smuzhiyun 		break;
279*4882a593Smuzhiyun 	case 16934400:
280*4882a593Smuzhiyun 		wm8741->sysclk_constraints = &constraints_16934;
281*4882a593Smuzhiyun 		break;
282*4882a593Smuzhiyun 	case 18432000:
283*4882a593Smuzhiyun 		wm8741->sysclk_constraints = &constraints_18432;
284*4882a593Smuzhiyun 		break;
285*4882a593Smuzhiyun 	case 22579200:
286*4882a593Smuzhiyun 	case 33868800:
287*4882a593Smuzhiyun 		wm8741->sysclk_constraints = &constraints_22579;
288*4882a593Smuzhiyun 		break;
289*4882a593Smuzhiyun 	case 24576000:
290*4882a593Smuzhiyun 		wm8741->sysclk_constraints = &constraints_24576;
291*4882a593Smuzhiyun 		break;
292*4882a593Smuzhiyun 	case 36864000:
293*4882a593Smuzhiyun 		wm8741->sysclk_constraints = &constraints_36864;
294*4882a593Smuzhiyun 		break;
295*4882a593Smuzhiyun 	default:
296*4882a593Smuzhiyun 		return -EINVAL;
297*4882a593Smuzhiyun 	}
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	wm8741->sysclk = freq;
300*4882a593Smuzhiyun 	return 0;
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun 
wm8741_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)303*4882a593Smuzhiyun static int wm8741_set_dai_fmt(struct snd_soc_dai *codec_dai,
304*4882a593Smuzhiyun 		unsigned int fmt)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
307*4882a593Smuzhiyun 	unsigned int iface;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	/* check master/slave audio interface */
310*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
311*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBS_CFS:
312*4882a593Smuzhiyun 		break;
313*4882a593Smuzhiyun 	default:
314*4882a593Smuzhiyun 		return -EINVAL;
315*4882a593Smuzhiyun 	}
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	/* interface format */
318*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
319*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_I2S:
320*4882a593Smuzhiyun 		iface = 0x08;
321*4882a593Smuzhiyun 		break;
322*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_RIGHT_J:
323*4882a593Smuzhiyun 		iface = 0x00;
324*4882a593Smuzhiyun 		break;
325*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_LEFT_J:
326*4882a593Smuzhiyun 		iface = 0x04;
327*4882a593Smuzhiyun 		break;
328*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_DSP_A:
329*4882a593Smuzhiyun 		iface = 0x0C;
330*4882a593Smuzhiyun 		break;
331*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_DSP_B:
332*4882a593Smuzhiyun 		iface = 0x1C;
333*4882a593Smuzhiyun 		break;
334*4882a593Smuzhiyun 	default:
335*4882a593Smuzhiyun 		return -EINVAL;
336*4882a593Smuzhiyun 	}
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 	/* clock inversion */
339*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
340*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_NF:
341*4882a593Smuzhiyun 		break;
342*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_IF:
343*4882a593Smuzhiyun 		iface |= 0x10;
344*4882a593Smuzhiyun 		break;
345*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_IB_NF:
346*4882a593Smuzhiyun 		iface |= 0x20;
347*4882a593Smuzhiyun 		break;
348*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_IB_IF:
349*4882a593Smuzhiyun 		iface |= 0x30;
350*4882a593Smuzhiyun 		break;
351*4882a593Smuzhiyun 	default:
352*4882a593Smuzhiyun 		return -EINVAL;
353*4882a593Smuzhiyun 	}
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	dev_dbg(component->dev, "wm8741_set_dai_fmt:    Format=%x, Clock Inv=%x\n",
357*4882a593Smuzhiyun 				fmt & SND_SOC_DAIFMT_FORMAT_MASK,
358*4882a593Smuzhiyun 				((fmt & SND_SOC_DAIFMT_INV_MASK)));
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, WM8741_FORMAT_CONTROL,
361*4882a593Smuzhiyun 			    WM8741_BCP_MASK | WM8741_LRP_MASK | WM8741_FMT_MASK,
362*4882a593Smuzhiyun 			    iface);
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 	return 0;
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun 
wm8741_mute(struct snd_soc_dai * codec_dai,int mute,int direction)367*4882a593Smuzhiyun static int wm8741_mute(struct snd_soc_dai *codec_dai, int mute, int direction)
368*4882a593Smuzhiyun {
369*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, WM8741_VOLUME_CONTROL,
372*4882a593Smuzhiyun 			WM8741_SOFT_MASK, !!mute << WM8741_SOFT_SHIFT);
373*4882a593Smuzhiyun 	return 0;
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun #define WM8741_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
377*4882a593Smuzhiyun 			SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | \
378*4882a593Smuzhiyun 			SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | \
379*4882a593Smuzhiyun 			SNDRV_PCM_RATE_192000)
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun #define WM8741_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
382*4882a593Smuzhiyun 			SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun static const struct snd_soc_dai_ops wm8741_dai_ops = {
385*4882a593Smuzhiyun 	.startup	= wm8741_startup,
386*4882a593Smuzhiyun 	.hw_params	= wm8741_hw_params,
387*4882a593Smuzhiyun 	.set_sysclk	= wm8741_set_dai_sysclk,
388*4882a593Smuzhiyun 	.set_fmt	= wm8741_set_dai_fmt,
389*4882a593Smuzhiyun 	.mute_stream	= wm8741_mute,
390*4882a593Smuzhiyun 	.no_capture_mute = 1,
391*4882a593Smuzhiyun };
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun static struct snd_soc_dai_driver wm8741_dai = {
394*4882a593Smuzhiyun 	.name = "wm8741",
395*4882a593Smuzhiyun 	.playback = {
396*4882a593Smuzhiyun 		.stream_name = "Playback",
397*4882a593Smuzhiyun 		.channels_min = 2,
398*4882a593Smuzhiyun 		.channels_max = 2,
399*4882a593Smuzhiyun 		.rates = WM8741_RATES,
400*4882a593Smuzhiyun 		.formats = WM8741_FORMATS,
401*4882a593Smuzhiyun 	},
402*4882a593Smuzhiyun 	.ops = &wm8741_dai_ops,
403*4882a593Smuzhiyun };
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun #ifdef CONFIG_PM
wm8741_resume(struct snd_soc_component * component)406*4882a593Smuzhiyun static int wm8741_resume(struct snd_soc_component *component)
407*4882a593Smuzhiyun {
408*4882a593Smuzhiyun 	snd_soc_component_cache_sync(component);
409*4882a593Smuzhiyun 	return 0;
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun #else
412*4882a593Smuzhiyun #define wm8741_resume NULL
413*4882a593Smuzhiyun #endif
414*4882a593Smuzhiyun 
wm8741_configure(struct snd_soc_component * component)415*4882a593Smuzhiyun static int wm8741_configure(struct snd_soc_component *component)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun 	struct wm8741_priv *wm8741 = snd_soc_component_get_drvdata(component);
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	/* Configure differential mode */
420*4882a593Smuzhiyun 	switch (wm8741->pdata.diff_mode) {
421*4882a593Smuzhiyun 	case WM8741_DIFF_MODE_STEREO:
422*4882a593Smuzhiyun 	case WM8741_DIFF_MODE_STEREO_REVERSED:
423*4882a593Smuzhiyun 	case WM8741_DIFF_MODE_MONO_LEFT:
424*4882a593Smuzhiyun 	case WM8741_DIFF_MODE_MONO_RIGHT:
425*4882a593Smuzhiyun 		snd_soc_component_update_bits(component, WM8741_MODE_CONTROL_2,
426*4882a593Smuzhiyun 				WM8741_DIFF_MASK,
427*4882a593Smuzhiyun 				wm8741->pdata.diff_mode << WM8741_DIFF_SHIFT);
428*4882a593Smuzhiyun 		break;
429*4882a593Smuzhiyun 	default:
430*4882a593Smuzhiyun 		return -EINVAL;
431*4882a593Smuzhiyun 	}
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun 	/* Change some default settings - latch VU */
434*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, WM8741_DACLLSB_ATTENUATION,
435*4882a593Smuzhiyun 			WM8741_UPDATELL, WM8741_UPDATELL);
436*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, WM8741_DACLMSB_ATTENUATION,
437*4882a593Smuzhiyun 			WM8741_UPDATELM, WM8741_UPDATELM);
438*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, WM8741_DACRLSB_ATTENUATION,
439*4882a593Smuzhiyun 			WM8741_UPDATERL, WM8741_UPDATERL);
440*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, WM8741_DACRMSB_ATTENUATION,
441*4882a593Smuzhiyun 			WM8741_UPDATERM, WM8741_UPDATERM);
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	return 0;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun 
wm8741_add_controls(struct snd_soc_component * component)446*4882a593Smuzhiyun static int wm8741_add_controls(struct snd_soc_component *component)
447*4882a593Smuzhiyun {
448*4882a593Smuzhiyun 	struct wm8741_priv *wm8741 = snd_soc_component_get_drvdata(component);
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 	switch (wm8741->pdata.diff_mode) {
451*4882a593Smuzhiyun 	case WM8741_DIFF_MODE_STEREO:
452*4882a593Smuzhiyun 	case WM8741_DIFF_MODE_STEREO_REVERSED:
453*4882a593Smuzhiyun 		snd_soc_add_component_controls(component,
454*4882a593Smuzhiyun 				wm8741_snd_controls_stereo,
455*4882a593Smuzhiyun 				ARRAY_SIZE(wm8741_snd_controls_stereo));
456*4882a593Smuzhiyun 		break;
457*4882a593Smuzhiyun 	case WM8741_DIFF_MODE_MONO_LEFT:
458*4882a593Smuzhiyun 		snd_soc_add_component_controls(component,
459*4882a593Smuzhiyun 				wm8741_snd_controls_mono_left,
460*4882a593Smuzhiyun 				ARRAY_SIZE(wm8741_snd_controls_mono_left));
461*4882a593Smuzhiyun 		break;
462*4882a593Smuzhiyun 	case WM8741_DIFF_MODE_MONO_RIGHT:
463*4882a593Smuzhiyun 		snd_soc_add_component_controls(component,
464*4882a593Smuzhiyun 				wm8741_snd_controls_mono_right,
465*4882a593Smuzhiyun 				ARRAY_SIZE(wm8741_snd_controls_mono_right));
466*4882a593Smuzhiyun 		break;
467*4882a593Smuzhiyun 	default:
468*4882a593Smuzhiyun 		return -EINVAL;
469*4882a593Smuzhiyun 	}
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun 	return 0;
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun 
wm8741_probe(struct snd_soc_component * component)474*4882a593Smuzhiyun static int wm8741_probe(struct snd_soc_component *component)
475*4882a593Smuzhiyun {
476*4882a593Smuzhiyun 	struct wm8741_priv *wm8741 = snd_soc_component_get_drvdata(component);
477*4882a593Smuzhiyun 	int ret = 0;
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 	ret = regulator_bulk_enable(ARRAY_SIZE(wm8741->supplies),
480*4882a593Smuzhiyun 				    wm8741->supplies);
481*4882a593Smuzhiyun 	if (ret != 0) {
482*4882a593Smuzhiyun 		dev_err(component->dev, "Failed to enable supplies: %d\n", ret);
483*4882a593Smuzhiyun 		goto err_get;
484*4882a593Smuzhiyun 	}
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	ret = wm8741_reset(component);
487*4882a593Smuzhiyun 	if (ret < 0) {
488*4882a593Smuzhiyun 		dev_err(component->dev, "Failed to issue reset\n");
489*4882a593Smuzhiyun 		goto err_enable;
490*4882a593Smuzhiyun 	}
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 	ret = wm8741_configure(component);
493*4882a593Smuzhiyun 	if (ret < 0) {
494*4882a593Smuzhiyun 		dev_err(component->dev, "Failed to change default settings\n");
495*4882a593Smuzhiyun 		goto err_enable;
496*4882a593Smuzhiyun 	}
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun 	ret = wm8741_add_controls(component);
499*4882a593Smuzhiyun 	if (ret < 0) {
500*4882a593Smuzhiyun 		dev_err(component->dev, "Failed to add controls\n");
501*4882a593Smuzhiyun 		goto err_enable;
502*4882a593Smuzhiyun 	}
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 	dev_dbg(component->dev, "Successful registration\n");
505*4882a593Smuzhiyun 	return ret;
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun err_enable:
508*4882a593Smuzhiyun 	regulator_bulk_disable(ARRAY_SIZE(wm8741->supplies), wm8741->supplies);
509*4882a593Smuzhiyun err_get:
510*4882a593Smuzhiyun 	return ret;
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun 
wm8741_remove(struct snd_soc_component * component)513*4882a593Smuzhiyun static void wm8741_remove(struct snd_soc_component *component)
514*4882a593Smuzhiyun {
515*4882a593Smuzhiyun 	struct wm8741_priv *wm8741 = snd_soc_component_get_drvdata(component);
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 	regulator_bulk_disable(ARRAY_SIZE(wm8741->supplies), wm8741->supplies);
518*4882a593Smuzhiyun }
519*4882a593Smuzhiyun 
520*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_dev_wm8741 = {
521*4882a593Smuzhiyun 	.probe			= wm8741_probe,
522*4882a593Smuzhiyun 	.remove			= wm8741_remove,
523*4882a593Smuzhiyun 	.resume			= wm8741_resume,
524*4882a593Smuzhiyun 	.dapm_widgets		= wm8741_dapm_widgets,
525*4882a593Smuzhiyun 	.num_dapm_widgets	= ARRAY_SIZE(wm8741_dapm_widgets),
526*4882a593Smuzhiyun 	.dapm_routes		= wm8741_dapm_routes,
527*4882a593Smuzhiyun 	.num_dapm_routes	= ARRAY_SIZE(wm8741_dapm_routes),
528*4882a593Smuzhiyun 	.idle_bias_on		= 1,
529*4882a593Smuzhiyun 	.use_pmdown_time	= 1,
530*4882a593Smuzhiyun 	.endianness		= 1,
531*4882a593Smuzhiyun 	.non_legacy_dai_naming	= 1,
532*4882a593Smuzhiyun };
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun static const struct of_device_id wm8741_of_match[] = {
535*4882a593Smuzhiyun 	{ .compatible = "wlf,wm8741", },
536*4882a593Smuzhiyun 	{ }
537*4882a593Smuzhiyun };
538*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, wm8741_of_match);
539*4882a593Smuzhiyun 
540*4882a593Smuzhiyun static const struct regmap_config wm8741_regmap = {
541*4882a593Smuzhiyun 	.reg_bits = 7,
542*4882a593Smuzhiyun 	.val_bits = 9,
543*4882a593Smuzhiyun 	.max_register = WM8741_MAX_REGISTER,
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 	.reg_defaults = wm8741_reg_defaults,
546*4882a593Smuzhiyun 	.num_reg_defaults = ARRAY_SIZE(wm8741_reg_defaults),
547*4882a593Smuzhiyun 	.cache_type = REGCACHE_RBTREE,
548*4882a593Smuzhiyun };
549*4882a593Smuzhiyun 
wm8741_set_pdata(struct device * dev,struct wm8741_priv * wm8741)550*4882a593Smuzhiyun static int wm8741_set_pdata(struct device *dev, struct wm8741_priv *wm8741)
551*4882a593Smuzhiyun {
552*4882a593Smuzhiyun 	const struct wm8741_platform_data *pdata = dev_get_platdata(dev);
553*4882a593Smuzhiyun 	u32 diff_mode;
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun 	if (dev->of_node) {
556*4882a593Smuzhiyun 		if (of_property_read_u32(dev->of_node, "diff-mode", &diff_mode)
557*4882a593Smuzhiyun 				>= 0)
558*4882a593Smuzhiyun 			wm8741->pdata.diff_mode = diff_mode;
559*4882a593Smuzhiyun 	} else {
560*4882a593Smuzhiyun 		if (pdata != NULL)
561*4882a593Smuzhiyun 			memcpy(&wm8741->pdata, pdata, sizeof(wm8741->pdata));
562*4882a593Smuzhiyun 	}
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun 	return 0;
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun 
567*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_I2C)
wm8741_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)568*4882a593Smuzhiyun static int wm8741_i2c_probe(struct i2c_client *i2c,
569*4882a593Smuzhiyun 			    const struct i2c_device_id *id)
570*4882a593Smuzhiyun {
571*4882a593Smuzhiyun 	struct wm8741_priv *wm8741;
572*4882a593Smuzhiyun 	int ret, i;
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 	wm8741 = devm_kzalloc(&i2c->dev, sizeof(struct wm8741_priv),
575*4882a593Smuzhiyun 			      GFP_KERNEL);
576*4882a593Smuzhiyun 	if (wm8741 == NULL)
577*4882a593Smuzhiyun 		return -ENOMEM;
578*4882a593Smuzhiyun 
579*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(wm8741->supplies); i++)
580*4882a593Smuzhiyun 		wm8741->supplies[i].supply = wm8741_supply_names[i];
581*4882a593Smuzhiyun 
582*4882a593Smuzhiyun 	ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8741->supplies),
583*4882a593Smuzhiyun 				      wm8741->supplies);
584*4882a593Smuzhiyun 	if (ret != 0) {
585*4882a593Smuzhiyun 		dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
586*4882a593Smuzhiyun 		return ret;
587*4882a593Smuzhiyun 	}
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 	wm8741->regmap = devm_regmap_init_i2c(i2c, &wm8741_regmap);
590*4882a593Smuzhiyun 	if (IS_ERR(wm8741->regmap)) {
591*4882a593Smuzhiyun 		ret = PTR_ERR(wm8741->regmap);
592*4882a593Smuzhiyun 		dev_err(&i2c->dev, "Failed to init regmap: %d\n", ret);
593*4882a593Smuzhiyun 		return ret;
594*4882a593Smuzhiyun 	}
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun 	ret = wm8741_set_pdata(&i2c->dev, wm8741);
597*4882a593Smuzhiyun 	if (ret != 0) {
598*4882a593Smuzhiyun 		dev_err(&i2c->dev, "Failed to set pdata: %d\n", ret);
599*4882a593Smuzhiyun 		return ret;
600*4882a593Smuzhiyun 	}
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun 	i2c_set_clientdata(i2c, wm8741);
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun 	ret = devm_snd_soc_register_component(&i2c->dev,
605*4882a593Smuzhiyun 				     &soc_component_dev_wm8741, &wm8741_dai, 1);
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 	return ret;
608*4882a593Smuzhiyun }
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun static const struct i2c_device_id wm8741_i2c_id[] = {
611*4882a593Smuzhiyun 	{ "wm8741", 0 },
612*4882a593Smuzhiyun 	{ }
613*4882a593Smuzhiyun };
614*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, wm8741_i2c_id);
615*4882a593Smuzhiyun 
616*4882a593Smuzhiyun static struct i2c_driver wm8741_i2c_driver = {
617*4882a593Smuzhiyun 	.driver = {
618*4882a593Smuzhiyun 		.name = "wm8741",
619*4882a593Smuzhiyun 		.of_match_table = wm8741_of_match,
620*4882a593Smuzhiyun 	},
621*4882a593Smuzhiyun 	.probe =    wm8741_i2c_probe,
622*4882a593Smuzhiyun 	.id_table = wm8741_i2c_id,
623*4882a593Smuzhiyun };
624*4882a593Smuzhiyun #endif
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun #if defined(CONFIG_SPI_MASTER)
wm8741_spi_probe(struct spi_device * spi)627*4882a593Smuzhiyun static int wm8741_spi_probe(struct spi_device *spi)
628*4882a593Smuzhiyun {
629*4882a593Smuzhiyun 	struct wm8741_priv *wm8741;
630*4882a593Smuzhiyun 	int ret, i;
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun 	wm8741 = devm_kzalloc(&spi->dev, sizeof(struct wm8741_priv),
633*4882a593Smuzhiyun 			     GFP_KERNEL);
634*4882a593Smuzhiyun 	if (wm8741 == NULL)
635*4882a593Smuzhiyun 		return -ENOMEM;
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(wm8741->supplies); i++)
638*4882a593Smuzhiyun 		wm8741->supplies[i].supply = wm8741_supply_names[i];
639*4882a593Smuzhiyun 
640*4882a593Smuzhiyun 	ret = devm_regulator_bulk_get(&spi->dev, ARRAY_SIZE(wm8741->supplies),
641*4882a593Smuzhiyun 				      wm8741->supplies);
642*4882a593Smuzhiyun 	if (ret != 0) {
643*4882a593Smuzhiyun 		dev_err(&spi->dev, "Failed to request supplies: %d\n", ret);
644*4882a593Smuzhiyun 		return ret;
645*4882a593Smuzhiyun 	}
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun 	wm8741->regmap = devm_regmap_init_spi(spi, &wm8741_regmap);
648*4882a593Smuzhiyun 	if (IS_ERR(wm8741->regmap)) {
649*4882a593Smuzhiyun 		ret = PTR_ERR(wm8741->regmap);
650*4882a593Smuzhiyun 		dev_err(&spi->dev, "Failed to init regmap: %d\n", ret);
651*4882a593Smuzhiyun 		return ret;
652*4882a593Smuzhiyun 	}
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun 	ret = wm8741_set_pdata(&spi->dev, wm8741);
655*4882a593Smuzhiyun 	if (ret != 0) {
656*4882a593Smuzhiyun 		dev_err(&spi->dev, "Failed to set pdata: %d\n", ret);
657*4882a593Smuzhiyun 		return ret;
658*4882a593Smuzhiyun 	}
659*4882a593Smuzhiyun 
660*4882a593Smuzhiyun 	spi_set_drvdata(spi, wm8741);
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun 	ret = devm_snd_soc_register_component(&spi->dev,
663*4882a593Smuzhiyun 			&soc_component_dev_wm8741, &wm8741_dai, 1);
664*4882a593Smuzhiyun 	return ret;
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun 
667*4882a593Smuzhiyun static struct spi_driver wm8741_spi_driver = {
668*4882a593Smuzhiyun 	.driver = {
669*4882a593Smuzhiyun 		.name	= "wm8741",
670*4882a593Smuzhiyun 		.of_match_table = wm8741_of_match,
671*4882a593Smuzhiyun 	},
672*4882a593Smuzhiyun 	.probe		= wm8741_spi_probe,
673*4882a593Smuzhiyun };
674*4882a593Smuzhiyun #endif /* CONFIG_SPI_MASTER */
675*4882a593Smuzhiyun 
wm8741_modinit(void)676*4882a593Smuzhiyun static int __init wm8741_modinit(void)
677*4882a593Smuzhiyun {
678*4882a593Smuzhiyun 	int ret = 0;
679*4882a593Smuzhiyun 
680*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_I2C)
681*4882a593Smuzhiyun 	ret = i2c_add_driver(&wm8741_i2c_driver);
682*4882a593Smuzhiyun 	if (ret != 0)
683*4882a593Smuzhiyun 		pr_err("Failed to register WM8741 I2C driver: %d\n", ret);
684*4882a593Smuzhiyun #endif
685*4882a593Smuzhiyun #if defined(CONFIG_SPI_MASTER)
686*4882a593Smuzhiyun 	ret = spi_register_driver(&wm8741_spi_driver);
687*4882a593Smuzhiyun 	if (ret != 0) {
688*4882a593Smuzhiyun 		printk(KERN_ERR "Failed to register wm8741 SPI driver: %d\n",
689*4882a593Smuzhiyun 		       ret);
690*4882a593Smuzhiyun 	}
691*4882a593Smuzhiyun #endif
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 	return ret;
694*4882a593Smuzhiyun }
695*4882a593Smuzhiyun module_init(wm8741_modinit);
696*4882a593Smuzhiyun 
wm8741_exit(void)697*4882a593Smuzhiyun static void __exit wm8741_exit(void)
698*4882a593Smuzhiyun {
699*4882a593Smuzhiyun #if defined(CONFIG_SPI_MASTER)
700*4882a593Smuzhiyun 	spi_unregister_driver(&wm8741_spi_driver);
701*4882a593Smuzhiyun #endif
702*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_I2C)
703*4882a593Smuzhiyun 	i2c_del_driver(&wm8741_i2c_driver);
704*4882a593Smuzhiyun #endif
705*4882a593Smuzhiyun }
706*4882a593Smuzhiyun module_exit(wm8741_exit);
707*4882a593Smuzhiyun 
708*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC WM8741 driver");
709*4882a593Smuzhiyun MODULE_AUTHOR("Ian Lartey <ian@opensource.wolfsonmicro.com>");
710*4882a593Smuzhiyun MODULE_LICENSE("GPL");
711