xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/wm8731.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * wm8731.c  --  WM8731 ALSA SoC Audio driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2005 Openedhand Ltd.
6*4882a593Smuzhiyun  * Copyright 2006-12 Wolfson Microelectronics, plc
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Author: Richard Purdie <richard@openedhand.com>
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * Based on wm8753.c by Liam Girdwood
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/moduleparam.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/delay.h>
17*4882a593Smuzhiyun #include <linux/pm.h>
18*4882a593Smuzhiyun #include <linux/i2c.h>
19*4882a593Smuzhiyun #include <linux/slab.h>
20*4882a593Smuzhiyun #include <linux/regmap.h>
21*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
22*4882a593Smuzhiyun #include <linux/spi/spi.h>
23*4882a593Smuzhiyun #include <linux/of_device.h>
24*4882a593Smuzhiyun #include <linux/mutex.h>
25*4882a593Smuzhiyun #include <linux/clk.h>
26*4882a593Smuzhiyun #include <sound/core.h>
27*4882a593Smuzhiyun #include <sound/pcm.h>
28*4882a593Smuzhiyun #include <sound/pcm_params.h>
29*4882a593Smuzhiyun #include <sound/soc.h>
30*4882a593Smuzhiyun #include <sound/initval.h>
31*4882a593Smuzhiyun #include <sound/tlv.h>
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #include "wm8731.h"
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #define WM8731_NUM_SUPPLIES 4
36*4882a593Smuzhiyun static const char *wm8731_supply_names[WM8731_NUM_SUPPLIES] = {
37*4882a593Smuzhiyun 	"AVDD",
38*4882a593Smuzhiyun 	"HPVDD",
39*4882a593Smuzhiyun 	"DCVDD",
40*4882a593Smuzhiyun 	"DBVDD",
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun /* codec private data */
44*4882a593Smuzhiyun struct wm8731_priv {
45*4882a593Smuzhiyun 	struct regmap *regmap;
46*4882a593Smuzhiyun 	struct clk *mclk;
47*4882a593Smuzhiyun 	struct regulator_bulk_data supplies[WM8731_NUM_SUPPLIES];
48*4882a593Smuzhiyun 	const struct snd_pcm_hw_constraint_list *constraints;
49*4882a593Smuzhiyun 	unsigned int sysclk;
50*4882a593Smuzhiyun 	int sysclk_type;
51*4882a593Smuzhiyun 	int playback_fs;
52*4882a593Smuzhiyun 	bool deemph;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	struct mutex lock;
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun /*
59*4882a593Smuzhiyun  * wm8731 register cache
60*4882a593Smuzhiyun  */
61*4882a593Smuzhiyun static const struct reg_default wm8731_reg_defaults[] = {
62*4882a593Smuzhiyun 	{ 0, 0x0097 },
63*4882a593Smuzhiyun 	{ 1, 0x0097 },
64*4882a593Smuzhiyun 	{ 2, 0x0079 },
65*4882a593Smuzhiyun 	{ 3, 0x0079 },
66*4882a593Smuzhiyun 	{ 4, 0x000a },
67*4882a593Smuzhiyun 	{ 5, 0x0008 },
68*4882a593Smuzhiyun 	{ 6, 0x009f },
69*4882a593Smuzhiyun 	{ 7, 0x000a },
70*4882a593Smuzhiyun 	{ 8, 0x0000 },
71*4882a593Smuzhiyun 	{ 9, 0x0000 },
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun 
wm8731_volatile(struct device * dev,unsigned int reg)74*4882a593Smuzhiyun static bool wm8731_volatile(struct device *dev, unsigned int reg)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun 	return reg == WM8731_RESET;
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun #define wm8731_reset(m)	regmap_write(m, WM8731_RESET, 0)
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun static const char *wm8731_input_select[] = {"Line In", "Mic"};
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(wm8731_insel_enum,
84*4882a593Smuzhiyun 			    WM8731_APANA, 2, wm8731_input_select);
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun static int wm8731_deemph[] = { 0, 32000, 44100, 48000 };
87*4882a593Smuzhiyun 
wm8731_set_deemph(struct snd_soc_component * component)88*4882a593Smuzhiyun static int wm8731_set_deemph(struct snd_soc_component *component)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun 	struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
91*4882a593Smuzhiyun 	int val, i, best;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	/* If we're using deemphasis select the nearest available sample
94*4882a593Smuzhiyun 	 * rate.
95*4882a593Smuzhiyun 	 */
96*4882a593Smuzhiyun 	if (wm8731->deemph) {
97*4882a593Smuzhiyun 		best = 1;
98*4882a593Smuzhiyun 		for (i = 2; i < ARRAY_SIZE(wm8731_deemph); i++) {
99*4882a593Smuzhiyun 			if (abs(wm8731_deemph[i] - wm8731->playback_fs) <
100*4882a593Smuzhiyun 			    abs(wm8731_deemph[best] - wm8731->playback_fs))
101*4882a593Smuzhiyun 				best = i;
102*4882a593Smuzhiyun 		}
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 		val = best << 1;
105*4882a593Smuzhiyun 	} else {
106*4882a593Smuzhiyun 		best = 0;
107*4882a593Smuzhiyun 		val = 0;
108*4882a593Smuzhiyun 	}
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	dev_dbg(component->dev, "Set deemphasis %d (%dHz)\n",
111*4882a593Smuzhiyun 		best, wm8731_deemph[best]);
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	return snd_soc_component_update_bits(component, WM8731_APDIGI, 0x6, val);
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun 
wm8731_get_deemph(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)116*4882a593Smuzhiyun static int wm8731_get_deemph(struct snd_kcontrol *kcontrol,
117*4882a593Smuzhiyun 			     struct snd_ctl_elem_value *ucontrol)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
120*4882a593Smuzhiyun 	struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = wm8731->deemph;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	return 0;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun 
wm8731_put_deemph(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)127*4882a593Smuzhiyun static int wm8731_put_deemph(struct snd_kcontrol *kcontrol,
128*4882a593Smuzhiyun 			     struct snd_ctl_elem_value *ucontrol)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
131*4882a593Smuzhiyun 	struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
132*4882a593Smuzhiyun 	unsigned int deemph = ucontrol->value.integer.value[0];
133*4882a593Smuzhiyun 	int ret = 0;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	if (deemph > 1)
136*4882a593Smuzhiyun 		return -EINVAL;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	mutex_lock(&wm8731->lock);
139*4882a593Smuzhiyun 	if (wm8731->deemph != deemph) {
140*4882a593Smuzhiyun 		wm8731->deemph = deemph;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 		wm8731_set_deemph(component);
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 		ret = 1;
145*4882a593Smuzhiyun 	}
146*4882a593Smuzhiyun 	mutex_unlock(&wm8731->lock);
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	return ret;
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(in_tlv, -3450, 150, 0);
152*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -1500, 300, 0);
153*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
154*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 2000, 0);
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8731_snd_controls[] = {
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Master Playback Volume", WM8731_LOUT1V, WM8731_ROUT1V,
159*4882a593Smuzhiyun 		 0, 127, 0, out_tlv),
160*4882a593Smuzhiyun SOC_DOUBLE_R("Master Playback ZC Switch", WM8731_LOUT1V, WM8731_ROUT1V,
161*4882a593Smuzhiyun 	7, 1, 0),
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Capture Volume", WM8731_LINVOL, WM8731_RINVOL, 0, 31, 0,
164*4882a593Smuzhiyun 		 in_tlv),
165*4882a593Smuzhiyun SOC_DOUBLE_R("Line Capture Switch", WM8731_LINVOL, WM8731_RINVOL, 7, 1, 1),
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun SOC_SINGLE_TLV("Mic Boost Volume", WM8731_APANA, 0, 1, 0, mic_tlv),
168*4882a593Smuzhiyun SOC_SINGLE("Mic Capture Switch", WM8731_APANA, 1, 1, 1),
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun SOC_SINGLE_TLV("Sidetone Playback Volume", WM8731_APANA, 6, 3, 1,
171*4882a593Smuzhiyun 	       sidetone_tlv),
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun SOC_SINGLE("ADC High Pass Filter Switch", WM8731_APDIGI, 0, 1, 1),
174*4882a593Smuzhiyun SOC_SINGLE("Store DC Offset Switch", WM8731_APDIGI, 4, 1, 0),
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun SOC_SINGLE_BOOL_EXT("Playback Deemphasis Switch", 0,
177*4882a593Smuzhiyun 		    wm8731_get_deemph, wm8731_put_deemph),
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun /* Output Mixer */
181*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8731_output_mixer_controls[] = {
182*4882a593Smuzhiyun SOC_DAPM_SINGLE("Line Bypass Switch", WM8731_APANA, 3, 1, 0),
183*4882a593Smuzhiyun SOC_DAPM_SINGLE("Mic Sidetone Switch", WM8731_APANA, 5, 1, 0),
184*4882a593Smuzhiyun SOC_DAPM_SINGLE("HiFi Playback Switch", WM8731_APANA, 4, 1, 0),
185*4882a593Smuzhiyun };
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun /* Input mux */
188*4882a593Smuzhiyun static const struct snd_kcontrol_new wm8731_input_mux_controls =
189*4882a593Smuzhiyun SOC_DAPM_ENUM("Input Select", wm8731_insel_enum);
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
192*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("ACTIVE",WM8731_ACTIVE, 0, 0, NULL, 0),
193*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("OSC", WM8731_PWR, 5, 1, NULL, 0),
194*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1,
195*4882a593Smuzhiyun 	&wm8731_output_mixer_controls[0],
196*4882a593Smuzhiyun 	ARRAY_SIZE(wm8731_output_mixer_controls)),
197*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8731_PWR, 3, 1),
198*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("LOUT"),
199*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("LHPOUT"),
200*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("ROUT"),
201*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("RHPOUT"),
202*4882a593Smuzhiyun SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8731_PWR, 2, 1),
203*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, &wm8731_input_mux_controls),
204*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Line Input", WM8731_PWR, 0, 1, NULL, 0),
205*4882a593Smuzhiyun SND_SOC_DAPM_MICBIAS("Mic Bias", WM8731_PWR, 1, 1),
206*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("MICIN"),
207*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("RLINEIN"),
208*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LLINEIN"),
209*4882a593Smuzhiyun };
210*4882a593Smuzhiyun 
wm8731_check_osc(struct snd_soc_dapm_widget * source,struct snd_soc_dapm_widget * sink)211*4882a593Smuzhiyun static int wm8731_check_osc(struct snd_soc_dapm_widget *source,
212*4882a593Smuzhiyun 			    struct snd_soc_dapm_widget *sink)
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun 	struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
215*4882a593Smuzhiyun 	struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	return wm8731->sysclk_type == WM8731_SYSCLK_XTAL;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun static const struct snd_soc_dapm_route wm8731_intercon[] = {
221*4882a593Smuzhiyun 	{"DAC", NULL, "OSC", wm8731_check_osc},
222*4882a593Smuzhiyun 	{"ADC", NULL, "OSC", wm8731_check_osc},
223*4882a593Smuzhiyun 	{"DAC", NULL, "ACTIVE"},
224*4882a593Smuzhiyun 	{"ADC", NULL, "ACTIVE"},
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	/* output mixer */
227*4882a593Smuzhiyun 	{"Output Mixer", "Line Bypass Switch", "Line Input"},
228*4882a593Smuzhiyun 	{"Output Mixer", "HiFi Playback Switch", "DAC"},
229*4882a593Smuzhiyun 	{"Output Mixer", "Mic Sidetone Switch", "Mic Bias"},
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	/* outputs */
232*4882a593Smuzhiyun 	{"RHPOUT", NULL, "Output Mixer"},
233*4882a593Smuzhiyun 	{"ROUT", NULL, "Output Mixer"},
234*4882a593Smuzhiyun 	{"LHPOUT", NULL, "Output Mixer"},
235*4882a593Smuzhiyun 	{"LOUT", NULL, "Output Mixer"},
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	/* input mux */
238*4882a593Smuzhiyun 	{"Input Mux", "Line In", "Line Input"},
239*4882a593Smuzhiyun 	{"Input Mux", "Mic", "Mic Bias"},
240*4882a593Smuzhiyun 	{"ADC", NULL, "Input Mux"},
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	/* inputs */
243*4882a593Smuzhiyun 	{"Line Input", NULL, "LLINEIN"},
244*4882a593Smuzhiyun 	{"Line Input", NULL, "RLINEIN"},
245*4882a593Smuzhiyun 	{"Mic Bias", NULL, "MICIN"},
246*4882a593Smuzhiyun };
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun struct _coeff_div {
249*4882a593Smuzhiyun 	u32 mclk;
250*4882a593Smuzhiyun 	u32 rate;
251*4882a593Smuzhiyun 	u16 fs;
252*4882a593Smuzhiyun 	u8 sr:4;
253*4882a593Smuzhiyun 	u8 bosr:1;
254*4882a593Smuzhiyun 	u8 usb:1;
255*4882a593Smuzhiyun };
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun /* codec mclk clock divider coefficients */
258*4882a593Smuzhiyun static const struct _coeff_div coeff_div[] = {
259*4882a593Smuzhiyun 	/* 48k */
260*4882a593Smuzhiyun 	{12288000, 48000, 256, 0x0, 0x0, 0x0},
261*4882a593Smuzhiyun 	{18432000, 48000, 384, 0x0, 0x1, 0x0},
262*4882a593Smuzhiyun 	{12000000, 48000, 250, 0x0, 0x0, 0x1},
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	/* 32k */
265*4882a593Smuzhiyun 	{12288000, 32000, 384, 0x6, 0x0, 0x0},
266*4882a593Smuzhiyun 	{18432000, 32000, 576, 0x6, 0x1, 0x0},
267*4882a593Smuzhiyun 	{12000000, 32000, 375, 0x6, 0x0, 0x1},
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	/* 8k */
270*4882a593Smuzhiyun 	{12288000, 8000, 1536, 0x3, 0x0, 0x0},
271*4882a593Smuzhiyun 	{18432000, 8000, 2304, 0x3, 0x1, 0x0},
272*4882a593Smuzhiyun 	{11289600, 8000, 1408, 0xb, 0x0, 0x0},
273*4882a593Smuzhiyun 	{16934400, 8000, 2112, 0xb, 0x1, 0x0},
274*4882a593Smuzhiyun 	{12000000, 8000, 1500, 0x3, 0x0, 0x1},
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	/* 96k */
277*4882a593Smuzhiyun 	{12288000, 96000, 128, 0x7, 0x0, 0x0},
278*4882a593Smuzhiyun 	{18432000, 96000, 192, 0x7, 0x1, 0x0},
279*4882a593Smuzhiyun 	{12000000, 96000, 125, 0x7, 0x0, 0x1},
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	/* 44.1k */
282*4882a593Smuzhiyun 	{11289600, 44100, 256, 0x8, 0x0, 0x0},
283*4882a593Smuzhiyun 	{16934400, 44100, 384, 0x8, 0x1, 0x0},
284*4882a593Smuzhiyun 	{12000000, 44100, 272, 0x8, 0x1, 0x1},
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	/* 88.2k */
287*4882a593Smuzhiyun 	{11289600, 88200, 128, 0xf, 0x0, 0x0},
288*4882a593Smuzhiyun 	{16934400, 88200, 192, 0xf, 0x1, 0x0},
289*4882a593Smuzhiyun 	{12000000, 88200, 136, 0xf, 0x1, 0x1},
290*4882a593Smuzhiyun };
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun /* rates constraints */
293*4882a593Smuzhiyun static const unsigned int wm8731_rates_12000000[] = {
294*4882a593Smuzhiyun 	8000, 32000, 44100, 48000, 96000, 88200,
295*4882a593Smuzhiyun };
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun static const unsigned int wm8731_rates_12288000_18432000[] = {
298*4882a593Smuzhiyun 	8000, 32000, 48000, 96000,
299*4882a593Smuzhiyun };
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun static const unsigned int wm8731_rates_11289600_16934400[] = {
302*4882a593Smuzhiyun 	8000, 44100, 88200,
303*4882a593Smuzhiyun };
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list wm8731_constraints_12000000 = {
306*4882a593Smuzhiyun 	.list = wm8731_rates_12000000,
307*4882a593Smuzhiyun 	.count = ARRAY_SIZE(wm8731_rates_12000000),
308*4882a593Smuzhiyun };
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun static const
311*4882a593Smuzhiyun struct snd_pcm_hw_constraint_list wm8731_constraints_12288000_18432000 = {
312*4882a593Smuzhiyun 	.list = wm8731_rates_12288000_18432000,
313*4882a593Smuzhiyun 	.count = ARRAY_SIZE(wm8731_rates_12288000_18432000),
314*4882a593Smuzhiyun };
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun static const
317*4882a593Smuzhiyun struct snd_pcm_hw_constraint_list wm8731_constraints_11289600_16934400 = {
318*4882a593Smuzhiyun 	.list = wm8731_rates_11289600_16934400,
319*4882a593Smuzhiyun 	.count = ARRAY_SIZE(wm8731_rates_11289600_16934400),
320*4882a593Smuzhiyun };
321*4882a593Smuzhiyun 
get_coeff(int mclk,int rate)322*4882a593Smuzhiyun static inline int get_coeff(int mclk, int rate)
323*4882a593Smuzhiyun {
324*4882a593Smuzhiyun 	int i;
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
327*4882a593Smuzhiyun 		if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
328*4882a593Smuzhiyun 			return i;
329*4882a593Smuzhiyun 	}
330*4882a593Smuzhiyun 	return 0;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun 
wm8731_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)333*4882a593Smuzhiyun static int wm8731_hw_params(struct snd_pcm_substream *substream,
334*4882a593Smuzhiyun 			    struct snd_pcm_hw_params *params,
335*4882a593Smuzhiyun 			    struct snd_soc_dai *dai)
336*4882a593Smuzhiyun {
337*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
338*4882a593Smuzhiyun 	struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
339*4882a593Smuzhiyun 	u16 iface = snd_soc_component_read(component, WM8731_IFACE) & 0xfff3;
340*4882a593Smuzhiyun 	int i = get_coeff(wm8731->sysclk, params_rate(params));
341*4882a593Smuzhiyun 	u16 srate = (coeff_div[i].sr << 2) |
342*4882a593Smuzhiyun 		(coeff_div[i].bosr << 1) | coeff_div[i].usb;
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	wm8731->playback_fs = params_rate(params);
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	snd_soc_component_write(component, WM8731_SRATE, srate);
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	/* bit size */
349*4882a593Smuzhiyun 	switch (params_width(params)) {
350*4882a593Smuzhiyun 	case 16:
351*4882a593Smuzhiyun 		break;
352*4882a593Smuzhiyun 	case 20:
353*4882a593Smuzhiyun 		iface |= 0x0004;
354*4882a593Smuzhiyun 		break;
355*4882a593Smuzhiyun 	case 24:
356*4882a593Smuzhiyun 		iface |= 0x0008;
357*4882a593Smuzhiyun 		break;
358*4882a593Smuzhiyun 	case 32:
359*4882a593Smuzhiyun 		iface |= 0x000c;
360*4882a593Smuzhiyun 		break;
361*4882a593Smuzhiyun 	}
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	wm8731_set_deemph(component);
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 	snd_soc_component_write(component, WM8731_IFACE, iface);
366*4882a593Smuzhiyun 	return 0;
367*4882a593Smuzhiyun }
368*4882a593Smuzhiyun 
wm8731_mute(struct snd_soc_dai * dai,int mute,int direction)369*4882a593Smuzhiyun static int wm8731_mute(struct snd_soc_dai *dai, int mute, int direction)
370*4882a593Smuzhiyun {
371*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
372*4882a593Smuzhiyun 	u16 mute_reg = snd_soc_component_read(component, WM8731_APDIGI) & 0xfff7;
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 	if (mute)
375*4882a593Smuzhiyun 		snd_soc_component_write(component, WM8731_APDIGI, mute_reg | 0x8);
376*4882a593Smuzhiyun 	else
377*4882a593Smuzhiyun 		snd_soc_component_write(component, WM8731_APDIGI, mute_reg);
378*4882a593Smuzhiyun 	return 0;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun 
wm8731_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)381*4882a593Smuzhiyun static int wm8731_set_dai_sysclk(struct snd_soc_dai *codec_dai,
382*4882a593Smuzhiyun 		int clk_id, unsigned int freq, int dir)
383*4882a593Smuzhiyun {
384*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
385*4882a593Smuzhiyun 	struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
386*4882a593Smuzhiyun 	struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 	switch (clk_id) {
389*4882a593Smuzhiyun 	case WM8731_SYSCLK_XTAL:
390*4882a593Smuzhiyun 	case WM8731_SYSCLK_MCLK:
391*4882a593Smuzhiyun 		if (wm8731->mclk && clk_set_rate(wm8731->mclk, freq))
392*4882a593Smuzhiyun 			return -EINVAL;
393*4882a593Smuzhiyun 		wm8731->sysclk_type = clk_id;
394*4882a593Smuzhiyun 		break;
395*4882a593Smuzhiyun 	default:
396*4882a593Smuzhiyun 		return -EINVAL;
397*4882a593Smuzhiyun 	}
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 	switch (freq) {
400*4882a593Smuzhiyun 	case 0:
401*4882a593Smuzhiyun 		wm8731->constraints = NULL;
402*4882a593Smuzhiyun 		break;
403*4882a593Smuzhiyun 	case 12000000:
404*4882a593Smuzhiyun 		wm8731->constraints = &wm8731_constraints_12000000;
405*4882a593Smuzhiyun 		break;
406*4882a593Smuzhiyun 	case 12288000:
407*4882a593Smuzhiyun 	case 18432000:
408*4882a593Smuzhiyun 		wm8731->constraints = &wm8731_constraints_12288000_18432000;
409*4882a593Smuzhiyun 		break;
410*4882a593Smuzhiyun 	case 16934400:
411*4882a593Smuzhiyun 	case 11289600:
412*4882a593Smuzhiyun 		wm8731->constraints = &wm8731_constraints_11289600_16934400;
413*4882a593Smuzhiyun 		break;
414*4882a593Smuzhiyun 	default:
415*4882a593Smuzhiyun 		return -EINVAL;
416*4882a593Smuzhiyun 	}
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun 	wm8731->sysclk = freq;
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 	snd_soc_dapm_sync(dapm);
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 	return 0;
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun 
wm8731_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)426*4882a593Smuzhiyun static int wm8731_set_dai_fmt(struct snd_soc_dai *codec_dai,
427*4882a593Smuzhiyun 		unsigned int fmt)
428*4882a593Smuzhiyun {
429*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
430*4882a593Smuzhiyun 	u16 iface = 0;
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 	/* set master/slave audio interface */
433*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
434*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBM_CFM:
435*4882a593Smuzhiyun 		iface |= 0x0040;
436*4882a593Smuzhiyun 		break;
437*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBS_CFS:
438*4882a593Smuzhiyun 		break;
439*4882a593Smuzhiyun 	default:
440*4882a593Smuzhiyun 		return -EINVAL;
441*4882a593Smuzhiyun 	}
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	/* interface format */
444*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
445*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_I2S:
446*4882a593Smuzhiyun 		iface |= 0x0002;
447*4882a593Smuzhiyun 		break;
448*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_RIGHT_J:
449*4882a593Smuzhiyun 		break;
450*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_LEFT_J:
451*4882a593Smuzhiyun 		iface |= 0x0001;
452*4882a593Smuzhiyun 		break;
453*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_DSP_A:
454*4882a593Smuzhiyun 		iface |= 0x0013;
455*4882a593Smuzhiyun 		break;
456*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_DSP_B:
457*4882a593Smuzhiyun 		iface |= 0x0003;
458*4882a593Smuzhiyun 		break;
459*4882a593Smuzhiyun 	default:
460*4882a593Smuzhiyun 		return -EINVAL;
461*4882a593Smuzhiyun 	}
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 	/* clock inversion */
464*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
465*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_NF:
466*4882a593Smuzhiyun 		break;
467*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_IB_IF:
468*4882a593Smuzhiyun 		iface |= 0x0090;
469*4882a593Smuzhiyun 		break;
470*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_IB_NF:
471*4882a593Smuzhiyun 		iface |= 0x0080;
472*4882a593Smuzhiyun 		break;
473*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_IF:
474*4882a593Smuzhiyun 		iface |= 0x0010;
475*4882a593Smuzhiyun 		break;
476*4882a593Smuzhiyun 	default:
477*4882a593Smuzhiyun 		return -EINVAL;
478*4882a593Smuzhiyun 	}
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun 	/* set iface */
481*4882a593Smuzhiyun 	snd_soc_component_write(component, WM8731_IFACE, iface);
482*4882a593Smuzhiyun 	return 0;
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun 
wm8731_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)485*4882a593Smuzhiyun static int wm8731_set_bias_level(struct snd_soc_component *component,
486*4882a593Smuzhiyun 				 enum snd_soc_bias_level level)
487*4882a593Smuzhiyun {
488*4882a593Smuzhiyun 	struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
489*4882a593Smuzhiyun 	int ret;
490*4882a593Smuzhiyun 	u16 reg;
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 	switch (level) {
493*4882a593Smuzhiyun 	case SND_SOC_BIAS_ON:
494*4882a593Smuzhiyun 		if (wm8731->mclk) {
495*4882a593Smuzhiyun 			ret = clk_prepare_enable(wm8731->mclk);
496*4882a593Smuzhiyun 			if (ret)
497*4882a593Smuzhiyun 				return ret;
498*4882a593Smuzhiyun 		}
499*4882a593Smuzhiyun 		break;
500*4882a593Smuzhiyun 	case SND_SOC_BIAS_PREPARE:
501*4882a593Smuzhiyun 		break;
502*4882a593Smuzhiyun 	case SND_SOC_BIAS_STANDBY:
503*4882a593Smuzhiyun 		if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
504*4882a593Smuzhiyun 			ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
505*4882a593Smuzhiyun 						    wm8731->supplies);
506*4882a593Smuzhiyun 			if (ret != 0)
507*4882a593Smuzhiyun 				return ret;
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun 			regcache_sync(wm8731->regmap);
510*4882a593Smuzhiyun 		}
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun 		/* Clear PWROFF, gate CLKOUT, everything else as-is */
513*4882a593Smuzhiyun 		reg = snd_soc_component_read(component, WM8731_PWR) & 0xff7f;
514*4882a593Smuzhiyun 		snd_soc_component_write(component, WM8731_PWR, reg | 0x0040);
515*4882a593Smuzhiyun 		break;
516*4882a593Smuzhiyun 	case SND_SOC_BIAS_OFF:
517*4882a593Smuzhiyun 		if (wm8731->mclk)
518*4882a593Smuzhiyun 			clk_disable_unprepare(wm8731->mclk);
519*4882a593Smuzhiyun 		snd_soc_component_write(component, WM8731_PWR, 0xffff);
520*4882a593Smuzhiyun 		regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
521*4882a593Smuzhiyun 				       wm8731->supplies);
522*4882a593Smuzhiyun 		regcache_mark_dirty(wm8731->regmap);
523*4882a593Smuzhiyun 		break;
524*4882a593Smuzhiyun 	}
525*4882a593Smuzhiyun 	return 0;
526*4882a593Smuzhiyun }
527*4882a593Smuzhiyun 
wm8731_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)528*4882a593Smuzhiyun static int wm8731_startup(struct snd_pcm_substream *substream,
529*4882a593Smuzhiyun 	struct snd_soc_dai *dai)
530*4882a593Smuzhiyun {
531*4882a593Smuzhiyun 	struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(dai->component);
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	if (wm8731->constraints)
534*4882a593Smuzhiyun 		snd_pcm_hw_constraint_list(substream->runtime, 0,
535*4882a593Smuzhiyun 					   SNDRV_PCM_HW_PARAM_RATE,
536*4882a593Smuzhiyun 					   wm8731->constraints);
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 	return 0;
539*4882a593Smuzhiyun }
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun #define WM8731_RATES SNDRV_PCM_RATE_8000_96000
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun #define WM8731_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
544*4882a593Smuzhiyun 	SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun static const struct snd_soc_dai_ops wm8731_dai_ops = {
547*4882a593Smuzhiyun 	.startup	= wm8731_startup,
548*4882a593Smuzhiyun 	.hw_params	= wm8731_hw_params,
549*4882a593Smuzhiyun 	.mute_stream	= wm8731_mute,
550*4882a593Smuzhiyun 	.set_sysclk	= wm8731_set_dai_sysclk,
551*4882a593Smuzhiyun 	.set_fmt	= wm8731_set_dai_fmt,
552*4882a593Smuzhiyun 	.no_capture_mute = 1,
553*4882a593Smuzhiyun };
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun static struct snd_soc_dai_driver wm8731_dai = {
556*4882a593Smuzhiyun 	.name = "wm8731-hifi",
557*4882a593Smuzhiyun 	.playback = {
558*4882a593Smuzhiyun 		.stream_name = "Playback",
559*4882a593Smuzhiyun 		.channels_min = 1,
560*4882a593Smuzhiyun 		.channels_max = 2,
561*4882a593Smuzhiyun 		.rates = WM8731_RATES,
562*4882a593Smuzhiyun 		.formats = WM8731_FORMATS,},
563*4882a593Smuzhiyun 	.capture = {
564*4882a593Smuzhiyun 		.stream_name = "Capture",
565*4882a593Smuzhiyun 		.channels_min = 1,
566*4882a593Smuzhiyun 		.channels_max = 2,
567*4882a593Smuzhiyun 		.rates = WM8731_RATES,
568*4882a593Smuzhiyun 		.formats = WM8731_FORMATS,},
569*4882a593Smuzhiyun 	.ops = &wm8731_dai_ops,
570*4882a593Smuzhiyun 	.symmetric_rates = 1,
571*4882a593Smuzhiyun };
572*4882a593Smuzhiyun 
wm8731_request_supplies(struct device * dev,struct wm8731_priv * wm8731)573*4882a593Smuzhiyun static int wm8731_request_supplies(struct device *dev,
574*4882a593Smuzhiyun 		struct wm8731_priv *wm8731)
575*4882a593Smuzhiyun {
576*4882a593Smuzhiyun 	int ret = 0, i;
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(wm8731->supplies); i++)
579*4882a593Smuzhiyun 		wm8731->supplies[i].supply = wm8731_supply_names[i];
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun 	ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(wm8731->supplies),
582*4882a593Smuzhiyun 				 wm8731->supplies);
583*4882a593Smuzhiyun 	if (ret != 0) {
584*4882a593Smuzhiyun 		dev_err(dev, "Failed to request supplies: %d\n", ret);
585*4882a593Smuzhiyun 		return ret;
586*4882a593Smuzhiyun 	}
587*4882a593Smuzhiyun 
588*4882a593Smuzhiyun 	ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
589*4882a593Smuzhiyun 				    wm8731->supplies);
590*4882a593Smuzhiyun 	if (ret != 0) {
591*4882a593Smuzhiyun 		dev_err(dev, "Failed to enable supplies: %d\n", ret);
592*4882a593Smuzhiyun 		return ret;
593*4882a593Smuzhiyun 	}
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun 	return 0;
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun 
wm8731_hw_init(struct device * dev,struct wm8731_priv * wm8731)598*4882a593Smuzhiyun static int wm8731_hw_init(struct device *dev, struct wm8731_priv *wm8731)
599*4882a593Smuzhiyun {
600*4882a593Smuzhiyun 	int ret = 0;
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun 	ret = wm8731_reset(wm8731->regmap);
603*4882a593Smuzhiyun 	if (ret < 0) {
604*4882a593Smuzhiyun 		dev_err(dev, "Failed to issue reset: %d\n", ret);
605*4882a593Smuzhiyun 		goto err;
606*4882a593Smuzhiyun 	}
607*4882a593Smuzhiyun 
608*4882a593Smuzhiyun 	/* Clear POWEROFF, keep everything else disabled */
609*4882a593Smuzhiyun 	regmap_write(wm8731->regmap, WM8731_PWR, 0x7f);
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 	/* Latch the update bits */
612*4882a593Smuzhiyun 	regmap_update_bits(wm8731->regmap, WM8731_LOUT1V, 0x100, 0);
613*4882a593Smuzhiyun 	regmap_update_bits(wm8731->regmap, WM8731_ROUT1V, 0x100, 0);
614*4882a593Smuzhiyun 	regmap_update_bits(wm8731->regmap, WM8731_LINVOL, 0x100, 0);
615*4882a593Smuzhiyun 	regmap_update_bits(wm8731->regmap, WM8731_RINVOL, 0x100, 0);
616*4882a593Smuzhiyun 
617*4882a593Smuzhiyun 	/* Disable bypass path by default */
618*4882a593Smuzhiyun 	regmap_update_bits(wm8731->regmap, WM8731_APANA, 0x8, 0);
619*4882a593Smuzhiyun 
620*4882a593Smuzhiyun 	regcache_mark_dirty(wm8731->regmap);
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun err:
623*4882a593Smuzhiyun 	return ret;
624*4882a593Smuzhiyun }
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_dev_wm8731 = {
627*4882a593Smuzhiyun 	.set_bias_level		= wm8731_set_bias_level,
628*4882a593Smuzhiyun 	.controls		= wm8731_snd_controls,
629*4882a593Smuzhiyun 	.num_controls		= ARRAY_SIZE(wm8731_snd_controls),
630*4882a593Smuzhiyun 	.dapm_widgets		= wm8731_dapm_widgets,
631*4882a593Smuzhiyun 	.num_dapm_widgets	= ARRAY_SIZE(wm8731_dapm_widgets),
632*4882a593Smuzhiyun 	.dapm_routes		= wm8731_intercon,
633*4882a593Smuzhiyun 	.num_dapm_routes	= ARRAY_SIZE(wm8731_intercon),
634*4882a593Smuzhiyun 	.suspend_bias_off	= 1,
635*4882a593Smuzhiyun 	.idle_bias_on		= 1,
636*4882a593Smuzhiyun 	.use_pmdown_time	= 1,
637*4882a593Smuzhiyun 	.endianness		= 1,
638*4882a593Smuzhiyun 	.non_legacy_dai_naming	= 1,
639*4882a593Smuzhiyun };
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun static const struct of_device_id wm8731_of_match[] = {
642*4882a593Smuzhiyun 	{ .compatible = "wlf,wm8731", },
643*4882a593Smuzhiyun 	{ }
644*4882a593Smuzhiyun };
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, wm8731_of_match);
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun static const struct regmap_config wm8731_regmap = {
649*4882a593Smuzhiyun 	.reg_bits = 7,
650*4882a593Smuzhiyun 	.val_bits = 9,
651*4882a593Smuzhiyun 
652*4882a593Smuzhiyun 	.max_register = WM8731_RESET,
653*4882a593Smuzhiyun 	.volatile_reg = wm8731_volatile,
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun 	.cache_type = REGCACHE_RBTREE,
656*4882a593Smuzhiyun 	.reg_defaults = wm8731_reg_defaults,
657*4882a593Smuzhiyun 	.num_reg_defaults = ARRAY_SIZE(wm8731_reg_defaults),
658*4882a593Smuzhiyun };
659*4882a593Smuzhiyun 
660*4882a593Smuzhiyun #if defined(CONFIG_SPI_MASTER)
wm8731_spi_probe(struct spi_device * spi)661*4882a593Smuzhiyun static int wm8731_spi_probe(struct spi_device *spi)
662*4882a593Smuzhiyun {
663*4882a593Smuzhiyun 	struct wm8731_priv *wm8731;
664*4882a593Smuzhiyun 	int ret;
665*4882a593Smuzhiyun 
666*4882a593Smuzhiyun 	wm8731 = devm_kzalloc(&spi->dev, sizeof(*wm8731), GFP_KERNEL);
667*4882a593Smuzhiyun 	if (wm8731 == NULL)
668*4882a593Smuzhiyun 		return -ENOMEM;
669*4882a593Smuzhiyun 
670*4882a593Smuzhiyun 	wm8731->mclk = devm_clk_get(&spi->dev, "mclk");
671*4882a593Smuzhiyun 	if (IS_ERR(wm8731->mclk)) {
672*4882a593Smuzhiyun 		ret = PTR_ERR(wm8731->mclk);
673*4882a593Smuzhiyun 		if (ret == -ENOENT) {
674*4882a593Smuzhiyun 			wm8731->mclk = NULL;
675*4882a593Smuzhiyun 			dev_warn(&spi->dev, "Assuming static MCLK\n");
676*4882a593Smuzhiyun 		} else {
677*4882a593Smuzhiyun 			dev_err(&spi->dev, "Failed to get MCLK: %d\n",
678*4882a593Smuzhiyun 				ret);
679*4882a593Smuzhiyun 			return ret;
680*4882a593Smuzhiyun 		}
681*4882a593Smuzhiyun 	}
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun 	mutex_init(&wm8731->lock);
684*4882a593Smuzhiyun 
685*4882a593Smuzhiyun 	spi_set_drvdata(spi, wm8731);
686*4882a593Smuzhiyun 
687*4882a593Smuzhiyun 	ret = wm8731_request_supplies(&spi->dev, wm8731);
688*4882a593Smuzhiyun 	if (ret != 0)
689*4882a593Smuzhiyun 		return ret;
690*4882a593Smuzhiyun 
691*4882a593Smuzhiyun 	wm8731->regmap = devm_regmap_init_spi(spi, &wm8731_regmap);
692*4882a593Smuzhiyun 	if (IS_ERR(wm8731->regmap)) {
693*4882a593Smuzhiyun 		ret = PTR_ERR(wm8731->regmap);
694*4882a593Smuzhiyun 		dev_err(&spi->dev, "Failed to allocate register map: %d\n",
695*4882a593Smuzhiyun 			ret);
696*4882a593Smuzhiyun 		return ret;
697*4882a593Smuzhiyun 	}
698*4882a593Smuzhiyun 
699*4882a593Smuzhiyun 	ret = wm8731_hw_init(&spi->dev, wm8731);
700*4882a593Smuzhiyun 	if (ret != 0)
701*4882a593Smuzhiyun 		return ret;
702*4882a593Smuzhiyun 
703*4882a593Smuzhiyun 	ret = devm_snd_soc_register_component(&spi->dev,
704*4882a593Smuzhiyun 			&soc_component_dev_wm8731, &wm8731_dai, 1);
705*4882a593Smuzhiyun 	if (ret != 0) {
706*4882a593Smuzhiyun 		dev_err(&spi->dev, "Failed to register CODEC: %d\n", ret);
707*4882a593Smuzhiyun 		return ret;
708*4882a593Smuzhiyun 	}
709*4882a593Smuzhiyun 
710*4882a593Smuzhiyun 	return 0;
711*4882a593Smuzhiyun }
712*4882a593Smuzhiyun 
wm8731_spi_remove(struct spi_device * spi)713*4882a593Smuzhiyun static int wm8731_spi_remove(struct spi_device *spi)
714*4882a593Smuzhiyun {
715*4882a593Smuzhiyun 	return 0;
716*4882a593Smuzhiyun }
717*4882a593Smuzhiyun 
718*4882a593Smuzhiyun static struct spi_driver wm8731_spi_driver = {
719*4882a593Smuzhiyun 	.driver = {
720*4882a593Smuzhiyun 		.name	= "wm8731",
721*4882a593Smuzhiyun 		.of_match_table = wm8731_of_match,
722*4882a593Smuzhiyun 	},
723*4882a593Smuzhiyun 	.probe		= wm8731_spi_probe,
724*4882a593Smuzhiyun 	.remove		= wm8731_spi_remove,
725*4882a593Smuzhiyun };
726*4882a593Smuzhiyun #endif /* CONFIG_SPI_MASTER */
727*4882a593Smuzhiyun 
728*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_I2C)
wm8731_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)729*4882a593Smuzhiyun static int wm8731_i2c_probe(struct i2c_client *i2c,
730*4882a593Smuzhiyun 			    const struct i2c_device_id *id)
731*4882a593Smuzhiyun {
732*4882a593Smuzhiyun 	struct wm8731_priv *wm8731;
733*4882a593Smuzhiyun 	int ret;
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun 	wm8731 = devm_kzalloc(&i2c->dev, sizeof(struct wm8731_priv),
736*4882a593Smuzhiyun 			      GFP_KERNEL);
737*4882a593Smuzhiyun 	if (wm8731 == NULL)
738*4882a593Smuzhiyun 		return -ENOMEM;
739*4882a593Smuzhiyun 
740*4882a593Smuzhiyun 	wm8731->mclk = devm_clk_get(&i2c->dev, "mclk");
741*4882a593Smuzhiyun 	if (IS_ERR(wm8731->mclk)) {
742*4882a593Smuzhiyun 		ret = PTR_ERR(wm8731->mclk);
743*4882a593Smuzhiyun 		if (ret == -ENOENT) {
744*4882a593Smuzhiyun 			wm8731->mclk = NULL;
745*4882a593Smuzhiyun 			dev_warn(&i2c->dev, "Assuming static MCLK\n");
746*4882a593Smuzhiyun 		} else {
747*4882a593Smuzhiyun 			dev_err(&i2c->dev, "Failed to get MCLK: %d\n",
748*4882a593Smuzhiyun 				ret);
749*4882a593Smuzhiyun 			return ret;
750*4882a593Smuzhiyun 		}
751*4882a593Smuzhiyun 	}
752*4882a593Smuzhiyun 
753*4882a593Smuzhiyun 	mutex_init(&wm8731->lock);
754*4882a593Smuzhiyun 
755*4882a593Smuzhiyun 	i2c_set_clientdata(i2c, wm8731);
756*4882a593Smuzhiyun 
757*4882a593Smuzhiyun 	ret = wm8731_request_supplies(&i2c->dev, wm8731);
758*4882a593Smuzhiyun 	if (ret != 0)
759*4882a593Smuzhiyun 		return ret;
760*4882a593Smuzhiyun 
761*4882a593Smuzhiyun 	wm8731->regmap = devm_regmap_init_i2c(i2c, &wm8731_regmap);
762*4882a593Smuzhiyun 	if (IS_ERR(wm8731->regmap)) {
763*4882a593Smuzhiyun 		ret = PTR_ERR(wm8731->regmap);
764*4882a593Smuzhiyun 		dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
765*4882a593Smuzhiyun 			ret);
766*4882a593Smuzhiyun 		goto err_regulator_enable;
767*4882a593Smuzhiyun 	}
768*4882a593Smuzhiyun 
769*4882a593Smuzhiyun 	ret = wm8731_hw_init(&i2c->dev, wm8731);
770*4882a593Smuzhiyun 	if (ret != 0)
771*4882a593Smuzhiyun 		goto err_regulator_enable;
772*4882a593Smuzhiyun 
773*4882a593Smuzhiyun 	ret = devm_snd_soc_register_component(&i2c->dev,
774*4882a593Smuzhiyun 			&soc_component_dev_wm8731, &wm8731_dai, 1);
775*4882a593Smuzhiyun 	if (ret != 0) {
776*4882a593Smuzhiyun 		dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret);
777*4882a593Smuzhiyun 		goto err_regulator_enable;
778*4882a593Smuzhiyun 	}
779*4882a593Smuzhiyun 
780*4882a593Smuzhiyun 	return 0;
781*4882a593Smuzhiyun 
782*4882a593Smuzhiyun err_regulator_enable:
783*4882a593Smuzhiyun 	/* Regulators will be enabled by bias management */
784*4882a593Smuzhiyun 	regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
785*4882a593Smuzhiyun 
786*4882a593Smuzhiyun 	return ret;
787*4882a593Smuzhiyun }
788*4882a593Smuzhiyun 
wm8731_i2c_remove(struct i2c_client * client)789*4882a593Smuzhiyun static int wm8731_i2c_remove(struct i2c_client *client)
790*4882a593Smuzhiyun {
791*4882a593Smuzhiyun 	return 0;
792*4882a593Smuzhiyun }
793*4882a593Smuzhiyun 
794*4882a593Smuzhiyun static const struct i2c_device_id wm8731_i2c_id[] = {
795*4882a593Smuzhiyun 	{ "wm8731", 0 },
796*4882a593Smuzhiyun 	{ }
797*4882a593Smuzhiyun };
798*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, wm8731_i2c_id);
799*4882a593Smuzhiyun 
800*4882a593Smuzhiyun static struct i2c_driver wm8731_i2c_driver = {
801*4882a593Smuzhiyun 	.driver = {
802*4882a593Smuzhiyun 		.name = "wm8731",
803*4882a593Smuzhiyun 		.of_match_table = wm8731_of_match,
804*4882a593Smuzhiyun 	},
805*4882a593Smuzhiyun 	.probe =    wm8731_i2c_probe,
806*4882a593Smuzhiyun 	.remove =   wm8731_i2c_remove,
807*4882a593Smuzhiyun 	.id_table = wm8731_i2c_id,
808*4882a593Smuzhiyun };
809*4882a593Smuzhiyun #endif
810*4882a593Smuzhiyun 
wm8731_modinit(void)811*4882a593Smuzhiyun static int __init wm8731_modinit(void)
812*4882a593Smuzhiyun {
813*4882a593Smuzhiyun 	int ret = 0;
814*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_I2C)
815*4882a593Smuzhiyun 	ret = i2c_add_driver(&wm8731_i2c_driver);
816*4882a593Smuzhiyun 	if (ret != 0) {
817*4882a593Smuzhiyun 		printk(KERN_ERR "Failed to register WM8731 I2C driver: %d\n",
818*4882a593Smuzhiyun 		       ret);
819*4882a593Smuzhiyun 	}
820*4882a593Smuzhiyun #endif
821*4882a593Smuzhiyun #if defined(CONFIG_SPI_MASTER)
822*4882a593Smuzhiyun 	ret = spi_register_driver(&wm8731_spi_driver);
823*4882a593Smuzhiyun 	if (ret != 0) {
824*4882a593Smuzhiyun 		printk(KERN_ERR "Failed to register WM8731 SPI driver: %d\n",
825*4882a593Smuzhiyun 		       ret);
826*4882a593Smuzhiyun 	}
827*4882a593Smuzhiyun #endif
828*4882a593Smuzhiyun 	return ret;
829*4882a593Smuzhiyun }
830*4882a593Smuzhiyun module_init(wm8731_modinit);
831*4882a593Smuzhiyun 
wm8731_exit(void)832*4882a593Smuzhiyun static void __exit wm8731_exit(void)
833*4882a593Smuzhiyun {
834*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_I2C)
835*4882a593Smuzhiyun 	i2c_del_driver(&wm8731_i2c_driver);
836*4882a593Smuzhiyun #endif
837*4882a593Smuzhiyun #if defined(CONFIG_SPI_MASTER)
838*4882a593Smuzhiyun 	spi_unregister_driver(&wm8731_spi_driver);
839*4882a593Smuzhiyun #endif
840*4882a593Smuzhiyun }
841*4882a593Smuzhiyun module_exit(wm8731_exit);
842*4882a593Smuzhiyun 
843*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC WM8731 driver");
844*4882a593Smuzhiyun MODULE_AUTHOR("Richard Purdie");
845*4882a593Smuzhiyun MODULE_LICENSE("GPL");
846