xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/tlv320aic23.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * ALSA SoC TLV320AIC23 codec driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Author:      Arun KS, <arunks@mistralsolutions.com>
6*4882a593Smuzhiyun  * Copyright:   (C) 2008 Mistral Solutions Pvt Ltd.,
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Based on sound/soc/codecs/wm8731.c by Richard Purdie
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * Notes:
11*4882a593Smuzhiyun  *  The AIC23 is a driver for a low power stereo audio
12*4882a593Smuzhiyun  *  codec tlv320aic23
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  *  The machine layer should disable unsupported inputs/outputs by
15*4882a593Smuzhiyun  *  snd_soc_dapm_disable_pin(codec, "LHPOUT"), etc.
16*4882a593Smuzhiyun  */
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/moduleparam.h>
20*4882a593Smuzhiyun #include <linux/init.h>
21*4882a593Smuzhiyun #include <linux/delay.h>
22*4882a593Smuzhiyun #include <linux/pm.h>
23*4882a593Smuzhiyun #include <linux/regmap.h>
24*4882a593Smuzhiyun #include <linux/slab.h>
25*4882a593Smuzhiyun #include <sound/core.h>
26*4882a593Smuzhiyun #include <sound/pcm.h>
27*4882a593Smuzhiyun #include <sound/pcm_params.h>
28*4882a593Smuzhiyun #include <sound/soc.h>
29*4882a593Smuzhiyun #include <sound/tlv.h>
30*4882a593Smuzhiyun #include <sound/initval.h>
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #include "tlv320aic23.h"
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun /*
35*4882a593Smuzhiyun  * AIC23 register cache
36*4882a593Smuzhiyun  */
37*4882a593Smuzhiyun static const struct reg_default tlv320aic23_reg[] = {
38*4882a593Smuzhiyun 	{  0, 0x0097 },
39*4882a593Smuzhiyun 	{  1, 0x0097 },
40*4882a593Smuzhiyun 	{  2, 0x00F9 },
41*4882a593Smuzhiyun 	{  3, 0x00F9 },
42*4882a593Smuzhiyun 	{  4, 0x001A },
43*4882a593Smuzhiyun 	{  5, 0x0004 },
44*4882a593Smuzhiyun 	{  6, 0x0007 },
45*4882a593Smuzhiyun 	{  7, 0x0001 },
46*4882a593Smuzhiyun 	{  8, 0x0020 },
47*4882a593Smuzhiyun 	{  9, 0x0000 },
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun const struct regmap_config tlv320aic23_regmap = {
51*4882a593Smuzhiyun 	.reg_bits = 7,
52*4882a593Smuzhiyun 	.val_bits = 9,
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	.max_register = TLV320AIC23_RESET,
55*4882a593Smuzhiyun 	.reg_defaults = tlv320aic23_reg,
56*4882a593Smuzhiyun 	.num_reg_defaults = ARRAY_SIZE(tlv320aic23_reg),
57*4882a593Smuzhiyun 	.cache_type = REGCACHE_RBTREE,
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun EXPORT_SYMBOL(tlv320aic23_regmap);
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun static const char *rec_src_text[] = { "Line", "Mic" };
62*4882a593Smuzhiyun static const char *deemph_text[] = {"None", "32Khz", "44.1Khz", "48Khz"};
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(rec_src_enum,
65*4882a593Smuzhiyun 			    TLV320AIC23_ANLG, 2, rec_src_text);
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun static const struct snd_kcontrol_new tlv320aic23_rec_src_mux_controls =
68*4882a593Smuzhiyun SOC_DAPM_ENUM("Input Select", rec_src_enum);
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(tlv320aic23_deemph,
71*4882a593Smuzhiyun 			    TLV320AIC23_DIGT, 1, deemph_text);
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(out_gain_tlv, -12100, 100, 0);
74*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(input_gain_tlv, -1725, 75, 0);
75*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(sidetone_vol_tlv, -1800, 300, 0);
76*4882a593Smuzhiyun 
snd_soc_tlv320aic23_put_volsw(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)77*4882a593Smuzhiyun static int snd_soc_tlv320aic23_put_volsw(struct snd_kcontrol *kcontrol,
78*4882a593Smuzhiyun 	struct snd_ctl_elem_value *ucontrol)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
81*4882a593Smuzhiyun 	u16 val, reg;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	val = (ucontrol->value.integer.value[0] & 0x07);
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	/* linear conversion to userspace
86*4882a593Smuzhiyun 	* 000	=	-6db
87*4882a593Smuzhiyun 	* 001	=	-9db
88*4882a593Smuzhiyun 	* 010	=	-12db
89*4882a593Smuzhiyun 	* 011	=	-18db (Min)
90*4882a593Smuzhiyun 	* 100	=	0db (Max)
91*4882a593Smuzhiyun 	*/
92*4882a593Smuzhiyun 	val = (val >= 4) ? 4  : (3 - val);
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	reg = snd_soc_component_read(component, TLV320AIC23_ANLG) & (~0x1C0);
95*4882a593Smuzhiyun 	snd_soc_component_write(component, TLV320AIC23_ANLG, reg | (val << 6));
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	return 0;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
snd_soc_tlv320aic23_get_volsw(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)100*4882a593Smuzhiyun static int snd_soc_tlv320aic23_get_volsw(struct snd_kcontrol *kcontrol,
101*4882a593Smuzhiyun 	struct snd_ctl_elem_value *ucontrol)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
104*4882a593Smuzhiyun 	u16 val;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	val = snd_soc_component_read(component, TLV320AIC23_ANLG) & (0x1C0);
107*4882a593Smuzhiyun 	val = val >> 6;
108*4882a593Smuzhiyun 	val = (val >= 4) ? 4  : (3 -  val);
109*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val;
110*4882a593Smuzhiyun 	return 0;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun static const struct snd_kcontrol_new tlv320aic23_snd_controls[] = {
115*4882a593Smuzhiyun 	SOC_DOUBLE_R_TLV("Digital Playback Volume", TLV320AIC23_LCHNVOL,
116*4882a593Smuzhiyun 			 TLV320AIC23_RCHNVOL, 0, 127, 0, out_gain_tlv),
117*4882a593Smuzhiyun 	SOC_SINGLE("Digital Playback Switch", TLV320AIC23_DIGT, 3, 1, 1),
118*4882a593Smuzhiyun 	SOC_DOUBLE_R("Line Input Switch", TLV320AIC23_LINVOL,
119*4882a593Smuzhiyun 		     TLV320AIC23_RINVOL, 7, 1, 0),
120*4882a593Smuzhiyun 	SOC_DOUBLE_R_TLV("Line Input Volume", TLV320AIC23_LINVOL,
121*4882a593Smuzhiyun 			 TLV320AIC23_RINVOL, 0, 31, 0, input_gain_tlv),
122*4882a593Smuzhiyun 	SOC_SINGLE("Mic Input Switch", TLV320AIC23_ANLG, 1, 1, 1),
123*4882a593Smuzhiyun 	SOC_SINGLE("Mic Booster Switch", TLV320AIC23_ANLG, 0, 1, 0),
124*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("Sidetone Volume", TLV320AIC23_ANLG, 6, 4, 0,
125*4882a593Smuzhiyun 			   snd_soc_tlv320aic23_get_volsw,
126*4882a593Smuzhiyun 			   snd_soc_tlv320aic23_put_volsw, sidetone_vol_tlv),
127*4882a593Smuzhiyun 	SOC_ENUM("Playback De-emphasis", tlv320aic23_deemph),
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun /* PGA Mixer controls for Line and Mic switch */
131*4882a593Smuzhiyun static const struct snd_kcontrol_new tlv320aic23_output_mixer_controls[] = {
132*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Line Bypass Switch", TLV320AIC23_ANLG, 3, 1, 0),
133*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Mic Sidetone Switch", TLV320AIC23_ANLG, 5, 1, 0),
134*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Playback Switch", TLV320AIC23_ANLG, 4, 1, 0),
135*4882a593Smuzhiyun };
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun static const struct snd_soc_dapm_widget tlv320aic23_dapm_widgets[] = {
138*4882a593Smuzhiyun 	SND_SOC_DAPM_DAC("DAC", "Playback", TLV320AIC23_PWR, 3, 1),
139*4882a593Smuzhiyun 	SND_SOC_DAPM_ADC("ADC", "Capture", TLV320AIC23_PWR, 2, 1),
140*4882a593Smuzhiyun 	SND_SOC_DAPM_MUX("Capture Source", SND_SOC_NOPM, 0, 0,
141*4882a593Smuzhiyun 			 &tlv320aic23_rec_src_mux_controls),
142*4882a593Smuzhiyun 	SND_SOC_DAPM_MIXER("Output Mixer", TLV320AIC23_PWR, 4, 1,
143*4882a593Smuzhiyun 			   &tlv320aic23_output_mixer_controls[0],
144*4882a593Smuzhiyun 			   ARRAY_SIZE(tlv320aic23_output_mixer_controls)),
145*4882a593Smuzhiyun 	SND_SOC_DAPM_PGA("Line Input", TLV320AIC23_PWR, 0, 1, NULL, 0),
146*4882a593Smuzhiyun 	SND_SOC_DAPM_PGA("Mic Input", TLV320AIC23_PWR, 1, 1, NULL, 0),
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("LHPOUT"),
149*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("RHPOUT"),
150*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("LOUT"),
151*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("ROUT"),
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("LLINEIN"),
154*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("RLINEIN"),
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("MICIN"),
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun static const struct snd_soc_dapm_route tlv320aic23_intercon[] = {
160*4882a593Smuzhiyun 	/* Output Mixer */
161*4882a593Smuzhiyun 	{"Output Mixer", "Line Bypass Switch", "Line Input"},
162*4882a593Smuzhiyun 	{"Output Mixer", "Playback Switch", "DAC"},
163*4882a593Smuzhiyun 	{"Output Mixer", "Mic Sidetone Switch", "Mic Input"},
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	/* Outputs */
166*4882a593Smuzhiyun 	{"RHPOUT", NULL, "Output Mixer"},
167*4882a593Smuzhiyun 	{"LHPOUT", NULL, "Output Mixer"},
168*4882a593Smuzhiyun 	{"LOUT", NULL, "Output Mixer"},
169*4882a593Smuzhiyun 	{"ROUT", NULL, "Output Mixer"},
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	/* Inputs */
172*4882a593Smuzhiyun 	{"Line Input", NULL, "LLINEIN"},
173*4882a593Smuzhiyun 	{"Line Input", NULL, "RLINEIN"},
174*4882a593Smuzhiyun 	{"Mic Input", NULL, "MICIN"},
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	/* input mux */
177*4882a593Smuzhiyun 	{"Capture Source", "Line", "Line Input"},
178*4882a593Smuzhiyun 	{"Capture Source", "Mic", "Mic Input"},
179*4882a593Smuzhiyun 	{"ADC", NULL, "Capture Source"},
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun /* AIC23 driver data */
184*4882a593Smuzhiyun struct aic23 {
185*4882a593Smuzhiyun 	struct regmap *regmap;
186*4882a593Smuzhiyun 	int mclk;
187*4882a593Smuzhiyun 	int requested_adc;
188*4882a593Smuzhiyun 	int requested_dac;
189*4882a593Smuzhiyun };
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun /*
192*4882a593Smuzhiyun  * Common Crystals used
193*4882a593Smuzhiyun  * 11.2896 Mhz /128 = *88.2k  /192 = 58.8k
194*4882a593Smuzhiyun  * 12.0000 Mhz /125 = *96k    /136 = 88.235K
195*4882a593Smuzhiyun  * 12.2880 Mhz /128 = *96k    /192 = 64k
196*4882a593Smuzhiyun  * 16.9344 Mhz /128 = 132.3k /192 = *88.2k
197*4882a593Smuzhiyun  * 18.4320 Mhz /128 = 144k   /192 = *96k
198*4882a593Smuzhiyun  */
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun /*
201*4882a593Smuzhiyun  * Normal BOSR 0-256/2 = 128, 1-384/2 = 192
202*4882a593Smuzhiyun  * USB BOSR 0-250/2 = 125, 1-272/2 = 136
203*4882a593Smuzhiyun  */
204*4882a593Smuzhiyun static const int bosr_usb_divisor_table[] = {
205*4882a593Smuzhiyun 	128, 125, 192, 136
206*4882a593Smuzhiyun };
207*4882a593Smuzhiyun #define LOWER_GROUP ((1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<6) | (1<<7))
208*4882a593Smuzhiyun #define UPPER_GROUP ((1<<8) | (1<<9) | (1<<10) | (1<<11)        | (1<<15))
209*4882a593Smuzhiyun static const unsigned short sr_valid_mask[] = {
210*4882a593Smuzhiyun 	LOWER_GROUP|UPPER_GROUP,	/* Normal, bosr - 0*/
211*4882a593Smuzhiyun 	LOWER_GROUP,			/* Usb, bosr - 0*/
212*4882a593Smuzhiyun 	LOWER_GROUP|UPPER_GROUP,	/* Normal, bosr - 1*/
213*4882a593Smuzhiyun 	UPPER_GROUP,			/* Usb, bosr - 1*/
214*4882a593Smuzhiyun };
215*4882a593Smuzhiyun /*
216*4882a593Smuzhiyun  * Every divisor is a factor of 11*12
217*4882a593Smuzhiyun  */
218*4882a593Smuzhiyun #define SR_MULT (11*12)
219*4882a593Smuzhiyun #define A(x) (SR_MULT/x)
220*4882a593Smuzhiyun static const unsigned char sr_adc_mult_table[] = {
221*4882a593Smuzhiyun 	A(2), A(2), A(12), A(12),  0, 0, A(3), A(1),
222*4882a593Smuzhiyun 	A(2), A(2), A(11), A(11),  0, 0, 0, A(1)
223*4882a593Smuzhiyun };
224*4882a593Smuzhiyun static const unsigned char sr_dac_mult_table[] = {
225*4882a593Smuzhiyun 	A(2), A(12), A(2), A(12),  0, 0, A(3), A(1),
226*4882a593Smuzhiyun 	A(2), A(11), A(2), A(11),  0, 0, 0, A(1)
227*4882a593Smuzhiyun };
228*4882a593Smuzhiyun 
get_score(int adc,int adc_l,int adc_h,int need_adc,int dac,int dac_l,int dac_h,int need_dac)229*4882a593Smuzhiyun static unsigned get_score(int adc, int adc_l, int adc_h, int need_adc,
230*4882a593Smuzhiyun 		int dac, int dac_l, int dac_h, int need_dac)
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun 	if ((adc >= adc_l) && (adc <= adc_h) &&
233*4882a593Smuzhiyun 			(dac >= dac_l) && (dac <= dac_h)) {
234*4882a593Smuzhiyun 		int diff_adc = need_adc - adc;
235*4882a593Smuzhiyun 		int diff_dac = need_dac - dac;
236*4882a593Smuzhiyun 		return abs(diff_adc) + abs(diff_dac);
237*4882a593Smuzhiyun 	}
238*4882a593Smuzhiyun 	return UINT_MAX;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun 
find_rate(int mclk,u32 need_adc,u32 need_dac)241*4882a593Smuzhiyun static int find_rate(int mclk, u32 need_adc, u32 need_dac)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun 	int i, j;
244*4882a593Smuzhiyun 	int best_i = -1;
245*4882a593Smuzhiyun 	int best_j = -1;
246*4882a593Smuzhiyun 	int best_div = 0;
247*4882a593Smuzhiyun 	unsigned best_score = UINT_MAX;
248*4882a593Smuzhiyun 	int adc_l, adc_h, dac_l, dac_h;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	need_adc *= SR_MULT;
251*4882a593Smuzhiyun 	need_dac *= SR_MULT;
252*4882a593Smuzhiyun 	/*
253*4882a593Smuzhiyun 	 * rates given are +/- 1/32
254*4882a593Smuzhiyun 	 */
255*4882a593Smuzhiyun 	adc_l = need_adc - (need_adc >> 5);
256*4882a593Smuzhiyun 	adc_h = need_adc + (need_adc >> 5);
257*4882a593Smuzhiyun 	dac_l = need_dac - (need_dac >> 5);
258*4882a593Smuzhiyun 	dac_h = need_dac + (need_dac >> 5);
259*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(bosr_usb_divisor_table); i++) {
260*4882a593Smuzhiyun 		int base = mclk / bosr_usb_divisor_table[i];
261*4882a593Smuzhiyun 		int mask = sr_valid_mask[i];
262*4882a593Smuzhiyun 		for (j = 0; j < ARRAY_SIZE(sr_adc_mult_table);
263*4882a593Smuzhiyun 				j++, mask >>= 1) {
264*4882a593Smuzhiyun 			int adc;
265*4882a593Smuzhiyun 			int dac;
266*4882a593Smuzhiyun 			int score;
267*4882a593Smuzhiyun 			if ((mask & 1) == 0)
268*4882a593Smuzhiyun 				continue;
269*4882a593Smuzhiyun 			adc = base * sr_adc_mult_table[j];
270*4882a593Smuzhiyun 			dac = base * sr_dac_mult_table[j];
271*4882a593Smuzhiyun 			score = get_score(adc, adc_l, adc_h, need_adc,
272*4882a593Smuzhiyun 					dac, dac_l, dac_h, need_dac);
273*4882a593Smuzhiyun 			if (best_score > score) {
274*4882a593Smuzhiyun 				best_score = score;
275*4882a593Smuzhiyun 				best_i = i;
276*4882a593Smuzhiyun 				best_j = j;
277*4882a593Smuzhiyun 				best_div = 0;
278*4882a593Smuzhiyun 			}
279*4882a593Smuzhiyun 			score = get_score((adc >> 1), adc_l, adc_h, need_adc,
280*4882a593Smuzhiyun 					(dac >> 1), dac_l, dac_h, need_dac);
281*4882a593Smuzhiyun 			/* prefer to have a /2 */
282*4882a593Smuzhiyun 			if ((score != UINT_MAX) && (best_score >= score)) {
283*4882a593Smuzhiyun 				best_score = score;
284*4882a593Smuzhiyun 				best_i = i;
285*4882a593Smuzhiyun 				best_j = j;
286*4882a593Smuzhiyun 				best_div = 1;
287*4882a593Smuzhiyun 			}
288*4882a593Smuzhiyun 		}
289*4882a593Smuzhiyun 	}
290*4882a593Smuzhiyun 	return (best_j << 2) | best_i | (best_div << TLV320AIC23_CLKIN_SHIFT);
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun #ifdef DEBUG
get_current_sample_rates(struct snd_soc_component * component,int mclk,u32 * sample_rate_adc,u32 * sample_rate_dac)294*4882a593Smuzhiyun static void get_current_sample_rates(struct snd_soc_component *component, int mclk,
295*4882a593Smuzhiyun 		u32 *sample_rate_adc, u32 *sample_rate_dac)
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun 	int src = snd_soc_component_read(component, TLV320AIC23_SRATE);
298*4882a593Smuzhiyun 	int sr = (src >> 2) & 0x0f;
299*4882a593Smuzhiyun 	int val = (mclk / bosr_usb_divisor_table[src & 3]);
300*4882a593Smuzhiyun 	int adc = (val * sr_adc_mult_table[sr]) / SR_MULT;
301*4882a593Smuzhiyun 	int dac = (val * sr_dac_mult_table[sr]) / SR_MULT;
302*4882a593Smuzhiyun 	if (src & TLV320AIC23_CLKIN_HALF) {
303*4882a593Smuzhiyun 		adc >>= 1;
304*4882a593Smuzhiyun 		dac >>= 1;
305*4882a593Smuzhiyun 	}
306*4882a593Smuzhiyun 	*sample_rate_adc = adc;
307*4882a593Smuzhiyun 	*sample_rate_dac = dac;
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun #endif
310*4882a593Smuzhiyun 
set_sample_rate_control(struct snd_soc_component * component,int mclk,u32 sample_rate_adc,u32 sample_rate_dac)311*4882a593Smuzhiyun static int set_sample_rate_control(struct snd_soc_component *component, int mclk,
312*4882a593Smuzhiyun 		u32 sample_rate_adc, u32 sample_rate_dac)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun 	/* Search for the right sample rate */
315*4882a593Smuzhiyun 	int data = find_rate(mclk, sample_rate_adc, sample_rate_dac);
316*4882a593Smuzhiyun 	if (data < 0) {
317*4882a593Smuzhiyun 		printk(KERN_ERR "%s:Invalid rate %u,%u requested\n",
318*4882a593Smuzhiyun 				__func__, sample_rate_adc, sample_rate_dac);
319*4882a593Smuzhiyun 		return -EINVAL;
320*4882a593Smuzhiyun 	}
321*4882a593Smuzhiyun 	snd_soc_component_write(component, TLV320AIC23_SRATE, data);
322*4882a593Smuzhiyun #ifdef DEBUG
323*4882a593Smuzhiyun 	{
324*4882a593Smuzhiyun 		u32 adc, dac;
325*4882a593Smuzhiyun 		get_current_sample_rates(component, mclk, &adc, &dac);
326*4882a593Smuzhiyun 		printk(KERN_DEBUG "actual samplerate = %u,%u reg=%x\n",
327*4882a593Smuzhiyun 			adc, dac, data);
328*4882a593Smuzhiyun 	}
329*4882a593Smuzhiyun #endif
330*4882a593Smuzhiyun 	return 0;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun 
tlv320aic23_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)333*4882a593Smuzhiyun static int tlv320aic23_hw_params(struct snd_pcm_substream *substream,
334*4882a593Smuzhiyun 				 struct snd_pcm_hw_params *params,
335*4882a593Smuzhiyun 				 struct snd_soc_dai *dai)
336*4882a593Smuzhiyun {
337*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
338*4882a593Smuzhiyun 	u16 iface_reg;
339*4882a593Smuzhiyun 	int ret;
340*4882a593Smuzhiyun 	struct aic23 *aic23 = snd_soc_component_get_drvdata(component);
341*4882a593Smuzhiyun 	u32 sample_rate_adc = aic23->requested_adc;
342*4882a593Smuzhiyun 	u32 sample_rate_dac = aic23->requested_dac;
343*4882a593Smuzhiyun 	u32 sample_rate = params_rate(params);
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
346*4882a593Smuzhiyun 		aic23->requested_dac = sample_rate_dac = sample_rate;
347*4882a593Smuzhiyun 		if (!sample_rate_adc)
348*4882a593Smuzhiyun 			sample_rate_adc = sample_rate;
349*4882a593Smuzhiyun 	} else {
350*4882a593Smuzhiyun 		aic23->requested_adc = sample_rate_adc = sample_rate;
351*4882a593Smuzhiyun 		if (!sample_rate_dac)
352*4882a593Smuzhiyun 			sample_rate_dac = sample_rate;
353*4882a593Smuzhiyun 	}
354*4882a593Smuzhiyun 	ret = set_sample_rate_control(component, aic23->mclk, sample_rate_adc,
355*4882a593Smuzhiyun 			sample_rate_dac);
356*4882a593Smuzhiyun 	if (ret < 0)
357*4882a593Smuzhiyun 		return ret;
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun 	iface_reg = snd_soc_component_read(component, TLV320AIC23_DIGT_FMT) & ~(0x03 << 2);
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	switch (params_width(params)) {
362*4882a593Smuzhiyun 	case 16:
363*4882a593Smuzhiyun 		break;
364*4882a593Smuzhiyun 	case 20:
365*4882a593Smuzhiyun 		iface_reg |= (0x01 << 2);
366*4882a593Smuzhiyun 		break;
367*4882a593Smuzhiyun 	case 24:
368*4882a593Smuzhiyun 		iface_reg |= (0x02 << 2);
369*4882a593Smuzhiyun 		break;
370*4882a593Smuzhiyun 	case 32:
371*4882a593Smuzhiyun 		iface_reg |= (0x03 << 2);
372*4882a593Smuzhiyun 		break;
373*4882a593Smuzhiyun 	}
374*4882a593Smuzhiyun 	snd_soc_component_write(component, TLV320AIC23_DIGT_FMT, iface_reg);
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	return 0;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun 
tlv320aic23_pcm_prepare(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)379*4882a593Smuzhiyun static int tlv320aic23_pcm_prepare(struct snd_pcm_substream *substream,
380*4882a593Smuzhiyun 				   struct snd_soc_dai *dai)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 	/* set active */
385*4882a593Smuzhiyun 	snd_soc_component_write(component, TLV320AIC23_ACTIVE, 0x0001);
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun 	return 0;
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun 
tlv320aic23_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)390*4882a593Smuzhiyun static void tlv320aic23_shutdown(struct snd_pcm_substream *substream,
391*4882a593Smuzhiyun 				 struct snd_soc_dai *dai)
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
394*4882a593Smuzhiyun 	struct aic23 *aic23 = snd_soc_component_get_drvdata(component);
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun 	/* deactivate */
397*4882a593Smuzhiyun 	if (!snd_soc_component_active(component)) {
398*4882a593Smuzhiyun 		udelay(50);
399*4882a593Smuzhiyun 		snd_soc_component_write(component, TLV320AIC23_ACTIVE, 0x0);
400*4882a593Smuzhiyun 	}
401*4882a593Smuzhiyun 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
402*4882a593Smuzhiyun 		aic23->requested_dac = 0;
403*4882a593Smuzhiyun 	else
404*4882a593Smuzhiyun 		aic23->requested_adc = 0;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun 
tlv320aic23_mute(struct snd_soc_dai * dai,int mute,int direction)407*4882a593Smuzhiyun static int tlv320aic23_mute(struct snd_soc_dai *dai, int mute, int direction)
408*4882a593Smuzhiyun {
409*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
410*4882a593Smuzhiyun 	u16 reg;
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	reg = snd_soc_component_read(component, TLV320AIC23_DIGT);
413*4882a593Smuzhiyun 	if (mute)
414*4882a593Smuzhiyun 		reg |= TLV320AIC23_DACM_MUTE;
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	else
417*4882a593Smuzhiyun 		reg &= ~TLV320AIC23_DACM_MUTE;
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	snd_soc_component_write(component, TLV320AIC23_DIGT, reg);
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun 	return 0;
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun 
tlv320aic23_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)424*4882a593Smuzhiyun static int tlv320aic23_set_dai_fmt(struct snd_soc_dai *codec_dai,
425*4882a593Smuzhiyun 				   unsigned int fmt)
426*4882a593Smuzhiyun {
427*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
428*4882a593Smuzhiyun 	u16 iface_reg;
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun 	iface_reg = snd_soc_component_read(component, TLV320AIC23_DIGT_FMT) & (~0x03);
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 	/* set master/slave audio interface */
433*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
434*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBM_CFM:
435*4882a593Smuzhiyun 		iface_reg |= TLV320AIC23_MS_MASTER;
436*4882a593Smuzhiyun 		break;
437*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBS_CFS:
438*4882a593Smuzhiyun 		iface_reg &= ~TLV320AIC23_MS_MASTER;
439*4882a593Smuzhiyun 		break;
440*4882a593Smuzhiyun 	default:
441*4882a593Smuzhiyun 		return -EINVAL;
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	}
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 	/* interface format */
446*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
447*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_I2S:
448*4882a593Smuzhiyun 		iface_reg |= TLV320AIC23_FOR_I2S;
449*4882a593Smuzhiyun 		break;
450*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_DSP_A:
451*4882a593Smuzhiyun 		iface_reg |= TLV320AIC23_LRP_ON;
452*4882a593Smuzhiyun 		fallthrough;
453*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_DSP_B:
454*4882a593Smuzhiyun 		iface_reg |= TLV320AIC23_FOR_DSP;
455*4882a593Smuzhiyun 		break;
456*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_RIGHT_J:
457*4882a593Smuzhiyun 		break;
458*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_LEFT_J:
459*4882a593Smuzhiyun 		iface_reg |= TLV320AIC23_FOR_LJUST;
460*4882a593Smuzhiyun 		break;
461*4882a593Smuzhiyun 	default:
462*4882a593Smuzhiyun 		return -EINVAL;
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	}
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	snd_soc_component_write(component, TLV320AIC23_DIGT_FMT, iface_reg);
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun 	return 0;
469*4882a593Smuzhiyun }
470*4882a593Smuzhiyun 
tlv320aic23_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)471*4882a593Smuzhiyun static int tlv320aic23_set_dai_sysclk(struct snd_soc_dai *codec_dai,
472*4882a593Smuzhiyun 				      int clk_id, unsigned int freq, int dir)
473*4882a593Smuzhiyun {
474*4882a593Smuzhiyun 	struct aic23 *aic23 = snd_soc_dai_get_drvdata(codec_dai);
475*4882a593Smuzhiyun 	aic23->mclk = freq;
476*4882a593Smuzhiyun 	return 0;
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun 
tlv320aic23_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)479*4882a593Smuzhiyun static int tlv320aic23_set_bias_level(struct snd_soc_component *component,
480*4882a593Smuzhiyun 				      enum snd_soc_bias_level level)
481*4882a593Smuzhiyun {
482*4882a593Smuzhiyun 	u16 reg = snd_soc_component_read(component, TLV320AIC23_PWR) & 0x17f;
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	switch (level) {
485*4882a593Smuzhiyun 	case SND_SOC_BIAS_ON:
486*4882a593Smuzhiyun 		/* vref/mid, osc on, dac unmute */
487*4882a593Smuzhiyun 		reg &= ~(TLV320AIC23_DEVICE_PWR_OFF | TLV320AIC23_OSC_OFF | \
488*4882a593Smuzhiyun 			TLV320AIC23_DAC_OFF);
489*4882a593Smuzhiyun 		snd_soc_component_write(component, TLV320AIC23_PWR, reg);
490*4882a593Smuzhiyun 		break;
491*4882a593Smuzhiyun 	case SND_SOC_BIAS_PREPARE:
492*4882a593Smuzhiyun 		break;
493*4882a593Smuzhiyun 	case SND_SOC_BIAS_STANDBY:
494*4882a593Smuzhiyun 		/* everything off except vref/vmid, */
495*4882a593Smuzhiyun 		snd_soc_component_write(component, TLV320AIC23_PWR,
496*4882a593Smuzhiyun 			      reg | TLV320AIC23_CLK_OFF);
497*4882a593Smuzhiyun 		break;
498*4882a593Smuzhiyun 	case SND_SOC_BIAS_OFF:
499*4882a593Smuzhiyun 		/* everything off, dac mute, inactive */
500*4882a593Smuzhiyun 		snd_soc_component_write(component, TLV320AIC23_ACTIVE, 0x0);
501*4882a593Smuzhiyun 		snd_soc_component_write(component, TLV320AIC23_PWR, 0x1ff);
502*4882a593Smuzhiyun 		break;
503*4882a593Smuzhiyun 	}
504*4882a593Smuzhiyun 	return 0;
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun #define AIC23_RATES	SNDRV_PCM_RATE_8000_96000
508*4882a593Smuzhiyun #define AIC23_FORMATS	(SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
509*4882a593Smuzhiyun 			 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun static const struct snd_soc_dai_ops tlv320aic23_dai_ops = {
512*4882a593Smuzhiyun 	.prepare	= tlv320aic23_pcm_prepare,
513*4882a593Smuzhiyun 	.hw_params	= tlv320aic23_hw_params,
514*4882a593Smuzhiyun 	.shutdown	= tlv320aic23_shutdown,
515*4882a593Smuzhiyun 	.mute_stream	= tlv320aic23_mute,
516*4882a593Smuzhiyun 	.set_fmt	= tlv320aic23_set_dai_fmt,
517*4882a593Smuzhiyun 	.set_sysclk	= tlv320aic23_set_dai_sysclk,
518*4882a593Smuzhiyun 	.no_capture_mute = 1,
519*4882a593Smuzhiyun };
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun static struct snd_soc_dai_driver tlv320aic23_dai = {
522*4882a593Smuzhiyun 	.name = "tlv320aic23-hifi",
523*4882a593Smuzhiyun 	.playback = {
524*4882a593Smuzhiyun 		     .stream_name = "Playback",
525*4882a593Smuzhiyun 		     .channels_min = 2,
526*4882a593Smuzhiyun 		     .channels_max = 2,
527*4882a593Smuzhiyun 		     .rates = AIC23_RATES,
528*4882a593Smuzhiyun 		     .formats = AIC23_FORMATS,},
529*4882a593Smuzhiyun 	.capture = {
530*4882a593Smuzhiyun 		    .stream_name = "Capture",
531*4882a593Smuzhiyun 		    .channels_min = 2,
532*4882a593Smuzhiyun 		    .channels_max = 2,
533*4882a593Smuzhiyun 		    .rates = AIC23_RATES,
534*4882a593Smuzhiyun 		    .formats = AIC23_FORMATS,},
535*4882a593Smuzhiyun 	.ops = &tlv320aic23_dai_ops,
536*4882a593Smuzhiyun };
537*4882a593Smuzhiyun 
tlv320aic23_resume(struct snd_soc_component * component)538*4882a593Smuzhiyun static int tlv320aic23_resume(struct snd_soc_component *component)
539*4882a593Smuzhiyun {
540*4882a593Smuzhiyun 	struct aic23 *aic23 = snd_soc_component_get_drvdata(component);
541*4882a593Smuzhiyun 	regcache_mark_dirty(aic23->regmap);
542*4882a593Smuzhiyun 	regcache_sync(aic23->regmap);
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	return 0;
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun 
tlv320aic23_component_probe(struct snd_soc_component * component)547*4882a593Smuzhiyun static int tlv320aic23_component_probe(struct snd_soc_component *component)
548*4882a593Smuzhiyun {
549*4882a593Smuzhiyun 	/* Reset codec */
550*4882a593Smuzhiyun 	snd_soc_component_write(component, TLV320AIC23_RESET, 0);
551*4882a593Smuzhiyun 
552*4882a593Smuzhiyun 	snd_soc_component_write(component, TLV320AIC23_DIGT, TLV320AIC23_DEEMP_44K);
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun 	/* Unmute input */
555*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, TLV320AIC23_LINVOL,
556*4882a593Smuzhiyun 			    TLV320AIC23_LIM_MUTED, TLV320AIC23_LRS_ENABLED);
557*4882a593Smuzhiyun 
558*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, TLV320AIC23_RINVOL,
559*4882a593Smuzhiyun 			    TLV320AIC23_LIM_MUTED, TLV320AIC23_LRS_ENABLED);
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, TLV320AIC23_ANLG,
562*4882a593Smuzhiyun 			    TLV320AIC23_BYPASS_ON | TLV320AIC23_MICM_MUTED,
563*4882a593Smuzhiyun 			    0);
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun 	/* Default output volume */
566*4882a593Smuzhiyun 	snd_soc_component_write(component, TLV320AIC23_LCHNVOL,
567*4882a593Smuzhiyun 		      TLV320AIC23_DEFAULT_OUT_VOL & TLV320AIC23_OUT_VOL_MASK);
568*4882a593Smuzhiyun 	snd_soc_component_write(component, TLV320AIC23_RCHNVOL,
569*4882a593Smuzhiyun 		      TLV320AIC23_DEFAULT_OUT_VOL & TLV320AIC23_OUT_VOL_MASK);
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun 	snd_soc_component_write(component, TLV320AIC23_ACTIVE, 0x1);
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun 	return 0;
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun 
576*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_dev_tlv320aic23 = {
577*4882a593Smuzhiyun 	.probe			= tlv320aic23_component_probe,
578*4882a593Smuzhiyun 	.resume			= tlv320aic23_resume,
579*4882a593Smuzhiyun 	.set_bias_level		= tlv320aic23_set_bias_level,
580*4882a593Smuzhiyun 	.controls		= tlv320aic23_snd_controls,
581*4882a593Smuzhiyun 	.num_controls		= ARRAY_SIZE(tlv320aic23_snd_controls),
582*4882a593Smuzhiyun 	.dapm_widgets		= tlv320aic23_dapm_widgets,
583*4882a593Smuzhiyun 	.num_dapm_widgets	= ARRAY_SIZE(tlv320aic23_dapm_widgets),
584*4882a593Smuzhiyun 	.dapm_routes		= tlv320aic23_intercon,
585*4882a593Smuzhiyun 	.num_dapm_routes	= ARRAY_SIZE(tlv320aic23_intercon),
586*4882a593Smuzhiyun 	.suspend_bias_off	= 1,
587*4882a593Smuzhiyun 	.idle_bias_on		= 1,
588*4882a593Smuzhiyun 	.use_pmdown_time	= 1,
589*4882a593Smuzhiyun 	.endianness		= 1,
590*4882a593Smuzhiyun 	.non_legacy_dai_naming	= 1,
591*4882a593Smuzhiyun };
592*4882a593Smuzhiyun 
tlv320aic23_probe(struct device * dev,struct regmap * regmap)593*4882a593Smuzhiyun int tlv320aic23_probe(struct device *dev, struct regmap *regmap)
594*4882a593Smuzhiyun {
595*4882a593Smuzhiyun 	struct aic23 *aic23;
596*4882a593Smuzhiyun 
597*4882a593Smuzhiyun 	if (IS_ERR(regmap))
598*4882a593Smuzhiyun 		return PTR_ERR(regmap);
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 	aic23 = devm_kzalloc(dev, sizeof(struct aic23), GFP_KERNEL);
601*4882a593Smuzhiyun 	if (aic23 == NULL)
602*4882a593Smuzhiyun 		return -ENOMEM;
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun 	aic23->regmap = regmap;
605*4882a593Smuzhiyun 
606*4882a593Smuzhiyun 	dev_set_drvdata(dev, aic23);
607*4882a593Smuzhiyun 
608*4882a593Smuzhiyun 	return devm_snd_soc_register_component(dev,
609*4882a593Smuzhiyun 				      &soc_component_dev_tlv320aic23,
610*4882a593Smuzhiyun 				      &tlv320aic23_dai, 1);
611*4882a593Smuzhiyun }
612*4882a593Smuzhiyun EXPORT_SYMBOL(tlv320aic23_probe);
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC TLV320AIC23 codec driver");
615*4882a593Smuzhiyun MODULE_AUTHOR("Arun KS <arunks@mistralsolutions.com>");
616*4882a593Smuzhiyun MODULE_LICENSE("GPL");
617