xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/tas6424.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * ALSA SoC Texas Instruments TAS6424 Quad-Channel Audio Amplifier
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
6*4882a593Smuzhiyun  *	Author: Andreas Dannenberg <dannenberg@ti.com>
7*4882a593Smuzhiyun  *	Andrew F. Davis <afd@ti.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #ifndef __TAS6424_H__
11*4882a593Smuzhiyun #define __TAS6424_H__
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #define TAS6424_RATES (SNDRV_PCM_RATE_44100 | \
14*4882a593Smuzhiyun 		       SNDRV_PCM_RATE_48000 | \
15*4882a593Smuzhiyun 		       SNDRV_PCM_RATE_96000)
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #define TAS6424_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
18*4882a593Smuzhiyun 			 SNDRV_PCM_FMTBIT_S24_LE)
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun /* Register Address Map */
21*4882a593Smuzhiyun #define TAS6424_MODE_CTRL		0x00
22*4882a593Smuzhiyun #define TAS6424_MISC_CTRL1		0x01
23*4882a593Smuzhiyun #define TAS6424_MISC_CTRL2		0x02
24*4882a593Smuzhiyun #define TAS6424_SAP_CTRL		0x03
25*4882a593Smuzhiyun #define TAS6424_CH_STATE_CTRL		0x04
26*4882a593Smuzhiyun #define TAS6424_CH1_VOL_CTRL		0x05
27*4882a593Smuzhiyun #define TAS6424_CH2_VOL_CTRL		0x06
28*4882a593Smuzhiyun #define TAS6424_CH3_VOL_CTRL		0x07
29*4882a593Smuzhiyun #define TAS6424_CH4_VOL_CTRL		0x08
30*4882a593Smuzhiyun #define TAS6424_DC_DIAG_CTRL1		0x09
31*4882a593Smuzhiyun #define TAS6424_DC_DIAG_CTRL2		0x0a
32*4882a593Smuzhiyun #define TAS6424_DC_DIAG_CTRL3		0x0b
33*4882a593Smuzhiyun #define TAS6424_DC_LOAD_DIAG_REP12	0x0c
34*4882a593Smuzhiyun #define TAS6424_DC_LOAD_DIAG_REP34	0x0d
35*4882a593Smuzhiyun #define TAS6424_DC_LOAD_DIAG_REPLO	0x0e
36*4882a593Smuzhiyun #define TAS6424_CHANNEL_STATE		0x0f
37*4882a593Smuzhiyun #define TAS6424_CHANNEL_FAULT		0x10
38*4882a593Smuzhiyun #define TAS6424_GLOB_FAULT1		0x11
39*4882a593Smuzhiyun #define TAS6424_GLOB_FAULT2		0x12
40*4882a593Smuzhiyun #define TAS6424_WARN			0x13
41*4882a593Smuzhiyun #define TAS6424_PIN_CTRL		0x14
42*4882a593Smuzhiyun #define TAS6424_AC_DIAG_CTRL1		0x15
43*4882a593Smuzhiyun #define TAS6424_AC_DIAG_CTRL2		0x16
44*4882a593Smuzhiyun #define TAS6424_AC_LOAD_DIAG_REP1	0x17
45*4882a593Smuzhiyun #define TAS6424_AC_LOAD_DIAG_REP2	0x18
46*4882a593Smuzhiyun #define TAS6424_AC_LOAD_DIAG_REP3	0x19
47*4882a593Smuzhiyun #define TAS6424_AC_LOAD_DIAG_REP4	0x1a
48*4882a593Smuzhiyun #define TAS6424_MISC_CTRL3		0x21
49*4882a593Smuzhiyun #define TAS6424_CLIP_CTRL		0x22
50*4882a593Smuzhiyun #define TAS6424_CLIP_WINDOW		0x23
51*4882a593Smuzhiyun #define TAS6424_CLIP_WARN		0x24
52*4882a593Smuzhiyun #define TAS6424_CBC_STAT		0x25
53*4882a593Smuzhiyun #define TAS6424_MISC_CTRL4		0x26
54*4882a593Smuzhiyun #define TAS6424_MAX			TAS6424_MISC_CTRL4
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun /* TAS6424_MODE_CTRL_REG */
57*4882a593Smuzhiyun #define TAS6424_RESET			BIT(7)
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun /* TAS6424_SAP_CTRL_REG */
60*4882a593Smuzhiyun #define TAS6424_SAP_RATE_MASK		GENMASK(7, 6)
61*4882a593Smuzhiyun #define TAS6424_SAP_RATE_44100		(0x00 << 6)
62*4882a593Smuzhiyun #define TAS6424_SAP_RATE_48000		(0x01 << 6)
63*4882a593Smuzhiyun #define TAS6424_SAP_RATE_96000		(0x02 << 6)
64*4882a593Smuzhiyun #define TAS6424_SAP_TDM_SLOT_LAST	BIT(5)
65*4882a593Smuzhiyun #define TAS6424_SAP_TDM_SLOT_SZ_16	BIT(4)
66*4882a593Smuzhiyun #define TAS6424_SAP_TDM_SLOT_SWAP	BIT(3)
67*4882a593Smuzhiyun #define TAS6424_SAP_FMT_MASK		GENMASK(2, 0)
68*4882a593Smuzhiyun #define TAS6424_SAP_RIGHTJ_24		(0x00 << 0)
69*4882a593Smuzhiyun #define TAS6424_SAP_RIGHTJ_20		(0x01 << 0)
70*4882a593Smuzhiyun #define TAS6424_SAP_RIGHTJ_18		(0x02 << 0)
71*4882a593Smuzhiyun #define TAS6424_SAP_RIGHTJ_16		(0x03 << 0)
72*4882a593Smuzhiyun #define TAS6424_SAP_I2S			(0x04 << 0)
73*4882a593Smuzhiyun #define TAS6424_SAP_LEFTJ		(0x05 << 0)
74*4882a593Smuzhiyun #define TAS6424_SAP_DSP			(0x06 << 0)
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun /* TAS6424_CH_STATE_CTRL_REG */
77*4882a593Smuzhiyun #define TAS6424_CH1_STATE_MASK		GENMASK(7, 6)
78*4882a593Smuzhiyun #define TAS6424_CH1_STATE_PLAY		(0x00 << 6)
79*4882a593Smuzhiyun #define TAS6424_CH1_STATE_HIZ		(0x01 << 6)
80*4882a593Smuzhiyun #define TAS6424_CH1_STATE_MUTE		(0x02 << 6)
81*4882a593Smuzhiyun #define TAS6424_CH1_STATE_DIAG		(0x03 << 6)
82*4882a593Smuzhiyun #define TAS6424_CH2_STATE_MASK		GENMASK(5, 4)
83*4882a593Smuzhiyun #define TAS6424_CH2_STATE_PLAY		(0x00 << 4)
84*4882a593Smuzhiyun #define TAS6424_CH2_STATE_HIZ		(0x01 << 4)
85*4882a593Smuzhiyun #define TAS6424_CH2_STATE_MUTE		(0x02 << 4)
86*4882a593Smuzhiyun #define TAS6424_CH2_STATE_DIAG		(0x03 << 4)
87*4882a593Smuzhiyun #define TAS6424_CH3_STATE_MASK		GENMASK(3, 2)
88*4882a593Smuzhiyun #define TAS6424_CH3_STATE_PLAY		(0x00 << 2)
89*4882a593Smuzhiyun #define TAS6424_CH3_STATE_HIZ		(0x01 << 2)
90*4882a593Smuzhiyun #define TAS6424_CH3_STATE_MUTE		(0x02 << 2)
91*4882a593Smuzhiyun #define TAS6424_CH3_STATE_DIAG		(0x03 << 2)
92*4882a593Smuzhiyun #define TAS6424_CH4_STATE_MASK		GENMASK(1, 0)
93*4882a593Smuzhiyun #define TAS6424_CH4_STATE_PLAY		(0x00 << 0)
94*4882a593Smuzhiyun #define TAS6424_CH4_STATE_HIZ		(0x01 << 0)
95*4882a593Smuzhiyun #define TAS6424_CH4_STATE_MUTE		(0x02 << 0)
96*4882a593Smuzhiyun #define TAS6424_CH4_STATE_DIAG		(0x03 << 0)
97*4882a593Smuzhiyun #define TAS6424_ALL_STATE_PLAY		(TAS6424_CH1_STATE_PLAY | \
98*4882a593Smuzhiyun 					 TAS6424_CH2_STATE_PLAY | \
99*4882a593Smuzhiyun 					 TAS6424_CH3_STATE_PLAY | \
100*4882a593Smuzhiyun 					 TAS6424_CH4_STATE_PLAY)
101*4882a593Smuzhiyun #define TAS6424_ALL_STATE_HIZ		(TAS6424_CH1_STATE_HIZ | \
102*4882a593Smuzhiyun 					 TAS6424_CH2_STATE_HIZ | \
103*4882a593Smuzhiyun 					 TAS6424_CH3_STATE_HIZ | \
104*4882a593Smuzhiyun 					 TAS6424_CH4_STATE_HIZ)
105*4882a593Smuzhiyun #define TAS6424_ALL_STATE_MUTE		(TAS6424_CH1_STATE_MUTE | \
106*4882a593Smuzhiyun 					 TAS6424_CH2_STATE_MUTE | \
107*4882a593Smuzhiyun 					 TAS6424_CH3_STATE_MUTE | \
108*4882a593Smuzhiyun 					 TAS6424_CH4_STATE_MUTE)
109*4882a593Smuzhiyun #define TAS6424_ALL_STATE_DIAG		(TAS6424_CH1_STATE_DIAG | \
110*4882a593Smuzhiyun 					 TAS6424_CH2_STATE_DIAG | \
111*4882a593Smuzhiyun 					 TAS6424_CH3_STATE_DIAG | \
112*4882a593Smuzhiyun 					 TAS6424_CH4_STATE_DIAG)
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun /* TAS6424_DC_DIAG_CTRL1 */
115*4882a593Smuzhiyun #define TAS6424_LDGBYPASS_SHIFT		0
116*4882a593Smuzhiyun #define TAS6424_LDGBYPASS_MASK		BIT(TAS6424_LDGBYPASS_SHIFT)
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun /* TAS6424_GLOB_FAULT1_REG */
119*4882a593Smuzhiyun #define TAS6424_FAULT_OC_CH1		BIT(7)
120*4882a593Smuzhiyun #define TAS6424_FAULT_OC_CH2		BIT(6)
121*4882a593Smuzhiyun #define TAS6424_FAULT_OC_CH3		BIT(5)
122*4882a593Smuzhiyun #define TAS6424_FAULT_OC_CH4		BIT(4)
123*4882a593Smuzhiyun #define TAS6424_FAULT_DC_CH1		BIT(3)
124*4882a593Smuzhiyun #define TAS6424_FAULT_DC_CH2		BIT(2)
125*4882a593Smuzhiyun #define TAS6424_FAULT_DC_CH3		BIT(1)
126*4882a593Smuzhiyun #define TAS6424_FAULT_DC_CH4		BIT(0)
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun /* TAS6424_GLOB_FAULT1_REG */
129*4882a593Smuzhiyun #define TAS6424_FAULT_CLOCK		BIT(4)
130*4882a593Smuzhiyun #define TAS6424_FAULT_PVDD_OV		BIT(3)
131*4882a593Smuzhiyun #define TAS6424_FAULT_VBAT_OV		BIT(2)
132*4882a593Smuzhiyun #define TAS6424_FAULT_PVDD_UV		BIT(1)
133*4882a593Smuzhiyun #define TAS6424_FAULT_VBAT_UV		BIT(0)
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun /* TAS6424_GLOB_FAULT2_REG */
136*4882a593Smuzhiyun #define TAS6424_FAULT_OTSD		BIT(4)
137*4882a593Smuzhiyun #define TAS6424_FAULT_OTSD_CH1		BIT(3)
138*4882a593Smuzhiyun #define TAS6424_FAULT_OTSD_CH2		BIT(2)
139*4882a593Smuzhiyun #define TAS6424_FAULT_OTSD_CH3		BIT(1)
140*4882a593Smuzhiyun #define TAS6424_FAULT_OTSD_CH4		BIT(0)
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun /* TAS6424_WARN_REG */
143*4882a593Smuzhiyun #define TAS6424_WARN_VDD_UV		BIT(6)
144*4882a593Smuzhiyun #define TAS6424_WARN_VDD_POR		BIT(5)
145*4882a593Smuzhiyun #define TAS6424_WARN_VDD_OTW		BIT(4)
146*4882a593Smuzhiyun #define TAS6424_WARN_VDD_OTW_CH1	BIT(3)
147*4882a593Smuzhiyun #define TAS6424_WARN_VDD_OTW_CH2	BIT(2)
148*4882a593Smuzhiyun #define TAS6424_WARN_VDD_OTW_CH3	BIT(1)
149*4882a593Smuzhiyun #define TAS6424_WARN_VDD_OTW_CH4	BIT(0)
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun /* TAS6424_MISC_CTRL3_REG */
152*4882a593Smuzhiyun #define TAS6424_CLEAR_FAULT		BIT(7)
153*4882a593Smuzhiyun #define TAS6424_PBTL_CH_SEL		BIT(6)
154*4882a593Smuzhiyun #define TAS6424_MASK_CBC_WARN		BIT(5)
155*4882a593Smuzhiyun #define TAS6424_MASK_VDD_UV		BIT(4)
156*4882a593Smuzhiyun #define TAS6424_OTSD_AUTO_RECOVERY	BIT(3)
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun #endif /* __TAS6424_H__ */
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