xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/tas6424.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * ALSA SoC Texas Instruments TAS6424 Quad-Channel Audio Amplifier
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
6*4882a593Smuzhiyun  *	Author: Andreas Dannenberg <dannenberg@ti.com>
7*4882a593Smuzhiyun  *	Andrew F. Davis <afd@ti.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/errno.h>
12*4882a593Smuzhiyun #include <linux/device.h>
13*4882a593Smuzhiyun #include <linux/i2c.h>
14*4882a593Smuzhiyun #include <linux/pm_runtime.h>
15*4882a593Smuzhiyun #include <linux/regmap.h>
16*4882a593Smuzhiyun #include <linux/slab.h>
17*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
18*4882a593Smuzhiyun #include <linux/delay.h>
19*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include <sound/pcm.h>
22*4882a593Smuzhiyun #include <sound/pcm_params.h>
23*4882a593Smuzhiyun #include <sound/soc.h>
24*4882a593Smuzhiyun #include <sound/soc-dapm.h>
25*4882a593Smuzhiyun #include <sound/tlv.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #include "tas6424.h"
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun /* Define how often to check (and clear) the fault status register (in ms) */
30*4882a593Smuzhiyun #define TAS6424_FAULT_CHECK_INTERVAL 200
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun static const char * const tas6424_supply_names[] = {
33*4882a593Smuzhiyun 	"dvdd", /* Digital power supply. Connect to 3.3-V supply. */
34*4882a593Smuzhiyun 	"vbat", /* Supply used for higher voltage analog circuits. */
35*4882a593Smuzhiyun 	"pvdd", /* Class-D amp output FETs supply. */
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun #define TAS6424_NUM_SUPPLIES ARRAY_SIZE(tas6424_supply_names)
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun struct tas6424_data {
40*4882a593Smuzhiyun 	struct device *dev;
41*4882a593Smuzhiyun 	struct regmap *regmap;
42*4882a593Smuzhiyun 	struct regulator_bulk_data supplies[TAS6424_NUM_SUPPLIES];
43*4882a593Smuzhiyun 	struct delayed_work fault_check_work;
44*4882a593Smuzhiyun 	unsigned int last_cfault;
45*4882a593Smuzhiyun 	unsigned int last_fault1;
46*4882a593Smuzhiyun 	unsigned int last_fault2;
47*4882a593Smuzhiyun 	unsigned int last_warn;
48*4882a593Smuzhiyun 	struct gpio_desc *standby_gpio;
49*4882a593Smuzhiyun 	struct gpio_desc *mute_gpio;
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun /*
53*4882a593Smuzhiyun  * DAC digital volumes. From -103.5 to 24 dB in 0.5 dB steps. Note that
54*4882a593Smuzhiyun  * setting the gain below -100 dB (register value <0x7) is effectively a MUTE
55*4882a593Smuzhiyun  * as per device datasheet.
56*4882a593Smuzhiyun  */
57*4882a593Smuzhiyun static DECLARE_TLV_DB_SCALE(dac_tlv, -10350, 50, 0);
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun static const struct snd_kcontrol_new tas6424_snd_controls[] = {
60*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Speaker Driver CH1 Playback Volume",
61*4882a593Smuzhiyun 		       TAS6424_CH1_VOL_CTRL, 0, 0xff, 0, dac_tlv),
62*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Speaker Driver CH2 Playback Volume",
63*4882a593Smuzhiyun 		       TAS6424_CH2_VOL_CTRL, 0, 0xff, 0, dac_tlv),
64*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Speaker Driver CH3 Playback Volume",
65*4882a593Smuzhiyun 		       TAS6424_CH3_VOL_CTRL, 0, 0xff, 0, dac_tlv),
66*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Speaker Driver CH4 Playback Volume",
67*4882a593Smuzhiyun 		       TAS6424_CH4_VOL_CTRL, 0, 0xff, 0, dac_tlv),
68*4882a593Smuzhiyun 	SOC_SINGLE_STROBE("Auto Diagnostics Switch", TAS6424_DC_DIAG_CTRL1,
69*4882a593Smuzhiyun 			  TAS6424_LDGBYPASS_SHIFT, 1),
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun 
tas6424_dac_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)72*4882a593Smuzhiyun static int tas6424_dac_event(struct snd_soc_dapm_widget *w,
73*4882a593Smuzhiyun 			     struct snd_kcontrol *kcontrol, int event)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun 	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
76*4882a593Smuzhiyun 	struct tas6424_data *tas6424 = snd_soc_component_get_drvdata(component);
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	dev_dbg(component->dev, "%s() event=0x%0x\n", __func__, event);
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	if (event & SND_SOC_DAPM_POST_PMU) {
81*4882a593Smuzhiyun 		/* Observe codec shutdown-to-active time */
82*4882a593Smuzhiyun 		msleep(12);
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 		/* Turn on TAS6424 periodic fault checking/handling */
85*4882a593Smuzhiyun 		tas6424->last_fault1 = 0;
86*4882a593Smuzhiyun 		tas6424->last_fault2 = 0;
87*4882a593Smuzhiyun 		tas6424->last_warn = 0;
88*4882a593Smuzhiyun 		schedule_delayed_work(&tas6424->fault_check_work,
89*4882a593Smuzhiyun 				      msecs_to_jiffies(TAS6424_FAULT_CHECK_INTERVAL));
90*4882a593Smuzhiyun 	} else if (event & SND_SOC_DAPM_PRE_PMD) {
91*4882a593Smuzhiyun 		/* Disable TAS6424 periodic fault checking/handling */
92*4882a593Smuzhiyun 		cancel_delayed_work_sync(&tas6424->fault_check_work);
93*4882a593Smuzhiyun 	}
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	return 0;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun static const struct snd_soc_dapm_widget tas6424_dapm_widgets[] = {
99*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("DAC IN", "Playback", 0, SND_SOC_NOPM, 0, 0),
100*4882a593Smuzhiyun 	SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0, tas6424_dac_event,
101*4882a593Smuzhiyun 			   SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
102*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("OUT")
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun static const struct snd_soc_dapm_route tas6424_audio_map[] = {
106*4882a593Smuzhiyun 	{ "DAC", NULL, "DAC IN" },
107*4882a593Smuzhiyun 	{ "OUT", NULL, "DAC" },
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun 
tas6424_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)110*4882a593Smuzhiyun static int tas6424_hw_params(struct snd_pcm_substream *substream,
111*4882a593Smuzhiyun 			     struct snd_pcm_hw_params *params,
112*4882a593Smuzhiyun 			     struct snd_soc_dai *dai)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
115*4882a593Smuzhiyun 	unsigned int rate = params_rate(params);
116*4882a593Smuzhiyun 	unsigned int width = params_width(params);
117*4882a593Smuzhiyun 	u8 sap_ctrl = 0;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	dev_dbg(component->dev, "%s() rate=%u width=%u\n", __func__, rate, width);
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	switch (rate) {
122*4882a593Smuzhiyun 	case 44100:
123*4882a593Smuzhiyun 		sap_ctrl |= TAS6424_SAP_RATE_44100;
124*4882a593Smuzhiyun 		break;
125*4882a593Smuzhiyun 	case 48000:
126*4882a593Smuzhiyun 		sap_ctrl |= TAS6424_SAP_RATE_48000;
127*4882a593Smuzhiyun 		break;
128*4882a593Smuzhiyun 	case 96000:
129*4882a593Smuzhiyun 		sap_ctrl |= TAS6424_SAP_RATE_96000;
130*4882a593Smuzhiyun 		break;
131*4882a593Smuzhiyun 	default:
132*4882a593Smuzhiyun 		dev_err(component->dev, "unsupported sample rate: %u\n", rate);
133*4882a593Smuzhiyun 		return -EINVAL;
134*4882a593Smuzhiyun 	}
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	switch (width) {
137*4882a593Smuzhiyun 	case 16:
138*4882a593Smuzhiyun 		sap_ctrl |= TAS6424_SAP_TDM_SLOT_SZ_16;
139*4882a593Smuzhiyun 		break;
140*4882a593Smuzhiyun 	case 24:
141*4882a593Smuzhiyun 		break;
142*4882a593Smuzhiyun 	default:
143*4882a593Smuzhiyun 		dev_err(component->dev, "unsupported sample width: %u\n", width);
144*4882a593Smuzhiyun 		return -EINVAL;
145*4882a593Smuzhiyun 	}
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, TAS6424_SAP_CTRL,
148*4882a593Smuzhiyun 			    TAS6424_SAP_RATE_MASK |
149*4882a593Smuzhiyun 			    TAS6424_SAP_TDM_SLOT_SZ_16,
150*4882a593Smuzhiyun 			    sap_ctrl);
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	return 0;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun 
tas6424_set_dai_fmt(struct snd_soc_dai * dai,unsigned int fmt)155*4882a593Smuzhiyun static int tas6424_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
158*4882a593Smuzhiyun 	u8 serial_format = 0;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	dev_dbg(component->dev, "%s() fmt=0x%0x\n", __func__, fmt);
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	/* clock masters */
163*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
164*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBS_CFS:
165*4882a593Smuzhiyun 		break;
166*4882a593Smuzhiyun 	default:
167*4882a593Smuzhiyun 		dev_err(component->dev, "Invalid DAI master/slave interface\n");
168*4882a593Smuzhiyun 		return -EINVAL;
169*4882a593Smuzhiyun 	}
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	/* signal polarity */
172*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
173*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_NF:
174*4882a593Smuzhiyun 		break;
175*4882a593Smuzhiyun 	default:
176*4882a593Smuzhiyun 		dev_err(component->dev, "Invalid DAI clock signal polarity\n");
177*4882a593Smuzhiyun 		return -EINVAL;
178*4882a593Smuzhiyun 	}
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	/* interface format */
181*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
182*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_I2S:
183*4882a593Smuzhiyun 		serial_format |= TAS6424_SAP_I2S;
184*4882a593Smuzhiyun 		break;
185*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_DSP_A:
186*4882a593Smuzhiyun 		serial_format |= TAS6424_SAP_DSP;
187*4882a593Smuzhiyun 		break;
188*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_DSP_B:
189*4882a593Smuzhiyun 		/*
190*4882a593Smuzhiyun 		 * We can use the fact that the TAS6424 does not care about the
191*4882a593Smuzhiyun 		 * LRCLK duty cycle during TDM to receive DSP_B formatted data
192*4882a593Smuzhiyun 		 * in LEFTJ mode (no delaying of the 1st data bit).
193*4882a593Smuzhiyun 		 */
194*4882a593Smuzhiyun 		serial_format |= TAS6424_SAP_LEFTJ;
195*4882a593Smuzhiyun 		break;
196*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_LEFT_J:
197*4882a593Smuzhiyun 		serial_format |= TAS6424_SAP_LEFTJ;
198*4882a593Smuzhiyun 		break;
199*4882a593Smuzhiyun 	default:
200*4882a593Smuzhiyun 		dev_err(component->dev, "Invalid DAI interface format\n");
201*4882a593Smuzhiyun 		return -EINVAL;
202*4882a593Smuzhiyun 	}
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, TAS6424_SAP_CTRL,
205*4882a593Smuzhiyun 			    TAS6424_SAP_FMT_MASK, serial_format);
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	return 0;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
tas6424_set_dai_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)210*4882a593Smuzhiyun static int tas6424_set_dai_tdm_slot(struct snd_soc_dai *dai,
211*4882a593Smuzhiyun 				    unsigned int tx_mask, unsigned int rx_mask,
212*4882a593Smuzhiyun 				    int slots, int slot_width)
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
215*4882a593Smuzhiyun 	unsigned int first_slot, last_slot;
216*4882a593Smuzhiyun 	bool sap_tdm_slot_last;
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	dev_dbg(component->dev, "%s() tx_mask=%d rx_mask=%d\n", __func__,
219*4882a593Smuzhiyun 		tx_mask, rx_mask);
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	if (!tx_mask || !rx_mask)
222*4882a593Smuzhiyun 		return 0; /* nothing needed to disable TDM mode */
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	/*
225*4882a593Smuzhiyun 	 * Determine the first slot and last slot that is being requested so
226*4882a593Smuzhiyun 	 * we'll be able to more easily enforce certain constraints as the
227*4882a593Smuzhiyun 	 * TAS6424's TDM interface is not fully configurable.
228*4882a593Smuzhiyun 	 */
229*4882a593Smuzhiyun 	first_slot = __ffs(tx_mask);
230*4882a593Smuzhiyun 	last_slot = __fls(rx_mask);
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	if (last_slot - first_slot != 4) {
233*4882a593Smuzhiyun 		dev_err(component->dev, "tdm mask must cover 4 contiguous slots\n");
234*4882a593Smuzhiyun 		return -EINVAL;
235*4882a593Smuzhiyun 	}
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	switch (first_slot) {
238*4882a593Smuzhiyun 	case 0:
239*4882a593Smuzhiyun 		sap_tdm_slot_last = false;
240*4882a593Smuzhiyun 		break;
241*4882a593Smuzhiyun 	case 4:
242*4882a593Smuzhiyun 		sap_tdm_slot_last = true;
243*4882a593Smuzhiyun 		break;
244*4882a593Smuzhiyun 	default:
245*4882a593Smuzhiyun 		dev_err(component->dev, "tdm mask must start at slot 0 or 4\n");
246*4882a593Smuzhiyun 		return -EINVAL;
247*4882a593Smuzhiyun 	}
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, TAS6424_SAP_CTRL, TAS6424_SAP_TDM_SLOT_LAST,
250*4882a593Smuzhiyun 			    sap_tdm_slot_last ? TAS6424_SAP_TDM_SLOT_LAST : 0);
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	return 0;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun 
tas6424_mute(struct snd_soc_dai * dai,int mute,int direction)255*4882a593Smuzhiyun static int tas6424_mute(struct snd_soc_dai *dai, int mute, int direction)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
258*4882a593Smuzhiyun 	struct tas6424_data *tas6424 = snd_soc_component_get_drvdata(component);
259*4882a593Smuzhiyun 	unsigned int val;
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	dev_dbg(component->dev, "%s() mute=%d\n", __func__, mute);
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	if (tas6424->mute_gpio) {
264*4882a593Smuzhiyun 		gpiod_set_value_cansleep(tas6424->mute_gpio, mute);
265*4882a593Smuzhiyun 		return 0;
266*4882a593Smuzhiyun 	}
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun 	if (mute)
269*4882a593Smuzhiyun 		val = TAS6424_ALL_STATE_MUTE;
270*4882a593Smuzhiyun 	else
271*4882a593Smuzhiyun 		val = TAS6424_ALL_STATE_PLAY;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	snd_soc_component_write(component, TAS6424_CH_STATE_CTRL, val);
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	return 0;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun 
tas6424_power_off(struct snd_soc_component * component)278*4882a593Smuzhiyun static int tas6424_power_off(struct snd_soc_component *component)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun 	struct tas6424_data *tas6424 = snd_soc_component_get_drvdata(component);
281*4882a593Smuzhiyun 	int ret;
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	snd_soc_component_write(component, TAS6424_CH_STATE_CTRL, TAS6424_ALL_STATE_HIZ);
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	regcache_cache_only(tas6424->regmap, true);
286*4882a593Smuzhiyun 	regcache_mark_dirty(tas6424->regmap);
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	ret = regulator_bulk_disable(ARRAY_SIZE(tas6424->supplies),
289*4882a593Smuzhiyun 				     tas6424->supplies);
290*4882a593Smuzhiyun 	if (ret < 0) {
291*4882a593Smuzhiyun 		dev_err(component->dev, "failed to disable supplies: %d\n", ret);
292*4882a593Smuzhiyun 		return ret;
293*4882a593Smuzhiyun 	}
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	return 0;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun 
tas6424_power_on(struct snd_soc_component * component)298*4882a593Smuzhiyun static int tas6424_power_on(struct snd_soc_component *component)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun 	struct tas6424_data *tas6424 = snd_soc_component_get_drvdata(component);
301*4882a593Smuzhiyun 	int ret;
302*4882a593Smuzhiyun 	u8 chan_states;
303*4882a593Smuzhiyun 	int no_auto_diags = 0;
304*4882a593Smuzhiyun 	unsigned int reg_val;
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	if (!regmap_read(tas6424->regmap, TAS6424_DC_DIAG_CTRL1, &reg_val))
307*4882a593Smuzhiyun 		no_auto_diags = reg_val & TAS6424_LDGBYPASS_MASK;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	ret = regulator_bulk_enable(ARRAY_SIZE(tas6424->supplies),
310*4882a593Smuzhiyun 				    tas6424->supplies);
311*4882a593Smuzhiyun 	if (ret < 0) {
312*4882a593Smuzhiyun 		dev_err(component->dev, "failed to enable supplies: %d\n", ret);
313*4882a593Smuzhiyun 		return ret;
314*4882a593Smuzhiyun 	}
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	regcache_cache_only(tas6424->regmap, false);
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	ret = regcache_sync(tas6424->regmap);
319*4882a593Smuzhiyun 	if (ret < 0) {
320*4882a593Smuzhiyun 		dev_err(component->dev, "failed to sync regcache: %d\n", ret);
321*4882a593Smuzhiyun 		return ret;
322*4882a593Smuzhiyun 	}
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	if (tas6424->mute_gpio) {
325*4882a593Smuzhiyun 		gpiod_set_value_cansleep(tas6424->mute_gpio, 0);
326*4882a593Smuzhiyun 		/*
327*4882a593Smuzhiyun 		 * channels are muted via the mute pin.  Don't also mute
328*4882a593Smuzhiyun 		 * them via the registers so that subsequent register
329*4882a593Smuzhiyun 		 * access is not necessary to un-mute the channels
330*4882a593Smuzhiyun 		 */
331*4882a593Smuzhiyun 		chan_states = TAS6424_ALL_STATE_PLAY;
332*4882a593Smuzhiyun 	} else {
333*4882a593Smuzhiyun 		chan_states = TAS6424_ALL_STATE_MUTE;
334*4882a593Smuzhiyun 	}
335*4882a593Smuzhiyun 	snd_soc_component_write(component, TAS6424_CH_STATE_CTRL, chan_states);
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	/* any time we come out of HIZ, the output channels automatically run DC
338*4882a593Smuzhiyun 	 * load diagnostics if autodiagnotics are enabled. wait here until this
339*4882a593Smuzhiyun 	 * completes.
340*4882a593Smuzhiyun 	 */
341*4882a593Smuzhiyun 	if (!no_auto_diags)
342*4882a593Smuzhiyun 		msleep(230);
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	return 0;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun 
tas6424_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)347*4882a593Smuzhiyun static int tas6424_set_bias_level(struct snd_soc_component *component,
348*4882a593Smuzhiyun 				  enum snd_soc_bias_level level)
349*4882a593Smuzhiyun {
350*4882a593Smuzhiyun 	dev_dbg(component->dev, "%s() level=%d\n", __func__, level);
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	switch (level) {
353*4882a593Smuzhiyun 	case SND_SOC_BIAS_ON:
354*4882a593Smuzhiyun 	case SND_SOC_BIAS_PREPARE:
355*4882a593Smuzhiyun 		break;
356*4882a593Smuzhiyun 	case SND_SOC_BIAS_STANDBY:
357*4882a593Smuzhiyun 		if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF)
358*4882a593Smuzhiyun 			tas6424_power_on(component);
359*4882a593Smuzhiyun 		break;
360*4882a593Smuzhiyun 	case SND_SOC_BIAS_OFF:
361*4882a593Smuzhiyun 		tas6424_power_off(component);
362*4882a593Smuzhiyun 		break;
363*4882a593Smuzhiyun 	}
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 	return 0;
366*4882a593Smuzhiyun }
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun static struct snd_soc_component_driver soc_codec_dev_tas6424 = {
369*4882a593Smuzhiyun 	.set_bias_level		= tas6424_set_bias_level,
370*4882a593Smuzhiyun 	.controls		= tas6424_snd_controls,
371*4882a593Smuzhiyun 	.num_controls		= ARRAY_SIZE(tas6424_snd_controls),
372*4882a593Smuzhiyun 	.dapm_widgets		= tas6424_dapm_widgets,
373*4882a593Smuzhiyun 	.num_dapm_widgets	= ARRAY_SIZE(tas6424_dapm_widgets),
374*4882a593Smuzhiyun 	.dapm_routes		= tas6424_audio_map,
375*4882a593Smuzhiyun 	.num_dapm_routes	= ARRAY_SIZE(tas6424_audio_map),
376*4882a593Smuzhiyun 	.use_pmdown_time	= 1,
377*4882a593Smuzhiyun 	.endianness		= 1,
378*4882a593Smuzhiyun 	.non_legacy_dai_naming	= 1,
379*4882a593Smuzhiyun };
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun static const struct snd_soc_dai_ops tas6424_speaker_dai_ops = {
382*4882a593Smuzhiyun 	.hw_params	= tas6424_hw_params,
383*4882a593Smuzhiyun 	.set_fmt	= tas6424_set_dai_fmt,
384*4882a593Smuzhiyun 	.set_tdm_slot	= tas6424_set_dai_tdm_slot,
385*4882a593Smuzhiyun 	.mute_stream	= tas6424_mute,
386*4882a593Smuzhiyun 	.no_capture_mute = 1,
387*4882a593Smuzhiyun };
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun static struct snd_soc_dai_driver tas6424_dai[] = {
390*4882a593Smuzhiyun 	{
391*4882a593Smuzhiyun 		.name = "tas6424-amplifier",
392*4882a593Smuzhiyun 		.playback = {
393*4882a593Smuzhiyun 			.stream_name = "Playback",
394*4882a593Smuzhiyun 			.channels_min = 1,
395*4882a593Smuzhiyun 			.channels_max = 4,
396*4882a593Smuzhiyun 			.rates = TAS6424_RATES,
397*4882a593Smuzhiyun 			.formats = TAS6424_FORMATS,
398*4882a593Smuzhiyun 		},
399*4882a593Smuzhiyun 		.ops = &tas6424_speaker_dai_ops,
400*4882a593Smuzhiyun 	},
401*4882a593Smuzhiyun };
402*4882a593Smuzhiyun 
tas6424_fault_check_work(struct work_struct * work)403*4882a593Smuzhiyun static void tas6424_fault_check_work(struct work_struct *work)
404*4882a593Smuzhiyun {
405*4882a593Smuzhiyun 	struct tas6424_data *tas6424 = container_of(work, struct tas6424_data,
406*4882a593Smuzhiyun 						    fault_check_work.work);
407*4882a593Smuzhiyun 	struct device *dev = tas6424->dev;
408*4882a593Smuzhiyun 	unsigned int reg;
409*4882a593Smuzhiyun 	int ret;
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 	ret = regmap_read(tas6424->regmap, TAS6424_CHANNEL_FAULT, &reg);
412*4882a593Smuzhiyun 	if (ret < 0) {
413*4882a593Smuzhiyun 		dev_err(dev, "failed to read CHANNEL_FAULT register: %d\n", ret);
414*4882a593Smuzhiyun 		goto out;
415*4882a593Smuzhiyun 	}
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun 	if (!reg) {
418*4882a593Smuzhiyun 		tas6424->last_cfault = reg;
419*4882a593Smuzhiyun 		goto check_global_fault1_reg;
420*4882a593Smuzhiyun 	}
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 	/*
423*4882a593Smuzhiyun 	 * Only flag errors once for a given occurrence. This is needed as
424*4882a593Smuzhiyun 	 * the TAS6424 will take time clearing the fault condition internally
425*4882a593Smuzhiyun 	 * during which we don't want to bombard the system with the same
426*4882a593Smuzhiyun 	 * error message over and over.
427*4882a593Smuzhiyun 	 */
428*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_OC_CH1) && !(tas6424->last_cfault & TAS6424_FAULT_OC_CH1))
429*4882a593Smuzhiyun 		dev_crit(dev, "experienced a channel 1 overcurrent fault\n");
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_OC_CH2) && !(tas6424->last_cfault & TAS6424_FAULT_OC_CH2))
432*4882a593Smuzhiyun 		dev_crit(dev, "experienced a channel 2 overcurrent fault\n");
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_OC_CH3) && !(tas6424->last_cfault & TAS6424_FAULT_OC_CH3))
435*4882a593Smuzhiyun 		dev_crit(dev, "experienced a channel 3 overcurrent fault\n");
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_OC_CH4) && !(tas6424->last_cfault & TAS6424_FAULT_OC_CH4))
438*4882a593Smuzhiyun 		dev_crit(dev, "experienced a channel 4 overcurrent fault\n");
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_DC_CH1) && !(tas6424->last_cfault & TAS6424_FAULT_DC_CH1))
441*4882a593Smuzhiyun 		dev_crit(dev, "experienced a channel 1 DC fault\n");
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_DC_CH2) && !(tas6424->last_cfault & TAS6424_FAULT_DC_CH2))
444*4882a593Smuzhiyun 		dev_crit(dev, "experienced a channel 2 DC fault\n");
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_DC_CH3) && !(tas6424->last_cfault & TAS6424_FAULT_DC_CH3))
447*4882a593Smuzhiyun 		dev_crit(dev, "experienced a channel 3 DC fault\n");
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_DC_CH4) && !(tas6424->last_cfault & TAS6424_FAULT_DC_CH4))
450*4882a593Smuzhiyun 		dev_crit(dev, "experienced a channel 4 DC fault\n");
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 	/* Store current fault1 value so we can detect any changes next time */
453*4882a593Smuzhiyun 	tas6424->last_cfault = reg;
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun check_global_fault1_reg:
456*4882a593Smuzhiyun 	ret = regmap_read(tas6424->regmap, TAS6424_GLOB_FAULT1, &reg);
457*4882a593Smuzhiyun 	if (ret < 0) {
458*4882a593Smuzhiyun 		dev_err(dev, "failed to read GLOB_FAULT1 register: %d\n", ret);
459*4882a593Smuzhiyun 		goto out;
460*4882a593Smuzhiyun 	}
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun 	/*
463*4882a593Smuzhiyun 	 * Ignore any clock faults as there is no clean way to check for them.
464*4882a593Smuzhiyun 	 * We would need to start checking for those faults *after* the SAIF
465*4882a593Smuzhiyun 	 * stream has been setup, and stop checking *before* the stream is
466*4882a593Smuzhiyun 	 * stopped to avoid any false-positives. However there are no
467*4882a593Smuzhiyun 	 * appropriate hooks to monitor these events.
468*4882a593Smuzhiyun 	 */
469*4882a593Smuzhiyun 	reg &= TAS6424_FAULT_PVDD_OV |
470*4882a593Smuzhiyun 	       TAS6424_FAULT_VBAT_OV |
471*4882a593Smuzhiyun 	       TAS6424_FAULT_PVDD_UV |
472*4882a593Smuzhiyun 	       TAS6424_FAULT_VBAT_UV;
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 	if (!reg) {
475*4882a593Smuzhiyun 		tas6424->last_fault1 = reg;
476*4882a593Smuzhiyun 		goto check_global_fault2_reg;
477*4882a593Smuzhiyun 	}
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_PVDD_OV) && !(tas6424->last_fault1 & TAS6424_FAULT_PVDD_OV))
480*4882a593Smuzhiyun 		dev_crit(dev, "experienced a PVDD overvoltage fault\n");
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_VBAT_OV) && !(tas6424->last_fault1 & TAS6424_FAULT_VBAT_OV))
483*4882a593Smuzhiyun 		dev_crit(dev, "experienced a VBAT overvoltage fault\n");
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_PVDD_UV) && !(tas6424->last_fault1 & TAS6424_FAULT_PVDD_UV))
486*4882a593Smuzhiyun 		dev_crit(dev, "experienced a PVDD undervoltage fault\n");
487*4882a593Smuzhiyun 
488*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_VBAT_UV) && !(tas6424->last_fault1 & TAS6424_FAULT_VBAT_UV))
489*4882a593Smuzhiyun 		dev_crit(dev, "experienced a VBAT undervoltage fault\n");
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	/* Store current fault1 value so we can detect any changes next time */
492*4882a593Smuzhiyun 	tas6424->last_fault1 = reg;
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun check_global_fault2_reg:
495*4882a593Smuzhiyun 	ret = regmap_read(tas6424->regmap, TAS6424_GLOB_FAULT2, &reg);
496*4882a593Smuzhiyun 	if (ret < 0) {
497*4882a593Smuzhiyun 		dev_err(dev, "failed to read GLOB_FAULT2 register: %d\n", ret);
498*4882a593Smuzhiyun 		goto out;
499*4882a593Smuzhiyun 	}
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 	reg &= TAS6424_FAULT_OTSD |
502*4882a593Smuzhiyun 	       TAS6424_FAULT_OTSD_CH1 |
503*4882a593Smuzhiyun 	       TAS6424_FAULT_OTSD_CH2 |
504*4882a593Smuzhiyun 	       TAS6424_FAULT_OTSD_CH3 |
505*4882a593Smuzhiyun 	       TAS6424_FAULT_OTSD_CH4;
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun 	if (!reg) {
508*4882a593Smuzhiyun 		tas6424->last_fault2 = reg;
509*4882a593Smuzhiyun 		goto check_warn_reg;
510*4882a593Smuzhiyun 	}
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_OTSD) && !(tas6424->last_fault2 & TAS6424_FAULT_OTSD))
513*4882a593Smuzhiyun 		dev_crit(dev, "experienced a global overtemp shutdown\n");
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_OTSD_CH1) && !(tas6424->last_fault2 & TAS6424_FAULT_OTSD_CH1))
516*4882a593Smuzhiyun 		dev_crit(dev, "experienced an overtemp shutdown on CH1\n");
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_OTSD_CH2) && !(tas6424->last_fault2 & TAS6424_FAULT_OTSD_CH2))
519*4882a593Smuzhiyun 		dev_crit(dev, "experienced an overtemp shutdown on CH2\n");
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_OTSD_CH3) && !(tas6424->last_fault2 & TAS6424_FAULT_OTSD_CH3))
522*4882a593Smuzhiyun 		dev_crit(dev, "experienced an overtemp shutdown on CH3\n");
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 	if ((reg & TAS6424_FAULT_OTSD_CH4) && !(tas6424->last_fault2 & TAS6424_FAULT_OTSD_CH4))
525*4882a593Smuzhiyun 		dev_crit(dev, "experienced an overtemp shutdown on CH4\n");
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 	/* Store current fault2 value so we can detect any changes next time */
528*4882a593Smuzhiyun 	tas6424->last_fault2 = reg;
529*4882a593Smuzhiyun 
530*4882a593Smuzhiyun check_warn_reg:
531*4882a593Smuzhiyun 	ret = regmap_read(tas6424->regmap, TAS6424_WARN, &reg);
532*4882a593Smuzhiyun 	if (ret < 0) {
533*4882a593Smuzhiyun 		dev_err(dev, "failed to read WARN register: %d\n", ret);
534*4882a593Smuzhiyun 		goto out;
535*4882a593Smuzhiyun 	}
536*4882a593Smuzhiyun 
537*4882a593Smuzhiyun 	reg &= TAS6424_WARN_VDD_UV |
538*4882a593Smuzhiyun 	       TAS6424_WARN_VDD_POR |
539*4882a593Smuzhiyun 	       TAS6424_WARN_VDD_OTW |
540*4882a593Smuzhiyun 	       TAS6424_WARN_VDD_OTW_CH1 |
541*4882a593Smuzhiyun 	       TAS6424_WARN_VDD_OTW_CH2 |
542*4882a593Smuzhiyun 	       TAS6424_WARN_VDD_OTW_CH3 |
543*4882a593Smuzhiyun 	       TAS6424_WARN_VDD_OTW_CH4;
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 	if (!reg) {
546*4882a593Smuzhiyun 		tas6424->last_warn = reg;
547*4882a593Smuzhiyun 		goto out;
548*4882a593Smuzhiyun 	}
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun 	if ((reg & TAS6424_WARN_VDD_UV) && !(tas6424->last_warn & TAS6424_WARN_VDD_UV))
551*4882a593Smuzhiyun 		dev_warn(dev, "experienced a VDD under voltage condition\n");
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun 	if ((reg & TAS6424_WARN_VDD_POR) && !(tas6424->last_warn & TAS6424_WARN_VDD_POR))
554*4882a593Smuzhiyun 		dev_warn(dev, "experienced a VDD POR condition\n");
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun 	if ((reg & TAS6424_WARN_VDD_OTW) && !(tas6424->last_warn & TAS6424_WARN_VDD_OTW))
557*4882a593Smuzhiyun 		dev_warn(dev, "experienced a global overtemp warning\n");
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun 	if ((reg & TAS6424_WARN_VDD_OTW_CH1) && !(tas6424->last_warn & TAS6424_WARN_VDD_OTW_CH1))
560*4882a593Smuzhiyun 		dev_warn(dev, "experienced an overtemp warning on CH1\n");
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun 	if ((reg & TAS6424_WARN_VDD_OTW_CH2) && !(tas6424->last_warn & TAS6424_WARN_VDD_OTW_CH2))
563*4882a593Smuzhiyun 		dev_warn(dev, "experienced an overtemp warning on CH2\n");
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun 	if ((reg & TAS6424_WARN_VDD_OTW_CH3) && !(tas6424->last_warn & TAS6424_WARN_VDD_OTW_CH3))
566*4882a593Smuzhiyun 		dev_warn(dev, "experienced an overtemp warning on CH3\n");
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun 	if ((reg & TAS6424_WARN_VDD_OTW_CH4) && !(tas6424->last_warn & TAS6424_WARN_VDD_OTW_CH4))
569*4882a593Smuzhiyun 		dev_warn(dev, "experienced an overtemp warning on CH4\n");
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun 	/* Store current warn value so we can detect any changes next time */
572*4882a593Smuzhiyun 	tas6424->last_warn = reg;
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 	/* Clear any warnings by toggling the CLEAR_FAULT control bit */
575*4882a593Smuzhiyun 	ret = regmap_write_bits(tas6424->regmap, TAS6424_MISC_CTRL3,
576*4882a593Smuzhiyun 				TAS6424_CLEAR_FAULT, TAS6424_CLEAR_FAULT);
577*4882a593Smuzhiyun 	if (ret < 0)
578*4882a593Smuzhiyun 		dev_err(dev, "failed to write MISC_CTRL3 register: %d\n", ret);
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun 	ret = regmap_write_bits(tas6424->regmap, TAS6424_MISC_CTRL3,
581*4882a593Smuzhiyun 				TAS6424_CLEAR_FAULT, 0);
582*4882a593Smuzhiyun 	if (ret < 0)
583*4882a593Smuzhiyun 		dev_err(dev, "failed to write MISC_CTRL3 register: %d\n", ret);
584*4882a593Smuzhiyun 
585*4882a593Smuzhiyun out:
586*4882a593Smuzhiyun 	/* Schedule the next fault check at the specified interval */
587*4882a593Smuzhiyun 	schedule_delayed_work(&tas6424->fault_check_work,
588*4882a593Smuzhiyun 			      msecs_to_jiffies(TAS6424_FAULT_CHECK_INTERVAL));
589*4882a593Smuzhiyun }
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun static const struct reg_default tas6424_reg_defaults[] = {
592*4882a593Smuzhiyun 	{ TAS6424_MODE_CTRL,		0x00 },
593*4882a593Smuzhiyun 	{ TAS6424_MISC_CTRL1,		0x32 },
594*4882a593Smuzhiyun 	{ TAS6424_MISC_CTRL2,		0x62 },
595*4882a593Smuzhiyun 	{ TAS6424_SAP_CTRL,		0x04 },
596*4882a593Smuzhiyun 	{ TAS6424_CH_STATE_CTRL,	0x55 },
597*4882a593Smuzhiyun 	{ TAS6424_CH1_VOL_CTRL,		0xcf },
598*4882a593Smuzhiyun 	{ TAS6424_CH2_VOL_CTRL,		0xcf },
599*4882a593Smuzhiyun 	{ TAS6424_CH3_VOL_CTRL,		0xcf },
600*4882a593Smuzhiyun 	{ TAS6424_CH4_VOL_CTRL,		0xcf },
601*4882a593Smuzhiyun 	{ TAS6424_DC_DIAG_CTRL1,	0x00 },
602*4882a593Smuzhiyun 	{ TAS6424_DC_DIAG_CTRL2,	0x11 },
603*4882a593Smuzhiyun 	{ TAS6424_DC_DIAG_CTRL3,	0x11 },
604*4882a593Smuzhiyun 	{ TAS6424_PIN_CTRL,		0xff },
605*4882a593Smuzhiyun 	{ TAS6424_AC_DIAG_CTRL1,	0x00 },
606*4882a593Smuzhiyun 	{ TAS6424_MISC_CTRL3,		0x00 },
607*4882a593Smuzhiyun 	{ TAS6424_CLIP_CTRL,		0x01 },
608*4882a593Smuzhiyun 	{ TAS6424_CLIP_WINDOW,		0x14 },
609*4882a593Smuzhiyun 	{ TAS6424_CLIP_WARN,		0x00 },
610*4882a593Smuzhiyun 	{ TAS6424_CBC_STAT,		0x00 },
611*4882a593Smuzhiyun 	{ TAS6424_MISC_CTRL4,		0x40 },
612*4882a593Smuzhiyun };
613*4882a593Smuzhiyun 
tas6424_is_writable_reg(struct device * dev,unsigned int reg)614*4882a593Smuzhiyun static bool tas6424_is_writable_reg(struct device *dev, unsigned int reg)
615*4882a593Smuzhiyun {
616*4882a593Smuzhiyun 	switch (reg) {
617*4882a593Smuzhiyun 	case TAS6424_MODE_CTRL:
618*4882a593Smuzhiyun 	case TAS6424_MISC_CTRL1:
619*4882a593Smuzhiyun 	case TAS6424_MISC_CTRL2:
620*4882a593Smuzhiyun 	case TAS6424_SAP_CTRL:
621*4882a593Smuzhiyun 	case TAS6424_CH_STATE_CTRL:
622*4882a593Smuzhiyun 	case TAS6424_CH1_VOL_CTRL:
623*4882a593Smuzhiyun 	case TAS6424_CH2_VOL_CTRL:
624*4882a593Smuzhiyun 	case TAS6424_CH3_VOL_CTRL:
625*4882a593Smuzhiyun 	case TAS6424_CH4_VOL_CTRL:
626*4882a593Smuzhiyun 	case TAS6424_DC_DIAG_CTRL1:
627*4882a593Smuzhiyun 	case TAS6424_DC_DIAG_CTRL2:
628*4882a593Smuzhiyun 	case TAS6424_DC_DIAG_CTRL3:
629*4882a593Smuzhiyun 	case TAS6424_PIN_CTRL:
630*4882a593Smuzhiyun 	case TAS6424_AC_DIAG_CTRL1:
631*4882a593Smuzhiyun 	case TAS6424_MISC_CTRL3:
632*4882a593Smuzhiyun 	case TAS6424_CLIP_CTRL:
633*4882a593Smuzhiyun 	case TAS6424_CLIP_WINDOW:
634*4882a593Smuzhiyun 	case TAS6424_CLIP_WARN:
635*4882a593Smuzhiyun 	case TAS6424_CBC_STAT:
636*4882a593Smuzhiyun 	case TAS6424_MISC_CTRL4:
637*4882a593Smuzhiyun 		return true;
638*4882a593Smuzhiyun 	default:
639*4882a593Smuzhiyun 		return false;
640*4882a593Smuzhiyun 	}
641*4882a593Smuzhiyun }
642*4882a593Smuzhiyun 
tas6424_is_volatile_reg(struct device * dev,unsigned int reg)643*4882a593Smuzhiyun static bool tas6424_is_volatile_reg(struct device *dev, unsigned int reg)
644*4882a593Smuzhiyun {
645*4882a593Smuzhiyun 	switch (reg) {
646*4882a593Smuzhiyun 	case TAS6424_DC_LOAD_DIAG_REP12:
647*4882a593Smuzhiyun 	case TAS6424_DC_LOAD_DIAG_REP34:
648*4882a593Smuzhiyun 	case TAS6424_DC_LOAD_DIAG_REPLO:
649*4882a593Smuzhiyun 	case TAS6424_CHANNEL_STATE:
650*4882a593Smuzhiyun 	case TAS6424_CHANNEL_FAULT:
651*4882a593Smuzhiyun 	case TAS6424_GLOB_FAULT1:
652*4882a593Smuzhiyun 	case TAS6424_GLOB_FAULT2:
653*4882a593Smuzhiyun 	case TAS6424_WARN:
654*4882a593Smuzhiyun 	case TAS6424_AC_LOAD_DIAG_REP1:
655*4882a593Smuzhiyun 	case TAS6424_AC_LOAD_DIAG_REP2:
656*4882a593Smuzhiyun 	case TAS6424_AC_LOAD_DIAG_REP3:
657*4882a593Smuzhiyun 	case TAS6424_AC_LOAD_DIAG_REP4:
658*4882a593Smuzhiyun 		return true;
659*4882a593Smuzhiyun 	default:
660*4882a593Smuzhiyun 		return false;
661*4882a593Smuzhiyun 	}
662*4882a593Smuzhiyun }
663*4882a593Smuzhiyun 
664*4882a593Smuzhiyun static const struct regmap_config tas6424_regmap_config = {
665*4882a593Smuzhiyun 	.reg_bits = 8,
666*4882a593Smuzhiyun 	.val_bits = 8,
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun 	.writeable_reg = tas6424_is_writable_reg,
669*4882a593Smuzhiyun 	.volatile_reg = tas6424_is_volatile_reg,
670*4882a593Smuzhiyun 
671*4882a593Smuzhiyun 	.max_register = TAS6424_MAX,
672*4882a593Smuzhiyun 	.reg_defaults = tas6424_reg_defaults,
673*4882a593Smuzhiyun 	.num_reg_defaults = ARRAY_SIZE(tas6424_reg_defaults),
674*4882a593Smuzhiyun 	.cache_type = REGCACHE_RBTREE,
675*4882a593Smuzhiyun };
676*4882a593Smuzhiyun 
677*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_OF)
678*4882a593Smuzhiyun static const struct of_device_id tas6424_of_ids[] = {
679*4882a593Smuzhiyun 	{ .compatible = "ti,tas6424", },
680*4882a593Smuzhiyun 	{ },
681*4882a593Smuzhiyun };
682*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, tas6424_of_ids);
683*4882a593Smuzhiyun #endif
684*4882a593Smuzhiyun 
tas6424_i2c_probe(struct i2c_client * client,const struct i2c_device_id * id)685*4882a593Smuzhiyun static int tas6424_i2c_probe(struct i2c_client *client,
686*4882a593Smuzhiyun 			     const struct i2c_device_id *id)
687*4882a593Smuzhiyun {
688*4882a593Smuzhiyun 	struct device *dev = &client->dev;
689*4882a593Smuzhiyun 	struct tas6424_data *tas6424;
690*4882a593Smuzhiyun 	int ret;
691*4882a593Smuzhiyun 	int i;
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 	tas6424 = devm_kzalloc(dev, sizeof(*tas6424), GFP_KERNEL);
694*4882a593Smuzhiyun 	if (!tas6424)
695*4882a593Smuzhiyun 		return -ENOMEM;
696*4882a593Smuzhiyun 	dev_set_drvdata(dev, tas6424);
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun 	tas6424->dev = dev;
699*4882a593Smuzhiyun 
700*4882a593Smuzhiyun 	tas6424->regmap = devm_regmap_init_i2c(client, &tas6424_regmap_config);
701*4882a593Smuzhiyun 	if (IS_ERR(tas6424->regmap)) {
702*4882a593Smuzhiyun 		ret = PTR_ERR(tas6424->regmap);
703*4882a593Smuzhiyun 		dev_err(dev, "unable to allocate register map: %d\n", ret);
704*4882a593Smuzhiyun 		return ret;
705*4882a593Smuzhiyun 	}
706*4882a593Smuzhiyun 
707*4882a593Smuzhiyun 	/*
708*4882a593Smuzhiyun 	 * Get control of the standby pin and set it LOW to take the codec
709*4882a593Smuzhiyun 	 * out of the stand-by mode.
710*4882a593Smuzhiyun 	 * Note: The actual pin polarity is taken care of in the GPIO lib
711*4882a593Smuzhiyun 	 * according the polarity specified in the DTS.
712*4882a593Smuzhiyun 	 */
713*4882a593Smuzhiyun 	tas6424->standby_gpio = devm_gpiod_get_optional(dev, "standby",
714*4882a593Smuzhiyun 						      GPIOD_OUT_LOW);
715*4882a593Smuzhiyun 	if (IS_ERR(tas6424->standby_gpio)) {
716*4882a593Smuzhiyun 		if (PTR_ERR(tas6424->standby_gpio) == -EPROBE_DEFER)
717*4882a593Smuzhiyun 			return -EPROBE_DEFER;
718*4882a593Smuzhiyun 		dev_info(dev, "failed to get standby GPIO: %ld\n",
719*4882a593Smuzhiyun 			PTR_ERR(tas6424->standby_gpio));
720*4882a593Smuzhiyun 		tas6424->standby_gpio = NULL;
721*4882a593Smuzhiyun 	}
722*4882a593Smuzhiyun 
723*4882a593Smuzhiyun 	/*
724*4882a593Smuzhiyun 	 * Get control of the mute pin and set it HIGH in order to start with
725*4882a593Smuzhiyun 	 * all the output muted.
726*4882a593Smuzhiyun 	 * Note: The actual pin polarity is taken care of in the GPIO lib
727*4882a593Smuzhiyun 	 * according the polarity specified in the DTS.
728*4882a593Smuzhiyun 	 */
729*4882a593Smuzhiyun 	tas6424->mute_gpio = devm_gpiod_get_optional(dev, "mute",
730*4882a593Smuzhiyun 						      GPIOD_OUT_HIGH);
731*4882a593Smuzhiyun 	if (IS_ERR(tas6424->mute_gpio)) {
732*4882a593Smuzhiyun 		if (PTR_ERR(tas6424->mute_gpio) == -EPROBE_DEFER)
733*4882a593Smuzhiyun 			return -EPROBE_DEFER;
734*4882a593Smuzhiyun 		dev_info(dev, "failed to get nmute GPIO: %ld\n",
735*4882a593Smuzhiyun 			PTR_ERR(tas6424->mute_gpio));
736*4882a593Smuzhiyun 		tas6424->mute_gpio = NULL;
737*4882a593Smuzhiyun 	}
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(tas6424->supplies); i++)
740*4882a593Smuzhiyun 		tas6424->supplies[i].supply = tas6424_supply_names[i];
741*4882a593Smuzhiyun 	ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(tas6424->supplies),
742*4882a593Smuzhiyun 				      tas6424->supplies);
743*4882a593Smuzhiyun 	if (ret) {
744*4882a593Smuzhiyun 		dev_err(dev, "unable to request supplies: %d\n", ret);
745*4882a593Smuzhiyun 		return ret;
746*4882a593Smuzhiyun 	}
747*4882a593Smuzhiyun 
748*4882a593Smuzhiyun 	ret = regulator_bulk_enable(ARRAY_SIZE(tas6424->supplies),
749*4882a593Smuzhiyun 				    tas6424->supplies);
750*4882a593Smuzhiyun 	if (ret) {
751*4882a593Smuzhiyun 		dev_err(dev, "unable to enable supplies: %d\n", ret);
752*4882a593Smuzhiyun 		return ret;
753*4882a593Smuzhiyun 	}
754*4882a593Smuzhiyun 
755*4882a593Smuzhiyun 	/* Reset device to establish well-defined startup state */
756*4882a593Smuzhiyun 	ret = regmap_update_bits(tas6424->regmap, TAS6424_MODE_CTRL,
757*4882a593Smuzhiyun 				 TAS6424_RESET, TAS6424_RESET);
758*4882a593Smuzhiyun 	if (ret) {
759*4882a593Smuzhiyun 		dev_err(dev, "unable to reset device: %d\n", ret);
760*4882a593Smuzhiyun 		return ret;
761*4882a593Smuzhiyun 	}
762*4882a593Smuzhiyun 
763*4882a593Smuzhiyun 	INIT_DELAYED_WORK(&tas6424->fault_check_work, tas6424_fault_check_work);
764*4882a593Smuzhiyun 
765*4882a593Smuzhiyun 	ret = devm_snd_soc_register_component(dev, &soc_codec_dev_tas6424,
766*4882a593Smuzhiyun 				     tas6424_dai, ARRAY_SIZE(tas6424_dai));
767*4882a593Smuzhiyun 	if (ret < 0) {
768*4882a593Smuzhiyun 		dev_err(dev, "unable to register codec: %d\n", ret);
769*4882a593Smuzhiyun 		return ret;
770*4882a593Smuzhiyun 	}
771*4882a593Smuzhiyun 
772*4882a593Smuzhiyun 	return 0;
773*4882a593Smuzhiyun }
774*4882a593Smuzhiyun 
tas6424_i2c_remove(struct i2c_client * client)775*4882a593Smuzhiyun static int tas6424_i2c_remove(struct i2c_client *client)
776*4882a593Smuzhiyun {
777*4882a593Smuzhiyun 	struct device *dev = &client->dev;
778*4882a593Smuzhiyun 	struct tas6424_data *tas6424 = dev_get_drvdata(dev);
779*4882a593Smuzhiyun 	int ret;
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 	cancel_delayed_work_sync(&tas6424->fault_check_work);
782*4882a593Smuzhiyun 
783*4882a593Smuzhiyun 	/* put the codec in stand-by */
784*4882a593Smuzhiyun 	if (tas6424->standby_gpio)
785*4882a593Smuzhiyun 		gpiod_set_value_cansleep(tas6424->standby_gpio, 1);
786*4882a593Smuzhiyun 
787*4882a593Smuzhiyun 	ret = regulator_bulk_disable(ARRAY_SIZE(tas6424->supplies),
788*4882a593Smuzhiyun 				     tas6424->supplies);
789*4882a593Smuzhiyun 	if (ret < 0) {
790*4882a593Smuzhiyun 		dev_err(dev, "unable to disable supplies: %d\n", ret);
791*4882a593Smuzhiyun 		return ret;
792*4882a593Smuzhiyun 	}
793*4882a593Smuzhiyun 
794*4882a593Smuzhiyun 	return 0;
795*4882a593Smuzhiyun }
796*4882a593Smuzhiyun 
797*4882a593Smuzhiyun static const struct i2c_device_id tas6424_i2c_ids[] = {
798*4882a593Smuzhiyun 	{ "tas6424", 0 },
799*4882a593Smuzhiyun 	{ }
800*4882a593Smuzhiyun };
801*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, tas6424_i2c_ids);
802*4882a593Smuzhiyun 
803*4882a593Smuzhiyun static struct i2c_driver tas6424_i2c_driver = {
804*4882a593Smuzhiyun 	.driver = {
805*4882a593Smuzhiyun 		.name = "tas6424",
806*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(tas6424_of_ids),
807*4882a593Smuzhiyun 	},
808*4882a593Smuzhiyun 	.probe = tas6424_i2c_probe,
809*4882a593Smuzhiyun 	.remove = tas6424_i2c_remove,
810*4882a593Smuzhiyun 	.id_table = tas6424_i2c_ids,
811*4882a593Smuzhiyun };
812*4882a593Smuzhiyun module_i2c_driver(tas6424_i2c_driver);
813*4882a593Smuzhiyun 
814*4882a593Smuzhiyun MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>");
815*4882a593Smuzhiyun MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
816*4882a593Smuzhiyun MODULE_DESCRIPTION("TAS6424 Audio amplifier driver");
817*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
818