1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * tas5720.h - ALSA SoC Texas Instruments TAS5720 Mono Audio Amplifier 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C)2015-2016 Texas Instruments Incorporated - https://www.ti.com 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Author: Andreas Dannenberg <dannenberg@ti.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __TAS5720_H__ 11*4882a593Smuzhiyun #define __TAS5720_H__ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* Register Address Map */ 14*4882a593Smuzhiyun #define TAS5720_DEVICE_ID_REG 0x00 15*4882a593Smuzhiyun #define TAS5720_POWER_CTRL_REG 0x01 16*4882a593Smuzhiyun #define TAS5720_DIGITAL_CTRL1_REG 0x02 17*4882a593Smuzhiyun #define TAS5720_DIGITAL_CTRL2_REG 0x03 18*4882a593Smuzhiyun #define TAS5720_VOLUME_CTRL_REG 0x04 19*4882a593Smuzhiyun #define TAS5720_ANALOG_CTRL_REG 0x06 20*4882a593Smuzhiyun #define TAS5720_FAULT_REG 0x08 21*4882a593Smuzhiyun #define TAS5720_DIGITAL_CLIP2_REG 0x10 22*4882a593Smuzhiyun #define TAS5720_DIGITAL_CLIP1_REG 0x11 23*4882a593Smuzhiyun #define TAS5720_MAX_REG TAS5720_DIGITAL_CLIP1_REG 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /* Additional TAS5722-specific Registers */ 26*4882a593Smuzhiyun #define TAS5722_DIGITAL_CTRL2_REG 0x13 27*4882a593Smuzhiyun #define TAS5722_ANALOG_CTRL2_REG 0x14 28*4882a593Smuzhiyun #define TAS5722_MAX_REG TAS5722_ANALOG_CTRL2_REG 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* TAS5720_DEVICE_ID_REG */ 31*4882a593Smuzhiyun #define TAS5720_DEVICE_ID 0x01 32*4882a593Smuzhiyun #define TAS5722_DEVICE_ID 0x12 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* TAS5720_POWER_CTRL_REG */ 35*4882a593Smuzhiyun #define TAS5720_DIG_CLIP_MASK GENMASK(7, 2) 36*4882a593Smuzhiyun #define TAS5720_SLEEP BIT(1) 37*4882a593Smuzhiyun #define TAS5720_SDZ BIT(0) 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* TAS5720_DIGITAL_CTRL1_REG */ 40*4882a593Smuzhiyun #define TAS5720_HPF_BYPASS BIT(7) 41*4882a593Smuzhiyun #define TAS5720_TDM_CFG_SRC BIT(6) 42*4882a593Smuzhiyun #define TAS5720_SSZ_DS BIT(3) 43*4882a593Smuzhiyun #define TAS5720_SAIF_RIGHTJ_24BIT (0x0) 44*4882a593Smuzhiyun #define TAS5720_SAIF_RIGHTJ_20BIT (0x1) 45*4882a593Smuzhiyun #define TAS5720_SAIF_RIGHTJ_18BIT (0x2) 46*4882a593Smuzhiyun #define TAS5720_SAIF_RIGHTJ_16BIT (0x3) 47*4882a593Smuzhiyun #define TAS5720_SAIF_I2S (0x4) 48*4882a593Smuzhiyun #define TAS5720_SAIF_LEFTJ (0x5) 49*4882a593Smuzhiyun #define TAS5720_SAIF_FORMAT_MASK GENMASK(2, 0) 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* TAS5720_DIGITAL_CTRL2_REG */ 52*4882a593Smuzhiyun #define TAS5722_VOL_RAMP_RATE BIT(6) 53*4882a593Smuzhiyun #define TAS5720_MUTE BIT(4) 54*4882a593Smuzhiyun #define TAS5720_TDM_SLOT_SEL_MASK GENMASK(2, 0) 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun /* TAS5720_ANALOG_CTRL_REG */ 57*4882a593Smuzhiyun #define TAS5720_PWM_RATE_6_3_FSYNC (0x0 << 4) 58*4882a593Smuzhiyun #define TAS5720_PWM_RATE_8_4_FSYNC (0x1 << 4) 59*4882a593Smuzhiyun #define TAS5720_PWM_RATE_10_5_FSYNC (0x2 << 4) 60*4882a593Smuzhiyun #define TAS5720_PWM_RATE_12_6_FSYNC (0x3 << 4) 61*4882a593Smuzhiyun #define TAS5720_PWM_RATE_14_7_FSYNC (0x4 << 4) 62*4882a593Smuzhiyun #define TAS5720_PWM_RATE_16_8_FSYNC (0x5 << 4) 63*4882a593Smuzhiyun #define TAS5720_PWM_RATE_20_10_FSYNC (0x6 << 4) 64*4882a593Smuzhiyun #define TAS5720_PWM_RATE_24_12_FSYNC (0x7 << 4) 65*4882a593Smuzhiyun #define TAS5720_PWM_RATE_MASK GENMASK(6, 4) 66*4882a593Smuzhiyun #define TAS5720_ANALOG_GAIN_19_2DBV (0x0 << 2) 67*4882a593Smuzhiyun #define TAS5720_ANALOG_GAIN_20_7DBV (0x1 << 2) 68*4882a593Smuzhiyun #define TAS5720_ANALOG_GAIN_23_5DBV (0x2 << 2) 69*4882a593Smuzhiyun #define TAS5720_ANALOG_GAIN_26_3DBV (0x3 << 2) 70*4882a593Smuzhiyun #define TAS5720_ANALOG_GAIN_MASK GENMASK(3, 2) 71*4882a593Smuzhiyun #define TAS5720_ANALOG_GAIN_SHIFT (0x2) 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun /* TAS5720_FAULT_REG */ 74*4882a593Smuzhiyun #define TAS5720_OC_THRESH_100PCT (0x0 << 4) 75*4882a593Smuzhiyun #define TAS5720_OC_THRESH_75PCT (0x1 << 4) 76*4882a593Smuzhiyun #define TAS5720_OC_THRESH_50PCT (0x2 << 4) 77*4882a593Smuzhiyun #define TAS5720_OC_THRESH_25PCT (0x3 << 4) 78*4882a593Smuzhiyun #define TAS5720_OC_THRESH_MASK GENMASK(5, 4) 79*4882a593Smuzhiyun #define TAS5720_CLKE BIT(3) 80*4882a593Smuzhiyun #define TAS5720_OCE BIT(2) 81*4882a593Smuzhiyun #define TAS5720_DCE BIT(1) 82*4882a593Smuzhiyun #define TAS5720_OTE BIT(0) 83*4882a593Smuzhiyun #define TAS5720_FAULT_MASK GENMASK(3, 0) 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /* TAS5720_DIGITAL_CLIP1_REG */ 86*4882a593Smuzhiyun #define TAS5720_CLIP1_MASK GENMASK(7, 2) 87*4882a593Smuzhiyun #define TAS5720_CLIP1_SHIFT (0x2) 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun /* TAS5722_DIGITAL_CTRL2_REG */ 90*4882a593Smuzhiyun #define TAS5722_HPF_3_7HZ (0x0 << 5) 91*4882a593Smuzhiyun #define TAS5722_HPF_7_4HZ (0x1 << 5) 92*4882a593Smuzhiyun #define TAS5722_HPF_14_9HZ (0x2 << 5) 93*4882a593Smuzhiyun #define TAS5722_HPF_29_7HZ (0x3 << 5) 94*4882a593Smuzhiyun #define TAS5722_HPF_59_4HZ (0x4 << 5) 95*4882a593Smuzhiyun #define TAS5722_HPF_118_4HZ (0x5 << 5) 96*4882a593Smuzhiyun #define TAS5722_HPF_235_0HZ (0x6 << 5) 97*4882a593Smuzhiyun #define TAS5722_HPF_463_2HZ (0x7 << 5) 98*4882a593Smuzhiyun #define TAS5722_HPF_MASK GENMASK(7, 5) 99*4882a593Smuzhiyun #define TAS5722_AUTO_SLEEP_OFF (0x0 << 3) 100*4882a593Smuzhiyun #define TAS5722_AUTO_SLEEP_1024LR (0x1 << 3) 101*4882a593Smuzhiyun #define TAS5722_AUTO_SLEEP_65536LR (0x2 << 3) 102*4882a593Smuzhiyun #define TAS5722_AUTO_SLEEP_262144LR (0x3 << 3) 103*4882a593Smuzhiyun #define TAS5722_AUTO_SLEEP_MASK GENMASK(4, 3) 104*4882a593Smuzhiyun #define TAS5722_TDM_SLOT_16B BIT(2) 105*4882a593Smuzhiyun #define TAS5722_MCLK_PIN_CFG BIT(1) 106*4882a593Smuzhiyun #define TAS5722_VOL_CONTROL_LSB BIT(0) 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun /* TAS5722_ANALOG_CTRL2_REG */ 109*4882a593Smuzhiyun #define TAS5722_FAULTZ_PU BIT(3) 110*4882a593Smuzhiyun #define TAS5722_VREG_LVL BIT(2) 111*4882a593Smuzhiyun #define TAS5722_PWR_TUNE BIT(0) 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun #endif /* __TAS5720_H__ */ 114