xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/tas2770.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  * ALSA SoC TAS2770 codec driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *  Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun #ifndef __TAS2770__
8*4882a593Smuzhiyun #define __TAS2770__
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun /* Book Control Register (available in page0 of each book) */
11*4882a593Smuzhiyun #define TAS2770_BOOKCTL_PAGE            0
12*4882a593Smuzhiyun #define TAS2770_BOOKCTL_REG         127
13*4882a593Smuzhiyun #define TAS2770_REG(page, reg)        ((page * 128) + reg)
14*4882a593Smuzhiyun     /* Page */
15*4882a593Smuzhiyun #define TAS2770_PAGE  TAS2770_REG(0X0, 0x00)
16*4882a593Smuzhiyun #define TAS2770_PAGE_PAGE_MASK  255
17*4882a593Smuzhiyun     /* Software Reset */
18*4882a593Smuzhiyun #define TAS2770_SW_RST  TAS2770_REG(0X0, 0x01)
19*4882a593Smuzhiyun #define TAS2770_RST  BIT(0)
20*4882a593Smuzhiyun     /* Power Control */
21*4882a593Smuzhiyun #define TAS2770_PWR_CTRL  TAS2770_REG(0X0, 0x02)
22*4882a593Smuzhiyun #define TAS2770_PWR_CTRL_MASK  GENMASK(1, 0)
23*4882a593Smuzhiyun #define TAS2770_PWR_CTRL_ACTIVE  0x0
24*4882a593Smuzhiyun #define TAS2770_PWR_CTRL_MUTE  BIT(0)
25*4882a593Smuzhiyun #define TAS2770_PWR_CTRL_SHUTDOWN  0x2
26*4882a593Smuzhiyun     /* Playback Configuration Reg0 */
27*4882a593Smuzhiyun #define TAS2770_PLAY_CFG_REG0  TAS2770_REG(0X0, 0x03)
28*4882a593Smuzhiyun     /* Playback Configuration Reg1 */
29*4882a593Smuzhiyun #define TAS2770_PLAY_CFG_REG1  TAS2770_REG(0X0, 0x04)
30*4882a593Smuzhiyun     /* Playback Configuration Reg2 */
31*4882a593Smuzhiyun #define TAS2770_PLAY_CFG_REG2  TAS2770_REG(0X0, 0x05)
32*4882a593Smuzhiyun #define TAS2770_PLAY_CFG_REG2_VMAX 0xc9
33*4882a593Smuzhiyun     /* Misc Configuration Reg0 */
34*4882a593Smuzhiyun #define TAS2770_MSC_CFG_REG0  TAS2770_REG(0X0, 0x07)
35*4882a593Smuzhiyun     /* TDM Configuration Reg0 */
36*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG0  TAS2770_REG(0X0, 0x0A)
37*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG0_SMP_MASK  BIT(5)
38*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG0_SMP_48KHZ  0x0
39*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG0_SMP_44_1KHZ  BIT(5)
40*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG0_31_MASK  GENMASK(3, 1)
41*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG0_31_44_1_48KHZ  0x6
42*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG0_31_88_2_96KHZ  0x8
43*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG0_31_176_4_192KHZ  0xa
44*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG0_FPOL_MASK  BIT(0)
45*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG0_FPOL_RSING  0
46*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG0_FPOL_FALING  1
47*4882a593Smuzhiyun     /* TDM Configuration Reg1 */
48*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG1  TAS2770_REG(0X0, 0x0B)
49*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG1_MASK	GENMASK(5, 1)
50*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG1_51_SHIFT  1
51*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG1_RX_MASK  BIT(0)
52*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG1_RX_RSING  0x0
53*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG1_RX_FALING  BIT(0)
54*4882a593Smuzhiyun     /* TDM Configuration Reg2 */
55*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG2  TAS2770_REG(0X0, 0x0C)
56*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG2_RXW_MASK	GENMASK(3, 2)
57*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG2_RXW_16BITS  0x0
58*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG2_RXW_24BITS  0x8
59*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG2_RXW_32BITS  0xc
60*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG2_RXS_MASK    GENMASK(1, 0)
61*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG2_RXS_16BITS  0x0
62*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG2_RXS_24BITS  BIT(0)
63*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG2_RXS_32BITS  0x2
64*4882a593Smuzhiyun     /* TDM Configuration Reg3 */
65*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG3  TAS2770_REG(0X0, 0x0D)
66*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG3_RXS_MASK  GENMASK(7, 4)
67*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG3_RXS_SHIFT 0x4
68*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG3_30_MASK  GENMASK(3, 0)
69*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG3_30_SHIFT 0
70*4882a593Smuzhiyun     /* TDM Configuration Reg5 */
71*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG5  TAS2770_REG(0X0, 0x0F)
72*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG5_VSNS_MASK  BIT(6)
73*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG5_VSNS_ENABLE  BIT(6)
74*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG5_50_MASK	GENMASK(5, 0)
75*4882a593Smuzhiyun     /* TDM Configuration Reg6 */
76*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG6  TAS2770_REG(0X0, 0x10)
77*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG6_ISNS_MASK  BIT(6)
78*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG6_ISNS_ENABLE  BIT(6)
79*4882a593Smuzhiyun #define TAS2770_TDM_CFG_REG6_50_MASK  GENMASK(5, 0)
80*4882a593Smuzhiyun     /* Brown Out Prevention Reg0 */
81*4882a593Smuzhiyun #define TAS2770_BO_PRV_REG0  TAS2770_REG(0X0, 0x1B)
82*4882a593Smuzhiyun     /* Interrupt MASK Reg0 */
83*4882a593Smuzhiyun #define TAS2770_INT_MASK_REG0  TAS2770_REG(0X0, 0x20)
84*4882a593Smuzhiyun #define TAS2770_INT_REG0_DEFAULT  0xfc
85*4882a593Smuzhiyun #define TAS2770_INT_MASK_REG0_DISABLE 0xff
86*4882a593Smuzhiyun     /* Interrupt MASK Reg1 */
87*4882a593Smuzhiyun #define TAS2770_INT_MASK_REG1  TAS2770_REG(0X0, 0x21)
88*4882a593Smuzhiyun #define TAS2770_INT_REG1_DEFAULT  0xb1
89*4882a593Smuzhiyun #define TAS2770_INT_MASK_REG1_DISABLE 0xff
90*4882a593Smuzhiyun     /* Live-Interrupt Reg0 */
91*4882a593Smuzhiyun #define TAS2770_LVE_INT_REG0  TAS2770_REG(0X0, 0x22)
92*4882a593Smuzhiyun     /* Live-Interrupt Reg1 */
93*4882a593Smuzhiyun #define TAS2770_LVE_INT_REG1  TAS2770_REG(0X0, 0x23)
94*4882a593Smuzhiyun     /* Latched-Interrupt Reg0 */
95*4882a593Smuzhiyun #define TAS2770_LAT_INT_REG0  TAS2770_REG(0X0, 0x24)
96*4882a593Smuzhiyun #define TAS2770_LAT_INT_REG0_OCE_FLG  BIT(1)
97*4882a593Smuzhiyun #define TAS2770_LAT_INT_REG0_OTE_FLG  BIT(0)
98*4882a593Smuzhiyun     /* Latched-Interrupt Reg1 */
99*4882a593Smuzhiyun #define TAS2770_LAT_INT_REG1  TAS2770_REG(0X0, 0x25)
100*4882a593Smuzhiyun #define TAS2770_LAT_INT_REG1_VBA_TOV  BIT(3)
101*4882a593Smuzhiyun #define TAS2770_LAT_INT_REG1_VBA_TUV  BIT(2)
102*4882a593Smuzhiyun #define TAS2770_LAT_INT_REG1_BOUT_FLG  BIT(1)
103*4882a593Smuzhiyun     /* VBAT MSB */
104*4882a593Smuzhiyun #define TAS2770_VBAT_MSB  TAS2770_REG(0X0, 0x27)
105*4882a593Smuzhiyun     /* VBAT LSB */
106*4882a593Smuzhiyun #define TAS2770_VBAT_LSB  TAS2770_REG(0X0, 0x28)
107*4882a593Smuzhiyun     /* TEMP MSB */
108*4882a593Smuzhiyun #define TAS2770_TEMP_MSB  TAS2770_REG(0X0, 0x29)
109*4882a593Smuzhiyun     /* TEMP LSB */
110*4882a593Smuzhiyun #define TAS2770_TEMP_LSB  TAS2770_REG(0X0, 0x2A)
111*4882a593Smuzhiyun     /* Interrupt Configuration */
112*4882a593Smuzhiyun #define TAS2770_INT_CFG  TAS2770_REG(0X0, 0x30)
113*4882a593Smuzhiyun     /* Misc IRQ */
114*4882a593Smuzhiyun #define TAS2770_MISC_IRQ  TAS2770_REG(0X0, 0x32)
115*4882a593Smuzhiyun     /* Clock Configuration */
116*4882a593Smuzhiyun #define TAS2770_CLK_CGF  TAS2770_REG(0X0, 0x3C)
117*4882a593Smuzhiyun     /* TDM Clock detection monitor */
118*4882a593Smuzhiyun #define TAS2770_TDM_CLK_DETC  TAS2770_REG(0X0, 0x77)
119*4882a593Smuzhiyun     /* Revision and PG ID */
120*4882a593Smuzhiyun #define TAS2770_REV_AND_GPID  TAS2770_REG(0X0, 0x7D)
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun #define TAS2770_POWER_ACTIVE	0
123*4882a593Smuzhiyun #define TAS2770_POWER_MUTE	BIT(0)
124*4882a593Smuzhiyun #define TAS2770_POWER_SHUTDOWN	BIT(1)
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun #define ERROR_OVER_CURRENT  BIT(0)
127*4882a593Smuzhiyun #define ERROR_DIE_OVERTEMP  BIT(1)
128*4882a593Smuzhiyun #define ERROR_OVER_VOLTAGE  BIT(2)
129*4882a593Smuzhiyun #define ERROR_UNDER_VOLTAGE BIT(3)
130*4882a593Smuzhiyun #define ERROR_BROWNOUT      BIT(4)
131*4882a593Smuzhiyun #define ERROR_CLASSD_PWR    BIT(5)
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun struct tas2770_priv {
134*4882a593Smuzhiyun 	struct snd_soc_component *component;
135*4882a593Smuzhiyun 	struct gpio_desc *reset_gpio;
136*4882a593Smuzhiyun 	struct gpio_desc *sdz_gpio;
137*4882a593Smuzhiyun 	struct regmap *regmap;
138*4882a593Smuzhiyun 	struct device *dev;
139*4882a593Smuzhiyun 	int v_sense_slot;
140*4882a593Smuzhiyun 	int i_sense_slot;
141*4882a593Smuzhiyun 	bool dac_powered;
142*4882a593Smuzhiyun 	bool unmuted;
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun #endif /* __TAS2770__ */
146