1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // ALSA SoC Texas Instruments TAS2770 20-W Digital Input Mono Class-D
4*4882a593Smuzhiyun // Audio Amplifier with Speaker I/V Sense
5*4882a593Smuzhiyun //
6*4882a593Smuzhiyun // Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
7*4882a593Smuzhiyun // Author: Tracy Yi <tracy-yi@ti.com>
8*4882a593Smuzhiyun // Frank Shi <shifu0704@thundersoft.com>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/moduleparam.h>
12*4882a593Smuzhiyun #include <linux/err.h>
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/delay.h>
15*4882a593Smuzhiyun #include <linux/pm.h>
16*4882a593Smuzhiyun #include <linux/i2c.h>
17*4882a593Smuzhiyun #include <linux/gpio.h>
18*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
19*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
20*4882a593Smuzhiyun #include <linux/firmware.h>
21*4882a593Smuzhiyun #include <linux/regmap.h>
22*4882a593Smuzhiyun #include <linux/of.h>
23*4882a593Smuzhiyun #include <linux/of_gpio.h>
24*4882a593Smuzhiyun #include <linux/slab.h>
25*4882a593Smuzhiyun #include <sound/soc.h>
26*4882a593Smuzhiyun #include <sound/pcm.h>
27*4882a593Smuzhiyun #include <sound/pcm_params.h>
28*4882a593Smuzhiyun #include <sound/initval.h>
29*4882a593Smuzhiyun #include <sound/tlv.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #include "tas2770.h"
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #define TAS2770_MDELAY 0xFFFFFFFE
34*4882a593Smuzhiyun
tas2770_reset(struct tas2770_priv * tas2770)35*4882a593Smuzhiyun static void tas2770_reset(struct tas2770_priv *tas2770)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun if (tas2770->reset_gpio) {
38*4882a593Smuzhiyun gpiod_set_value_cansleep(tas2770->reset_gpio, 0);
39*4882a593Smuzhiyun msleep(20);
40*4882a593Smuzhiyun gpiod_set_value_cansleep(tas2770->reset_gpio, 1);
41*4882a593Smuzhiyun usleep_range(1000, 2000);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun snd_soc_component_write(tas2770->component, TAS2770_SW_RST,
45*4882a593Smuzhiyun TAS2770_RST);
46*4882a593Smuzhiyun usleep_range(1000, 2000);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
tas2770_update_pwr_ctrl(struct tas2770_priv * tas2770)49*4882a593Smuzhiyun static int tas2770_update_pwr_ctrl(struct tas2770_priv *tas2770)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun struct snd_soc_component *component = tas2770->component;
52*4882a593Smuzhiyun unsigned int val;
53*4882a593Smuzhiyun int ret;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun if (tas2770->dac_powered)
56*4882a593Smuzhiyun val = tas2770->unmuted ?
57*4882a593Smuzhiyun TAS2770_PWR_CTRL_ACTIVE : TAS2770_PWR_CTRL_MUTE;
58*4882a593Smuzhiyun else
59*4882a593Smuzhiyun val = TAS2770_PWR_CTRL_SHUTDOWN;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, TAS2770_PWR_CTRL,
62*4882a593Smuzhiyun TAS2770_PWR_CTRL_MASK, val);
63*4882a593Smuzhiyun if (ret < 0)
64*4882a593Smuzhiyun return ret;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun return 0;
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun #ifdef CONFIG_PM
tas2770_codec_suspend(struct snd_soc_component * component)70*4882a593Smuzhiyun static int tas2770_codec_suspend(struct snd_soc_component *component)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun struct tas2770_priv *tas2770 = snd_soc_component_get_drvdata(component);
73*4882a593Smuzhiyun int ret = 0;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun regcache_cache_only(tas2770->regmap, true);
76*4882a593Smuzhiyun regcache_mark_dirty(tas2770->regmap);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun if (tas2770->sdz_gpio) {
79*4882a593Smuzhiyun gpiod_set_value_cansleep(tas2770->sdz_gpio, 0);
80*4882a593Smuzhiyun } else {
81*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, TAS2770_PWR_CTRL,
82*4882a593Smuzhiyun TAS2770_PWR_CTRL_MASK,
83*4882a593Smuzhiyun TAS2770_PWR_CTRL_SHUTDOWN);
84*4882a593Smuzhiyun if (ret < 0) {
85*4882a593Smuzhiyun regcache_cache_only(tas2770->regmap, false);
86*4882a593Smuzhiyun regcache_sync(tas2770->regmap);
87*4882a593Smuzhiyun return ret;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun ret = 0;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun return ret;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
tas2770_codec_resume(struct snd_soc_component * component)96*4882a593Smuzhiyun static int tas2770_codec_resume(struct snd_soc_component *component)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun struct tas2770_priv *tas2770 = snd_soc_component_get_drvdata(component);
99*4882a593Smuzhiyun int ret = 0;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun if (tas2770->sdz_gpio) {
102*4882a593Smuzhiyun gpiod_set_value_cansleep(tas2770->sdz_gpio, 1);
103*4882a593Smuzhiyun usleep_range(1000, 2000);
104*4882a593Smuzhiyun } else {
105*4882a593Smuzhiyun ret = tas2770_update_pwr_ctrl(tas2770);
106*4882a593Smuzhiyun if (ret < 0)
107*4882a593Smuzhiyun return ret;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun regcache_cache_only(tas2770->regmap, false);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun return regcache_sync(tas2770->regmap);
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun #else
115*4882a593Smuzhiyun #define tas2770_codec_suspend NULL
116*4882a593Smuzhiyun #define tas2770_codec_resume NULL
117*4882a593Smuzhiyun #endif
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun static const char * const tas2770_ASI1_src[] = {
120*4882a593Smuzhiyun "I2C offset", "Left", "Right", "LeftRightDiv2",
121*4882a593Smuzhiyun };
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(
124*4882a593Smuzhiyun tas2770_ASI1_src_enum, TAS2770_TDM_CFG_REG2,
125*4882a593Smuzhiyun 4, tas2770_ASI1_src);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun static const struct snd_kcontrol_new tas2770_asi1_mux =
128*4882a593Smuzhiyun SOC_DAPM_ENUM("ASI1 Source", tas2770_ASI1_src_enum);
129*4882a593Smuzhiyun
tas2770_dac_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)130*4882a593Smuzhiyun static int tas2770_dac_event(struct snd_soc_dapm_widget *w,
131*4882a593Smuzhiyun struct snd_kcontrol *kcontrol, int event)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun struct snd_soc_component *component =
134*4882a593Smuzhiyun snd_soc_dapm_to_component(w->dapm);
135*4882a593Smuzhiyun struct tas2770_priv *tas2770 =
136*4882a593Smuzhiyun snd_soc_component_get_drvdata(component);
137*4882a593Smuzhiyun int ret;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun switch (event) {
140*4882a593Smuzhiyun case SND_SOC_DAPM_POST_PMU:
141*4882a593Smuzhiyun tas2770->dac_powered = 1;
142*4882a593Smuzhiyun ret = tas2770_update_pwr_ctrl(tas2770);
143*4882a593Smuzhiyun break;
144*4882a593Smuzhiyun case SND_SOC_DAPM_PRE_PMD:
145*4882a593Smuzhiyun tas2770->dac_powered = 0;
146*4882a593Smuzhiyun ret = tas2770_update_pwr_ctrl(tas2770);
147*4882a593Smuzhiyun break;
148*4882a593Smuzhiyun default:
149*4882a593Smuzhiyun dev_err(tas2770->dev, "Not supported evevt\n");
150*4882a593Smuzhiyun return -EINVAL;
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun return ret;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun static const struct snd_kcontrol_new isense_switch =
157*4882a593Smuzhiyun SOC_DAPM_SINGLE("Switch", TAS2770_PWR_CTRL, 3, 1, 1);
158*4882a593Smuzhiyun static const struct snd_kcontrol_new vsense_switch =
159*4882a593Smuzhiyun SOC_DAPM_SINGLE("Switch", TAS2770_PWR_CTRL, 2, 1, 1);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun static const struct snd_soc_dapm_widget tas2770_dapm_widgets[] = {
162*4882a593Smuzhiyun SND_SOC_DAPM_AIF_IN("ASI1", "ASI1 Playback", 0, SND_SOC_NOPM, 0, 0),
163*4882a593Smuzhiyun SND_SOC_DAPM_MUX("ASI1 Sel", SND_SOC_NOPM, 0, 0, &tas2770_asi1_mux),
164*4882a593Smuzhiyun SND_SOC_DAPM_SWITCH("ISENSE", TAS2770_PWR_CTRL, 3, 1, &isense_switch),
165*4882a593Smuzhiyun SND_SOC_DAPM_SWITCH("VSENSE", TAS2770_PWR_CTRL, 2, 1, &vsense_switch),
166*4882a593Smuzhiyun SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0, tas2770_dac_event,
167*4882a593Smuzhiyun SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
168*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("OUT"),
169*4882a593Smuzhiyun SND_SOC_DAPM_SIGGEN("VMON"),
170*4882a593Smuzhiyun SND_SOC_DAPM_SIGGEN("IMON")
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun static const struct snd_soc_dapm_route tas2770_audio_map[] = {
174*4882a593Smuzhiyun {"ASI1 Sel", "I2C offset", "ASI1"},
175*4882a593Smuzhiyun {"ASI1 Sel", "Left", "ASI1"},
176*4882a593Smuzhiyun {"ASI1 Sel", "Right", "ASI1"},
177*4882a593Smuzhiyun {"ASI1 Sel", "LeftRightDiv2", "ASI1"},
178*4882a593Smuzhiyun {"DAC", NULL, "ASI1 Sel"},
179*4882a593Smuzhiyun {"OUT", NULL, "DAC"},
180*4882a593Smuzhiyun {"ISENSE", "Switch", "IMON"},
181*4882a593Smuzhiyun {"VSENSE", "Switch", "VMON"},
182*4882a593Smuzhiyun };
183*4882a593Smuzhiyun
tas2770_mute(struct snd_soc_dai * dai,int mute,int direction)184*4882a593Smuzhiyun static int tas2770_mute(struct snd_soc_dai *dai, int mute, int direction)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
187*4882a593Smuzhiyun struct tas2770_priv *tas2770 =
188*4882a593Smuzhiyun snd_soc_component_get_drvdata(component);
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun tas2770->unmuted = !mute;
191*4882a593Smuzhiyun return tas2770_update_pwr_ctrl(tas2770);
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
tas2770_set_bitwidth(struct tas2770_priv * tas2770,int bitwidth)194*4882a593Smuzhiyun static int tas2770_set_bitwidth(struct tas2770_priv *tas2770, int bitwidth)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun int ret;
197*4882a593Smuzhiyun struct snd_soc_component *component = tas2770->component;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun switch (bitwidth) {
200*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_S16_LE:
201*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
202*4882a593Smuzhiyun TAS2770_TDM_CFG_REG2_RXW_MASK,
203*4882a593Smuzhiyun TAS2770_TDM_CFG_REG2_RXW_16BITS);
204*4882a593Smuzhiyun tas2770->v_sense_slot = tas2770->i_sense_slot + 2;
205*4882a593Smuzhiyun break;
206*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_S24_LE:
207*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
208*4882a593Smuzhiyun TAS2770_TDM_CFG_REG2_RXW_MASK,
209*4882a593Smuzhiyun TAS2770_TDM_CFG_REG2_RXW_24BITS);
210*4882a593Smuzhiyun tas2770->v_sense_slot = tas2770->i_sense_slot + 4;
211*4882a593Smuzhiyun break;
212*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_S32_LE:
213*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
214*4882a593Smuzhiyun TAS2770_TDM_CFG_REG2_RXW_MASK,
215*4882a593Smuzhiyun TAS2770_TDM_CFG_REG2_RXW_32BITS);
216*4882a593Smuzhiyun tas2770->v_sense_slot = tas2770->i_sense_slot + 4;
217*4882a593Smuzhiyun break;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun default:
220*4882a593Smuzhiyun return -EINVAL;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun if (ret < 0)
224*4882a593Smuzhiyun return ret;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG5,
227*4882a593Smuzhiyun TAS2770_TDM_CFG_REG5_VSNS_MASK |
228*4882a593Smuzhiyun TAS2770_TDM_CFG_REG5_50_MASK,
229*4882a593Smuzhiyun TAS2770_TDM_CFG_REG5_VSNS_ENABLE |
230*4882a593Smuzhiyun tas2770->v_sense_slot);
231*4882a593Smuzhiyun if (ret < 0)
232*4882a593Smuzhiyun return ret;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG6,
235*4882a593Smuzhiyun TAS2770_TDM_CFG_REG6_ISNS_MASK |
236*4882a593Smuzhiyun TAS2770_TDM_CFG_REG6_50_MASK,
237*4882a593Smuzhiyun TAS2770_TDM_CFG_REG6_ISNS_ENABLE |
238*4882a593Smuzhiyun tas2770->i_sense_slot);
239*4882a593Smuzhiyun if (ret < 0)
240*4882a593Smuzhiyun return ret;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun return 0;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
tas2770_set_samplerate(struct tas2770_priv * tas2770,int samplerate)245*4882a593Smuzhiyun static int tas2770_set_samplerate(struct tas2770_priv *tas2770, int samplerate)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun struct snd_soc_component *component = tas2770->component;
248*4882a593Smuzhiyun int ramp_rate_val;
249*4882a593Smuzhiyun int ret;
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun switch (samplerate) {
252*4882a593Smuzhiyun case 48000:
253*4882a593Smuzhiyun ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_48KHZ |
254*4882a593Smuzhiyun TAS2770_TDM_CFG_REG0_31_44_1_48KHZ;
255*4882a593Smuzhiyun break;
256*4882a593Smuzhiyun case 44100:
257*4882a593Smuzhiyun ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_44_1KHZ |
258*4882a593Smuzhiyun TAS2770_TDM_CFG_REG0_31_44_1_48KHZ;
259*4882a593Smuzhiyun break;
260*4882a593Smuzhiyun case 96000:
261*4882a593Smuzhiyun ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_48KHZ |
262*4882a593Smuzhiyun TAS2770_TDM_CFG_REG0_31_88_2_96KHZ;
263*4882a593Smuzhiyun break;
264*4882a593Smuzhiyun case 88200:
265*4882a593Smuzhiyun ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_44_1KHZ |
266*4882a593Smuzhiyun TAS2770_TDM_CFG_REG0_31_88_2_96KHZ;
267*4882a593Smuzhiyun break;
268*4882a593Smuzhiyun case 192000:
269*4882a593Smuzhiyun ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_48KHZ |
270*4882a593Smuzhiyun TAS2770_TDM_CFG_REG0_31_176_4_192KHZ;
271*4882a593Smuzhiyun break;
272*4882a593Smuzhiyun case 176400:
273*4882a593Smuzhiyun ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_44_1KHZ |
274*4882a593Smuzhiyun TAS2770_TDM_CFG_REG0_31_176_4_192KHZ;
275*4882a593Smuzhiyun break;
276*4882a593Smuzhiyun default:
277*4882a593Smuzhiyun return -EINVAL;
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
281*4882a593Smuzhiyun TAS2770_TDM_CFG_REG0_SMP_MASK |
282*4882a593Smuzhiyun TAS2770_TDM_CFG_REG0_31_MASK,
283*4882a593Smuzhiyun ramp_rate_val);
284*4882a593Smuzhiyun if (ret < 0)
285*4882a593Smuzhiyun return ret;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun return 0;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
tas2770_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)290*4882a593Smuzhiyun static int tas2770_hw_params(struct snd_pcm_substream *substream,
291*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
292*4882a593Smuzhiyun struct snd_soc_dai *dai)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
295*4882a593Smuzhiyun struct tas2770_priv *tas2770 =
296*4882a593Smuzhiyun snd_soc_component_get_drvdata(component);
297*4882a593Smuzhiyun int ret;
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun ret = tas2770_set_bitwidth(tas2770, params_format(params));
300*4882a593Smuzhiyun if (ret)
301*4882a593Smuzhiyun return ret;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun return tas2770_set_samplerate(tas2770, params_rate(params));
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
tas2770_set_fmt(struct snd_soc_dai * dai,unsigned int fmt)306*4882a593Smuzhiyun static int tas2770_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
309*4882a593Smuzhiyun struct tas2770_priv *tas2770 =
310*4882a593Smuzhiyun snd_soc_component_get_drvdata(component);
311*4882a593Smuzhiyun u8 tdm_rx_start_slot = 0, invert_fpol = 0, fpol_preinv = 0, asi_cfg_1 = 0;
312*4882a593Smuzhiyun int ret;
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
315*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBS_CFS:
316*4882a593Smuzhiyun break;
317*4882a593Smuzhiyun default:
318*4882a593Smuzhiyun dev_err(tas2770->dev, "ASI format master is not found\n");
319*4882a593Smuzhiyun return -EINVAL;
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
323*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_IF:
324*4882a593Smuzhiyun invert_fpol = 1;
325*4882a593Smuzhiyun fallthrough;
326*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_NF:
327*4882a593Smuzhiyun asi_cfg_1 |= TAS2770_TDM_CFG_REG1_RX_RSING;
328*4882a593Smuzhiyun break;
329*4882a593Smuzhiyun case SND_SOC_DAIFMT_IB_IF:
330*4882a593Smuzhiyun invert_fpol = 1;
331*4882a593Smuzhiyun fallthrough;
332*4882a593Smuzhiyun case SND_SOC_DAIFMT_IB_NF:
333*4882a593Smuzhiyun asi_cfg_1 |= TAS2770_TDM_CFG_REG1_RX_FALING;
334*4882a593Smuzhiyun break;
335*4882a593Smuzhiyun default:
336*4882a593Smuzhiyun dev_err(tas2770->dev, "ASI format Inverse is not found\n");
337*4882a593Smuzhiyun return -EINVAL;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG1,
341*4882a593Smuzhiyun TAS2770_TDM_CFG_REG1_RX_MASK,
342*4882a593Smuzhiyun asi_cfg_1);
343*4882a593Smuzhiyun if (ret < 0)
344*4882a593Smuzhiyun return ret;
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
347*4882a593Smuzhiyun case SND_SOC_DAIFMT_I2S:
348*4882a593Smuzhiyun tdm_rx_start_slot = 1;
349*4882a593Smuzhiyun fpol_preinv = 0;
350*4882a593Smuzhiyun break;
351*4882a593Smuzhiyun case SND_SOC_DAIFMT_DSP_A:
352*4882a593Smuzhiyun tdm_rx_start_slot = 0;
353*4882a593Smuzhiyun fpol_preinv = 1;
354*4882a593Smuzhiyun break;
355*4882a593Smuzhiyun case SND_SOC_DAIFMT_DSP_B:
356*4882a593Smuzhiyun tdm_rx_start_slot = 1;
357*4882a593Smuzhiyun fpol_preinv = 1;
358*4882a593Smuzhiyun break;
359*4882a593Smuzhiyun case SND_SOC_DAIFMT_LEFT_J:
360*4882a593Smuzhiyun tdm_rx_start_slot = 0;
361*4882a593Smuzhiyun fpol_preinv = 1;
362*4882a593Smuzhiyun break;
363*4882a593Smuzhiyun default:
364*4882a593Smuzhiyun dev_err(tas2770->dev,
365*4882a593Smuzhiyun "DAI Format is not found, fmt=0x%x\n", fmt);
366*4882a593Smuzhiyun return -EINVAL;
367*4882a593Smuzhiyun }
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG1,
370*4882a593Smuzhiyun TAS2770_TDM_CFG_REG1_MASK,
371*4882a593Smuzhiyun (tdm_rx_start_slot << TAS2770_TDM_CFG_REG1_51_SHIFT));
372*4882a593Smuzhiyun if (ret < 0)
373*4882a593Smuzhiyun return ret;
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
376*4882a593Smuzhiyun TAS2770_TDM_CFG_REG0_FPOL_MASK,
377*4882a593Smuzhiyun (fpol_preinv ^ invert_fpol)
378*4882a593Smuzhiyun ? TAS2770_TDM_CFG_REG0_FPOL_RSING
379*4882a593Smuzhiyun : TAS2770_TDM_CFG_REG0_FPOL_FALING);
380*4882a593Smuzhiyun if (ret < 0)
381*4882a593Smuzhiyun return ret;
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun return 0;
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun
tas2770_set_dai_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)386*4882a593Smuzhiyun static int tas2770_set_dai_tdm_slot(struct snd_soc_dai *dai,
387*4882a593Smuzhiyun unsigned int tx_mask,
388*4882a593Smuzhiyun unsigned int rx_mask,
389*4882a593Smuzhiyun int slots, int slot_width)
390*4882a593Smuzhiyun {
391*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
392*4882a593Smuzhiyun int left_slot, right_slot;
393*4882a593Smuzhiyun int ret;
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun if (tx_mask == 0 || rx_mask != 0)
396*4882a593Smuzhiyun return -EINVAL;
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun left_slot = __ffs(tx_mask);
399*4882a593Smuzhiyun tx_mask &= ~(1 << left_slot);
400*4882a593Smuzhiyun if (tx_mask == 0) {
401*4882a593Smuzhiyun right_slot = left_slot;
402*4882a593Smuzhiyun } else {
403*4882a593Smuzhiyun right_slot = __ffs(tx_mask);
404*4882a593Smuzhiyun tx_mask &= ~(1 << right_slot);
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun if (tx_mask != 0 || left_slot >= slots || right_slot >= slots)
408*4882a593Smuzhiyun return -EINVAL;
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG3,
411*4882a593Smuzhiyun TAS2770_TDM_CFG_REG3_30_MASK,
412*4882a593Smuzhiyun (left_slot << TAS2770_TDM_CFG_REG3_30_SHIFT));
413*4882a593Smuzhiyun if (ret < 0)
414*4882a593Smuzhiyun return ret;
415*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG3,
416*4882a593Smuzhiyun TAS2770_TDM_CFG_REG3_RXS_MASK,
417*4882a593Smuzhiyun (right_slot << TAS2770_TDM_CFG_REG3_RXS_SHIFT));
418*4882a593Smuzhiyun if (ret < 0)
419*4882a593Smuzhiyun return ret;
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun switch (slot_width) {
422*4882a593Smuzhiyun case 16:
423*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
424*4882a593Smuzhiyun TAS2770_TDM_CFG_REG2_RXS_MASK,
425*4882a593Smuzhiyun TAS2770_TDM_CFG_REG2_RXS_16BITS);
426*4882a593Smuzhiyun break;
427*4882a593Smuzhiyun case 24:
428*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
429*4882a593Smuzhiyun TAS2770_TDM_CFG_REG2_RXS_MASK,
430*4882a593Smuzhiyun TAS2770_TDM_CFG_REG2_RXS_24BITS);
431*4882a593Smuzhiyun break;
432*4882a593Smuzhiyun case 32:
433*4882a593Smuzhiyun ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
434*4882a593Smuzhiyun TAS2770_TDM_CFG_REG2_RXS_MASK,
435*4882a593Smuzhiyun TAS2770_TDM_CFG_REG2_RXS_32BITS);
436*4882a593Smuzhiyun break;
437*4882a593Smuzhiyun case 0:
438*4882a593Smuzhiyun /* Do not change slot width */
439*4882a593Smuzhiyun ret = 0;
440*4882a593Smuzhiyun break;
441*4882a593Smuzhiyun default:
442*4882a593Smuzhiyun ret = -EINVAL;
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun if (ret < 0)
446*4882a593Smuzhiyun return ret;
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun return 0;
449*4882a593Smuzhiyun }
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun static struct snd_soc_dai_ops tas2770_dai_ops = {
452*4882a593Smuzhiyun .mute_stream = tas2770_mute,
453*4882a593Smuzhiyun .hw_params = tas2770_hw_params,
454*4882a593Smuzhiyun .set_fmt = tas2770_set_fmt,
455*4882a593Smuzhiyun .set_tdm_slot = tas2770_set_dai_tdm_slot,
456*4882a593Smuzhiyun .no_capture_mute = 1,
457*4882a593Smuzhiyun };
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun #define TAS2770_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
460*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun #define TAS2770_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
463*4882a593Smuzhiyun SNDRV_PCM_RATE_96000 |\
464*4882a593Smuzhiyun SNDRV_PCM_RATE_192000\
465*4882a593Smuzhiyun )
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun static struct snd_soc_dai_driver tas2770_dai_driver[] = {
468*4882a593Smuzhiyun {
469*4882a593Smuzhiyun .name = "tas2770 ASI1",
470*4882a593Smuzhiyun .id = 0,
471*4882a593Smuzhiyun .playback = {
472*4882a593Smuzhiyun .stream_name = "ASI1 Playback",
473*4882a593Smuzhiyun .channels_min = 1,
474*4882a593Smuzhiyun .channels_max = 2,
475*4882a593Smuzhiyun .rates = TAS2770_RATES,
476*4882a593Smuzhiyun .formats = TAS2770_FORMATS,
477*4882a593Smuzhiyun },
478*4882a593Smuzhiyun .capture = {
479*4882a593Smuzhiyun .stream_name = "ASI1 Capture",
480*4882a593Smuzhiyun .channels_min = 0,
481*4882a593Smuzhiyun .channels_max = 2,
482*4882a593Smuzhiyun .rates = TAS2770_RATES,
483*4882a593Smuzhiyun .formats = TAS2770_FORMATS,
484*4882a593Smuzhiyun },
485*4882a593Smuzhiyun .ops = &tas2770_dai_ops,
486*4882a593Smuzhiyun .symmetric_rates = 1,
487*4882a593Smuzhiyun },
488*4882a593Smuzhiyun };
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun static const struct regmap_config tas2770_i2c_regmap;
491*4882a593Smuzhiyun
tas2770_codec_probe(struct snd_soc_component * component)492*4882a593Smuzhiyun static int tas2770_codec_probe(struct snd_soc_component *component)
493*4882a593Smuzhiyun {
494*4882a593Smuzhiyun struct tas2770_priv *tas2770 =
495*4882a593Smuzhiyun snd_soc_component_get_drvdata(component);
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun tas2770->component = component;
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun if (tas2770->sdz_gpio) {
500*4882a593Smuzhiyun gpiod_set_value_cansleep(tas2770->sdz_gpio, 1);
501*4882a593Smuzhiyun usleep_range(1000, 2000);
502*4882a593Smuzhiyun }
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun tas2770_reset(tas2770);
505*4882a593Smuzhiyun regmap_reinit_cache(tas2770->regmap, &tas2770_i2c_regmap);
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun return 0;
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun static DECLARE_TLV_DB_SCALE(tas2770_digital_tlv, 1100, 50, 0);
511*4882a593Smuzhiyun static DECLARE_TLV_DB_SCALE(tas2770_playback_volume, -12750, 50, 0);
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun static const struct snd_kcontrol_new tas2770_snd_controls[] = {
514*4882a593Smuzhiyun SOC_SINGLE_TLV("Speaker Playback Volume", TAS2770_PLAY_CFG_REG2,
515*4882a593Smuzhiyun 0, TAS2770_PLAY_CFG_REG2_VMAX, 1, tas2770_playback_volume),
516*4882a593Smuzhiyun SOC_SINGLE_TLV("Amp Gain Volume", TAS2770_PLAY_CFG_REG0, 0, 0x14, 0,
517*4882a593Smuzhiyun tas2770_digital_tlv),
518*4882a593Smuzhiyun };
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_driver_tas2770 = {
521*4882a593Smuzhiyun .probe = tas2770_codec_probe,
522*4882a593Smuzhiyun .suspend = tas2770_codec_suspend,
523*4882a593Smuzhiyun .resume = tas2770_codec_resume,
524*4882a593Smuzhiyun .controls = tas2770_snd_controls,
525*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(tas2770_snd_controls),
526*4882a593Smuzhiyun .dapm_widgets = tas2770_dapm_widgets,
527*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(tas2770_dapm_widgets),
528*4882a593Smuzhiyun .dapm_routes = tas2770_audio_map,
529*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(tas2770_audio_map),
530*4882a593Smuzhiyun .idle_bias_on = 1,
531*4882a593Smuzhiyun .endianness = 1,
532*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
533*4882a593Smuzhiyun };
534*4882a593Smuzhiyun
tas2770_register_codec(struct tas2770_priv * tas2770)535*4882a593Smuzhiyun static int tas2770_register_codec(struct tas2770_priv *tas2770)
536*4882a593Smuzhiyun {
537*4882a593Smuzhiyun return devm_snd_soc_register_component(tas2770->dev,
538*4882a593Smuzhiyun &soc_component_driver_tas2770,
539*4882a593Smuzhiyun tas2770_dai_driver, ARRAY_SIZE(tas2770_dai_driver));
540*4882a593Smuzhiyun }
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun static const struct reg_default tas2770_reg_defaults[] = {
543*4882a593Smuzhiyun { TAS2770_PAGE, 0x00 },
544*4882a593Smuzhiyun { TAS2770_SW_RST, 0x00 },
545*4882a593Smuzhiyun { TAS2770_PWR_CTRL, 0x0e },
546*4882a593Smuzhiyun { TAS2770_PLAY_CFG_REG0, 0x10 },
547*4882a593Smuzhiyun { TAS2770_PLAY_CFG_REG1, 0x01 },
548*4882a593Smuzhiyun { TAS2770_PLAY_CFG_REG2, 0x00 },
549*4882a593Smuzhiyun { TAS2770_MSC_CFG_REG0, 0x07 },
550*4882a593Smuzhiyun { TAS2770_TDM_CFG_REG1, 0x02 },
551*4882a593Smuzhiyun { TAS2770_TDM_CFG_REG2, 0x0a },
552*4882a593Smuzhiyun { TAS2770_TDM_CFG_REG3, 0x10 },
553*4882a593Smuzhiyun { TAS2770_INT_MASK_REG0, 0xfc },
554*4882a593Smuzhiyun { TAS2770_INT_MASK_REG1, 0xb1 },
555*4882a593Smuzhiyun { TAS2770_INT_CFG, 0x05 },
556*4882a593Smuzhiyun { TAS2770_MISC_IRQ, 0x81 },
557*4882a593Smuzhiyun { TAS2770_CLK_CGF, 0x0c },
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun };
560*4882a593Smuzhiyun
tas2770_volatile(struct device * dev,unsigned int reg)561*4882a593Smuzhiyun static bool tas2770_volatile(struct device *dev, unsigned int reg)
562*4882a593Smuzhiyun {
563*4882a593Smuzhiyun switch (reg) {
564*4882a593Smuzhiyun case TAS2770_PAGE: /* regmap implementation requires this */
565*4882a593Smuzhiyun case TAS2770_SW_RST: /* always clears after write */
566*4882a593Smuzhiyun case TAS2770_BO_PRV_REG0:/* has a self clearing bit */
567*4882a593Smuzhiyun case TAS2770_LVE_INT_REG0:
568*4882a593Smuzhiyun case TAS2770_LVE_INT_REG1:
569*4882a593Smuzhiyun case TAS2770_LAT_INT_REG0:/* Sticky interrupt flags */
570*4882a593Smuzhiyun case TAS2770_LAT_INT_REG1:/* Sticky interrupt flags */
571*4882a593Smuzhiyun case TAS2770_VBAT_MSB:
572*4882a593Smuzhiyun case TAS2770_VBAT_LSB:
573*4882a593Smuzhiyun case TAS2770_TEMP_MSB:
574*4882a593Smuzhiyun case TAS2770_TEMP_LSB:
575*4882a593Smuzhiyun return true;
576*4882a593Smuzhiyun }
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun return false;
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun
tas2770_writeable(struct device * dev,unsigned int reg)581*4882a593Smuzhiyun static bool tas2770_writeable(struct device *dev, unsigned int reg)
582*4882a593Smuzhiyun {
583*4882a593Smuzhiyun switch (reg) {
584*4882a593Smuzhiyun case TAS2770_LVE_INT_REG0:
585*4882a593Smuzhiyun case TAS2770_LVE_INT_REG1:
586*4882a593Smuzhiyun case TAS2770_LAT_INT_REG0:
587*4882a593Smuzhiyun case TAS2770_LAT_INT_REG1:
588*4882a593Smuzhiyun case TAS2770_VBAT_MSB:
589*4882a593Smuzhiyun case TAS2770_VBAT_LSB:
590*4882a593Smuzhiyun case TAS2770_TEMP_MSB:
591*4882a593Smuzhiyun case TAS2770_TEMP_LSB:
592*4882a593Smuzhiyun case TAS2770_TDM_CLK_DETC:
593*4882a593Smuzhiyun case TAS2770_REV_AND_GPID:
594*4882a593Smuzhiyun return false;
595*4882a593Smuzhiyun }
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun return true;
598*4882a593Smuzhiyun }
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun static const struct regmap_range_cfg tas2770_regmap_ranges[] = {
601*4882a593Smuzhiyun {
602*4882a593Smuzhiyun .range_min = 0,
603*4882a593Smuzhiyun .range_max = 1 * 128,
604*4882a593Smuzhiyun .selector_reg = TAS2770_PAGE,
605*4882a593Smuzhiyun .selector_mask = 0xff,
606*4882a593Smuzhiyun .selector_shift = 0,
607*4882a593Smuzhiyun .window_start = 0,
608*4882a593Smuzhiyun .window_len = 128,
609*4882a593Smuzhiyun },
610*4882a593Smuzhiyun };
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun static const struct regmap_config tas2770_i2c_regmap = {
613*4882a593Smuzhiyun .reg_bits = 8,
614*4882a593Smuzhiyun .val_bits = 8,
615*4882a593Smuzhiyun .writeable_reg = tas2770_writeable,
616*4882a593Smuzhiyun .volatile_reg = tas2770_volatile,
617*4882a593Smuzhiyun .reg_defaults = tas2770_reg_defaults,
618*4882a593Smuzhiyun .num_reg_defaults = ARRAY_SIZE(tas2770_reg_defaults),
619*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
620*4882a593Smuzhiyun .ranges = tas2770_regmap_ranges,
621*4882a593Smuzhiyun .num_ranges = ARRAY_SIZE(tas2770_regmap_ranges),
622*4882a593Smuzhiyun .max_register = 1 * 128,
623*4882a593Smuzhiyun };
624*4882a593Smuzhiyun
tas2770_parse_dt(struct device * dev,struct tas2770_priv * tas2770)625*4882a593Smuzhiyun static int tas2770_parse_dt(struct device *dev, struct tas2770_priv *tas2770)
626*4882a593Smuzhiyun {
627*4882a593Smuzhiyun int rc = 0;
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun rc = fwnode_property_read_u32(dev->fwnode, "ti,imon-slot-no",
630*4882a593Smuzhiyun &tas2770->i_sense_slot);
631*4882a593Smuzhiyun if (rc) {
632*4882a593Smuzhiyun dev_info(tas2770->dev, "Property %s is missing setting default slot\n",
633*4882a593Smuzhiyun "ti,imon-slot-no");
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun tas2770->i_sense_slot = 0;
636*4882a593Smuzhiyun }
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun rc = fwnode_property_read_u32(dev->fwnode, "ti,vmon-slot-no",
639*4882a593Smuzhiyun &tas2770->v_sense_slot);
640*4882a593Smuzhiyun if (rc) {
641*4882a593Smuzhiyun dev_info(tas2770->dev, "Property %s is missing setting default slot\n",
642*4882a593Smuzhiyun "ti,vmon-slot-no");
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun tas2770->v_sense_slot = 2;
645*4882a593Smuzhiyun }
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun tas2770->sdz_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH);
648*4882a593Smuzhiyun if (IS_ERR(tas2770->sdz_gpio)) {
649*4882a593Smuzhiyun if (PTR_ERR(tas2770->sdz_gpio) == -EPROBE_DEFER)
650*4882a593Smuzhiyun return -EPROBE_DEFER;
651*4882a593Smuzhiyun
652*4882a593Smuzhiyun tas2770->sdz_gpio = NULL;
653*4882a593Smuzhiyun }
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun return 0;
656*4882a593Smuzhiyun }
657*4882a593Smuzhiyun
tas2770_i2c_probe(struct i2c_client * client,const struct i2c_device_id * id)658*4882a593Smuzhiyun static int tas2770_i2c_probe(struct i2c_client *client,
659*4882a593Smuzhiyun const struct i2c_device_id *id)
660*4882a593Smuzhiyun {
661*4882a593Smuzhiyun struct tas2770_priv *tas2770;
662*4882a593Smuzhiyun int result;
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun tas2770 = devm_kzalloc(&client->dev, sizeof(struct tas2770_priv),
665*4882a593Smuzhiyun GFP_KERNEL);
666*4882a593Smuzhiyun if (!tas2770)
667*4882a593Smuzhiyun return -ENOMEM;
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun tas2770->dev = &client->dev;
670*4882a593Smuzhiyun i2c_set_clientdata(client, tas2770);
671*4882a593Smuzhiyun dev_set_drvdata(&client->dev, tas2770);
672*4882a593Smuzhiyun
673*4882a593Smuzhiyun tas2770->regmap = devm_regmap_init_i2c(client, &tas2770_i2c_regmap);
674*4882a593Smuzhiyun if (IS_ERR(tas2770->regmap)) {
675*4882a593Smuzhiyun result = PTR_ERR(tas2770->regmap);
676*4882a593Smuzhiyun dev_err(&client->dev, "Failed to allocate register map: %d\n",
677*4882a593Smuzhiyun result);
678*4882a593Smuzhiyun return result;
679*4882a593Smuzhiyun }
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun if (client->dev.of_node) {
682*4882a593Smuzhiyun result = tas2770_parse_dt(&client->dev, tas2770);
683*4882a593Smuzhiyun if (result) {
684*4882a593Smuzhiyun dev_err(tas2770->dev, "%s: Failed to parse devicetree\n",
685*4882a593Smuzhiyun __func__);
686*4882a593Smuzhiyun return result;
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun }
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun tas2770->reset_gpio = devm_gpiod_get_optional(tas2770->dev, "reset",
691*4882a593Smuzhiyun GPIOD_OUT_HIGH);
692*4882a593Smuzhiyun if (IS_ERR(tas2770->reset_gpio)) {
693*4882a593Smuzhiyun if (PTR_ERR(tas2770->reset_gpio) == -EPROBE_DEFER) {
694*4882a593Smuzhiyun tas2770->reset_gpio = NULL;
695*4882a593Smuzhiyun return -EPROBE_DEFER;
696*4882a593Smuzhiyun }
697*4882a593Smuzhiyun }
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun result = tas2770_register_codec(tas2770);
700*4882a593Smuzhiyun if (result)
701*4882a593Smuzhiyun dev_err(tas2770->dev, "Register codec failed.\n");
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun return result;
704*4882a593Smuzhiyun }
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun static const struct i2c_device_id tas2770_i2c_id[] = {
707*4882a593Smuzhiyun { "tas2770", 0},
708*4882a593Smuzhiyun { }
709*4882a593Smuzhiyun };
710*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, tas2770_i2c_id);
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun #if defined(CONFIG_OF)
713*4882a593Smuzhiyun static const struct of_device_id tas2770_of_match[] = {
714*4882a593Smuzhiyun { .compatible = "ti,tas2770" },
715*4882a593Smuzhiyun {},
716*4882a593Smuzhiyun };
717*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, tas2770_of_match);
718*4882a593Smuzhiyun #endif
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun static struct i2c_driver tas2770_i2c_driver = {
721*4882a593Smuzhiyun .driver = {
722*4882a593Smuzhiyun .name = "tas2770",
723*4882a593Smuzhiyun .of_match_table = of_match_ptr(tas2770_of_match),
724*4882a593Smuzhiyun },
725*4882a593Smuzhiyun .probe = tas2770_i2c_probe,
726*4882a593Smuzhiyun .id_table = tas2770_i2c_id,
727*4882a593Smuzhiyun };
728*4882a593Smuzhiyun module_i2c_driver(tas2770_i2c_driver);
729*4882a593Smuzhiyun
730*4882a593Smuzhiyun MODULE_AUTHOR("Shi Fu <shifu0704@thundersoft.com>");
731*4882a593Smuzhiyun MODULE_DESCRIPTION("TAS2770 I2C Smart Amplifier driver");
732*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
733