xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/tas2764.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Driver for the Texas Instruments TAS2764 CODEC
4*4882a593Smuzhiyun // Copyright (C) 2020 Texas Instruments Inc.
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include <linux/module.h>
7*4882a593Smuzhiyun #include <linux/moduleparam.h>
8*4882a593Smuzhiyun #include <linux/err.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/delay.h>
11*4882a593Smuzhiyun #include <linux/pm.h>
12*4882a593Smuzhiyun #include <linux/i2c.h>
13*4882a593Smuzhiyun #include <linux/gpio.h>
14*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
15*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
16*4882a593Smuzhiyun #include <linux/regmap.h>
17*4882a593Smuzhiyun #include <linux/of.h>
18*4882a593Smuzhiyun #include <linux/of_gpio.h>
19*4882a593Smuzhiyun #include <linux/slab.h>
20*4882a593Smuzhiyun #include <sound/soc.h>
21*4882a593Smuzhiyun #include <sound/pcm.h>
22*4882a593Smuzhiyun #include <sound/pcm_params.h>
23*4882a593Smuzhiyun #include <sound/initval.h>
24*4882a593Smuzhiyun #include <sound/tlv.h>
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #include "tas2764.h"
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun struct tas2764_priv {
29*4882a593Smuzhiyun 	struct snd_soc_component *component;
30*4882a593Smuzhiyun 	struct gpio_desc *reset_gpio;
31*4882a593Smuzhiyun 	struct gpio_desc *sdz_gpio;
32*4882a593Smuzhiyun 	struct regmap *regmap;
33*4882a593Smuzhiyun 	struct device *dev;
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	int v_sense_slot;
36*4882a593Smuzhiyun 	int i_sense_slot;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	bool dac_powered;
39*4882a593Smuzhiyun 	bool unmuted;
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun 
tas2764_reset(struct tas2764_priv * tas2764)42*4882a593Smuzhiyun static void tas2764_reset(struct tas2764_priv *tas2764)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun 	if (tas2764->reset_gpio) {
45*4882a593Smuzhiyun 		gpiod_set_value_cansleep(tas2764->reset_gpio, 0);
46*4882a593Smuzhiyun 		msleep(20);
47*4882a593Smuzhiyun 		gpiod_set_value_cansleep(tas2764->reset_gpio, 1);
48*4882a593Smuzhiyun 		usleep_range(1000, 2000);
49*4882a593Smuzhiyun 	}
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	snd_soc_component_write(tas2764->component, TAS2764_SW_RST,
52*4882a593Smuzhiyun 				TAS2764_RST);
53*4882a593Smuzhiyun 	usleep_range(1000, 2000);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun 
tas2764_update_pwr_ctrl(struct tas2764_priv * tas2764)56*4882a593Smuzhiyun static int tas2764_update_pwr_ctrl(struct tas2764_priv *tas2764)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun 	struct snd_soc_component *component = tas2764->component;
59*4882a593Smuzhiyun 	unsigned int val;
60*4882a593Smuzhiyun 	int ret;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	if (tas2764->dac_powered)
63*4882a593Smuzhiyun 		val = tas2764->unmuted ?
64*4882a593Smuzhiyun 			TAS2764_PWR_CTRL_ACTIVE : TAS2764_PWR_CTRL_MUTE;
65*4882a593Smuzhiyun 	else
66*4882a593Smuzhiyun 		val = TAS2764_PWR_CTRL_SHUTDOWN;
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
69*4882a593Smuzhiyun 					    TAS2764_PWR_CTRL_MASK, val);
70*4882a593Smuzhiyun 	if (ret < 0)
71*4882a593Smuzhiyun 		return ret;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	return 0;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun #ifdef CONFIG_PM
tas2764_codec_suspend(struct snd_soc_component * component)77*4882a593Smuzhiyun static int tas2764_codec_suspend(struct snd_soc_component *component)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun 	struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
80*4882a593Smuzhiyun 	int ret;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
83*4882a593Smuzhiyun 					    TAS2764_PWR_CTRL_MASK,
84*4882a593Smuzhiyun 					    TAS2764_PWR_CTRL_SHUTDOWN);
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	if (ret < 0)
87*4882a593Smuzhiyun 		return ret;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	if (tas2764->sdz_gpio)
90*4882a593Smuzhiyun 		gpiod_set_value_cansleep(tas2764->sdz_gpio, 0);
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	regcache_cache_only(tas2764->regmap, true);
93*4882a593Smuzhiyun 	regcache_mark_dirty(tas2764->regmap);
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	return 0;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun 
tas2764_codec_resume(struct snd_soc_component * component)98*4882a593Smuzhiyun static int tas2764_codec_resume(struct snd_soc_component *component)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun 	struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
101*4882a593Smuzhiyun 	int ret;
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	if (tas2764->sdz_gpio) {
104*4882a593Smuzhiyun 		gpiod_set_value_cansleep(tas2764->sdz_gpio, 1);
105*4882a593Smuzhiyun 		usleep_range(1000, 2000);
106*4882a593Smuzhiyun 	}
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	ret = tas2764_update_pwr_ctrl(tas2764);
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	if (ret < 0)
111*4882a593Smuzhiyun 		return ret;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	regcache_cache_only(tas2764->regmap, false);
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	return regcache_sync(tas2764->regmap);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun #else
118*4882a593Smuzhiyun #define tas2764_codec_suspend NULL
119*4882a593Smuzhiyun #define tas2764_codec_resume NULL
120*4882a593Smuzhiyun #endif
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun static const char * const tas2764_ASI1_src[] = {
123*4882a593Smuzhiyun 	"I2C offset", "Left", "Right", "LeftRightDiv2",
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(
127*4882a593Smuzhiyun 	tas2764_ASI1_src_enum, TAS2764_TDM_CFG2, TAS2764_TDM_CFG2_SCFG_SHIFT,
128*4882a593Smuzhiyun 	tas2764_ASI1_src);
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun static const struct snd_kcontrol_new tas2764_asi1_mux =
131*4882a593Smuzhiyun 	SOC_DAPM_ENUM("ASI1 Source", tas2764_ASI1_src_enum);
132*4882a593Smuzhiyun 
tas2764_dac_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)133*4882a593Smuzhiyun static int tas2764_dac_event(struct snd_soc_dapm_widget *w,
134*4882a593Smuzhiyun 			     struct snd_kcontrol *kcontrol, int event)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun 	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
137*4882a593Smuzhiyun 	struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
138*4882a593Smuzhiyun 	int ret;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	switch (event) {
141*4882a593Smuzhiyun 	case SND_SOC_DAPM_POST_PMU:
142*4882a593Smuzhiyun 		tas2764->dac_powered = true;
143*4882a593Smuzhiyun 		ret = tas2764_update_pwr_ctrl(tas2764);
144*4882a593Smuzhiyun 		break;
145*4882a593Smuzhiyun 	case SND_SOC_DAPM_PRE_PMD:
146*4882a593Smuzhiyun 		tas2764->dac_powered = false;
147*4882a593Smuzhiyun 		ret = tas2764_update_pwr_ctrl(tas2764);
148*4882a593Smuzhiyun 		break;
149*4882a593Smuzhiyun 	default:
150*4882a593Smuzhiyun 		dev_err(tas2764->dev, "Unsupported event\n");
151*4882a593Smuzhiyun 		return -EINVAL;
152*4882a593Smuzhiyun 	}
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	if (ret < 0)
155*4882a593Smuzhiyun 		return ret;
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	return 0;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun static const struct snd_kcontrol_new isense_switch =
161*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Switch", TAS2764_PWR_CTRL, TAS2764_ISENSE_POWER_EN, 1, 1);
162*4882a593Smuzhiyun static const struct snd_kcontrol_new vsense_switch =
163*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Switch", TAS2764_PWR_CTRL, TAS2764_VSENSE_POWER_EN, 1, 1);
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun static const struct snd_soc_dapm_widget tas2764_dapm_widgets[] = {
166*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("ASI1", "ASI1 Playback", 0, SND_SOC_NOPM, 0, 0),
167*4882a593Smuzhiyun 	SND_SOC_DAPM_MUX("ASI1 Sel", SND_SOC_NOPM, 0, 0, &tas2764_asi1_mux),
168*4882a593Smuzhiyun 	SND_SOC_DAPM_SWITCH("ISENSE", TAS2764_PWR_CTRL, TAS2764_ISENSE_POWER_EN,
169*4882a593Smuzhiyun 			    1, &isense_switch),
170*4882a593Smuzhiyun 	SND_SOC_DAPM_SWITCH("VSENSE", TAS2764_PWR_CTRL, TAS2764_VSENSE_POWER_EN,
171*4882a593Smuzhiyun 			    1, &vsense_switch),
172*4882a593Smuzhiyun 	SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0, tas2764_dac_event,
173*4882a593Smuzhiyun 			   SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
174*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("OUT"),
175*4882a593Smuzhiyun 	SND_SOC_DAPM_SIGGEN("VMON"),
176*4882a593Smuzhiyun 	SND_SOC_DAPM_SIGGEN("IMON")
177*4882a593Smuzhiyun };
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun static const struct snd_soc_dapm_route tas2764_audio_map[] = {
180*4882a593Smuzhiyun 	{"ASI1 Sel", "I2C offset", "ASI1"},
181*4882a593Smuzhiyun 	{"ASI1 Sel", "Left", "ASI1"},
182*4882a593Smuzhiyun 	{"ASI1 Sel", "Right", "ASI1"},
183*4882a593Smuzhiyun 	{"ASI1 Sel", "LeftRightDiv2", "ASI1"},
184*4882a593Smuzhiyun 	{"DAC", NULL, "ASI1 Sel"},
185*4882a593Smuzhiyun 	{"OUT", NULL, "DAC"},
186*4882a593Smuzhiyun 	{"ISENSE", "Switch", "IMON"},
187*4882a593Smuzhiyun 	{"VSENSE", "Switch", "VMON"},
188*4882a593Smuzhiyun };
189*4882a593Smuzhiyun 
tas2764_mute(struct snd_soc_dai * dai,int mute,int direction)190*4882a593Smuzhiyun static int tas2764_mute(struct snd_soc_dai *dai, int mute, int direction)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun 	struct tas2764_priv *tas2764 =
193*4882a593Smuzhiyun 			snd_soc_component_get_drvdata(dai->component);
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	tas2764->unmuted = !mute;
196*4882a593Smuzhiyun 	return tas2764_update_pwr_ctrl(tas2764);
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun 
tas2764_set_bitwidth(struct tas2764_priv * tas2764,int bitwidth)199*4882a593Smuzhiyun static int tas2764_set_bitwidth(struct tas2764_priv *tas2764, int bitwidth)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun 	struct snd_soc_component *component = tas2764->component;
202*4882a593Smuzhiyun 	int sense_en;
203*4882a593Smuzhiyun 	int val;
204*4882a593Smuzhiyun 	int ret;
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	switch (bitwidth) {
207*4882a593Smuzhiyun 	case SNDRV_PCM_FORMAT_S16_LE:
208*4882a593Smuzhiyun 		ret = snd_soc_component_update_bits(component,
209*4882a593Smuzhiyun 						    TAS2764_TDM_CFG2,
210*4882a593Smuzhiyun 						    TAS2764_TDM_CFG2_RXW_MASK,
211*4882a593Smuzhiyun 						    TAS2764_TDM_CFG2_RXW_16BITS);
212*4882a593Smuzhiyun 		break;
213*4882a593Smuzhiyun 	case SNDRV_PCM_FORMAT_S24_LE:
214*4882a593Smuzhiyun 		ret = snd_soc_component_update_bits(component,
215*4882a593Smuzhiyun 						    TAS2764_TDM_CFG2,
216*4882a593Smuzhiyun 						    TAS2764_TDM_CFG2_RXW_MASK,
217*4882a593Smuzhiyun 						    TAS2764_TDM_CFG2_RXW_24BITS);
218*4882a593Smuzhiyun 		break;
219*4882a593Smuzhiyun 	case SNDRV_PCM_FORMAT_S32_LE:
220*4882a593Smuzhiyun 		ret = snd_soc_component_update_bits(component,
221*4882a593Smuzhiyun 						    TAS2764_TDM_CFG2,
222*4882a593Smuzhiyun 						    TAS2764_TDM_CFG2_RXW_MASK,
223*4882a593Smuzhiyun 						    TAS2764_TDM_CFG2_RXW_32BITS);
224*4882a593Smuzhiyun 		break;
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	default:
227*4882a593Smuzhiyun 		return -EINVAL;
228*4882a593Smuzhiyun 	}
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	if (ret < 0)
231*4882a593Smuzhiyun 		return ret;
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 	val = snd_soc_component_read(tas2764->component, TAS2764_PWR_CTRL);
234*4882a593Smuzhiyun 	if (val < 0)
235*4882a593Smuzhiyun 		return val;
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	if (val & (1 << TAS2764_VSENSE_POWER_EN))
238*4882a593Smuzhiyun 		sense_en = 0;
239*4882a593Smuzhiyun 	else
240*4882a593Smuzhiyun 		sense_en = TAS2764_TDM_CFG5_VSNS_ENABLE;
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG5,
243*4882a593Smuzhiyun 					    TAS2764_TDM_CFG5_VSNS_ENABLE,
244*4882a593Smuzhiyun 					    sense_en);
245*4882a593Smuzhiyun 	if (ret < 0)
246*4882a593Smuzhiyun 		return ret;
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	if (val & (1 << TAS2764_ISENSE_POWER_EN))
249*4882a593Smuzhiyun 		sense_en = 0;
250*4882a593Smuzhiyun 	else
251*4882a593Smuzhiyun 		sense_en = TAS2764_TDM_CFG6_ISNS_ENABLE;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG6,
254*4882a593Smuzhiyun 					    TAS2764_TDM_CFG6_ISNS_ENABLE,
255*4882a593Smuzhiyun 					    sense_en);
256*4882a593Smuzhiyun 	if (ret < 0)
257*4882a593Smuzhiyun 		return ret;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	return 0;
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun 
tas2764_set_samplerate(struct tas2764_priv * tas2764,int samplerate)262*4882a593Smuzhiyun static int tas2764_set_samplerate(struct tas2764_priv *tas2764, int samplerate)
263*4882a593Smuzhiyun {
264*4882a593Smuzhiyun 	struct snd_soc_component *component = tas2764->component;
265*4882a593Smuzhiyun 	int ramp_rate_val;
266*4882a593Smuzhiyun 	int ret;
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun 	switch (samplerate) {
269*4882a593Smuzhiyun 	case 48000:
270*4882a593Smuzhiyun 		ramp_rate_val = TAS2764_TDM_CFG0_SMP_48KHZ |
271*4882a593Smuzhiyun 				TAS2764_TDM_CFG0_44_1_48KHZ;
272*4882a593Smuzhiyun 		break;
273*4882a593Smuzhiyun 	case 44100:
274*4882a593Smuzhiyun 		ramp_rate_val = TAS2764_TDM_CFG0_SMP_44_1KHZ |
275*4882a593Smuzhiyun 				TAS2764_TDM_CFG0_44_1_48KHZ;
276*4882a593Smuzhiyun 		break;
277*4882a593Smuzhiyun 	case 96000:
278*4882a593Smuzhiyun 		ramp_rate_val = TAS2764_TDM_CFG0_SMP_48KHZ |
279*4882a593Smuzhiyun 				TAS2764_TDM_CFG0_88_2_96KHZ;
280*4882a593Smuzhiyun 		break;
281*4882a593Smuzhiyun 	case 88200:
282*4882a593Smuzhiyun 		ramp_rate_val = TAS2764_TDM_CFG0_SMP_44_1KHZ |
283*4882a593Smuzhiyun 				TAS2764_TDM_CFG0_88_2_96KHZ;
284*4882a593Smuzhiyun 		break;
285*4882a593Smuzhiyun 	default:
286*4882a593Smuzhiyun 		return -EINVAL;
287*4882a593Smuzhiyun 	}
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG0,
290*4882a593Smuzhiyun 					    TAS2764_TDM_CFG0_SMP_MASK |
291*4882a593Smuzhiyun 					    TAS2764_TDM_CFG0_MASK,
292*4882a593Smuzhiyun 					    ramp_rate_val);
293*4882a593Smuzhiyun 	if (ret < 0)
294*4882a593Smuzhiyun 		return ret;
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	return 0;
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun 
tas2764_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)299*4882a593Smuzhiyun static int tas2764_hw_params(struct snd_pcm_substream *substream,
300*4882a593Smuzhiyun 			     struct snd_pcm_hw_params *params,
301*4882a593Smuzhiyun 			     struct snd_soc_dai *dai)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
304*4882a593Smuzhiyun 	struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
305*4882a593Smuzhiyun 	int ret;
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	ret = tas2764_set_bitwidth(tas2764, params_format(params));
308*4882a593Smuzhiyun 	if (ret < 0)
309*4882a593Smuzhiyun 		return ret;
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	return tas2764_set_samplerate(tas2764, params_rate(params));
312*4882a593Smuzhiyun }
313*4882a593Smuzhiyun 
tas2764_set_fmt(struct snd_soc_dai * dai,unsigned int fmt)314*4882a593Smuzhiyun static int tas2764_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
315*4882a593Smuzhiyun {
316*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
317*4882a593Smuzhiyun 	struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
318*4882a593Smuzhiyun 	u8 tdm_rx_start_slot = 0, asi_cfg_0 = 0, asi_cfg_1 = 0;
319*4882a593Smuzhiyun 	int ret;
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
322*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_IF:
323*4882a593Smuzhiyun 		asi_cfg_0 ^= TAS2764_TDM_CFG0_FRAME_START;
324*4882a593Smuzhiyun 		fallthrough;
325*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_NF:
326*4882a593Smuzhiyun 		asi_cfg_1 = TAS2764_TDM_CFG1_RX_RISING;
327*4882a593Smuzhiyun 		break;
328*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_IB_IF:
329*4882a593Smuzhiyun 		asi_cfg_0 ^= TAS2764_TDM_CFG0_FRAME_START;
330*4882a593Smuzhiyun 		fallthrough;
331*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_IB_NF:
332*4882a593Smuzhiyun 		asi_cfg_1 = TAS2764_TDM_CFG1_RX_FALLING;
333*4882a593Smuzhiyun 		break;
334*4882a593Smuzhiyun 	}
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG1,
337*4882a593Smuzhiyun 					    TAS2764_TDM_CFG1_RX_MASK,
338*4882a593Smuzhiyun 					    asi_cfg_1);
339*4882a593Smuzhiyun 	if (ret < 0)
340*4882a593Smuzhiyun 		return ret;
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
343*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_I2S:
344*4882a593Smuzhiyun 		asi_cfg_0 ^= TAS2764_TDM_CFG0_FRAME_START;
345*4882a593Smuzhiyun 		fallthrough;
346*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_DSP_A:
347*4882a593Smuzhiyun 		tdm_rx_start_slot = 1;
348*4882a593Smuzhiyun 		break;
349*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_DSP_B:
350*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_LEFT_J:
351*4882a593Smuzhiyun 		tdm_rx_start_slot = 0;
352*4882a593Smuzhiyun 		break;
353*4882a593Smuzhiyun 	default:
354*4882a593Smuzhiyun 		dev_err(tas2764->dev,
355*4882a593Smuzhiyun 			"DAI Format is not found, fmt=0x%x\n", fmt);
356*4882a593Smuzhiyun 		return -EINVAL;
357*4882a593Smuzhiyun 	}
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun 	ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG0,
360*4882a593Smuzhiyun 					    TAS2764_TDM_CFG0_FRAME_START,
361*4882a593Smuzhiyun 					    asi_cfg_0);
362*4882a593Smuzhiyun 	if (ret < 0)
363*4882a593Smuzhiyun 		return ret;
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 	ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG1,
366*4882a593Smuzhiyun 					    TAS2764_TDM_CFG1_MASK,
367*4882a593Smuzhiyun 					    (tdm_rx_start_slot << TAS2764_TDM_CFG1_51_SHIFT));
368*4882a593Smuzhiyun 	if (ret < 0)
369*4882a593Smuzhiyun 		return ret;
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 	return 0;
372*4882a593Smuzhiyun }
373*4882a593Smuzhiyun 
tas2764_set_dai_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)374*4882a593Smuzhiyun static int tas2764_set_dai_tdm_slot(struct snd_soc_dai *dai,
375*4882a593Smuzhiyun 				unsigned int tx_mask,
376*4882a593Smuzhiyun 				unsigned int rx_mask,
377*4882a593Smuzhiyun 				int slots, int slot_width)
378*4882a593Smuzhiyun {
379*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
380*4882a593Smuzhiyun 	struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
381*4882a593Smuzhiyun 	int left_slot, right_slot;
382*4882a593Smuzhiyun 	int slots_cfg;
383*4882a593Smuzhiyun 	int slot_size;
384*4882a593Smuzhiyun 	int ret;
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	if (tx_mask == 0 || rx_mask != 0)
387*4882a593Smuzhiyun 		return -EINVAL;
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 	left_slot = __ffs(tx_mask);
390*4882a593Smuzhiyun 	tx_mask &= ~(1 << left_slot);
391*4882a593Smuzhiyun 	if (tx_mask == 0) {
392*4882a593Smuzhiyun 		right_slot = left_slot;
393*4882a593Smuzhiyun 	} else {
394*4882a593Smuzhiyun 		right_slot = __ffs(tx_mask);
395*4882a593Smuzhiyun 		tx_mask &= ~(1 << right_slot);
396*4882a593Smuzhiyun 	}
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 	if (tx_mask != 0 || left_slot >= slots || right_slot >= slots)
399*4882a593Smuzhiyun 		return -EINVAL;
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 	slots_cfg = (right_slot << TAS2764_TDM_CFG3_RXS_SHIFT) | left_slot;
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	ret = snd_soc_component_write(component, TAS2764_TDM_CFG3, slots_cfg);
404*4882a593Smuzhiyun 	if (ret)
405*4882a593Smuzhiyun 		return ret;
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun 	switch (slot_width) {
408*4882a593Smuzhiyun 	case 16:
409*4882a593Smuzhiyun 		slot_size = TAS2764_TDM_CFG2_RXS_16BITS;
410*4882a593Smuzhiyun 		break;
411*4882a593Smuzhiyun 	case 24:
412*4882a593Smuzhiyun 		slot_size = TAS2764_TDM_CFG2_RXS_24BITS;
413*4882a593Smuzhiyun 		break;
414*4882a593Smuzhiyun 	case 32:
415*4882a593Smuzhiyun 		slot_size = TAS2764_TDM_CFG2_RXS_32BITS;
416*4882a593Smuzhiyun 		break;
417*4882a593Smuzhiyun 	default:
418*4882a593Smuzhiyun 		return -EINVAL;
419*4882a593Smuzhiyun 	}
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun 	ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG2,
422*4882a593Smuzhiyun 					    TAS2764_TDM_CFG2_RXS_MASK,
423*4882a593Smuzhiyun 					    slot_size);
424*4882a593Smuzhiyun 	if (ret < 0)
425*4882a593Smuzhiyun 		return ret;
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG5,
428*4882a593Smuzhiyun 					    TAS2764_TDM_CFG5_50_MASK,
429*4882a593Smuzhiyun 					    tas2764->v_sense_slot);
430*4882a593Smuzhiyun 	if (ret < 0)
431*4882a593Smuzhiyun 		return ret;
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun 	ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG6,
434*4882a593Smuzhiyun 					    TAS2764_TDM_CFG6_50_MASK,
435*4882a593Smuzhiyun 					    tas2764->i_sense_slot);
436*4882a593Smuzhiyun 	if (ret < 0)
437*4882a593Smuzhiyun 		return ret;
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun 	return 0;
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun static struct snd_soc_dai_ops tas2764_dai_ops = {
443*4882a593Smuzhiyun 	.mute_stream = tas2764_mute,
444*4882a593Smuzhiyun 	.hw_params  = tas2764_hw_params,
445*4882a593Smuzhiyun 	.set_fmt    = tas2764_set_fmt,
446*4882a593Smuzhiyun 	.set_tdm_slot = tas2764_set_dai_tdm_slot,
447*4882a593Smuzhiyun 	.no_capture_mute = 1,
448*4882a593Smuzhiyun };
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun #define TAS2764_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
451*4882a593Smuzhiyun 			 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun #define TAS2764_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
454*4882a593Smuzhiyun 		       SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_88200)
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun static struct snd_soc_dai_driver tas2764_dai_driver[] = {
457*4882a593Smuzhiyun 	{
458*4882a593Smuzhiyun 		.name = "tas2764 ASI1",
459*4882a593Smuzhiyun 		.id = 0,
460*4882a593Smuzhiyun 		.playback = {
461*4882a593Smuzhiyun 			.stream_name    = "ASI1 Playback",
462*4882a593Smuzhiyun 			.channels_min   = 1,
463*4882a593Smuzhiyun 			.channels_max   = 2,
464*4882a593Smuzhiyun 			.rates      = TAS2764_RATES,
465*4882a593Smuzhiyun 			.formats    = TAS2764_FORMATS,
466*4882a593Smuzhiyun 		},
467*4882a593Smuzhiyun 		.capture = {
468*4882a593Smuzhiyun 			.stream_name    = "ASI1 Capture",
469*4882a593Smuzhiyun 			.channels_min   = 0,
470*4882a593Smuzhiyun 			.channels_max   = 2,
471*4882a593Smuzhiyun 			.rates = TAS2764_RATES,
472*4882a593Smuzhiyun 			.formats = TAS2764_FORMATS,
473*4882a593Smuzhiyun 		},
474*4882a593Smuzhiyun 		.ops = &tas2764_dai_ops,
475*4882a593Smuzhiyun 		.symmetric_rates = 1,
476*4882a593Smuzhiyun 	},
477*4882a593Smuzhiyun };
478*4882a593Smuzhiyun 
tas2764_codec_probe(struct snd_soc_component * component)479*4882a593Smuzhiyun static int tas2764_codec_probe(struct snd_soc_component *component)
480*4882a593Smuzhiyun {
481*4882a593Smuzhiyun 	struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
482*4882a593Smuzhiyun 	int ret;
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	tas2764->component = component;
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	if (tas2764->sdz_gpio) {
487*4882a593Smuzhiyun 		gpiod_set_value_cansleep(tas2764->sdz_gpio, 1);
488*4882a593Smuzhiyun 		usleep_range(1000, 2000);
489*4882a593Smuzhiyun 	}
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	tas2764_reset(tas2764);
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 	ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG5,
494*4882a593Smuzhiyun 					    TAS2764_TDM_CFG5_VSNS_ENABLE, 0);
495*4882a593Smuzhiyun 	if (ret < 0)
496*4882a593Smuzhiyun 		return ret;
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun 	ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG6,
499*4882a593Smuzhiyun 					    TAS2764_TDM_CFG6_ISNS_ENABLE, 0);
500*4882a593Smuzhiyun 	if (ret < 0)
501*4882a593Smuzhiyun 		return ret;
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun 	return 0;
504*4882a593Smuzhiyun }
505*4882a593Smuzhiyun 
506*4882a593Smuzhiyun static DECLARE_TLV_DB_SCALE(tas2764_digital_tlv, 1100, 50, 0);
507*4882a593Smuzhiyun static DECLARE_TLV_DB_SCALE(tas2764_playback_volume, -10050, 50, 1);
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun static const struct snd_kcontrol_new tas2764_snd_controls[] = {
510*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Speaker Volume", TAS2764_DVC, 0,
511*4882a593Smuzhiyun 		       TAS2764_DVC_MAX, 1, tas2764_playback_volume),
512*4882a593Smuzhiyun 	SOC_SINGLE_TLV("Amp Gain Volume", TAS2764_CHNL_0, 1, 0x14, 0,
513*4882a593Smuzhiyun 		       tas2764_digital_tlv),
514*4882a593Smuzhiyun };
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_driver_tas2764 = {
517*4882a593Smuzhiyun 	.probe			= tas2764_codec_probe,
518*4882a593Smuzhiyun 	.suspend		= tas2764_codec_suspend,
519*4882a593Smuzhiyun 	.resume			= tas2764_codec_resume,
520*4882a593Smuzhiyun 	.controls		= tas2764_snd_controls,
521*4882a593Smuzhiyun 	.num_controls		= ARRAY_SIZE(tas2764_snd_controls),
522*4882a593Smuzhiyun 	.dapm_widgets		= tas2764_dapm_widgets,
523*4882a593Smuzhiyun 	.num_dapm_widgets	= ARRAY_SIZE(tas2764_dapm_widgets),
524*4882a593Smuzhiyun 	.dapm_routes		= tas2764_audio_map,
525*4882a593Smuzhiyun 	.num_dapm_routes	= ARRAY_SIZE(tas2764_audio_map),
526*4882a593Smuzhiyun 	.idle_bias_on		= 1,
527*4882a593Smuzhiyun 	.endianness		= 1,
528*4882a593Smuzhiyun 	.non_legacy_dai_naming	= 1,
529*4882a593Smuzhiyun };
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun static const struct reg_default tas2764_reg_defaults[] = {
532*4882a593Smuzhiyun 	{ TAS2764_PAGE, 0x00 },
533*4882a593Smuzhiyun 	{ TAS2764_SW_RST, 0x00 },
534*4882a593Smuzhiyun 	{ TAS2764_PWR_CTRL, 0x1a },
535*4882a593Smuzhiyun 	{ TAS2764_DVC, 0x00 },
536*4882a593Smuzhiyun 	{ TAS2764_CHNL_0, 0x28 },
537*4882a593Smuzhiyun 	{ TAS2764_TDM_CFG0, 0x09 },
538*4882a593Smuzhiyun 	{ TAS2764_TDM_CFG1, 0x02 },
539*4882a593Smuzhiyun 	{ TAS2764_TDM_CFG2, 0x0a },
540*4882a593Smuzhiyun 	{ TAS2764_TDM_CFG3, 0x10 },
541*4882a593Smuzhiyun 	{ TAS2764_TDM_CFG5, 0x42 },
542*4882a593Smuzhiyun };
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun static const struct regmap_range_cfg tas2764_regmap_ranges[] = {
545*4882a593Smuzhiyun 	{
546*4882a593Smuzhiyun 		.range_min = 0,
547*4882a593Smuzhiyun 		.range_max = 1 * 128,
548*4882a593Smuzhiyun 		.selector_reg = TAS2764_PAGE,
549*4882a593Smuzhiyun 		.selector_mask = 0xff,
550*4882a593Smuzhiyun 		.selector_shift = 0,
551*4882a593Smuzhiyun 		.window_start = 0,
552*4882a593Smuzhiyun 		.window_len = 128,
553*4882a593Smuzhiyun 	},
554*4882a593Smuzhiyun };
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun static const struct regmap_config tas2764_i2c_regmap = {
557*4882a593Smuzhiyun 	.reg_bits = 8,
558*4882a593Smuzhiyun 	.val_bits = 8,
559*4882a593Smuzhiyun 	.reg_defaults = tas2764_reg_defaults,
560*4882a593Smuzhiyun 	.num_reg_defaults = ARRAY_SIZE(tas2764_reg_defaults),
561*4882a593Smuzhiyun 	.cache_type = REGCACHE_RBTREE,
562*4882a593Smuzhiyun 	.ranges = tas2764_regmap_ranges,
563*4882a593Smuzhiyun 	.num_ranges = ARRAY_SIZE(tas2764_regmap_ranges),
564*4882a593Smuzhiyun 	.max_register = 1 * 128,
565*4882a593Smuzhiyun };
566*4882a593Smuzhiyun 
tas2764_parse_dt(struct device * dev,struct tas2764_priv * tas2764)567*4882a593Smuzhiyun static int tas2764_parse_dt(struct device *dev, struct tas2764_priv *tas2764)
568*4882a593Smuzhiyun {
569*4882a593Smuzhiyun 	int ret = 0;
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun 	tas2764->reset_gpio = devm_gpiod_get_optional(tas2764->dev, "reset",
572*4882a593Smuzhiyun 						      GPIOD_OUT_HIGH);
573*4882a593Smuzhiyun 	if (IS_ERR(tas2764->reset_gpio)) {
574*4882a593Smuzhiyun 		if (PTR_ERR(tas2764->reset_gpio) == -EPROBE_DEFER) {
575*4882a593Smuzhiyun 			tas2764->reset_gpio = NULL;
576*4882a593Smuzhiyun 			return -EPROBE_DEFER;
577*4882a593Smuzhiyun 		}
578*4882a593Smuzhiyun 	}
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun 	tas2764->sdz_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH);
581*4882a593Smuzhiyun 	if (IS_ERR(tas2764->sdz_gpio)) {
582*4882a593Smuzhiyun 		if (PTR_ERR(tas2764->sdz_gpio) == -EPROBE_DEFER)
583*4882a593Smuzhiyun 			return -EPROBE_DEFER;
584*4882a593Smuzhiyun 
585*4882a593Smuzhiyun 		tas2764->sdz_gpio = NULL;
586*4882a593Smuzhiyun 	}
587*4882a593Smuzhiyun 
588*4882a593Smuzhiyun 	ret = fwnode_property_read_u32(dev->fwnode, "ti,imon-slot-no",
589*4882a593Smuzhiyun 				       &tas2764->i_sense_slot);
590*4882a593Smuzhiyun 	if (ret)
591*4882a593Smuzhiyun 		tas2764->i_sense_slot = 0;
592*4882a593Smuzhiyun 
593*4882a593Smuzhiyun 	ret = fwnode_property_read_u32(dev->fwnode, "ti,vmon-slot-no",
594*4882a593Smuzhiyun 				       &tas2764->v_sense_slot);
595*4882a593Smuzhiyun 	if (ret)
596*4882a593Smuzhiyun 		tas2764->v_sense_slot = 2;
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun 	return 0;
599*4882a593Smuzhiyun }
600*4882a593Smuzhiyun 
tas2764_i2c_probe(struct i2c_client * client,const struct i2c_device_id * id)601*4882a593Smuzhiyun static int tas2764_i2c_probe(struct i2c_client *client,
602*4882a593Smuzhiyun 			const struct i2c_device_id *id)
603*4882a593Smuzhiyun {
604*4882a593Smuzhiyun 	struct tas2764_priv *tas2764;
605*4882a593Smuzhiyun 	int result;
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 	tas2764 = devm_kzalloc(&client->dev, sizeof(struct tas2764_priv),
608*4882a593Smuzhiyun 			       GFP_KERNEL);
609*4882a593Smuzhiyun 	if (!tas2764)
610*4882a593Smuzhiyun 		return -ENOMEM;
611*4882a593Smuzhiyun 
612*4882a593Smuzhiyun 	tas2764->dev = &client->dev;
613*4882a593Smuzhiyun 	i2c_set_clientdata(client, tas2764);
614*4882a593Smuzhiyun 	dev_set_drvdata(&client->dev, tas2764);
615*4882a593Smuzhiyun 
616*4882a593Smuzhiyun 	tas2764->regmap = devm_regmap_init_i2c(client, &tas2764_i2c_regmap);
617*4882a593Smuzhiyun 	if (IS_ERR(tas2764->regmap)) {
618*4882a593Smuzhiyun 		result = PTR_ERR(tas2764->regmap);
619*4882a593Smuzhiyun 		dev_err(&client->dev, "Failed to allocate register map: %d\n",
620*4882a593Smuzhiyun 					result);
621*4882a593Smuzhiyun 		return result;
622*4882a593Smuzhiyun 	}
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun 	if (client->dev.of_node) {
625*4882a593Smuzhiyun 		result = tas2764_parse_dt(&client->dev, tas2764);
626*4882a593Smuzhiyun 		if (result) {
627*4882a593Smuzhiyun 			dev_err(tas2764->dev, "%s: Failed to parse devicetree\n",
628*4882a593Smuzhiyun 				__func__);
629*4882a593Smuzhiyun 			return result;
630*4882a593Smuzhiyun 		}
631*4882a593Smuzhiyun 	}
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun 	return devm_snd_soc_register_component(tas2764->dev,
634*4882a593Smuzhiyun 					       &soc_component_driver_tas2764,
635*4882a593Smuzhiyun 					       tas2764_dai_driver,
636*4882a593Smuzhiyun 					       ARRAY_SIZE(tas2764_dai_driver));
637*4882a593Smuzhiyun }
638*4882a593Smuzhiyun 
639*4882a593Smuzhiyun static const struct i2c_device_id tas2764_i2c_id[] = {
640*4882a593Smuzhiyun 	{ "tas2764", 0},
641*4882a593Smuzhiyun 	{ }
642*4882a593Smuzhiyun };
643*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, tas2764_i2c_id);
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun #if defined(CONFIG_OF)
646*4882a593Smuzhiyun static const struct of_device_id tas2764_of_match[] = {
647*4882a593Smuzhiyun 	{ .compatible = "ti,tas2764" },
648*4882a593Smuzhiyun 	{},
649*4882a593Smuzhiyun };
650*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, tas2764_of_match);
651*4882a593Smuzhiyun #endif
652*4882a593Smuzhiyun 
653*4882a593Smuzhiyun static struct i2c_driver tas2764_i2c_driver = {
654*4882a593Smuzhiyun 	.driver = {
655*4882a593Smuzhiyun 		.name   = "tas2764",
656*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(tas2764_of_match),
657*4882a593Smuzhiyun 	},
658*4882a593Smuzhiyun 	.probe      = tas2764_i2c_probe,
659*4882a593Smuzhiyun 	.id_table   = tas2764_i2c_id,
660*4882a593Smuzhiyun };
661*4882a593Smuzhiyun module_i2c_driver(tas2764_i2c_driver);
662*4882a593Smuzhiyun 
663*4882a593Smuzhiyun MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>");
664*4882a593Smuzhiyun MODULE_DESCRIPTION("TAS2764 I2C Smart Amplifier driver");
665*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
666