1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * tas2562.h - ALSA SoC Texas Instruments TAS2562 Mono Audio Amplifier 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Author: Dan Murphy <dmurphy@ti.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __TAS2562_H__ 11*4882a593Smuzhiyun #define __TAS2562_H__ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define TAS2562_PAGE_CTRL 0x00 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define TAS2562_REG(page, reg) ((page * 128) + reg) 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define TAS2562_SW_RESET TAS2562_REG(0, 0x01) 18*4882a593Smuzhiyun #define TAS2562_PWR_CTRL TAS2562_REG(0, 0x02) 19*4882a593Smuzhiyun #define TAS2562_PB_CFG1 TAS2562_REG(0, 0x03) 20*4882a593Smuzhiyun #define TAS2562_MISC_CFG1 TAS2562_REG(0, 0x04) 21*4882a593Smuzhiyun #define TAS2562_MISC_CFG2 TAS2562_REG(0, 0x05) 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define TAS2562_TDM_CFG0 TAS2562_REG(0, 0x06) 24*4882a593Smuzhiyun #define TAS2562_TDM_CFG1 TAS2562_REG(0, 0x07) 25*4882a593Smuzhiyun #define TAS2562_TDM_CFG2 TAS2562_REG(0, 0x08) 26*4882a593Smuzhiyun #define TAS2562_TDM_CFG3 TAS2562_REG(0, 0x09) 27*4882a593Smuzhiyun #define TAS2562_TDM_CFG4 TAS2562_REG(0, 0x0a) 28*4882a593Smuzhiyun #define TAS2562_TDM_CFG5 TAS2562_REG(0, 0x0b) 29*4882a593Smuzhiyun #define TAS2562_TDM_CFG6 TAS2562_REG(0, 0x0c) 30*4882a593Smuzhiyun #define TAS2562_TDM_CFG7 TAS2562_REG(0, 0x0d) 31*4882a593Smuzhiyun #define TAS2562_TDM_CFG8 TAS2562_REG(0, 0x0e) 32*4882a593Smuzhiyun #define TAS2562_TDM_CFG9 TAS2562_REG(0, 0x0f) 33*4882a593Smuzhiyun #define TAS2562_TDM_CFG10 TAS2562_REG(0, 0x10) 34*4882a593Smuzhiyun #define TAS2562_TDM_DET TAS2562_REG(0, 0x11) 35*4882a593Smuzhiyun #define TAS2562_REV_ID TAS2562_REG(0, 0x7d) 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define TAS2562_RX_OFF_MASK GENMASK(5, 1) 38*4882a593Smuzhiyun #define TAS2562_TX_OFF_MASK GENMASK(3, 1) 39*4882a593Smuzhiyun #define TAS2562_RIGHT_SLOT_SHIFT 4 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* Page 2 */ 42*4882a593Smuzhiyun #define TAS2562_DVC_CFG1 TAS2562_REG(2, 0x0c) 43*4882a593Smuzhiyun #define TAS2562_DVC_CFG2 TAS2562_REG(2, 0x0d) 44*4882a593Smuzhiyun #define TAS2562_DVC_CFG3 TAS2562_REG(2, 0x0e) 45*4882a593Smuzhiyun #define TAS2562_DVC_CFG4 TAS2562_REG(2, 0x0f) 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define TAS2562_RESET BIT(0) 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun #define TAS2562_MODE_MASK GENMASK(1,0) 50*4882a593Smuzhiyun #define TAS2562_ACTIVE 0x0 51*4882a593Smuzhiyun #define TAS2562_MUTE 0x1 52*4882a593Smuzhiyun #define TAS2562_SHUTDOWN 0x2 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun #define TAS2562_TDM_CFG1_RX_EDGE_MASK BIT(0) 55*4882a593Smuzhiyun #define TAS2562_TDM_CFG1_RX_FALLING 1 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #define TAS2562_TDM_CFG0_RAMPRATE_MASK BIT(5) 58*4882a593Smuzhiyun #define TAS2562_TDM_CFG0_RAMPRATE_44_1 BIT(5) 59*4882a593Smuzhiyun #define TAS2562_TDM_CFG0_SAMPRATE_MASK GENMASK(3, 1) 60*4882a593Smuzhiyun #define TAS2562_TDM_CFG0_SAMPRATE_7305_8KHZ (0x0 << 1) 61*4882a593Smuzhiyun #define TAS2562_TDM_CFG0_SAMPRATE_14_7_16KHZ (0x1 << 1) 62*4882a593Smuzhiyun #define TAS2562_TDM_CFG0_SAMPRATE_22_05_24KHZ (0x2 << 1) 63*4882a593Smuzhiyun #define TAS2562_TDM_CFG0_SAMPRATE_29_4_32KHZ (0x3 << 1) 64*4882a593Smuzhiyun #define TAS2562_TDM_CFG0_SAMPRATE_44_1_48KHZ (0x4 << 1) 65*4882a593Smuzhiyun #define TAS2562_TDM_CFG0_SAMPRATE_88_2_96KHZ (0x5 << 1) 66*4882a593Smuzhiyun #define TAS2562_TDM_CFG0_SAMPRATE_176_4_192KHZ (0x6 << 1) 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun #define TAS2562_TDM_CFG2_RIGHT_JUSTIFY BIT(6) 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #define TAS2562_TDM_CFG2_RXLEN_MASK GENMASK(1, 0) 71*4882a593Smuzhiyun #define TAS2562_TDM_CFG2_RXLEN_16B 0x0 72*4882a593Smuzhiyun #define TAS2562_TDM_CFG2_RXLEN_24B BIT(0) 73*4882a593Smuzhiyun #define TAS2562_TDM_CFG2_RXLEN_32B BIT(1) 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #define TAS2562_TDM_CFG2_RXWLEN_MASK GENMASK(3, 2) 76*4882a593Smuzhiyun #define TAS2562_TDM_CFG2_RXWLEN_16B 0x0 77*4882a593Smuzhiyun #define TAS2562_TDM_CFG2_RXWLEN_20B BIT(2) 78*4882a593Smuzhiyun #define TAS2562_TDM_CFG2_RXWLEN_24B BIT(3) 79*4882a593Smuzhiyun #define TAS2562_TDM_CFG2_RXWLEN_32B (BIT(2) | BIT(3)) 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun #define TAS2562_VSENSE_POWER_EN 2 82*4882a593Smuzhiyun #define TAS2562_ISENSE_POWER_EN 3 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun #define TAS2562_TDM_CFG5_VSNS_EN BIT(6) 85*4882a593Smuzhiyun #define TAS2562_TDM_CFG5_VSNS_SLOT_MASK GENMASK(5, 0) 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun #define TAS2562_TDM_CFG6_ISNS_EN BIT(6) 88*4882a593Smuzhiyun #define TAS2562_TDM_CFG6_ISNS_SLOT_MASK GENMASK(5, 0) 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun #endif /* __TAS2562_H__ */ 91