1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * tas2552.c - ALSA SoC Texas Instruments TAS2552 Mono Audio Amplifier
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Dan Murphy <dmurphy@ti.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/errno.h>
12*4882a593Smuzhiyun #include <linux/device.h>
13*4882a593Smuzhiyun #include <linux/i2c.h>
14*4882a593Smuzhiyun #include <linux/gpio.h>
15*4882a593Smuzhiyun #include <linux/of_gpio.h>
16*4882a593Smuzhiyun #include <linux/pm_runtime.h>
17*4882a593Smuzhiyun #include <linux/regmap.h>
18*4882a593Smuzhiyun #include <linux/slab.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
21*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include <sound/pcm.h>
24*4882a593Smuzhiyun #include <sound/pcm_params.h>
25*4882a593Smuzhiyun #include <sound/soc.h>
26*4882a593Smuzhiyun #include <sound/soc-dapm.h>
27*4882a593Smuzhiyun #include <sound/tlv.h>
28*4882a593Smuzhiyun #include <sound/tas2552-plat.h>
29*4882a593Smuzhiyun #include <dt-bindings/sound/tas2552.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #include "tas2552.h"
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun static const struct reg_default tas2552_reg_defs[] = {
34*4882a593Smuzhiyun {TAS2552_CFG_1, 0x22},
35*4882a593Smuzhiyun {TAS2552_CFG_3, 0x80},
36*4882a593Smuzhiyun {TAS2552_DOUT, 0x00},
37*4882a593Smuzhiyun {TAS2552_OUTPUT_DATA, 0xc0},
38*4882a593Smuzhiyun {TAS2552_PDM_CFG, 0x01},
39*4882a593Smuzhiyun {TAS2552_PGA_GAIN, 0x00},
40*4882a593Smuzhiyun {TAS2552_BOOST_APT_CTRL, 0x0f},
41*4882a593Smuzhiyun {TAS2552_RESERVED_0D, 0xbe},
42*4882a593Smuzhiyun {TAS2552_LIMIT_RATE_HYS, 0x08},
43*4882a593Smuzhiyun {TAS2552_CFG_2, 0xef},
44*4882a593Smuzhiyun {TAS2552_SER_CTRL_1, 0x00},
45*4882a593Smuzhiyun {TAS2552_SER_CTRL_2, 0x00},
46*4882a593Smuzhiyun {TAS2552_PLL_CTRL_1, 0x10},
47*4882a593Smuzhiyun {TAS2552_PLL_CTRL_2, 0x00},
48*4882a593Smuzhiyun {TAS2552_PLL_CTRL_3, 0x00},
49*4882a593Smuzhiyun {TAS2552_BTIP, 0x8f},
50*4882a593Smuzhiyun {TAS2552_BTS_CTRL, 0x80},
51*4882a593Smuzhiyun {TAS2552_LIMIT_RELEASE, 0x04},
52*4882a593Smuzhiyun {TAS2552_LIMIT_INT_COUNT, 0x00},
53*4882a593Smuzhiyun {TAS2552_EDGE_RATE_CTRL, 0x40},
54*4882a593Smuzhiyun {TAS2552_VBAT_DATA, 0x00},
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun #define TAS2552_NUM_SUPPLIES 3
58*4882a593Smuzhiyun static const char *tas2552_supply_names[TAS2552_NUM_SUPPLIES] = {
59*4882a593Smuzhiyun "vbat", /* vbat voltage */
60*4882a593Smuzhiyun "iovdd", /* I/O Voltage */
61*4882a593Smuzhiyun "avdd", /* Analog DAC Voltage */
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun struct tas2552_data {
65*4882a593Smuzhiyun struct snd_soc_component *component;
66*4882a593Smuzhiyun struct regmap *regmap;
67*4882a593Smuzhiyun struct i2c_client *tas2552_client;
68*4882a593Smuzhiyun struct regulator_bulk_data supplies[TAS2552_NUM_SUPPLIES];
69*4882a593Smuzhiyun struct gpio_desc *enable_gpio;
70*4882a593Smuzhiyun unsigned char regs[TAS2552_VBAT_DATA];
71*4882a593Smuzhiyun unsigned int pll_clkin;
72*4882a593Smuzhiyun int pll_clk_id;
73*4882a593Smuzhiyun unsigned int pdm_clk;
74*4882a593Smuzhiyun int pdm_clk_id;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun unsigned int dai_fmt;
77*4882a593Smuzhiyun unsigned int tdm_delay;
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun
tas2552_post_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)80*4882a593Smuzhiyun static int tas2552_post_event(struct snd_soc_dapm_widget *w,
81*4882a593Smuzhiyun struct snd_kcontrol *kcontrol, int event)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun switch (event) {
86*4882a593Smuzhiyun case SND_SOC_DAPM_POST_PMU:
87*4882a593Smuzhiyun snd_soc_component_write(component, TAS2552_RESERVED_0D, 0xc0);
88*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_LIMIT_RATE_HYS, (1 << 5),
89*4882a593Smuzhiyun (1 << 5));
90*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_CFG_2, 1, 0);
91*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_CFG_1, TAS2552_SWS, 0);
92*4882a593Smuzhiyun break;
93*4882a593Smuzhiyun case SND_SOC_DAPM_POST_PMD:
94*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_CFG_1, TAS2552_SWS,
95*4882a593Smuzhiyun TAS2552_SWS);
96*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_CFG_2, 1, 1);
97*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_LIMIT_RATE_HYS, (1 << 5), 0);
98*4882a593Smuzhiyun snd_soc_component_write(component, TAS2552_RESERVED_0D, 0xbe);
99*4882a593Smuzhiyun break;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun return 0;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun /* Input mux controls */
105*4882a593Smuzhiyun static const char * const tas2552_input_texts[] = {
106*4882a593Smuzhiyun "Digital", "Analog" };
107*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(tas2552_input_mux_enum, TAS2552_CFG_3, 7,
108*4882a593Smuzhiyun tas2552_input_texts);
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun static const struct snd_kcontrol_new tas2552_input_mux_control =
111*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", tas2552_input_mux_enum);
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun static const struct snd_soc_dapm_widget tas2552_dapm_widgets[] =
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("IN"),
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun /* MUX Controls */
118*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Input selection", SND_SOC_NOPM, 0, 0,
119*4882a593Smuzhiyun &tas2552_input_mux_control),
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun SND_SOC_DAPM_AIF_IN("DAC IN", "DAC Playback", 0, SND_SOC_NOPM, 0, 0),
122*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC", NULL, SND_SOC_NOPM, 0, 0),
123*4882a593Smuzhiyun SND_SOC_DAPM_OUT_DRV("ClassD", TAS2552_CFG_2, 7, 0, NULL, 0),
124*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("PLL", TAS2552_CFG_2, 3, 0, NULL, 0),
125*4882a593Smuzhiyun SND_SOC_DAPM_POST("Post Event", tas2552_post_event),
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("OUT")
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun static const struct snd_soc_dapm_route tas2552_audio_map[] = {
131*4882a593Smuzhiyun {"DAC", NULL, "DAC IN"},
132*4882a593Smuzhiyun {"Input selection", "Digital", "DAC"},
133*4882a593Smuzhiyun {"Input selection", "Analog", "IN"},
134*4882a593Smuzhiyun {"ClassD", NULL, "Input selection"},
135*4882a593Smuzhiyun {"OUT", NULL, "ClassD"},
136*4882a593Smuzhiyun {"ClassD", NULL, "PLL"},
137*4882a593Smuzhiyun };
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun #ifdef CONFIG_PM
tas2552_sw_shutdown(struct tas2552_data * tas2552,int sw_shutdown)140*4882a593Smuzhiyun static void tas2552_sw_shutdown(struct tas2552_data *tas2552, int sw_shutdown)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun u8 cfg1_reg = 0;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun if (!tas2552->component)
145*4882a593Smuzhiyun return;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun if (sw_shutdown)
148*4882a593Smuzhiyun cfg1_reg = TAS2552_SWS;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun snd_soc_component_update_bits(tas2552->component, TAS2552_CFG_1, TAS2552_SWS,
151*4882a593Smuzhiyun cfg1_reg);
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun #endif
154*4882a593Smuzhiyun
tas2552_setup_pll(struct snd_soc_component * component,struct snd_pcm_hw_params * params)155*4882a593Smuzhiyun static int tas2552_setup_pll(struct snd_soc_component *component,
156*4882a593Smuzhiyun struct snd_pcm_hw_params *params)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun struct tas2552_data *tas2552 = dev_get_drvdata(component->dev);
159*4882a593Smuzhiyun bool bypass_pll = false;
160*4882a593Smuzhiyun unsigned int pll_clk = params_rate(params) * 512;
161*4882a593Smuzhiyun unsigned int pll_clkin = tas2552->pll_clkin;
162*4882a593Smuzhiyun u8 pll_enable;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun if (!pll_clkin) {
165*4882a593Smuzhiyun if (tas2552->pll_clk_id != TAS2552_PLL_CLKIN_BCLK)
166*4882a593Smuzhiyun return -EINVAL;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun pll_clkin = snd_soc_params_to_bclk(params);
169*4882a593Smuzhiyun pll_clkin += tas2552->tdm_delay;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun pll_enable = snd_soc_component_read(component, TAS2552_CFG_2) & TAS2552_PLL_ENABLE;
173*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_CFG_2, TAS2552_PLL_ENABLE, 0);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun if (pll_clkin == pll_clk)
176*4882a593Smuzhiyun bypass_pll = true;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun if (bypass_pll) {
179*4882a593Smuzhiyun /* By pass the PLL configuration */
180*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_PLL_CTRL_2,
181*4882a593Smuzhiyun TAS2552_PLL_BYPASS, TAS2552_PLL_BYPASS);
182*4882a593Smuzhiyun } else {
183*4882a593Smuzhiyun /* Fill in the PLL control registers for J & D
184*4882a593Smuzhiyun * pll_clk = (.5 * pll_clkin * J.D) / 2^p
185*4882a593Smuzhiyun * Need to fill in J and D here based on incoming freq
186*4882a593Smuzhiyun */
187*4882a593Smuzhiyun unsigned int d, q, t;
188*4882a593Smuzhiyun u8 j;
189*4882a593Smuzhiyun u8 pll_sel = (tas2552->pll_clk_id << 3) & TAS2552_PLL_SRC_MASK;
190*4882a593Smuzhiyun u8 p = snd_soc_component_read(component, TAS2552_PLL_CTRL_1);
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun p = (p >> 7);
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun recalc:
195*4882a593Smuzhiyun t = (pll_clk * 2) << p;
196*4882a593Smuzhiyun j = t / pll_clkin;
197*4882a593Smuzhiyun d = t % pll_clkin;
198*4882a593Smuzhiyun t = pll_clkin / 10000;
199*4882a593Smuzhiyun q = d / (t + 1);
200*4882a593Smuzhiyun d = q + ((9999 - pll_clkin % 10000) * (d / t - q)) / 10000;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun if (d && (pll_clkin < 512000 || pll_clkin > 9200000)) {
203*4882a593Smuzhiyun if (tas2552->pll_clk_id == TAS2552_PLL_CLKIN_BCLK) {
204*4882a593Smuzhiyun pll_clkin = 1800000;
205*4882a593Smuzhiyun pll_sel = (TAS2552_PLL_CLKIN_1_8_FIXED << 3) &
206*4882a593Smuzhiyun TAS2552_PLL_SRC_MASK;
207*4882a593Smuzhiyun } else {
208*4882a593Smuzhiyun pll_clkin = snd_soc_params_to_bclk(params);
209*4882a593Smuzhiyun pll_clkin += tas2552->tdm_delay;
210*4882a593Smuzhiyun pll_sel = (TAS2552_PLL_CLKIN_BCLK << 3) &
211*4882a593Smuzhiyun TAS2552_PLL_SRC_MASK;
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun goto recalc;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_CFG_1, TAS2552_PLL_SRC_MASK,
217*4882a593Smuzhiyun pll_sel);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_PLL_CTRL_1,
220*4882a593Smuzhiyun TAS2552_PLL_J_MASK, j);
221*4882a593Smuzhiyun /* Will clear the PLL_BYPASS bit */
222*4882a593Smuzhiyun snd_soc_component_write(component, TAS2552_PLL_CTRL_2,
223*4882a593Smuzhiyun TAS2552_PLL_D_UPPER(d));
224*4882a593Smuzhiyun snd_soc_component_write(component, TAS2552_PLL_CTRL_3,
225*4882a593Smuzhiyun TAS2552_PLL_D_LOWER(d));
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /* Restore PLL status */
229*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_CFG_2, TAS2552_PLL_ENABLE,
230*4882a593Smuzhiyun pll_enable);
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun return 0;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
tas2552_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)235*4882a593Smuzhiyun static int tas2552_hw_params(struct snd_pcm_substream *substream,
236*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
237*4882a593Smuzhiyun struct snd_soc_dai *dai)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
240*4882a593Smuzhiyun struct tas2552_data *tas2552 = dev_get_drvdata(component->dev);
241*4882a593Smuzhiyun int cpf;
242*4882a593Smuzhiyun u8 ser_ctrl1_reg, wclk_rate;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun switch (params_width(params)) {
245*4882a593Smuzhiyun case 16:
246*4882a593Smuzhiyun ser_ctrl1_reg = TAS2552_WORDLENGTH_16BIT;
247*4882a593Smuzhiyun cpf = 32 + tas2552->tdm_delay;
248*4882a593Smuzhiyun break;
249*4882a593Smuzhiyun case 20:
250*4882a593Smuzhiyun ser_ctrl1_reg = TAS2552_WORDLENGTH_20BIT;
251*4882a593Smuzhiyun cpf = 64 + tas2552->tdm_delay;
252*4882a593Smuzhiyun break;
253*4882a593Smuzhiyun case 24:
254*4882a593Smuzhiyun ser_ctrl1_reg = TAS2552_WORDLENGTH_24BIT;
255*4882a593Smuzhiyun cpf = 64 + tas2552->tdm_delay;
256*4882a593Smuzhiyun break;
257*4882a593Smuzhiyun case 32:
258*4882a593Smuzhiyun ser_ctrl1_reg = TAS2552_WORDLENGTH_32BIT;
259*4882a593Smuzhiyun cpf = 64 + tas2552->tdm_delay;
260*4882a593Smuzhiyun break;
261*4882a593Smuzhiyun default:
262*4882a593Smuzhiyun dev_err(component->dev, "Not supported sample size: %d\n",
263*4882a593Smuzhiyun params_width(params));
264*4882a593Smuzhiyun return -EINVAL;
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun if (cpf <= 32)
268*4882a593Smuzhiyun ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_32;
269*4882a593Smuzhiyun else if (cpf <= 64)
270*4882a593Smuzhiyun ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_64;
271*4882a593Smuzhiyun else if (cpf <= 128)
272*4882a593Smuzhiyun ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_128;
273*4882a593Smuzhiyun else
274*4882a593Smuzhiyun ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_256;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_SER_CTRL_1,
277*4882a593Smuzhiyun TAS2552_WORDLENGTH_MASK | TAS2552_CLKSPERFRAME_MASK,
278*4882a593Smuzhiyun ser_ctrl1_reg);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun switch (params_rate(params)) {
281*4882a593Smuzhiyun case 8000:
282*4882a593Smuzhiyun wclk_rate = TAS2552_WCLK_FREQ_8KHZ;
283*4882a593Smuzhiyun break;
284*4882a593Smuzhiyun case 11025:
285*4882a593Smuzhiyun case 12000:
286*4882a593Smuzhiyun wclk_rate = TAS2552_WCLK_FREQ_11_12KHZ;
287*4882a593Smuzhiyun break;
288*4882a593Smuzhiyun case 16000:
289*4882a593Smuzhiyun wclk_rate = TAS2552_WCLK_FREQ_16KHZ;
290*4882a593Smuzhiyun break;
291*4882a593Smuzhiyun case 22050:
292*4882a593Smuzhiyun case 24000:
293*4882a593Smuzhiyun wclk_rate = TAS2552_WCLK_FREQ_22_24KHZ;
294*4882a593Smuzhiyun break;
295*4882a593Smuzhiyun case 32000:
296*4882a593Smuzhiyun wclk_rate = TAS2552_WCLK_FREQ_32KHZ;
297*4882a593Smuzhiyun break;
298*4882a593Smuzhiyun case 44100:
299*4882a593Smuzhiyun case 48000:
300*4882a593Smuzhiyun wclk_rate = TAS2552_WCLK_FREQ_44_48KHZ;
301*4882a593Smuzhiyun break;
302*4882a593Smuzhiyun case 88200:
303*4882a593Smuzhiyun case 96000:
304*4882a593Smuzhiyun wclk_rate = TAS2552_WCLK_FREQ_88_96KHZ;
305*4882a593Smuzhiyun break;
306*4882a593Smuzhiyun case 176400:
307*4882a593Smuzhiyun case 192000:
308*4882a593Smuzhiyun wclk_rate = TAS2552_WCLK_FREQ_176_192KHZ;
309*4882a593Smuzhiyun break;
310*4882a593Smuzhiyun default:
311*4882a593Smuzhiyun dev_err(component->dev, "Not supported sample rate: %d\n",
312*4882a593Smuzhiyun params_rate(params));
313*4882a593Smuzhiyun return -EINVAL;
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_CFG_3, TAS2552_WCLK_FREQ_MASK,
317*4882a593Smuzhiyun wclk_rate);
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun return tas2552_setup_pll(component, params);
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun #define TAS2552_DAI_FMT_MASK (TAS2552_BCLKDIR | \
323*4882a593Smuzhiyun TAS2552_WCLKDIR | \
324*4882a593Smuzhiyun TAS2552_DATAFORMAT_MASK)
tas2552_prepare(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)325*4882a593Smuzhiyun static int tas2552_prepare(struct snd_pcm_substream *substream,
326*4882a593Smuzhiyun struct snd_soc_dai *dai)
327*4882a593Smuzhiyun {
328*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
329*4882a593Smuzhiyun struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
330*4882a593Smuzhiyun int delay = 0;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun /* TDM slot selection only valid in DSP_A/_B mode */
333*4882a593Smuzhiyun if (tas2552->dai_fmt == SND_SOC_DAIFMT_DSP_A)
334*4882a593Smuzhiyun delay += (tas2552->tdm_delay + 1);
335*4882a593Smuzhiyun else if (tas2552->dai_fmt == SND_SOC_DAIFMT_DSP_B)
336*4882a593Smuzhiyun delay += tas2552->tdm_delay;
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun /* Configure data delay */
339*4882a593Smuzhiyun snd_soc_component_write(component, TAS2552_SER_CTRL_2, delay);
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun return 0;
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun
tas2552_set_dai_fmt(struct snd_soc_dai * dai,unsigned int fmt)344*4882a593Smuzhiyun static int tas2552_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
345*4882a593Smuzhiyun {
346*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
347*4882a593Smuzhiyun struct tas2552_data *tas2552 = dev_get_drvdata(component->dev);
348*4882a593Smuzhiyun u8 serial_format;
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
351*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBS_CFS:
352*4882a593Smuzhiyun serial_format = 0x00;
353*4882a593Smuzhiyun break;
354*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBS_CFM:
355*4882a593Smuzhiyun serial_format = TAS2552_WCLKDIR;
356*4882a593Smuzhiyun break;
357*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBM_CFS:
358*4882a593Smuzhiyun serial_format = TAS2552_BCLKDIR;
359*4882a593Smuzhiyun break;
360*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBM_CFM:
361*4882a593Smuzhiyun serial_format = (TAS2552_BCLKDIR | TAS2552_WCLKDIR);
362*4882a593Smuzhiyun break;
363*4882a593Smuzhiyun default:
364*4882a593Smuzhiyun dev_vdbg(component->dev, "DAI Format master is not found\n");
365*4882a593Smuzhiyun return -EINVAL;
366*4882a593Smuzhiyun }
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun switch (fmt & (SND_SOC_DAIFMT_FORMAT_MASK |
369*4882a593Smuzhiyun SND_SOC_DAIFMT_INV_MASK)) {
370*4882a593Smuzhiyun case (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF):
371*4882a593Smuzhiyun break;
372*4882a593Smuzhiyun case (SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_IB_NF):
373*4882a593Smuzhiyun case (SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF):
374*4882a593Smuzhiyun serial_format |= TAS2552_DATAFORMAT_DSP;
375*4882a593Smuzhiyun break;
376*4882a593Smuzhiyun case (SND_SOC_DAIFMT_RIGHT_J | SND_SOC_DAIFMT_NB_NF):
377*4882a593Smuzhiyun serial_format |= TAS2552_DATAFORMAT_RIGHT_J;
378*4882a593Smuzhiyun break;
379*4882a593Smuzhiyun case (SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_NB_NF):
380*4882a593Smuzhiyun serial_format |= TAS2552_DATAFORMAT_LEFT_J;
381*4882a593Smuzhiyun break;
382*4882a593Smuzhiyun default:
383*4882a593Smuzhiyun dev_vdbg(component->dev, "DAI Format is not found\n");
384*4882a593Smuzhiyun return -EINVAL;
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun tas2552->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_SER_CTRL_1, TAS2552_DAI_FMT_MASK,
389*4882a593Smuzhiyun serial_format);
390*4882a593Smuzhiyun return 0;
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun
tas2552_set_dai_sysclk(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)393*4882a593Smuzhiyun static int tas2552_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
394*4882a593Smuzhiyun unsigned int freq, int dir)
395*4882a593Smuzhiyun {
396*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
397*4882a593Smuzhiyun struct tas2552_data *tas2552 = dev_get_drvdata(component->dev);
398*4882a593Smuzhiyun u8 reg, mask, val;
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun switch (clk_id) {
401*4882a593Smuzhiyun case TAS2552_PLL_CLKIN_MCLK:
402*4882a593Smuzhiyun case TAS2552_PLL_CLKIN_IVCLKIN:
403*4882a593Smuzhiyun if (freq < 512000 || freq > 24576000) {
404*4882a593Smuzhiyun /* out of range PLL_CLKIN, fall back to use BCLK */
405*4882a593Smuzhiyun dev_warn(component->dev, "Out of range PLL_CLKIN: %u\n",
406*4882a593Smuzhiyun freq);
407*4882a593Smuzhiyun clk_id = TAS2552_PLL_CLKIN_BCLK;
408*4882a593Smuzhiyun freq = 0;
409*4882a593Smuzhiyun }
410*4882a593Smuzhiyun fallthrough;
411*4882a593Smuzhiyun case TAS2552_PLL_CLKIN_BCLK:
412*4882a593Smuzhiyun case TAS2552_PLL_CLKIN_1_8_FIXED:
413*4882a593Smuzhiyun mask = TAS2552_PLL_SRC_MASK;
414*4882a593Smuzhiyun val = (clk_id << 3) & mask; /* bit 4:5 in the register */
415*4882a593Smuzhiyun reg = TAS2552_CFG_1;
416*4882a593Smuzhiyun tas2552->pll_clk_id = clk_id;
417*4882a593Smuzhiyun tas2552->pll_clkin = freq;
418*4882a593Smuzhiyun break;
419*4882a593Smuzhiyun case TAS2552_PDM_CLK_PLL:
420*4882a593Smuzhiyun case TAS2552_PDM_CLK_IVCLKIN:
421*4882a593Smuzhiyun case TAS2552_PDM_CLK_BCLK:
422*4882a593Smuzhiyun case TAS2552_PDM_CLK_MCLK:
423*4882a593Smuzhiyun mask = TAS2552_PDM_CLK_SEL_MASK;
424*4882a593Smuzhiyun val = (clk_id >> 1) & mask; /* bit 0:1 in the register */
425*4882a593Smuzhiyun reg = TAS2552_PDM_CFG;
426*4882a593Smuzhiyun tas2552->pdm_clk_id = clk_id;
427*4882a593Smuzhiyun tas2552->pdm_clk = freq;
428*4882a593Smuzhiyun break;
429*4882a593Smuzhiyun default:
430*4882a593Smuzhiyun dev_err(component->dev, "Invalid clk id: %d\n", clk_id);
431*4882a593Smuzhiyun return -EINVAL;
432*4882a593Smuzhiyun }
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun snd_soc_component_update_bits(component, reg, mask, val);
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun return 0;
437*4882a593Smuzhiyun }
438*4882a593Smuzhiyun
tas2552_set_dai_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)439*4882a593Smuzhiyun static int tas2552_set_dai_tdm_slot(struct snd_soc_dai *dai,
440*4882a593Smuzhiyun unsigned int tx_mask, unsigned int rx_mask,
441*4882a593Smuzhiyun int slots, int slot_width)
442*4882a593Smuzhiyun {
443*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
444*4882a593Smuzhiyun struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
445*4882a593Smuzhiyun unsigned int lsb;
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun if (unlikely(!tx_mask)) {
448*4882a593Smuzhiyun dev_err(component->dev, "tx masks need to be non 0\n");
449*4882a593Smuzhiyun return -EINVAL;
450*4882a593Smuzhiyun }
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun /* TDM based on DSP mode requires slots to be adjacent */
453*4882a593Smuzhiyun lsb = __ffs(tx_mask);
454*4882a593Smuzhiyun if ((lsb + 1) != __fls(tx_mask)) {
455*4882a593Smuzhiyun dev_err(component->dev, "Invalid mask, slots must be adjacent\n");
456*4882a593Smuzhiyun return -EINVAL;
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun tas2552->tdm_delay = lsb * slot_width;
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun /* DOUT in high-impedance on inactive bit clocks */
462*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_DOUT,
463*4882a593Smuzhiyun TAS2552_SDOUT_TRISTATE, TAS2552_SDOUT_TRISTATE);
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun return 0;
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun
tas2552_mute(struct snd_soc_dai * dai,int mute,int direction)468*4882a593Smuzhiyun static int tas2552_mute(struct snd_soc_dai *dai, int mute, int direction)
469*4882a593Smuzhiyun {
470*4882a593Smuzhiyun u8 cfg1_reg = 0;
471*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun if (mute)
474*4882a593Smuzhiyun cfg1_reg |= TAS2552_MUTE;
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_CFG_1, TAS2552_MUTE, cfg1_reg);
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun return 0;
479*4882a593Smuzhiyun }
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun #ifdef CONFIG_PM
tas2552_runtime_suspend(struct device * dev)482*4882a593Smuzhiyun static int tas2552_runtime_suspend(struct device *dev)
483*4882a593Smuzhiyun {
484*4882a593Smuzhiyun struct tas2552_data *tas2552 = dev_get_drvdata(dev);
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun tas2552_sw_shutdown(tas2552, 1);
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun regcache_cache_only(tas2552->regmap, true);
489*4882a593Smuzhiyun regcache_mark_dirty(tas2552->regmap);
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun gpiod_set_value(tas2552->enable_gpio, 0);
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun return 0;
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun
tas2552_runtime_resume(struct device * dev)496*4882a593Smuzhiyun static int tas2552_runtime_resume(struct device *dev)
497*4882a593Smuzhiyun {
498*4882a593Smuzhiyun struct tas2552_data *tas2552 = dev_get_drvdata(dev);
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun gpiod_set_value(tas2552->enable_gpio, 1);
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun tas2552_sw_shutdown(tas2552, 0);
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun regcache_cache_only(tas2552->regmap, false);
505*4882a593Smuzhiyun regcache_sync(tas2552->regmap);
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun return 0;
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun #endif
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun static const struct dev_pm_ops tas2552_pm = {
512*4882a593Smuzhiyun SET_RUNTIME_PM_OPS(tas2552_runtime_suspend, tas2552_runtime_resume,
513*4882a593Smuzhiyun NULL)
514*4882a593Smuzhiyun };
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun static const struct snd_soc_dai_ops tas2552_speaker_dai_ops = {
517*4882a593Smuzhiyun .hw_params = tas2552_hw_params,
518*4882a593Smuzhiyun .prepare = tas2552_prepare,
519*4882a593Smuzhiyun .set_sysclk = tas2552_set_dai_sysclk,
520*4882a593Smuzhiyun .set_fmt = tas2552_set_dai_fmt,
521*4882a593Smuzhiyun .set_tdm_slot = tas2552_set_dai_tdm_slot,
522*4882a593Smuzhiyun .mute_stream = tas2552_mute,
523*4882a593Smuzhiyun .no_capture_mute = 1,
524*4882a593Smuzhiyun };
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun /* Formats supported by TAS2552 driver. */
527*4882a593Smuzhiyun #define TAS2552_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
528*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun /* TAS2552 dai structure. */
531*4882a593Smuzhiyun static struct snd_soc_dai_driver tas2552_dai[] = {
532*4882a593Smuzhiyun {
533*4882a593Smuzhiyun .name = "tas2552-amplifier",
534*4882a593Smuzhiyun .playback = {
535*4882a593Smuzhiyun .stream_name = "Playback",
536*4882a593Smuzhiyun .channels_min = 2,
537*4882a593Smuzhiyun .channels_max = 2,
538*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_8000_192000,
539*4882a593Smuzhiyun .formats = TAS2552_FORMATS,
540*4882a593Smuzhiyun },
541*4882a593Smuzhiyun .ops = &tas2552_speaker_dai_ops,
542*4882a593Smuzhiyun },
543*4882a593Smuzhiyun };
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun /*
546*4882a593Smuzhiyun * DAC digital volumes. From -7 to 24 dB in 1 dB steps
547*4882a593Smuzhiyun */
548*4882a593Smuzhiyun static DECLARE_TLV_DB_SCALE(dac_tlv, -700, 100, 0);
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun static const char * const tas2552_din_source_select[] = {
551*4882a593Smuzhiyun "Muted",
552*4882a593Smuzhiyun "Left",
553*4882a593Smuzhiyun "Right",
554*4882a593Smuzhiyun "Left + Right average",
555*4882a593Smuzhiyun };
556*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(tas2552_din_source_enum,
557*4882a593Smuzhiyun TAS2552_CFG_3, 3,
558*4882a593Smuzhiyun tas2552_din_source_select);
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun static const struct snd_kcontrol_new tas2552_snd_controls[] = {
561*4882a593Smuzhiyun SOC_SINGLE_TLV("Speaker Driver Playback Volume",
562*4882a593Smuzhiyun TAS2552_PGA_GAIN, 0, 0x1f, 0, dac_tlv),
563*4882a593Smuzhiyun SOC_ENUM("DIN source", tas2552_din_source_enum),
564*4882a593Smuzhiyun };
565*4882a593Smuzhiyun
tas2552_component_probe(struct snd_soc_component * component)566*4882a593Smuzhiyun static int tas2552_component_probe(struct snd_soc_component *component)
567*4882a593Smuzhiyun {
568*4882a593Smuzhiyun struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
569*4882a593Smuzhiyun int ret;
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun tas2552->component = component;
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun ret = regulator_bulk_enable(ARRAY_SIZE(tas2552->supplies),
574*4882a593Smuzhiyun tas2552->supplies);
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun if (ret != 0) {
577*4882a593Smuzhiyun dev_err(component->dev, "Failed to enable supplies: %d\n",
578*4882a593Smuzhiyun ret);
579*4882a593Smuzhiyun return ret;
580*4882a593Smuzhiyun }
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun gpiod_set_value(tas2552->enable_gpio, 1);
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun ret = pm_runtime_get_sync(component->dev);
585*4882a593Smuzhiyun if (ret < 0) {
586*4882a593Smuzhiyun dev_err(component->dev, "Enabling device failed: %d\n",
587*4882a593Smuzhiyun ret);
588*4882a593Smuzhiyun goto probe_fail;
589*4882a593Smuzhiyun }
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun snd_soc_component_update_bits(component, TAS2552_CFG_1, TAS2552_MUTE, TAS2552_MUTE);
592*4882a593Smuzhiyun snd_soc_component_write(component, TAS2552_CFG_3, TAS2552_I2S_OUT_SEL |
593*4882a593Smuzhiyun TAS2552_DIN_SRC_SEL_AVG_L_R);
594*4882a593Smuzhiyun snd_soc_component_write(component, TAS2552_OUTPUT_DATA,
595*4882a593Smuzhiyun TAS2552_PDM_DATA_SEL_V_I |
596*4882a593Smuzhiyun TAS2552_R_DATA_OUT(TAS2552_DATA_OUT_V_DATA));
597*4882a593Smuzhiyun snd_soc_component_write(component, TAS2552_BOOST_APT_CTRL, TAS2552_APT_DELAY_200 |
598*4882a593Smuzhiyun TAS2552_APT_THRESH_20_17);
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun snd_soc_component_write(component, TAS2552_CFG_2, TAS2552_BOOST_EN | TAS2552_APT_EN |
601*4882a593Smuzhiyun TAS2552_LIM_EN);
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun return 0;
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun probe_fail:
606*4882a593Smuzhiyun pm_runtime_put_noidle(component->dev);
607*4882a593Smuzhiyun gpiod_set_value(tas2552->enable_gpio, 0);
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun regulator_bulk_disable(ARRAY_SIZE(tas2552->supplies),
610*4882a593Smuzhiyun tas2552->supplies);
611*4882a593Smuzhiyun return ret;
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun
tas2552_component_remove(struct snd_soc_component * component)614*4882a593Smuzhiyun static void tas2552_component_remove(struct snd_soc_component *component)
615*4882a593Smuzhiyun {
616*4882a593Smuzhiyun struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun pm_runtime_put(component->dev);
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun gpiod_set_value(tas2552->enable_gpio, 0);
621*4882a593Smuzhiyun };
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun #ifdef CONFIG_PM
tas2552_suspend(struct snd_soc_component * component)624*4882a593Smuzhiyun static int tas2552_suspend(struct snd_soc_component *component)
625*4882a593Smuzhiyun {
626*4882a593Smuzhiyun struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
627*4882a593Smuzhiyun int ret;
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun ret = regulator_bulk_disable(ARRAY_SIZE(tas2552->supplies),
630*4882a593Smuzhiyun tas2552->supplies);
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun if (ret != 0)
633*4882a593Smuzhiyun dev_err(component->dev, "Failed to disable supplies: %d\n",
634*4882a593Smuzhiyun ret);
635*4882a593Smuzhiyun return ret;
636*4882a593Smuzhiyun }
637*4882a593Smuzhiyun
tas2552_resume(struct snd_soc_component * component)638*4882a593Smuzhiyun static int tas2552_resume(struct snd_soc_component *component)
639*4882a593Smuzhiyun {
640*4882a593Smuzhiyun struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
641*4882a593Smuzhiyun int ret;
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun ret = regulator_bulk_enable(ARRAY_SIZE(tas2552->supplies),
644*4882a593Smuzhiyun tas2552->supplies);
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun if (ret != 0) {
647*4882a593Smuzhiyun dev_err(component->dev, "Failed to enable supplies: %d\n",
648*4882a593Smuzhiyun ret);
649*4882a593Smuzhiyun }
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun return ret;
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun #else
654*4882a593Smuzhiyun #define tas2552_suspend NULL
655*4882a593Smuzhiyun #define tas2552_resume NULL
656*4882a593Smuzhiyun #endif
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_dev_tas2552 = {
659*4882a593Smuzhiyun .probe = tas2552_component_probe,
660*4882a593Smuzhiyun .remove = tas2552_component_remove,
661*4882a593Smuzhiyun .suspend = tas2552_suspend,
662*4882a593Smuzhiyun .resume = tas2552_resume,
663*4882a593Smuzhiyun .controls = tas2552_snd_controls,
664*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(tas2552_snd_controls),
665*4882a593Smuzhiyun .dapm_widgets = tas2552_dapm_widgets,
666*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(tas2552_dapm_widgets),
667*4882a593Smuzhiyun .dapm_routes = tas2552_audio_map,
668*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(tas2552_audio_map),
669*4882a593Smuzhiyun .idle_bias_on = 1,
670*4882a593Smuzhiyun .endianness = 1,
671*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
672*4882a593Smuzhiyun };
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun static const struct regmap_config tas2552_regmap_config = {
675*4882a593Smuzhiyun .reg_bits = 8,
676*4882a593Smuzhiyun .val_bits = 8,
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun .max_register = TAS2552_MAX_REG,
679*4882a593Smuzhiyun .reg_defaults = tas2552_reg_defs,
680*4882a593Smuzhiyun .num_reg_defaults = ARRAY_SIZE(tas2552_reg_defs),
681*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
682*4882a593Smuzhiyun };
683*4882a593Smuzhiyun
tas2552_probe(struct i2c_client * client,const struct i2c_device_id * id)684*4882a593Smuzhiyun static int tas2552_probe(struct i2c_client *client,
685*4882a593Smuzhiyun const struct i2c_device_id *id)
686*4882a593Smuzhiyun {
687*4882a593Smuzhiyun struct device *dev;
688*4882a593Smuzhiyun struct tas2552_data *data;
689*4882a593Smuzhiyun int ret;
690*4882a593Smuzhiyun int i;
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun dev = &client->dev;
693*4882a593Smuzhiyun data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
694*4882a593Smuzhiyun if (data == NULL)
695*4882a593Smuzhiyun return -ENOMEM;
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun data->enable_gpio = devm_gpiod_get_optional(dev, "enable",
698*4882a593Smuzhiyun GPIOD_OUT_LOW);
699*4882a593Smuzhiyun if (IS_ERR(data->enable_gpio))
700*4882a593Smuzhiyun return PTR_ERR(data->enable_gpio);
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun data->tas2552_client = client;
703*4882a593Smuzhiyun data->regmap = devm_regmap_init_i2c(client, &tas2552_regmap_config);
704*4882a593Smuzhiyun if (IS_ERR(data->regmap)) {
705*4882a593Smuzhiyun ret = PTR_ERR(data->regmap);
706*4882a593Smuzhiyun dev_err(&client->dev, "Failed to allocate register map: %d\n",
707*4882a593Smuzhiyun ret);
708*4882a593Smuzhiyun return ret;
709*4882a593Smuzhiyun }
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(data->supplies); i++)
712*4882a593Smuzhiyun data->supplies[i].supply = tas2552_supply_names[i];
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(data->supplies),
715*4882a593Smuzhiyun data->supplies);
716*4882a593Smuzhiyun if (ret != 0) {
717*4882a593Smuzhiyun dev_err(dev, "Failed to request supplies: %d\n", ret);
718*4882a593Smuzhiyun return ret;
719*4882a593Smuzhiyun }
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun pm_runtime_set_active(&client->dev);
722*4882a593Smuzhiyun pm_runtime_set_autosuspend_delay(&client->dev, 1000);
723*4882a593Smuzhiyun pm_runtime_use_autosuspend(&client->dev);
724*4882a593Smuzhiyun pm_runtime_enable(&client->dev);
725*4882a593Smuzhiyun pm_runtime_mark_last_busy(&client->dev);
726*4882a593Smuzhiyun pm_runtime_put_sync_autosuspend(&client->dev);
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun dev_set_drvdata(&client->dev, data);
729*4882a593Smuzhiyun
730*4882a593Smuzhiyun ret = devm_snd_soc_register_component(&client->dev,
731*4882a593Smuzhiyun &soc_component_dev_tas2552,
732*4882a593Smuzhiyun tas2552_dai, ARRAY_SIZE(tas2552_dai));
733*4882a593Smuzhiyun if (ret < 0)
734*4882a593Smuzhiyun dev_err(&client->dev, "Failed to register component: %d\n", ret);
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun return ret;
737*4882a593Smuzhiyun }
738*4882a593Smuzhiyun
tas2552_i2c_remove(struct i2c_client * client)739*4882a593Smuzhiyun static int tas2552_i2c_remove(struct i2c_client *client)
740*4882a593Smuzhiyun {
741*4882a593Smuzhiyun pm_runtime_disable(&client->dev);
742*4882a593Smuzhiyun return 0;
743*4882a593Smuzhiyun }
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun static const struct i2c_device_id tas2552_id[] = {
746*4882a593Smuzhiyun { "tas2552", 0 },
747*4882a593Smuzhiyun { }
748*4882a593Smuzhiyun };
749*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, tas2552_id);
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_OF)
752*4882a593Smuzhiyun static const struct of_device_id tas2552_of_match[] = {
753*4882a593Smuzhiyun { .compatible = "ti,tas2552", },
754*4882a593Smuzhiyun {},
755*4882a593Smuzhiyun };
756*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, tas2552_of_match);
757*4882a593Smuzhiyun #endif
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun static struct i2c_driver tas2552_i2c_driver = {
760*4882a593Smuzhiyun .driver = {
761*4882a593Smuzhiyun .name = "tas2552",
762*4882a593Smuzhiyun .of_match_table = of_match_ptr(tas2552_of_match),
763*4882a593Smuzhiyun .pm = &tas2552_pm,
764*4882a593Smuzhiyun },
765*4882a593Smuzhiyun .probe = tas2552_probe,
766*4882a593Smuzhiyun .remove = tas2552_i2c_remove,
767*4882a593Smuzhiyun .id_table = tas2552_id,
768*4882a593Smuzhiyun };
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun module_i2c_driver(tas2552_i2c_driver);
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun MODULE_AUTHOR("Dan Muprhy <dmurphy@ti.com>");
773*4882a593Smuzhiyun MODULE_DESCRIPTION("TAS2552 Audio amplifier driver");
774*4882a593Smuzhiyun MODULE_LICENSE("GPL");
775