1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // File: sound/soc/codecs/ssm2602.c
4*4882a593Smuzhiyun // Author: Cliff Cai <Cliff.Cai@analog.com>
5*4882a593Smuzhiyun //
6*4882a593Smuzhiyun // Created: Tue June 06 2008
7*4882a593Smuzhiyun // Description: Driver for ssm2602 sound chip
8*4882a593Smuzhiyun //
9*4882a593Smuzhiyun // Modified:
10*4882a593Smuzhiyun // Copyright 2008 Analog Devices Inc.
11*4882a593Smuzhiyun //
12*4882a593Smuzhiyun // Bugs: Enter bugs at http://blackfin.uclinux.org/
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <linux/delay.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/regmap.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <sound/pcm.h>
20*4882a593Smuzhiyun #include <sound/pcm_params.h>
21*4882a593Smuzhiyun #include <sound/soc.h>
22*4882a593Smuzhiyun #include <sound/tlv.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #include "ssm2602.h"
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* codec private data */
27*4882a593Smuzhiyun struct ssm2602_priv {
28*4882a593Smuzhiyun unsigned int sysclk;
29*4882a593Smuzhiyun const struct snd_pcm_hw_constraint_list *sysclk_constraints;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun struct regmap *regmap;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun enum ssm2602_type type;
34*4882a593Smuzhiyun unsigned int clk_out_pwr;
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun /*
38*4882a593Smuzhiyun * ssm2602 register cache
39*4882a593Smuzhiyun * We can't read the ssm2602 register space when we are
40*4882a593Smuzhiyun * using 2 wire for device control, so we cache them instead.
41*4882a593Smuzhiyun * There is no point in caching the reset register
42*4882a593Smuzhiyun */
43*4882a593Smuzhiyun static const struct reg_default ssm2602_reg[SSM2602_CACHEREGNUM] = {
44*4882a593Smuzhiyun { .reg = 0x00, .def = 0x0097 },
45*4882a593Smuzhiyun { .reg = 0x01, .def = 0x0097 },
46*4882a593Smuzhiyun { .reg = 0x02, .def = 0x0079 },
47*4882a593Smuzhiyun { .reg = 0x03, .def = 0x0079 },
48*4882a593Smuzhiyun { .reg = 0x04, .def = 0x000a },
49*4882a593Smuzhiyun { .reg = 0x05, .def = 0x0008 },
50*4882a593Smuzhiyun { .reg = 0x06, .def = 0x009f },
51*4882a593Smuzhiyun { .reg = 0x07, .def = 0x000a },
52*4882a593Smuzhiyun { .reg = 0x08, .def = 0x0000 },
53*4882a593Smuzhiyun { .reg = 0x09, .def = 0x0000 }
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun /*Appending several "None"s just for OSS mixer use*/
58*4882a593Smuzhiyun static const char *ssm2602_input_select[] = {
59*4882a593Smuzhiyun "Line", "Mic",
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun static const char *ssm2602_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun static const struct soc_enum ssm2602_enum[] = {
65*4882a593Smuzhiyun SOC_ENUM_SINGLE(SSM2602_APANA, 2, ARRAY_SIZE(ssm2602_input_select),
66*4882a593Smuzhiyun ssm2602_input_select),
67*4882a593Smuzhiyun SOC_ENUM_SINGLE(SSM2602_APDIGI, 1, ARRAY_SIZE(ssm2602_deemph),
68*4882a593Smuzhiyun ssm2602_deemph),
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun static const DECLARE_TLV_DB_RANGE(ssm260x_outmix_tlv,
72*4882a593Smuzhiyun 0, 47, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 0),
73*4882a593Smuzhiyun 48, 127, TLV_DB_SCALE_ITEM(-7400, 100, 0)
74*4882a593Smuzhiyun );
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(ssm260x_inpga_tlv, -3450, 150, 0);
77*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(ssm260x_sidetone_tlv, -1500, 300, 0);
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun static const struct snd_kcontrol_new ssm260x_snd_controls[] = {
80*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Capture Volume", SSM2602_LINVOL, SSM2602_RINVOL, 0, 45, 0,
81*4882a593Smuzhiyun ssm260x_inpga_tlv),
82*4882a593Smuzhiyun SOC_DOUBLE_R("Capture Switch", SSM2602_LINVOL, SSM2602_RINVOL, 7, 1, 1),
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun SOC_SINGLE("ADC High Pass Filter Switch", SSM2602_APDIGI, 0, 1, 1),
85*4882a593Smuzhiyun SOC_SINGLE("Store DC Offset Switch", SSM2602_APDIGI, 4, 1, 0),
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun SOC_ENUM("Playback De-emphasis", ssm2602_enum[1]),
88*4882a593Smuzhiyun };
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun static const struct snd_kcontrol_new ssm2602_snd_controls[] = {
91*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Master Playback Volume", SSM2602_LOUT1V, SSM2602_ROUT1V,
92*4882a593Smuzhiyun 0, 127, 0, ssm260x_outmix_tlv),
93*4882a593Smuzhiyun SOC_DOUBLE_R("Master Playback ZC Switch", SSM2602_LOUT1V, SSM2602_ROUT1V,
94*4882a593Smuzhiyun 7, 1, 0),
95*4882a593Smuzhiyun SOC_SINGLE_TLV("Sidetone Playback Volume", SSM2602_APANA, 6, 3, 1,
96*4882a593Smuzhiyun ssm260x_sidetone_tlv),
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun SOC_SINGLE("Mic Boost (+20dB)", SSM2602_APANA, 0, 1, 0),
99*4882a593Smuzhiyun SOC_SINGLE("Mic Boost2 (+20dB)", SSM2602_APANA, 8, 1, 0),
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun /* Output Mixer */
103*4882a593Smuzhiyun static const struct snd_kcontrol_new ssm260x_output_mixer_controls[] = {
104*4882a593Smuzhiyun SOC_DAPM_SINGLE("Line Bypass Switch", SSM2602_APANA, 3, 1, 0),
105*4882a593Smuzhiyun SOC_DAPM_SINGLE("HiFi Playback Switch", SSM2602_APANA, 4, 1, 0),
106*4882a593Smuzhiyun SOC_DAPM_SINGLE("Mic Sidetone Switch", SSM2602_APANA, 5, 1, 0),
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun static const struct snd_kcontrol_new mic_ctl =
110*4882a593Smuzhiyun SOC_DAPM_SINGLE("Switch", SSM2602_APANA, 1, 1, 1);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun /* Input mux */
113*4882a593Smuzhiyun static const struct snd_kcontrol_new ssm2602_input_mux_controls =
114*4882a593Smuzhiyun SOC_DAPM_ENUM("Input Select", ssm2602_enum[0]);
115*4882a593Smuzhiyun
ssm2602_mic_switch_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)116*4882a593Smuzhiyun static int ssm2602_mic_switch_event(struct snd_soc_dapm_widget *w,
117*4882a593Smuzhiyun struct snd_kcontrol *kcontrol, int event)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun /*
120*4882a593Smuzhiyun * According to the ssm2603 data sheet (control register sequencing),
121*4882a593Smuzhiyun * the digital core should be activated only after all necessary bits
122*4882a593Smuzhiyun * in the power register are enabled, and a delay determined by the
123*4882a593Smuzhiyun * decoupling capacitor on the VMID pin has passed. If the digital core
124*4882a593Smuzhiyun * is activated too early, or even before the ADC is powered up, audible
125*4882a593Smuzhiyun * artifacts appear at the beginning and end of the recorded signal.
126*4882a593Smuzhiyun *
127*4882a593Smuzhiyun * In practice, audible artifacts disappear well over 500 ms.
128*4882a593Smuzhiyun */
129*4882a593Smuzhiyun msleep(500);
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun return 0;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun static const struct snd_soc_dapm_widget ssm260x_dapm_widgets[] = {
135*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC", "HiFi Playback", SSM2602_PWR, 3, 1),
136*4882a593Smuzhiyun SND_SOC_DAPM_ADC("ADC", "HiFi Capture", SSM2602_PWR, 2, 1),
137*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Line Input", SSM2602_PWR, 0, 1, NULL, 0),
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("Digital Core Power", SSM2602_ACTIVE, 0, 0, NULL, 0),
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("LOUT"),
142*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("ROUT"),
143*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("RLINEIN"),
144*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LLINEIN"),
145*4882a593Smuzhiyun };
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun static const struct snd_soc_dapm_widget ssm2602_dapm_widgets[] = {
148*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Output Mixer", SSM2602_PWR, 4, 1,
149*4882a593Smuzhiyun ssm260x_output_mixer_controls,
150*4882a593Smuzhiyun ARRAY_SIZE(ssm260x_output_mixer_controls)),
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, &ssm2602_input_mux_controls),
153*4882a593Smuzhiyun SND_SOC_DAPM_MICBIAS("Mic Bias", SSM2602_PWR, 1, 1),
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun SND_SOC_DAPM_SWITCH_E("Mic Switch", SSM2602_APANA, 1, 1, &mic_ctl,
156*4882a593Smuzhiyun ssm2602_mic_switch_event, SND_SOC_DAPM_PRE_PMU),
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("LHPOUT"),
159*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("RHPOUT"),
160*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("MICIN"),
161*4882a593Smuzhiyun };
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun static const struct snd_soc_dapm_widget ssm2604_dapm_widgets[] = {
164*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Output Mixer", SND_SOC_NOPM, 0, 0,
165*4882a593Smuzhiyun ssm260x_output_mixer_controls,
166*4882a593Smuzhiyun ARRAY_SIZE(ssm260x_output_mixer_controls) - 1), /* Last element is the mic */
167*4882a593Smuzhiyun };
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun static const struct snd_soc_dapm_route ssm260x_routes[] = {
170*4882a593Smuzhiyun {"DAC", NULL, "Digital Core Power"},
171*4882a593Smuzhiyun {"ADC", NULL, "Digital Core Power"},
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun {"Output Mixer", "Line Bypass Switch", "Line Input"},
174*4882a593Smuzhiyun {"Output Mixer", "HiFi Playback Switch", "DAC"},
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun {"ROUT", NULL, "Output Mixer"},
177*4882a593Smuzhiyun {"LOUT", NULL, "Output Mixer"},
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun {"Line Input", NULL, "LLINEIN"},
180*4882a593Smuzhiyun {"Line Input", NULL, "RLINEIN"},
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun static const struct snd_soc_dapm_route ssm2602_routes[] = {
184*4882a593Smuzhiyun {"Output Mixer", "Mic Sidetone Switch", "Mic Bias"},
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun {"RHPOUT", NULL, "Output Mixer"},
187*4882a593Smuzhiyun {"LHPOUT", NULL, "Output Mixer"},
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun {"Input Mux", "Line", "Line Input"},
190*4882a593Smuzhiyun {"Input Mux", "Mic", "Mic Switch"},
191*4882a593Smuzhiyun {"ADC", NULL, "Input Mux"},
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun {"Mic Switch", NULL, "Mic Bias"},
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun {"Mic Bias", NULL, "MICIN"},
196*4882a593Smuzhiyun };
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun static const struct snd_soc_dapm_route ssm2604_routes[] = {
199*4882a593Smuzhiyun {"ADC", NULL, "Line Input"},
200*4882a593Smuzhiyun };
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun static const unsigned int ssm2602_rates_12288000[] = {
203*4882a593Smuzhiyun 8000, 16000, 32000, 48000, 96000,
204*4882a593Smuzhiyun };
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list ssm2602_constraints_12288000 = {
207*4882a593Smuzhiyun .list = ssm2602_rates_12288000,
208*4882a593Smuzhiyun .count = ARRAY_SIZE(ssm2602_rates_12288000),
209*4882a593Smuzhiyun };
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun static const unsigned int ssm2602_rates_11289600[] = {
212*4882a593Smuzhiyun 8000, 11025, 22050, 44100, 88200,
213*4882a593Smuzhiyun };
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list ssm2602_constraints_11289600 = {
216*4882a593Smuzhiyun .list = ssm2602_rates_11289600,
217*4882a593Smuzhiyun .count = ARRAY_SIZE(ssm2602_rates_11289600),
218*4882a593Smuzhiyun };
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun struct ssm2602_coeff {
221*4882a593Smuzhiyun u32 mclk;
222*4882a593Smuzhiyun u32 rate;
223*4882a593Smuzhiyun u8 srate;
224*4882a593Smuzhiyun };
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun #define SSM2602_COEFF_SRATE(sr, bosr, usb) (((sr) << 2) | ((bosr) << 1) | (usb))
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /* codec mclk clock coefficients */
229*4882a593Smuzhiyun static const struct ssm2602_coeff ssm2602_coeff_table[] = {
230*4882a593Smuzhiyun /* 48k */
231*4882a593Smuzhiyun {12288000, 48000, SSM2602_COEFF_SRATE(0x0, 0x0, 0x0)},
232*4882a593Smuzhiyun {18432000, 48000, SSM2602_COEFF_SRATE(0x0, 0x1, 0x0)},
233*4882a593Smuzhiyun {12000000, 48000, SSM2602_COEFF_SRATE(0x0, 0x0, 0x1)},
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun /* 32k */
236*4882a593Smuzhiyun {12288000, 32000, SSM2602_COEFF_SRATE(0x6, 0x0, 0x0)},
237*4882a593Smuzhiyun {18432000, 32000, SSM2602_COEFF_SRATE(0x6, 0x1, 0x0)},
238*4882a593Smuzhiyun {12000000, 32000, SSM2602_COEFF_SRATE(0x6, 0x0, 0x1)},
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun /* 16k */
241*4882a593Smuzhiyun {12288000, 16000, SSM2602_COEFF_SRATE(0x5, 0x0, 0x0)},
242*4882a593Smuzhiyun {18432000, 16000, SSM2602_COEFF_SRATE(0x5, 0x1, 0x0)},
243*4882a593Smuzhiyun {12000000, 16000, SSM2602_COEFF_SRATE(0xa, 0x0, 0x1)},
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun /* 8k */
246*4882a593Smuzhiyun {12288000, 8000, SSM2602_COEFF_SRATE(0x3, 0x0, 0x0)},
247*4882a593Smuzhiyun {18432000, 8000, SSM2602_COEFF_SRATE(0x3, 0x1, 0x0)},
248*4882a593Smuzhiyun {11289600, 8000, SSM2602_COEFF_SRATE(0xb, 0x0, 0x0)},
249*4882a593Smuzhiyun {16934400, 8000, SSM2602_COEFF_SRATE(0xb, 0x1, 0x0)},
250*4882a593Smuzhiyun {12000000, 8000, SSM2602_COEFF_SRATE(0x3, 0x0, 0x1)},
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun /* 96k */
253*4882a593Smuzhiyun {12288000, 96000, SSM2602_COEFF_SRATE(0x7, 0x0, 0x0)},
254*4882a593Smuzhiyun {18432000, 96000, SSM2602_COEFF_SRATE(0x7, 0x1, 0x0)},
255*4882a593Smuzhiyun {12000000, 96000, SSM2602_COEFF_SRATE(0x7, 0x0, 0x1)},
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun /* 11.025k */
258*4882a593Smuzhiyun {11289600, 11025, SSM2602_COEFF_SRATE(0xc, 0x0, 0x0)},
259*4882a593Smuzhiyun {16934400, 11025, SSM2602_COEFF_SRATE(0xc, 0x1, 0x0)},
260*4882a593Smuzhiyun {12000000, 11025, SSM2602_COEFF_SRATE(0xc, 0x1, 0x1)},
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun /* 22.05k */
263*4882a593Smuzhiyun {11289600, 22050, SSM2602_COEFF_SRATE(0xd, 0x0, 0x0)},
264*4882a593Smuzhiyun {16934400, 22050, SSM2602_COEFF_SRATE(0xd, 0x1, 0x0)},
265*4882a593Smuzhiyun {12000000, 22050, SSM2602_COEFF_SRATE(0xd, 0x1, 0x1)},
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun /* 44.1k */
268*4882a593Smuzhiyun {11289600, 44100, SSM2602_COEFF_SRATE(0x8, 0x0, 0x0)},
269*4882a593Smuzhiyun {16934400, 44100, SSM2602_COEFF_SRATE(0x8, 0x1, 0x0)},
270*4882a593Smuzhiyun {12000000, 44100, SSM2602_COEFF_SRATE(0x8, 0x1, 0x1)},
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun /* 88.2k */
273*4882a593Smuzhiyun {11289600, 88200, SSM2602_COEFF_SRATE(0xf, 0x0, 0x0)},
274*4882a593Smuzhiyun {16934400, 88200, SSM2602_COEFF_SRATE(0xf, 0x1, 0x0)},
275*4882a593Smuzhiyun {12000000, 88200, SSM2602_COEFF_SRATE(0xf, 0x1, 0x1)},
276*4882a593Smuzhiyun };
277*4882a593Smuzhiyun
ssm2602_get_coeff(int mclk,int rate)278*4882a593Smuzhiyun static inline int ssm2602_get_coeff(int mclk, int rate)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun int i;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(ssm2602_coeff_table); i++) {
283*4882a593Smuzhiyun if (ssm2602_coeff_table[i].rate == rate &&
284*4882a593Smuzhiyun ssm2602_coeff_table[i].mclk == mclk)
285*4882a593Smuzhiyun return ssm2602_coeff_table[i].srate;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun return -EINVAL;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
ssm2602_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)290*4882a593Smuzhiyun static int ssm2602_hw_params(struct snd_pcm_substream *substream,
291*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
292*4882a593Smuzhiyun struct snd_soc_dai *dai)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
295*4882a593Smuzhiyun struct ssm2602_priv *ssm2602 = snd_soc_component_get_drvdata(component);
296*4882a593Smuzhiyun int srate = ssm2602_get_coeff(ssm2602->sysclk, params_rate(params));
297*4882a593Smuzhiyun unsigned int iface;
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun if (srate < 0)
300*4882a593Smuzhiyun return srate;
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun regmap_write(ssm2602->regmap, SSM2602_SRATE, srate);
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun /* bit size */
305*4882a593Smuzhiyun switch (params_width(params)) {
306*4882a593Smuzhiyun case 16:
307*4882a593Smuzhiyun iface = 0x0;
308*4882a593Smuzhiyun break;
309*4882a593Smuzhiyun case 20:
310*4882a593Smuzhiyun iface = 0x4;
311*4882a593Smuzhiyun break;
312*4882a593Smuzhiyun case 24:
313*4882a593Smuzhiyun iface = 0x8;
314*4882a593Smuzhiyun break;
315*4882a593Smuzhiyun case 32:
316*4882a593Smuzhiyun iface = 0xc;
317*4882a593Smuzhiyun break;
318*4882a593Smuzhiyun default:
319*4882a593Smuzhiyun return -EINVAL;
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun regmap_update_bits(ssm2602->regmap, SSM2602_IFACE,
322*4882a593Smuzhiyun IFACE_AUDIO_DATA_LEN, iface);
323*4882a593Smuzhiyun return 0;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
ssm2602_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)326*4882a593Smuzhiyun static int ssm2602_startup(struct snd_pcm_substream *substream,
327*4882a593Smuzhiyun struct snd_soc_dai *dai)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
330*4882a593Smuzhiyun struct ssm2602_priv *ssm2602 = snd_soc_component_get_drvdata(component);
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun if (ssm2602->sysclk_constraints) {
333*4882a593Smuzhiyun snd_pcm_hw_constraint_list(substream->runtime, 0,
334*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_RATE,
335*4882a593Smuzhiyun ssm2602->sysclk_constraints);
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun return 0;
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun
ssm2602_mute(struct snd_soc_dai * dai,int mute,int direction)341*4882a593Smuzhiyun static int ssm2602_mute(struct snd_soc_dai *dai, int mute, int direction)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun struct ssm2602_priv *ssm2602 = snd_soc_component_get_drvdata(dai->component);
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun if (mute)
346*4882a593Smuzhiyun regmap_update_bits(ssm2602->regmap, SSM2602_APDIGI,
347*4882a593Smuzhiyun APDIGI_ENABLE_DAC_MUTE,
348*4882a593Smuzhiyun APDIGI_ENABLE_DAC_MUTE);
349*4882a593Smuzhiyun else
350*4882a593Smuzhiyun regmap_update_bits(ssm2602->regmap, SSM2602_APDIGI,
351*4882a593Smuzhiyun APDIGI_ENABLE_DAC_MUTE, 0);
352*4882a593Smuzhiyun return 0;
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun
ssm2602_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)355*4882a593Smuzhiyun static int ssm2602_set_dai_sysclk(struct snd_soc_dai *codec_dai,
356*4882a593Smuzhiyun int clk_id, unsigned int freq, int dir)
357*4882a593Smuzhiyun {
358*4882a593Smuzhiyun struct snd_soc_component *component = codec_dai->component;
359*4882a593Smuzhiyun struct ssm2602_priv *ssm2602 = snd_soc_component_get_drvdata(component);
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun if (dir == SND_SOC_CLOCK_IN) {
362*4882a593Smuzhiyun if (clk_id != SSM2602_SYSCLK)
363*4882a593Smuzhiyun return -EINVAL;
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun switch (freq) {
366*4882a593Smuzhiyun case 12288000:
367*4882a593Smuzhiyun case 18432000:
368*4882a593Smuzhiyun ssm2602->sysclk_constraints = &ssm2602_constraints_12288000;
369*4882a593Smuzhiyun break;
370*4882a593Smuzhiyun case 11289600:
371*4882a593Smuzhiyun case 16934400:
372*4882a593Smuzhiyun ssm2602->sysclk_constraints = &ssm2602_constraints_11289600;
373*4882a593Smuzhiyun break;
374*4882a593Smuzhiyun case 12000000:
375*4882a593Smuzhiyun ssm2602->sysclk_constraints = NULL;
376*4882a593Smuzhiyun break;
377*4882a593Smuzhiyun default:
378*4882a593Smuzhiyun return -EINVAL;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun ssm2602->sysclk = freq;
381*4882a593Smuzhiyun } else {
382*4882a593Smuzhiyun unsigned int mask;
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun switch (clk_id) {
385*4882a593Smuzhiyun case SSM2602_CLK_CLKOUT:
386*4882a593Smuzhiyun mask = PWR_CLK_OUT_PDN;
387*4882a593Smuzhiyun break;
388*4882a593Smuzhiyun case SSM2602_CLK_XTO:
389*4882a593Smuzhiyun mask = PWR_OSC_PDN;
390*4882a593Smuzhiyun break;
391*4882a593Smuzhiyun default:
392*4882a593Smuzhiyun return -EINVAL;
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun if (freq == 0)
396*4882a593Smuzhiyun ssm2602->clk_out_pwr |= mask;
397*4882a593Smuzhiyun else
398*4882a593Smuzhiyun ssm2602->clk_out_pwr &= ~mask;
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun regmap_update_bits(ssm2602->regmap, SSM2602_PWR,
401*4882a593Smuzhiyun PWR_CLK_OUT_PDN | PWR_OSC_PDN, ssm2602->clk_out_pwr);
402*4882a593Smuzhiyun }
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun return 0;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun
ssm2602_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)407*4882a593Smuzhiyun static int ssm2602_set_dai_fmt(struct snd_soc_dai *codec_dai,
408*4882a593Smuzhiyun unsigned int fmt)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun struct ssm2602_priv *ssm2602 = snd_soc_component_get_drvdata(codec_dai->component);
411*4882a593Smuzhiyun unsigned int iface = 0;
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun /* set master/slave audio interface */
414*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
415*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBM_CFM:
416*4882a593Smuzhiyun iface |= 0x0040;
417*4882a593Smuzhiyun break;
418*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBS_CFS:
419*4882a593Smuzhiyun break;
420*4882a593Smuzhiyun default:
421*4882a593Smuzhiyun return -EINVAL;
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun /* interface format */
425*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
426*4882a593Smuzhiyun case SND_SOC_DAIFMT_I2S:
427*4882a593Smuzhiyun iface |= 0x0002;
428*4882a593Smuzhiyun break;
429*4882a593Smuzhiyun case SND_SOC_DAIFMT_RIGHT_J:
430*4882a593Smuzhiyun break;
431*4882a593Smuzhiyun case SND_SOC_DAIFMT_LEFT_J:
432*4882a593Smuzhiyun iface |= 0x0001;
433*4882a593Smuzhiyun break;
434*4882a593Smuzhiyun case SND_SOC_DAIFMT_DSP_A:
435*4882a593Smuzhiyun iface |= 0x0013;
436*4882a593Smuzhiyun break;
437*4882a593Smuzhiyun case SND_SOC_DAIFMT_DSP_B:
438*4882a593Smuzhiyun iface |= 0x0003;
439*4882a593Smuzhiyun break;
440*4882a593Smuzhiyun default:
441*4882a593Smuzhiyun return -EINVAL;
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun /* clock inversion */
445*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
446*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_NF:
447*4882a593Smuzhiyun break;
448*4882a593Smuzhiyun case SND_SOC_DAIFMT_IB_IF:
449*4882a593Smuzhiyun iface |= 0x0090;
450*4882a593Smuzhiyun break;
451*4882a593Smuzhiyun case SND_SOC_DAIFMT_IB_NF:
452*4882a593Smuzhiyun iface |= 0x0080;
453*4882a593Smuzhiyun break;
454*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_IF:
455*4882a593Smuzhiyun iface |= 0x0010;
456*4882a593Smuzhiyun break;
457*4882a593Smuzhiyun default:
458*4882a593Smuzhiyun return -EINVAL;
459*4882a593Smuzhiyun }
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun /* set iface */
462*4882a593Smuzhiyun regmap_write(ssm2602->regmap, SSM2602_IFACE, iface);
463*4882a593Smuzhiyun return 0;
464*4882a593Smuzhiyun }
465*4882a593Smuzhiyun
ssm2602_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)466*4882a593Smuzhiyun static int ssm2602_set_bias_level(struct snd_soc_component *component,
467*4882a593Smuzhiyun enum snd_soc_bias_level level)
468*4882a593Smuzhiyun {
469*4882a593Smuzhiyun struct ssm2602_priv *ssm2602 = snd_soc_component_get_drvdata(component);
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun switch (level) {
472*4882a593Smuzhiyun case SND_SOC_BIAS_ON:
473*4882a593Smuzhiyun /* vref/mid on, osc and clkout on if enabled */
474*4882a593Smuzhiyun regmap_update_bits(ssm2602->regmap, SSM2602_PWR,
475*4882a593Smuzhiyun PWR_POWER_OFF | PWR_CLK_OUT_PDN | PWR_OSC_PDN,
476*4882a593Smuzhiyun ssm2602->clk_out_pwr);
477*4882a593Smuzhiyun break;
478*4882a593Smuzhiyun case SND_SOC_BIAS_PREPARE:
479*4882a593Smuzhiyun break;
480*4882a593Smuzhiyun case SND_SOC_BIAS_STANDBY:
481*4882a593Smuzhiyun /* everything off except vref/vmid, */
482*4882a593Smuzhiyun regmap_update_bits(ssm2602->regmap, SSM2602_PWR,
483*4882a593Smuzhiyun PWR_POWER_OFF | PWR_CLK_OUT_PDN | PWR_OSC_PDN,
484*4882a593Smuzhiyun PWR_CLK_OUT_PDN | PWR_OSC_PDN);
485*4882a593Smuzhiyun break;
486*4882a593Smuzhiyun case SND_SOC_BIAS_OFF:
487*4882a593Smuzhiyun /* everything off */
488*4882a593Smuzhiyun regmap_update_bits(ssm2602->regmap, SSM2602_PWR,
489*4882a593Smuzhiyun PWR_POWER_OFF, PWR_POWER_OFF);
490*4882a593Smuzhiyun break;
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun return 0;
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun #define SSM2602_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
497*4882a593Smuzhiyun SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
498*4882a593Smuzhiyun SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
499*4882a593Smuzhiyun SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\
500*4882a593Smuzhiyun SNDRV_PCM_RATE_96000)
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun #define SSM2602_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
503*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun static const struct snd_soc_dai_ops ssm2602_dai_ops = {
506*4882a593Smuzhiyun .startup = ssm2602_startup,
507*4882a593Smuzhiyun .hw_params = ssm2602_hw_params,
508*4882a593Smuzhiyun .mute_stream = ssm2602_mute,
509*4882a593Smuzhiyun .set_sysclk = ssm2602_set_dai_sysclk,
510*4882a593Smuzhiyun .set_fmt = ssm2602_set_dai_fmt,
511*4882a593Smuzhiyun .no_capture_mute = 1,
512*4882a593Smuzhiyun };
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun static struct snd_soc_dai_driver ssm2602_dai = {
515*4882a593Smuzhiyun .name = "ssm2602-hifi",
516*4882a593Smuzhiyun .playback = {
517*4882a593Smuzhiyun .stream_name = "Playback",
518*4882a593Smuzhiyun .channels_min = 2,
519*4882a593Smuzhiyun .channels_max = 2,
520*4882a593Smuzhiyun .rates = SSM2602_RATES,
521*4882a593Smuzhiyun .formats = SSM2602_FORMATS,},
522*4882a593Smuzhiyun .capture = {
523*4882a593Smuzhiyun .stream_name = "Capture",
524*4882a593Smuzhiyun .channels_min = 2,
525*4882a593Smuzhiyun .channels_max = 2,
526*4882a593Smuzhiyun .rates = SSM2602_RATES,
527*4882a593Smuzhiyun .formats = SSM2602_FORMATS,},
528*4882a593Smuzhiyun .ops = &ssm2602_dai_ops,
529*4882a593Smuzhiyun .symmetric_rates = 1,
530*4882a593Smuzhiyun .symmetric_samplebits = 1,
531*4882a593Smuzhiyun };
532*4882a593Smuzhiyun
ssm2602_resume(struct snd_soc_component * component)533*4882a593Smuzhiyun static int ssm2602_resume(struct snd_soc_component *component)
534*4882a593Smuzhiyun {
535*4882a593Smuzhiyun struct ssm2602_priv *ssm2602 = snd_soc_component_get_drvdata(component);
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun regcache_sync(ssm2602->regmap);
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun return 0;
540*4882a593Smuzhiyun }
541*4882a593Smuzhiyun
ssm2602_component_probe(struct snd_soc_component * component)542*4882a593Smuzhiyun static int ssm2602_component_probe(struct snd_soc_component *component)
543*4882a593Smuzhiyun {
544*4882a593Smuzhiyun struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
545*4882a593Smuzhiyun struct ssm2602_priv *ssm2602 = snd_soc_component_get_drvdata(component);
546*4882a593Smuzhiyun int ret;
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun regmap_update_bits(ssm2602->regmap, SSM2602_LOUT1V,
549*4882a593Smuzhiyun LOUT1V_LRHP_BOTH, LOUT1V_LRHP_BOTH);
550*4882a593Smuzhiyun regmap_update_bits(ssm2602->regmap, SSM2602_ROUT1V,
551*4882a593Smuzhiyun ROUT1V_RLHP_BOTH, ROUT1V_RLHP_BOTH);
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun ret = snd_soc_add_component_controls(component, ssm2602_snd_controls,
554*4882a593Smuzhiyun ARRAY_SIZE(ssm2602_snd_controls));
555*4882a593Smuzhiyun if (ret)
556*4882a593Smuzhiyun return ret;
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun ret = snd_soc_dapm_new_controls(dapm, ssm2602_dapm_widgets,
559*4882a593Smuzhiyun ARRAY_SIZE(ssm2602_dapm_widgets));
560*4882a593Smuzhiyun if (ret)
561*4882a593Smuzhiyun return ret;
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun return snd_soc_dapm_add_routes(dapm, ssm2602_routes,
564*4882a593Smuzhiyun ARRAY_SIZE(ssm2602_routes));
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun
ssm2604_component_probe(struct snd_soc_component * component)567*4882a593Smuzhiyun static int ssm2604_component_probe(struct snd_soc_component *component)
568*4882a593Smuzhiyun {
569*4882a593Smuzhiyun struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
570*4882a593Smuzhiyun int ret;
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun ret = snd_soc_dapm_new_controls(dapm, ssm2604_dapm_widgets,
573*4882a593Smuzhiyun ARRAY_SIZE(ssm2604_dapm_widgets));
574*4882a593Smuzhiyun if (ret)
575*4882a593Smuzhiyun return ret;
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun return snd_soc_dapm_add_routes(dapm, ssm2604_routes,
578*4882a593Smuzhiyun ARRAY_SIZE(ssm2604_routes));
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun
ssm260x_component_probe(struct snd_soc_component * component)581*4882a593Smuzhiyun static int ssm260x_component_probe(struct snd_soc_component *component)
582*4882a593Smuzhiyun {
583*4882a593Smuzhiyun struct ssm2602_priv *ssm2602 = snd_soc_component_get_drvdata(component);
584*4882a593Smuzhiyun int ret;
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun ret = regmap_write(ssm2602->regmap, SSM2602_RESET, 0);
587*4882a593Smuzhiyun if (ret < 0) {
588*4882a593Smuzhiyun dev_err(component->dev, "Failed to issue reset: %d\n", ret);
589*4882a593Smuzhiyun return ret;
590*4882a593Smuzhiyun }
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun /* set the update bits */
593*4882a593Smuzhiyun regmap_update_bits(ssm2602->regmap, SSM2602_LINVOL,
594*4882a593Smuzhiyun LINVOL_LRIN_BOTH, LINVOL_LRIN_BOTH);
595*4882a593Smuzhiyun regmap_update_bits(ssm2602->regmap, SSM2602_RINVOL,
596*4882a593Smuzhiyun RINVOL_RLIN_BOTH, RINVOL_RLIN_BOTH);
597*4882a593Smuzhiyun /*select Line in as default input*/
598*4882a593Smuzhiyun regmap_write(ssm2602->regmap, SSM2602_APANA, APANA_SELECT_DAC |
599*4882a593Smuzhiyun APANA_ENABLE_MIC_BOOST);
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun switch (ssm2602->type) {
602*4882a593Smuzhiyun case SSM2602:
603*4882a593Smuzhiyun ret = ssm2602_component_probe(component);
604*4882a593Smuzhiyun break;
605*4882a593Smuzhiyun case SSM2604:
606*4882a593Smuzhiyun ret = ssm2604_component_probe(component);
607*4882a593Smuzhiyun break;
608*4882a593Smuzhiyun }
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun return ret;
611*4882a593Smuzhiyun }
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_dev_ssm2602 = {
614*4882a593Smuzhiyun .probe = ssm260x_component_probe,
615*4882a593Smuzhiyun .resume = ssm2602_resume,
616*4882a593Smuzhiyun .set_bias_level = ssm2602_set_bias_level,
617*4882a593Smuzhiyun .controls = ssm260x_snd_controls,
618*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(ssm260x_snd_controls),
619*4882a593Smuzhiyun .dapm_widgets = ssm260x_dapm_widgets,
620*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(ssm260x_dapm_widgets),
621*4882a593Smuzhiyun .dapm_routes = ssm260x_routes,
622*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(ssm260x_routes),
623*4882a593Smuzhiyun .suspend_bias_off = 1,
624*4882a593Smuzhiyun .idle_bias_on = 1,
625*4882a593Smuzhiyun .use_pmdown_time = 1,
626*4882a593Smuzhiyun .endianness = 1,
627*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
628*4882a593Smuzhiyun };
629*4882a593Smuzhiyun
ssm2602_register_volatile(struct device * dev,unsigned int reg)630*4882a593Smuzhiyun static bool ssm2602_register_volatile(struct device *dev, unsigned int reg)
631*4882a593Smuzhiyun {
632*4882a593Smuzhiyun return reg == SSM2602_RESET;
633*4882a593Smuzhiyun }
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun const struct regmap_config ssm2602_regmap_config = {
636*4882a593Smuzhiyun .val_bits = 9,
637*4882a593Smuzhiyun .reg_bits = 7,
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun .max_register = SSM2602_RESET,
640*4882a593Smuzhiyun .volatile_reg = ssm2602_register_volatile,
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
643*4882a593Smuzhiyun .reg_defaults = ssm2602_reg,
644*4882a593Smuzhiyun .num_reg_defaults = ARRAY_SIZE(ssm2602_reg),
645*4882a593Smuzhiyun };
646*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ssm2602_regmap_config);
647*4882a593Smuzhiyun
ssm2602_probe(struct device * dev,enum ssm2602_type type,struct regmap * regmap)648*4882a593Smuzhiyun int ssm2602_probe(struct device *dev, enum ssm2602_type type,
649*4882a593Smuzhiyun struct regmap *regmap)
650*4882a593Smuzhiyun {
651*4882a593Smuzhiyun struct ssm2602_priv *ssm2602;
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun if (IS_ERR(regmap))
654*4882a593Smuzhiyun return PTR_ERR(regmap);
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun ssm2602 = devm_kzalloc(dev, sizeof(*ssm2602), GFP_KERNEL);
657*4882a593Smuzhiyun if (ssm2602 == NULL)
658*4882a593Smuzhiyun return -ENOMEM;
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun dev_set_drvdata(dev, ssm2602);
661*4882a593Smuzhiyun ssm2602->type = type;
662*4882a593Smuzhiyun ssm2602->regmap = regmap;
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun return devm_snd_soc_register_component(dev, &soc_component_dev_ssm2602,
665*4882a593Smuzhiyun &ssm2602_dai, 1);
666*4882a593Smuzhiyun }
667*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ssm2602_probe);
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC SSM2602/SSM2603/SSM2604 driver");
670*4882a593Smuzhiyun MODULE_AUTHOR("Cliff Cai");
671*4882a593Smuzhiyun MODULE_LICENSE("GPL");
672