1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * SiRF inner codec controllers define 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _SIRF_AUDIO_CODEC_H 9*4882a593Smuzhiyun #define _SIRF_AUDIO_CODEC_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define AUDIO_IC_CODEC_PWR (0x00E0) 13*4882a593Smuzhiyun #define AUDIO_IC_CODEC_CTRL0 (0x00E4) 14*4882a593Smuzhiyun #define AUDIO_IC_CODEC_CTRL1 (0x00E8) 15*4882a593Smuzhiyun #define AUDIO_IC_CODEC_CTRL2 (0x00EC) 16*4882a593Smuzhiyun #define AUDIO_IC_CODEC_CTRL3 (0x00F0) 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define MICBIASEN (1 << 3) 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define IC_RDACEN (1 << 0) 21*4882a593Smuzhiyun #define IC_LDACEN (1 << 1) 22*4882a593Smuzhiyun #define IC_HSREN (1 << 2) 23*4882a593Smuzhiyun #define IC_HSLEN (1 << 3) 24*4882a593Smuzhiyun #define IC_SPEN (1 << 4) 25*4882a593Smuzhiyun #define IC_CPEN (1 << 5) 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #define IC_HPRSELR (1 << 6) 28*4882a593Smuzhiyun #define IC_HPLSELR (1 << 7) 29*4882a593Smuzhiyun #define IC_HPRSELL (1 << 8) 30*4882a593Smuzhiyun #define IC_HPLSELL (1 << 9) 31*4882a593Smuzhiyun #define IC_SPSELR (1 << 10) 32*4882a593Smuzhiyun #define IC_SPSELL (1 << 11) 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define IC_MONOR (1 << 12) 35*4882a593Smuzhiyun #define IC_MONOL (1 << 13) 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define IC_RXOSRSEL (1 << 28) 38*4882a593Smuzhiyun #define IC_CPFREQ (1 << 29) 39*4882a593Smuzhiyun #define IC_HSINVEN (1 << 30) 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #define IC_MICINREN (1 << 0) 42*4882a593Smuzhiyun #define IC_MICINLEN (1 << 1) 43*4882a593Smuzhiyun #define IC_MICIN1SEL (1 << 2) 44*4882a593Smuzhiyun #define IC_MICIN2SEL (1 << 3) 45*4882a593Smuzhiyun #define IC_MICDIFSEL (1 << 4) 46*4882a593Smuzhiyun #define IC_LINEIN1SEL (1 << 5) 47*4882a593Smuzhiyun #define IC_LINEIN2SEL (1 << 6) 48*4882a593Smuzhiyun #define IC_RADCEN (1 << 7) 49*4882a593Smuzhiyun #define IC_LADCEN (1 << 8) 50*4882a593Smuzhiyun #define IC_ALM (1 << 9) 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #define IC_DIGMICEN (1 << 22) 53*4882a593Smuzhiyun #define IC_DIGMICFREQ (1 << 23) 54*4882a593Smuzhiyun #define IC_ADC14B_12 (1 << 24) 55*4882a593Smuzhiyun #define IC_FIRDAC_HSL_EN (1 << 25) 56*4882a593Smuzhiyun #define IC_FIRDAC_HSR_EN (1 << 26) 57*4882a593Smuzhiyun #define IC_FIRDAC_LOUT_EN (1 << 27) 58*4882a593Smuzhiyun #define IC_POR (1 << 28) 59*4882a593Smuzhiyun #define IC_CODEC_CLK_EN (1 << 29) 60*4882a593Smuzhiyun #define IC_HP_3DB_BOOST (1 << 30) 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun #define IC_ADC_LEFT_GAIN_SHIFT 16 63*4882a593Smuzhiyun #define IC_ADC_RIGHT_GAIN_SHIFT 10 64*4882a593Smuzhiyun #define IC_ADC_GAIN_MASK 0x3F 65*4882a593Smuzhiyun #define IC_MIC_MAX_GAIN 0x39 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun #define IC_RXPGAR_MASK 0x3F 68*4882a593Smuzhiyun #define IC_RXPGAR_SHIFT 14 69*4882a593Smuzhiyun #define IC_RXPGAL_MASK 0x3F 70*4882a593Smuzhiyun #define IC_RXPGAL_SHIFT 21 71*4882a593Smuzhiyun #define IC_RXPGAR 0x7B 72*4882a593Smuzhiyun #define IC_RXPGAL 0x7B 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun #define AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK 0x3F 75*4882a593Smuzhiyun #define AUDIO_PORT_TX_FIFO_SC_OFFSET 0 76*4882a593Smuzhiyun #define AUDIO_PORT_TX_FIFO_LC_OFFSET 10 77*4882a593Smuzhiyun #define AUDIO_PORT_TX_FIFO_HC_OFFSET 20 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun #define TX_FIFO_SC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \ 80*4882a593Smuzhiyun << AUDIO_PORT_TX_FIFO_SC_OFFSET) 81*4882a593Smuzhiyun #define TX_FIFO_LC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \ 82*4882a593Smuzhiyun << AUDIO_PORT_TX_FIFO_LC_OFFSET) 83*4882a593Smuzhiyun #define TX_FIFO_HC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \ 84*4882a593Smuzhiyun << AUDIO_PORT_TX_FIFO_HC_OFFSET) 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun #define AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK 0x0F 87*4882a593Smuzhiyun #define AUDIO_PORT_RX_FIFO_SC_OFFSET 0 88*4882a593Smuzhiyun #define AUDIO_PORT_RX_FIFO_LC_OFFSET 10 89*4882a593Smuzhiyun #define AUDIO_PORT_RX_FIFO_HC_OFFSET 20 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun #define RX_FIFO_SC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \ 92*4882a593Smuzhiyun << AUDIO_PORT_RX_FIFO_SC_OFFSET) 93*4882a593Smuzhiyun #define RX_FIFO_LC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \ 94*4882a593Smuzhiyun << AUDIO_PORT_RX_FIFO_LC_OFFSET) 95*4882a593Smuzhiyun #define RX_FIFO_HC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \ 96*4882a593Smuzhiyun << AUDIO_PORT_RX_FIFO_HC_OFFSET) 97*4882a593Smuzhiyun #define AUDIO_PORT_IC_CODEC_TX_CTRL (0x00F4) 98*4882a593Smuzhiyun #define AUDIO_PORT_IC_CODEC_RX_CTRL (0x00F8) 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun #define AUDIO_PORT_IC_TXFIFO_OP (0x00FC) 101*4882a593Smuzhiyun #define AUDIO_PORT_IC_TXFIFO_LEV_CHK (0x0100) 102*4882a593Smuzhiyun #define AUDIO_PORT_IC_TXFIFO_STS (0x0104) 103*4882a593Smuzhiyun #define AUDIO_PORT_IC_TXFIFO_INT (0x0108) 104*4882a593Smuzhiyun #define AUDIO_PORT_IC_TXFIFO_INT_MSK (0x010C) 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun #define AUDIO_PORT_IC_RXFIFO_OP (0x0110) 107*4882a593Smuzhiyun #define AUDIO_PORT_IC_RXFIFO_LEV_CHK (0x0114) 108*4882a593Smuzhiyun #define AUDIO_PORT_IC_RXFIFO_STS (0x0118) 109*4882a593Smuzhiyun #define AUDIO_PORT_IC_RXFIFO_INT (0x011C) 110*4882a593Smuzhiyun #define AUDIO_PORT_IC_RXFIFO_INT_MSK (0x0120) 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun #define AUDIO_FIFO_START (1 << 0) 113*4882a593Smuzhiyun #define AUDIO_FIFO_RESET (1 << 1) 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun #define AUDIO_FIFO_FULL (1 << 0) 116*4882a593Smuzhiyun #define AUDIO_FIFO_EMPTY (1 << 1) 117*4882a593Smuzhiyun #define AUDIO_FIFO_OFLOW (1 << 2) 118*4882a593Smuzhiyun #define AUDIO_FIFO_UFLOW (1 << 3) 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun #define IC_TX_ENABLE (0x03) 121*4882a593Smuzhiyun #define IC_RX_ENABLE_MONO (0x01) 122*4882a593Smuzhiyun #define IC_RX_ENABLE_STEREO (0x03) 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun #endif /*__SIRF_AUDIO_CODEC_H*/ 125