1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * rt711.h -- RT711 ALSA SoC audio driver header 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright(c) 2019 Realtek Semiconductor Corp. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __RT711_H__ 9*4882a593Smuzhiyun #define __RT711_H__ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun extern const struct dev_pm_ops rt711_runtime_pm; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun struct rt711_priv { 14*4882a593Smuzhiyun struct regmap *regmap; 15*4882a593Smuzhiyun struct regmap *sdw_regmap; 16*4882a593Smuzhiyun struct snd_soc_component *component; 17*4882a593Smuzhiyun struct sdw_slave *slave; 18*4882a593Smuzhiyun enum sdw_slave_status status; 19*4882a593Smuzhiyun struct sdw_bus_params params; 20*4882a593Smuzhiyun bool hw_init; 21*4882a593Smuzhiyun bool first_hw_init; 22*4882a593Smuzhiyun struct snd_soc_jack *hs_jack; 23*4882a593Smuzhiyun struct delayed_work jack_detect_work; 24*4882a593Smuzhiyun struct delayed_work jack_btn_check_work; 25*4882a593Smuzhiyun struct work_struct calibration_work; 26*4882a593Smuzhiyun struct mutex calibrate_mutex; /* for headset calibration */ 27*4882a593Smuzhiyun int jack_type, jd_src; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun struct sdw_stream_data { 31*4882a593Smuzhiyun struct sdw_stream_runtime *sdw_stream; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* NID */ 35*4882a593Smuzhiyun #define RT711_AUDIO_FUNCTION_GROUP 0x01 36*4882a593Smuzhiyun #define RT711_DAC_OUT2 0x03 37*4882a593Smuzhiyun #define RT711_ADC_IN1 0x09 38*4882a593Smuzhiyun #define RT711_ADC_IN2 0x08 39*4882a593Smuzhiyun #define RT711_DMIC1 0x12 40*4882a593Smuzhiyun #define RT711_DMIC2 0x13 41*4882a593Smuzhiyun #define RT711_MIC2 0x19 42*4882a593Smuzhiyun #define RT711_LINE1 0x1a 43*4882a593Smuzhiyun #define RT711_LINE2 0x1b 44*4882a593Smuzhiyun #define RT711_BEEP 0x1d 45*4882a593Smuzhiyun #define RT711_VENDOR_REG 0x20 46*4882a593Smuzhiyun #define RT711_HP_OUT 0x21 47*4882a593Smuzhiyun #define RT711_MIXER_IN1 0x22 48*4882a593Smuzhiyun #define RT711_MIXER_IN2 0x23 49*4882a593Smuzhiyun #define RT711_INLINE_CMD 0x55 50*4882a593Smuzhiyun #define RT711_VENDOR_CALI 0x58 51*4882a593Smuzhiyun #define RT711_VENDOR_IMS_DRE 0x5b 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* Index (NID:20h) */ 54*4882a593Smuzhiyun #define RT711_DAC_DC_CALI_CTL1 0x00 55*4882a593Smuzhiyun #define RT711_JD_CTL2 0x09 56*4882a593Smuzhiyun #define RT711_CC_DET1 0x11 57*4882a593Smuzhiyun #define RT711_PARA_VERB_CTL 0x1a 58*4882a593Smuzhiyun #define RT711_COMBO_JACK_AUTO_CTL1 0x45 59*4882a593Smuzhiyun #define RT711_COMBO_JACK_AUTO_CTL2 0x46 60*4882a593Smuzhiyun #define RT711_INLINE_CMD_CTL 0x48 61*4882a593Smuzhiyun #define RT711_DIGITAL_MISC_CTRL4 0x4a 62*4882a593Smuzhiyun #define RT711_VREFOUT_CTL 0x6b 63*4882a593Smuzhiyun #define RT711_FSM_CTL 0x6f 64*4882a593Smuzhiyun #define RT711_IRQ_FLAG_TABLE1 0x80 65*4882a593Smuzhiyun #define RT711_IRQ_FLAG_TABLE2 0x81 66*4882a593Smuzhiyun #define RT711_IRQ_FLAG_TABLE3 0x82 67*4882a593Smuzhiyun #define RT711_TX_RX_MUX_CTL 0x91 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun /* Index (NID:5bh) */ 70*4882a593Smuzhiyun #define RT711_IMS_DIGITAL_CTL1 0x00 71*4882a593Smuzhiyun #define RT711_HP_IMS_RESULT_L 0x20 72*4882a593Smuzhiyun #define RT711_HP_IMS_RESULT_R 0x21 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* Verb */ 75*4882a593Smuzhiyun #define RT711_VERB_SET_CONNECT_SEL 0x3100 76*4882a593Smuzhiyun #define RT711_VERB_SET_EAPD_BTLENABLE 0x3c00 77*4882a593Smuzhiyun #define RT711_VERB_GET_CONNECT_SEL 0xb100 78*4882a593Smuzhiyun #define RT711_VERB_SET_POWER_STATE 0x3500 79*4882a593Smuzhiyun #define RT711_VERB_SET_CHANNEL_STREAMID 0x3600 80*4882a593Smuzhiyun #define RT711_VERB_SET_PIN_WIDGET_CONTROL 0x3700 81*4882a593Smuzhiyun #define RT711_VERB_SET_UNSOLICITED_ENABLE 0x3800 82*4882a593Smuzhiyun #define RT711_SET_AMP_GAIN_MUTE_H 0x7300 83*4882a593Smuzhiyun #define RT711_SET_AMP_GAIN_MUTE_L 0x8380 84*4882a593Smuzhiyun #define RT711_VERB_GET_POWER_STATE 0xb500 85*4882a593Smuzhiyun #define RT711_VERB_GET_CHANNEL_STREAMID 0xb600 86*4882a593Smuzhiyun #define RT711_VERB_GET_PIN_SENSE 0xb900 87*4882a593Smuzhiyun #define RT711_FUNC_RESET 0xff01 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun #define RT711_READ_HDA_3 0x2012 90*4882a593Smuzhiyun #define RT711_READ_HDA_2 0x2013 91*4882a593Smuzhiyun #define RT711_READ_HDA_1 0x2014 92*4882a593Smuzhiyun #define RT711_READ_HDA_0 0x2015 93*4882a593Smuzhiyun #define RT711_PRIV_INDEX_W_H 0x7500 94*4882a593Smuzhiyun #define RT711_PRIV_INDEX_W_L 0x8580 95*4882a593Smuzhiyun #define RT711_PRIV_DATA_W_H 0x7400 96*4882a593Smuzhiyun #define RT711_PRIV_DATA_W_L 0x8480 97*4882a593Smuzhiyun #define RT711_PRIV_INDEX_R_H 0x9d00 98*4882a593Smuzhiyun #define RT711_PRIV_INDEX_R_L 0xad80 99*4882a593Smuzhiyun #define RT711_PRIV_DATA_R_H 0x9c00 100*4882a593Smuzhiyun #define RT711_PRIV_DATA_R_L 0xac80 101*4882a593Smuzhiyun #define RT711_DAC_FORMAT_H 0x7203 102*4882a593Smuzhiyun #define RT711_DAC_FORMAT_L 0x8283 103*4882a593Smuzhiyun #define RT711_ADC1_FORMAT_H 0x7209 104*4882a593Smuzhiyun #define RT711_ADC1_FORMAT_L 0x8289 105*4882a593Smuzhiyun #define RT711_ADC2_FORMAT_H 0x7208 106*4882a593Smuzhiyun #define RT711_ADC2_FORMAT_L 0x8288 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun #define RT711_SET_AUDIO_POWER_STATE\ 109*4882a593Smuzhiyun (RT711_VERB_SET_POWER_STATE | RT711_AUDIO_FUNCTION_GROUP) 110*4882a593Smuzhiyun #define RT711_GET_AUDIO_POWER_STATE\ 111*4882a593Smuzhiyun (RT711_VERB_GET_POWER_STATE | RT711_AUDIO_FUNCTION_GROUP) 112*4882a593Smuzhiyun #define RT711_SET_PIN_DMIC1\ 113*4882a593Smuzhiyun (RT711_VERB_SET_PIN_WIDGET_CONTROL | RT711_DMIC1) 114*4882a593Smuzhiyun #define RT711_SET_PIN_DMIC2\ 115*4882a593Smuzhiyun (RT711_VERB_SET_PIN_WIDGET_CONTROL | RT711_DMIC2) 116*4882a593Smuzhiyun #define RT711_SET_PIN_HP\ 117*4882a593Smuzhiyun (RT711_VERB_SET_PIN_WIDGET_CONTROL | RT711_HP_OUT) 118*4882a593Smuzhiyun #define RT711_SET_PIN_MIC2\ 119*4882a593Smuzhiyun (RT711_VERB_SET_PIN_WIDGET_CONTROL | RT711_MIC2) 120*4882a593Smuzhiyun #define RT711_SET_PIN_LINE1\ 121*4882a593Smuzhiyun (RT711_VERB_SET_PIN_WIDGET_CONTROL | RT711_LINE1) 122*4882a593Smuzhiyun #define RT711_SET_PIN_LINE2\ 123*4882a593Smuzhiyun (RT711_VERB_SET_PIN_WIDGET_CONTROL | RT711_LINE2) 124*4882a593Smuzhiyun #define RT711_SET_MIC2_UNSOLICITED_ENABLE\ 125*4882a593Smuzhiyun (RT711_VERB_SET_UNSOLICITED_ENABLE | RT711_MIC2) 126*4882a593Smuzhiyun #define RT711_SET_HP_UNSOLICITED_ENABLE\ 127*4882a593Smuzhiyun (RT711_VERB_SET_UNSOLICITED_ENABLE | RT711_HP_OUT) 128*4882a593Smuzhiyun #define RT711_SET_INLINE_UNSOLICITED_ENABLE\ 129*4882a593Smuzhiyun (RT711_VERB_SET_UNSOLICITED_ENABLE | RT711_INLINE_CMD) 130*4882a593Smuzhiyun #define RT711_SET_STREAMID_DAC2\ 131*4882a593Smuzhiyun (RT711_VERB_SET_CHANNEL_STREAMID | RT711_DAC_OUT2) 132*4882a593Smuzhiyun #define RT711_SET_STREAMID_ADC1\ 133*4882a593Smuzhiyun (RT711_VERB_SET_CHANNEL_STREAMID | RT711_ADC_IN1) 134*4882a593Smuzhiyun #define RT711_SET_STREAMID_ADC2\ 135*4882a593Smuzhiyun (RT711_VERB_SET_CHANNEL_STREAMID | RT711_ADC_IN2) 136*4882a593Smuzhiyun #define RT711_GET_STREAMID_DAC2\ 137*4882a593Smuzhiyun (RT711_VERB_GET_CHANNEL_STREAMID | RT711_DAC_OUT2) 138*4882a593Smuzhiyun #define RT711_GET_STREAMID_ADC1\ 139*4882a593Smuzhiyun (RT711_VERB_GET_CHANNEL_STREAMID | RT711_ADC_IN1) 140*4882a593Smuzhiyun #define RT711_GET_STREAMID_ADC2\ 141*4882a593Smuzhiyun (RT711_VERB_GET_CHANNEL_STREAMID | RT711_ADC_IN2) 142*4882a593Smuzhiyun #define RT711_SET_GAIN_DAC2_L\ 143*4882a593Smuzhiyun (RT711_SET_AMP_GAIN_MUTE_L | RT711_DAC_OUT2) 144*4882a593Smuzhiyun #define RT711_SET_GAIN_DAC2_H\ 145*4882a593Smuzhiyun (RT711_SET_AMP_GAIN_MUTE_H | RT711_DAC_OUT2) 146*4882a593Smuzhiyun #define RT711_SET_GAIN_ADC1_L\ 147*4882a593Smuzhiyun (RT711_SET_AMP_GAIN_MUTE_L | RT711_ADC_IN1) 148*4882a593Smuzhiyun #define RT711_SET_GAIN_ADC1_H\ 149*4882a593Smuzhiyun (RT711_SET_AMP_GAIN_MUTE_H | RT711_ADC_IN1) 150*4882a593Smuzhiyun #define RT711_SET_GAIN_ADC2_L\ 151*4882a593Smuzhiyun (RT711_SET_AMP_GAIN_MUTE_L | RT711_ADC_IN2) 152*4882a593Smuzhiyun #define RT711_SET_GAIN_ADC2_H\ 153*4882a593Smuzhiyun (RT711_SET_AMP_GAIN_MUTE_H | RT711_ADC_IN2) 154*4882a593Smuzhiyun #define RT711_SET_GAIN_AMIC_L\ 155*4882a593Smuzhiyun (RT711_SET_AMP_GAIN_MUTE_L | RT711_MIC2) 156*4882a593Smuzhiyun #define RT711_SET_GAIN_AMIC_H\ 157*4882a593Smuzhiyun (RT711_SET_AMP_GAIN_MUTE_H | RT711_MIC2) 158*4882a593Smuzhiyun #define RT711_SET_GAIN_DMIC1_L\ 159*4882a593Smuzhiyun (RT711_SET_AMP_GAIN_MUTE_L | RT711_DMIC1) 160*4882a593Smuzhiyun #define RT711_SET_GAIN_DMIC1_H\ 161*4882a593Smuzhiyun (RT711_SET_AMP_GAIN_MUTE_H | RT711_DMIC1) 162*4882a593Smuzhiyun #define RT711_SET_GAIN_DMIC2_L\ 163*4882a593Smuzhiyun (RT711_SET_AMP_GAIN_MUTE_L | RT711_DMIC2) 164*4882a593Smuzhiyun #define RT711_SET_GAIN_DMIC2_H\ 165*4882a593Smuzhiyun (RT711_SET_AMP_GAIN_MUTE_H | RT711_DMIC2) 166*4882a593Smuzhiyun #define RT711_SET_GAIN_HP_L\ 167*4882a593Smuzhiyun (RT711_SET_AMP_GAIN_MUTE_L | RT711_HP_OUT) 168*4882a593Smuzhiyun #define RT711_SET_GAIN_HP_H\ 169*4882a593Smuzhiyun (RT711_SET_AMP_GAIN_MUTE_H | RT711_HP_OUT) 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun /* DAC DC offset calibration control-1 (0x00)(NID:20h) */ 172*4882a593Smuzhiyun #define RT711_DAC_DC_CALI_TRIGGER (0x1 << 15) 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun /* jack detect control 2 (0x09)(NID:20h) */ 175*4882a593Smuzhiyun #define RT711_JD2_2PORT_200K_DECODE_HP (0x1 << 13) 176*4882a593Smuzhiyun #define RT711_HP_JD_SEL_JD1 (0x0 << 1) 177*4882a593Smuzhiyun #define RT711_HP_JD_SEL_JD2 (0x1 << 1) 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun /* CC DET1 (0x11)(NID:20h) */ 180*4882a593Smuzhiyun #define RT711_HP_JD_FINAL_RESULT_CTL_JD12 (0x1 << 10) 181*4882a593Smuzhiyun #define RT711_HP_JD_FINAL_RESULT_CTL_CCDET (0x0 << 10) 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun /* Parameter & Verb control (0x1a)(NID:20h) */ 184*4882a593Smuzhiyun #define RT711_HIDDEN_REG_SW_RESET (0x1 << 14) 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun /* combo jack auto switch control 2 (0x46)(NID:20h) */ 187*4882a593Smuzhiyun #define RT711_COMBOJACK_AUTO_DET_STATUS (0x1 << 11) 188*4882a593Smuzhiyun #define RT711_COMBOJACK_AUTO_DET_TRS (0x1 << 10) 189*4882a593Smuzhiyun #define RT711_COMBOJACK_AUTO_DET_CTIA (0x1 << 9) 190*4882a593Smuzhiyun #define RT711_COMBOJACK_AUTO_DET_OMTP (0x1 << 8) 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun /* FSM control (0x6f)(NID:20h) */ 193*4882a593Smuzhiyun #define RT711_CALI_CTL (0x0 << 0) 194*4882a593Smuzhiyun #define RT711_COMBOJACK_CTL (0x1 << 0) 195*4882a593Smuzhiyun #define RT711_IMS_CTL (0x2 << 0) 196*4882a593Smuzhiyun #define RT711_DEPOP_CTL (0x3 << 0) 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun /* Impedance Sense Digital Control 1 (0x00)(NID:5bh) */ 199*4882a593Smuzhiyun #define RT711_TRIGGER_IMS (0x1 << 15) 200*4882a593Smuzhiyun #define RT711_IMS_EN (0x1 << 6) 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun #define RT711_EAPD_HIGH 0x2 203*4882a593Smuzhiyun #define RT711_EAPD_LOW 0x0 204*4882a593Smuzhiyun #define RT711_MUTE_SFT 7 205*4882a593Smuzhiyun /* set input/output mapping to payload[14][15] separately */ 206*4882a593Smuzhiyun #define RT711_DIR_IN_SFT 6 207*4882a593Smuzhiyun #define RT711_DIR_OUT_SFT 7 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun enum { 210*4882a593Smuzhiyun RT711_AIF1, 211*4882a593Smuzhiyun RT711_AIF2, 212*4882a593Smuzhiyun RT711_AIFS, 213*4882a593Smuzhiyun }; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun enum rt711_jd_src { 216*4882a593Smuzhiyun RT711_JD_NULL, 217*4882a593Smuzhiyun RT711_JD1, 218*4882a593Smuzhiyun RT711_JD2 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun int rt711_io_init(struct device *dev, struct sdw_slave *slave); 222*4882a593Smuzhiyun int rt711_init(struct device *dev, struct regmap *sdw_regmap, 223*4882a593Smuzhiyun struct regmap *regmap, struct sdw_slave *slave); 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun int rt711_jack_detect(struct rt711_priv *rt711, bool *hp, bool *mic); 226*4882a593Smuzhiyun int rt711_clock_config(struct device *dev); 227*4882a593Smuzhiyun #endif /* __RT711_H__ */ 228