1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // rt5682.c -- RT5682 ALSA SoC audio component driver
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright 2018 Realtek Semiconductor Corp.
6*4882a593Smuzhiyun // Author: Bard Liao <bardliao@realtek.com>
7*4882a593Smuzhiyun //
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/moduleparam.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/delay.h>
13*4882a593Smuzhiyun #include <linux/pm.h>
14*4882a593Smuzhiyun #include <linux/pm_runtime.h>
15*4882a593Smuzhiyun #include <linux/i2c.h>
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun #include <linux/spi/spi.h>
18*4882a593Smuzhiyun #include <linux/acpi.h>
19*4882a593Smuzhiyun #include <linux/gpio.h>
20*4882a593Smuzhiyun #include <linux/of_gpio.h>
21*4882a593Smuzhiyun #include <linux/mutex.h>
22*4882a593Smuzhiyun #include <sound/core.h>
23*4882a593Smuzhiyun #include <sound/pcm.h>
24*4882a593Smuzhiyun #include <sound/pcm_params.h>
25*4882a593Smuzhiyun #include <sound/jack.h>
26*4882a593Smuzhiyun #include <sound/soc.h>
27*4882a593Smuzhiyun #include <sound/soc-dapm.h>
28*4882a593Smuzhiyun #include <sound/initval.h>
29*4882a593Smuzhiyun #include <sound/tlv.h>
30*4882a593Smuzhiyun #include <sound/rt5682.h>
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #include "rl6231.h"
33*4882a593Smuzhiyun #include "rt5682.h"
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun static const struct rt5682_platform_data i2s_default_platform_data = {
36*4882a593Smuzhiyun .dmic1_data_pin = RT5682_DMIC1_DATA_GPIO2,
37*4882a593Smuzhiyun .dmic1_clk_pin = RT5682_DMIC1_CLK_GPIO3,
38*4882a593Smuzhiyun .jd_src = RT5682_JD1,
39*4882a593Smuzhiyun .btndet_delay = 16,
40*4882a593Smuzhiyun .dai_clk_names[RT5682_DAI_WCLK_IDX] = "rt5682-dai-wclk",
41*4882a593Smuzhiyun .dai_clk_names[RT5682_DAI_BCLK_IDX] = "rt5682-dai-bclk",
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun static const struct regmap_config rt5682_regmap = {
45*4882a593Smuzhiyun .reg_bits = 16,
46*4882a593Smuzhiyun .val_bits = 16,
47*4882a593Smuzhiyun .max_register = RT5682_I2C_MODE,
48*4882a593Smuzhiyun .volatile_reg = rt5682_volatile_register,
49*4882a593Smuzhiyun .readable_reg = rt5682_readable_register,
50*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
51*4882a593Smuzhiyun .reg_defaults = rt5682_reg,
52*4882a593Smuzhiyun .num_reg_defaults = RT5682_REG_NUM,
53*4882a593Smuzhiyun .use_single_read = true,
54*4882a593Smuzhiyun .use_single_write = true,
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun
rt5682_jd_check_handler(struct work_struct * work)57*4882a593Smuzhiyun static void rt5682_jd_check_handler(struct work_struct *work)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun struct rt5682_priv *rt5682 = container_of(work, struct rt5682_priv,
60*4882a593Smuzhiyun jd_check_work.work);
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun if (snd_soc_component_read(rt5682->component, RT5682_AJD1_CTRL)
63*4882a593Smuzhiyun & RT5682_JDH_RS_MASK) {
64*4882a593Smuzhiyun /* jack out */
65*4882a593Smuzhiyun rt5682->jack_type = rt5682_headset_detect(rt5682->component, 0);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun snd_soc_jack_report(rt5682->hs_jack, rt5682->jack_type,
68*4882a593Smuzhiyun SND_JACK_HEADSET |
69*4882a593Smuzhiyun SND_JACK_BTN_0 | SND_JACK_BTN_1 |
70*4882a593Smuzhiyun SND_JACK_BTN_2 | SND_JACK_BTN_3);
71*4882a593Smuzhiyun } else {
72*4882a593Smuzhiyun schedule_delayed_work(&rt5682->jd_check_work, 500);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
rt5682_irq(int irq,void * data)76*4882a593Smuzhiyun static irqreturn_t rt5682_irq(int irq, void *data)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun struct rt5682_priv *rt5682 = data;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun mod_delayed_work(system_power_efficient_wq,
81*4882a593Smuzhiyun &rt5682->jack_detect_work, msecs_to_jiffies(250));
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun return IRQ_HANDLED;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun static struct snd_soc_dai_driver rt5682_dai[] = {
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun .name = "rt5682-aif1",
89*4882a593Smuzhiyun .id = RT5682_AIF1,
90*4882a593Smuzhiyun .playback = {
91*4882a593Smuzhiyun .stream_name = "AIF1 Playback",
92*4882a593Smuzhiyun .channels_min = 1,
93*4882a593Smuzhiyun .channels_max = 2,
94*4882a593Smuzhiyun .rates = RT5682_STEREO_RATES,
95*4882a593Smuzhiyun .formats = RT5682_FORMATS,
96*4882a593Smuzhiyun },
97*4882a593Smuzhiyun .capture = {
98*4882a593Smuzhiyun .stream_name = "AIF1 Capture",
99*4882a593Smuzhiyun .channels_min = 1,
100*4882a593Smuzhiyun .channels_max = 2,
101*4882a593Smuzhiyun .rates = RT5682_STEREO_RATES,
102*4882a593Smuzhiyun .formats = RT5682_FORMATS,
103*4882a593Smuzhiyun },
104*4882a593Smuzhiyun .ops = &rt5682_aif1_dai_ops,
105*4882a593Smuzhiyun },
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun .name = "rt5682-aif2",
108*4882a593Smuzhiyun .id = RT5682_AIF2,
109*4882a593Smuzhiyun .capture = {
110*4882a593Smuzhiyun .stream_name = "AIF2 Capture",
111*4882a593Smuzhiyun .channels_min = 1,
112*4882a593Smuzhiyun .channels_max = 2,
113*4882a593Smuzhiyun .rates = RT5682_STEREO_RATES,
114*4882a593Smuzhiyun .formats = RT5682_FORMATS,
115*4882a593Smuzhiyun },
116*4882a593Smuzhiyun .ops = &rt5682_aif2_dai_ops,
117*4882a593Smuzhiyun },
118*4882a593Smuzhiyun };
119*4882a593Smuzhiyun
rt5682_i2c_disable_regulators(void * data)120*4882a593Smuzhiyun static void rt5682_i2c_disable_regulators(void *data)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun struct rt5682_priv *rt5682 = data;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun regulator_bulk_disable(ARRAY_SIZE(rt5682->supplies), rt5682->supplies);
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
rt5682_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)127*4882a593Smuzhiyun static int rt5682_i2c_probe(struct i2c_client *i2c,
128*4882a593Smuzhiyun const struct i2c_device_id *id)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun struct rt5682_platform_data *pdata = dev_get_platdata(&i2c->dev);
131*4882a593Smuzhiyun struct rt5682_priv *rt5682;
132*4882a593Smuzhiyun int i, ret;
133*4882a593Smuzhiyun unsigned int val;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun rt5682 = devm_kzalloc(&i2c->dev, sizeof(struct rt5682_priv),
136*4882a593Smuzhiyun GFP_KERNEL);
137*4882a593Smuzhiyun if (!rt5682)
138*4882a593Smuzhiyun return -ENOMEM;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun i2c_set_clientdata(i2c, rt5682);
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun rt5682->pdata = i2s_default_platform_data;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun if (pdata)
145*4882a593Smuzhiyun rt5682->pdata = *pdata;
146*4882a593Smuzhiyun else
147*4882a593Smuzhiyun rt5682_parse_dt(rt5682, &i2c->dev);
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun rt5682->regmap = devm_regmap_init_i2c(i2c, &rt5682_regmap);
150*4882a593Smuzhiyun if (IS_ERR(rt5682->regmap)) {
151*4882a593Smuzhiyun ret = PTR_ERR(rt5682->regmap);
152*4882a593Smuzhiyun dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
153*4882a593Smuzhiyun ret);
154*4882a593Smuzhiyun return ret;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(rt5682->supplies); i++)
158*4882a593Smuzhiyun rt5682->supplies[i].supply = rt5682_supply_names[i];
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(rt5682->supplies),
161*4882a593Smuzhiyun rt5682->supplies);
162*4882a593Smuzhiyun if (ret) {
163*4882a593Smuzhiyun dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
164*4882a593Smuzhiyun return ret;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun ret = devm_add_action_or_reset(&i2c->dev, rt5682_i2c_disable_regulators,
168*4882a593Smuzhiyun rt5682);
169*4882a593Smuzhiyun if (ret)
170*4882a593Smuzhiyun return ret;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun ret = regulator_bulk_enable(ARRAY_SIZE(rt5682->supplies),
173*4882a593Smuzhiyun rt5682->supplies);
174*4882a593Smuzhiyun if (ret) {
175*4882a593Smuzhiyun dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
176*4882a593Smuzhiyun return ret;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun if (gpio_is_valid(rt5682->pdata.ldo1_en)) {
180*4882a593Smuzhiyun if (devm_gpio_request_one(&i2c->dev, rt5682->pdata.ldo1_en,
181*4882a593Smuzhiyun GPIOF_OUT_INIT_HIGH, "rt5682"))
182*4882a593Smuzhiyun dev_err(&i2c->dev, "Fail gpio_request gpio_ldo\n");
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun /* Sleep for 300 ms miniumum */
186*4882a593Smuzhiyun usleep_range(300000, 350000);
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun regmap_write(rt5682->regmap, RT5682_I2C_MODE, 0x1);
189*4882a593Smuzhiyun usleep_range(10000, 15000);
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val);
192*4882a593Smuzhiyun if (val != DEVICE_ID) {
193*4882a593Smuzhiyun dev_err(&i2c->dev,
194*4882a593Smuzhiyun "Device with ID register %x is not rt5682\n", val);
195*4882a593Smuzhiyun return -ENODEV;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun mutex_init(&rt5682->calibrate_mutex);
199*4882a593Smuzhiyun rt5682_calibrate(rt5682);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun rt5682_apply_patch_list(rt5682, &i2c->dev);
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000);
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun /* DMIC pin*/
206*4882a593Smuzhiyun if (rt5682->pdata.dmic1_data_pin != RT5682_DMIC1_NULL) {
207*4882a593Smuzhiyun switch (rt5682->pdata.dmic1_data_pin) {
208*4882a593Smuzhiyun case RT5682_DMIC1_DATA_GPIO2: /* share with LRCK2 */
209*4882a593Smuzhiyun regmap_update_bits(rt5682->regmap, RT5682_DMIC_CTRL_1,
210*4882a593Smuzhiyun RT5682_DMIC_1_DP_MASK, RT5682_DMIC_1_DP_GPIO2);
211*4882a593Smuzhiyun regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1,
212*4882a593Smuzhiyun RT5682_GP2_PIN_MASK, RT5682_GP2_PIN_DMIC_SDA);
213*4882a593Smuzhiyun break;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun case RT5682_DMIC1_DATA_GPIO5: /* share with DACDAT1 */
216*4882a593Smuzhiyun regmap_update_bits(rt5682->regmap, RT5682_DMIC_CTRL_1,
217*4882a593Smuzhiyun RT5682_DMIC_1_DP_MASK, RT5682_DMIC_1_DP_GPIO5);
218*4882a593Smuzhiyun regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1,
219*4882a593Smuzhiyun RT5682_GP5_PIN_MASK, RT5682_GP5_PIN_DMIC_SDA);
220*4882a593Smuzhiyun break;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun default:
223*4882a593Smuzhiyun dev_warn(&i2c->dev, "invalid DMIC_DAT pin\n");
224*4882a593Smuzhiyun break;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun switch (rt5682->pdata.dmic1_clk_pin) {
228*4882a593Smuzhiyun case RT5682_DMIC1_CLK_GPIO1: /* share with IRQ */
229*4882a593Smuzhiyun regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1,
230*4882a593Smuzhiyun RT5682_GP1_PIN_MASK, RT5682_GP1_PIN_DMIC_CLK);
231*4882a593Smuzhiyun break;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun case RT5682_DMIC1_CLK_GPIO3: /* share with BCLK2 */
234*4882a593Smuzhiyun regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1,
235*4882a593Smuzhiyun RT5682_GP3_PIN_MASK, RT5682_GP3_PIN_DMIC_CLK);
236*4882a593Smuzhiyun break;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun default:
239*4882a593Smuzhiyun dev_warn(&i2c->dev, "invalid DMIC_CLK pin\n");
240*4882a593Smuzhiyun break;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
245*4882a593Smuzhiyun RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK,
246*4882a593Smuzhiyun RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X);
247*4882a593Smuzhiyun regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080);
248*4882a593Smuzhiyun regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1,
249*4882a593Smuzhiyun RT5682_GP4_PIN_MASK | RT5682_GP5_PIN_MASK,
250*4882a593Smuzhiyun RT5682_GP4_PIN_ADCDAT1 | RT5682_GP5_PIN_DACDAT1);
251*4882a593Smuzhiyun regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000);
252*4882a593Smuzhiyun regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8,
253*4882a593Smuzhiyun RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA);
254*4882a593Smuzhiyun regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1,
255*4882a593Smuzhiyun RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ);
256*4882a593Smuzhiyun regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1,
257*4882a593Smuzhiyun RT5682_PM_HP_MASK, RT5682_PM_HP_HV);
258*4882a593Smuzhiyun regmap_update_bits(rt5682->regmap, RT5682_DMIC_CTRL_1,
259*4882a593Smuzhiyun RT5682_FIFO_CLK_DIV_MASK, RT5682_FIFO_CLK_DIV_2);
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun INIT_DELAYED_WORK(&rt5682->jack_detect_work,
262*4882a593Smuzhiyun rt5682_jack_detect_handler);
263*4882a593Smuzhiyun INIT_DELAYED_WORK(&rt5682->jd_check_work,
264*4882a593Smuzhiyun rt5682_jd_check_handler);
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun if (i2c->irq) {
267*4882a593Smuzhiyun ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,
268*4882a593Smuzhiyun rt5682_irq, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
269*4882a593Smuzhiyun | IRQF_ONESHOT, "rt5682", rt5682);
270*4882a593Smuzhiyun if (ret)
271*4882a593Smuzhiyun dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun return devm_snd_soc_register_component(&i2c->dev,
275*4882a593Smuzhiyun &rt5682_soc_component_dev,
276*4882a593Smuzhiyun rt5682_dai, ARRAY_SIZE(rt5682_dai));
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun
rt5682_i2c_shutdown(struct i2c_client * client)279*4882a593Smuzhiyun static void rt5682_i2c_shutdown(struct i2c_client *client)
280*4882a593Smuzhiyun {
281*4882a593Smuzhiyun struct rt5682_priv *rt5682 = i2c_get_clientdata(client);
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun disable_irq(client->irq);
284*4882a593Smuzhiyun cancel_delayed_work_sync(&rt5682->jack_detect_work);
285*4882a593Smuzhiyun cancel_delayed_work_sync(&rt5682->jd_check_work);
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun rt5682_reset(rt5682);
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
rt5682_i2c_remove(struct i2c_client * client)290*4882a593Smuzhiyun static int rt5682_i2c_remove(struct i2c_client *client)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun rt5682_i2c_shutdown(client);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun return 0;
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun static const struct of_device_id rt5682_of_match[] = {
298*4882a593Smuzhiyun {.compatible = "realtek,rt5682i"},
299*4882a593Smuzhiyun {},
300*4882a593Smuzhiyun };
301*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, rt5682_of_match);
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun static const struct acpi_device_id rt5682_acpi_match[] = {
304*4882a593Smuzhiyun {"10EC5682", 0,},
305*4882a593Smuzhiyun {},
306*4882a593Smuzhiyun };
307*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, rt5682_acpi_match);
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun static const struct i2c_device_id rt5682_i2c_id[] = {
310*4882a593Smuzhiyun {"rt5682", 0},
311*4882a593Smuzhiyun {}
312*4882a593Smuzhiyun };
313*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, rt5682_i2c_id);
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun static struct i2c_driver rt5682_i2c_driver = {
316*4882a593Smuzhiyun .driver = {
317*4882a593Smuzhiyun .name = "rt5682",
318*4882a593Smuzhiyun .of_match_table = rt5682_of_match,
319*4882a593Smuzhiyun .acpi_match_table = rt5682_acpi_match,
320*4882a593Smuzhiyun .probe_type = PROBE_PREFER_ASYNCHRONOUS,
321*4882a593Smuzhiyun },
322*4882a593Smuzhiyun .probe = rt5682_i2c_probe,
323*4882a593Smuzhiyun .remove = rt5682_i2c_remove,
324*4882a593Smuzhiyun .shutdown = rt5682_i2c_shutdown,
325*4882a593Smuzhiyun .id_table = rt5682_i2c_id,
326*4882a593Smuzhiyun };
327*4882a593Smuzhiyun module_i2c_driver(rt5682_i2c_driver);
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC RT5682 driver");
330*4882a593Smuzhiyun MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
331*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
332