1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * rl6347a.c - RL6347A class device shared support
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2015 Realtek Semiconductor Corp.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Oder Chiou <oder_chiou@realtek.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/regmap.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include "rl6347a.h"
15*4882a593Smuzhiyun
rl6347a_hw_write(void * context,unsigned int reg,unsigned int value)16*4882a593Smuzhiyun int rl6347a_hw_write(void *context, unsigned int reg, unsigned int value)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun struct i2c_client *client = context;
19*4882a593Smuzhiyun struct rl6347a_priv *rl6347a = i2c_get_clientdata(client);
20*4882a593Smuzhiyun u8 data[4];
21*4882a593Smuzhiyun int ret, i;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /* handle index registers */
24*4882a593Smuzhiyun if (reg <= 0xff) {
25*4882a593Smuzhiyun rl6347a_hw_write(client, RL6347A_COEF_INDEX, reg);
26*4882a593Smuzhiyun for (i = 0; i < rl6347a->index_cache_size; i++) {
27*4882a593Smuzhiyun if (reg == rl6347a->index_cache[i].reg) {
28*4882a593Smuzhiyun rl6347a->index_cache[i].def = value;
29*4882a593Smuzhiyun break;
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun reg = RL6347A_PROC_COEF;
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun data[0] = (reg >> 24) & 0xff;
37*4882a593Smuzhiyun data[1] = (reg >> 16) & 0xff;
38*4882a593Smuzhiyun /*
39*4882a593Smuzhiyun * 4 bit VID: reg should be 0
40*4882a593Smuzhiyun * 12 bit VID: value should be 0
41*4882a593Smuzhiyun * So we use an OR operator to handle it rather than use if condition.
42*4882a593Smuzhiyun */
43*4882a593Smuzhiyun data[2] = ((reg >> 8) & 0xff) | ((value >> 8) & 0xff);
44*4882a593Smuzhiyun data[3] = value & 0xff;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun ret = i2c_master_send(client, data, 4);
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun if (ret == 4)
49*4882a593Smuzhiyun return 0;
50*4882a593Smuzhiyun else
51*4882a593Smuzhiyun dev_err(&client->dev, "I2C error %d\n", ret);
52*4882a593Smuzhiyun if (ret < 0)
53*4882a593Smuzhiyun return ret;
54*4882a593Smuzhiyun else
55*4882a593Smuzhiyun return -EIO;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(rl6347a_hw_write);
58*4882a593Smuzhiyun
rl6347a_hw_read(void * context,unsigned int reg,unsigned int * value)59*4882a593Smuzhiyun int rl6347a_hw_read(void *context, unsigned int reg, unsigned int *value)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun struct i2c_client *client = context;
62*4882a593Smuzhiyun struct i2c_msg xfer[2];
63*4882a593Smuzhiyun int ret;
64*4882a593Smuzhiyun __be32 be_reg, buf = 0x0;
65*4882a593Smuzhiyun unsigned int index, vid;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* handle index registers */
68*4882a593Smuzhiyun if (reg <= 0xff) {
69*4882a593Smuzhiyun rl6347a_hw_write(client, RL6347A_COEF_INDEX, reg);
70*4882a593Smuzhiyun reg = RL6347A_PROC_COEF;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun reg = reg | 0x80000;
74*4882a593Smuzhiyun vid = (reg >> 8) & 0xfff;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun if (AC_VERB_GET_AMP_GAIN_MUTE == (vid & 0xf00)) {
77*4882a593Smuzhiyun index = (reg >> 8) & 0xf;
78*4882a593Smuzhiyun reg = (reg & ~0xf0f) | index;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun be_reg = cpu_to_be32(reg);
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /* Write register */
83*4882a593Smuzhiyun xfer[0].addr = client->addr;
84*4882a593Smuzhiyun xfer[0].flags = 0;
85*4882a593Smuzhiyun xfer[0].len = 4;
86*4882a593Smuzhiyun xfer[0].buf = (u8 *)&be_reg;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun /* Read data */
89*4882a593Smuzhiyun xfer[1].addr = client->addr;
90*4882a593Smuzhiyun xfer[1].flags = I2C_M_RD;
91*4882a593Smuzhiyun xfer[1].len = 4;
92*4882a593Smuzhiyun xfer[1].buf = (u8 *)&buf;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun ret = i2c_transfer(client->adapter, xfer, 2);
95*4882a593Smuzhiyun if (ret < 0)
96*4882a593Smuzhiyun return ret;
97*4882a593Smuzhiyun else if (ret != 2)
98*4882a593Smuzhiyun return -EIO;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun *value = be32_to_cpu(buf);
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun return 0;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(rl6347a_hw_read);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun MODULE_DESCRIPTION("RL6347A class device shared support");
107*4882a593Smuzhiyun MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
108*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
109