1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * PCM3060 codec driver 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2018 Kirill Marinushkin <kmarinushkin@birdec.com> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _SND_SOC_PCM3060_H 9*4882a593Smuzhiyun #define _SND_SOC_PCM3060_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <linux/device.h> 12*4882a593Smuzhiyun #include <linux/regmap.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun extern const struct regmap_config pcm3060_regmap; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define PCM3060_DAI_ID_DAC 0 17*4882a593Smuzhiyun #define PCM3060_DAI_ID_ADC 1 18*4882a593Smuzhiyun #define PCM3060_DAI_IDS_NUM 2 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* ADC and DAC can be clocked from separate or same sources CLK1 and CLK2 */ 21*4882a593Smuzhiyun #define PCM3060_CLK_DEF 0 /* default: CLK1->ADC, CLK2->DAC */ 22*4882a593Smuzhiyun #define PCM3060_CLK1 1 23*4882a593Smuzhiyun #define PCM3060_CLK2 2 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun struct pcm3060_priv_dai { 26*4882a593Smuzhiyun bool is_master; 27*4882a593Smuzhiyun unsigned int sclk_freq; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun struct pcm3060_priv { 31*4882a593Smuzhiyun struct regmap *regmap; 32*4882a593Smuzhiyun struct pcm3060_priv_dai dai[PCM3060_DAI_IDS_NUM]; 33*4882a593Smuzhiyun u8 out_se: 1; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun int pcm3060_probe(struct device *dev); 37*4882a593Smuzhiyun int pcm3060_remove(struct device *dev); 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* registers */ 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #define PCM3060_REG64 0x40 42*4882a593Smuzhiyun #define PCM3060_REG_MRST 0x80 43*4882a593Smuzhiyun #define PCM3060_REG_SRST 0x40 44*4882a593Smuzhiyun #define PCM3060_REG_ADPSV 0x20 45*4882a593Smuzhiyun #define PCM3060_REG_SHIFT_ADPSV 0x05 46*4882a593Smuzhiyun #define PCM3060_REG_DAPSV 0x10 47*4882a593Smuzhiyun #define PCM3060_REG_SHIFT_DAPSV 0x04 48*4882a593Smuzhiyun #define PCM3060_REG_SE 0x01 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #define PCM3060_REG65 0x41 51*4882a593Smuzhiyun #define PCM3060_REG66 0x42 52*4882a593Smuzhiyun #define PCM3060_REG_AT2_MIN 0x36 53*4882a593Smuzhiyun #define PCM3060_REG_AT2_MAX 0xFF 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #define PCM3060_REG67 0x43 56*4882a593Smuzhiyun #define PCM3060_REG72 0x48 57*4882a593Smuzhiyun #define PCM3060_REG_CSEL 0x80 58*4882a593Smuzhiyun #define PCM3060_REG_MASK_MS 0x70 59*4882a593Smuzhiyun #define PCM3060_REG_MS_S 0x00 60*4882a593Smuzhiyun #define PCM3060_REG_MS_M768 (0x01 << 4) 61*4882a593Smuzhiyun #define PCM3060_REG_MS_M512 (0x02 << 4) 62*4882a593Smuzhiyun #define PCM3060_REG_MS_M384 (0x03 << 4) 63*4882a593Smuzhiyun #define PCM3060_REG_MS_M256 (0x04 << 4) 64*4882a593Smuzhiyun #define PCM3060_REG_MS_M192 (0x05 << 4) 65*4882a593Smuzhiyun #define PCM3060_REG_MS_M128 (0x06 << 4) 66*4882a593Smuzhiyun #define PCM3060_REG_MASK_FMT 0x03 67*4882a593Smuzhiyun #define PCM3060_REG_FMT_I2S 0x00 68*4882a593Smuzhiyun #define PCM3060_REG_FMT_LJ 0x01 69*4882a593Smuzhiyun #define PCM3060_REG_FMT_RJ 0x02 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #define PCM3060_REG68 0x44 72*4882a593Smuzhiyun #define PCM3060_REG_OVER 0x40 73*4882a593Smuzhiyun #define PCM3060_REG_DREV2 0x04 74*4882a593Smuzhiyun #define PCM3060_REG_SHIFT_MUT21 0x00 75*4882a593Smuzhiyun #define PCM3060_REG_SHIFT_MUT22 0x01 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun #define PCM3060_REG69 0x45 78*4882a593Smuzhiyun #define PCM3060_REG_FLT 0x80 79*4882a593Smuzhiyun #define PCM3060_REG_MASK_DMF 0x60 80*4882a593Smuzhiyun #define PCM3060_REG_DMC 0x10 81*4882a593Smuzhiyun #define PCM3060_REG_ZREV 0x02 82*4882a593Smuzhiyun #define PCM3060_REG_AZRO 0x01 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun #define PCM3060_REG70 0x46 85*4882a593Smuzhiyun #define PCM3060_REG71 0x47 86*4882a593Smuzhiyun #define PCM3060_REG_AT1_MIN 0x0E 87*4882a593Smuzhiyun #define PCM3060_REG_AT1_MAX 0xFF 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun #define PCM3060_REG73 0x49 90*4882a593Smuzhiyun #define PCM3060_REG_ZCDD 0x10 91*4882a593Smuzhiyun #define PCM3060_REG_BYP 0x08 92*4882a593Smuzhiyun #define PCM3060_REG_DREV1 0x04 93*4882a593Smuzhiyun #define PCM3060_REG_SHIFT_MUT11 0x00 94*4882a593Smuzhiyun #define PCM3060_REG_SHIFT_MUT12 0x01 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun #endif /* _SND_SOC_PCM3060_H */ 97