1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * PCM1681 ASoC codec driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) StreamUnlimited GmbH 2013
6*4882a593Smuzhiyun * Marek Belisko <marek.belisko@streamunlimited.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/slab.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/gpio.h>
13*4882a593Smuzhiyun #include <linux/i2c.h>
14*4882a593Smuzhiyun #include <linux/regmap.h>
15*4882a593Smuzhiyun #include <linux/of.h>
16*4882a593Smuzhiyun #include <linux/of_device.h>
17*4882a593Smuzhiyun #include <linux/of_gpio.h>
18*4882a593Smuzhiyun #include <sound/pcm.h>
19*4882a593Smuzhiyun #include <sound/pcm_params.h>
20*4882a593Smuzhiyun #include <sound/soc.h>
21*4882a593Smuzhiyun #include <sound/tlv.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define PCM1681_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
24*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_LE)
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #define PCM1681_PCM_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | \
27*4882a593Smuzhiyun SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
28*4882a593Smuzhiyun SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | \
29*4882a593Smuzhiyun SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #define PCM1681_SOFT_MUTE_ALL 0xff
32*4882a593Smuzhiyun #define PCM1681_DEEMPH_RATE_MASK 0x18
33*4882a593Smuzhiyun #define PCM1681_DEEMPH_MASK 0x01
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define PCM1681_ATT_CONTROL(X) (X <= 6 ? X : X + 9) /* Attenuation level */
36*4882a593Smuzhiyun #define PCM1681_SOFT_MUTE 0x07 /* Soft mute control register */
37*4882a593Smuzhiyun #define PCM1681_DAC_CONTROL 0x08 /* DAC operation control */
38*4882a593Smuzhiyun #define PCM1681_FMT_CONTROL 0x09 /* Audio interface data format */
39*4882a593Smuzhiyun #define PCM1681_DEEMPH_CONTROL 0x0a /* De-emphasis control */
40*4882a593Smuzhiyun #define PCM1681_ZERO_DETECT_STATUS 0x0e /* Zero detect status reg */
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun static const struct reg_default pcm1681_reg_defaults[] = {
43*4882a593Smuzhiyun { 0x01, 0xff },
44*4882a593Smuzhiyun { 0x02, 0xff },
45*4882a593Smuzhiyun { 0x03, 0xff },
46*4882a593Smuzhiyun { 0x04, 0xff },
47*4882a593Smuzhiyun { 0x05, 0xff },
48*4882a593Smuzhiyun { 0x06, 0xff },
49*4882a593Smuzhiyun { 0x07, 0x00 },
50*4882a593Smuzhiyun { 0x08, 0x00 },
51*4882a593Smuzhiyun { 0x09, 0x06 },
52*4882a593Smuzhiyun { 0x0A, 0x00 },
53*4882a593Smuzhiyun { 0x0B, 0xff },
54*4882a593Smuzhiyun { 0x0C, 0x0f },
55*4882a593Smuzhiyun { 0x0D, 0x00 },
56*4882a593Smuzhiyun { 0x10, 0xff },
57*4882a593Smuzhiyun { 0x11, 0xff },
58*4882a593Smuzhiyun { 0x12, 0x00 },
59*4882a593Smuzhiyun { 0x13, 0x00 },
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun
pcm1681_accessible_reg(struct device * dev,unsigned int reg)62*4882a593Smuzhiyun static bool pcm1681_accessible_reg(struct device *dev, unsigned int reg)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun return !((reg == 0x00) || (reg == 0x0f));
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
pcm1681_writeable_reg(struct device * dev,unsigned int reg)67*4882a593Smuzhiyun static bool pcm1681_writeable_reg(struct device *dev, unsigned int reg)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun return pcm1681_accessible_reg(dev, reg) &&
70*4882a593Smuzhiyun (reg != PCM1681_ZERO_DETECT_STATUS);
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun struct pcm1681_private {
74*4882a593Smuzhiyun struct regmap *regmap;
75*4882a593Smuzhiyun unsigned int format;
76*4882a593Smuzhiyun /* Current deemphasis status */
77*4882a593Smuzhiyun unsigned int deemph;
78*4882a593Smuzhiyun /* Current rate for deemphasis control */
79*4882a593Smuzhiyun unsigned int rate;
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun static const int pcm1681_deemph[] = { 44100, 48000, 32000 };
83*4882a593Smuzhiyun
pcm1681_set_deemph(struct snd_soc_component * component)84*4882a593Smuzhiyun static int pcm1681_set_deemph(struct snd_soc_component *component)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun struct pcm1681_private *priv = snd_soc_component_get_drvdata(component);
87*4882a593Smuzhiyun int i = 0, val = -1, enable = 0;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun if (priv->deemph) {
90*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(pcm1681_deemph); i++) {
91*4882a593Smuzhiyun if (pcm1681_deemph[i] == priv->rate) {
92*4882a593Smuzhiyun val = i;
93*4882a593Smuzhiyun break;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun if (val != -1) {
99*4882a593Smuzhiyun regmap_update_bits(priv->regmap, PCM1681_DEEMPH_CONTROL,
100*4882a593Smuzhiyun PCM1681_DEEMPH_RATE_MASK, val << 3);
101*4882a593Smuzhiyun enable = 1;
102*4882a593Smuzhiyun } else {
103*4882a593Smuzhiyun enable = 0;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /* enable/disable deemphasis functionality */
107*4882a593Smuzhiyun return regmap_update_bits(priv->regmap, PCM1681_DEEMPH_CONTROL,
108*4882a593Smuzhiyun PCM1681_DEEMPH_MASK, enable);
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
pcm1681_get_deemph(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)111*4882a593Smuzhiyun static int pcm1681_get_deemph(struct snd_kcontrol *kcontrol,
112*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
115*4882a593Smuzhiyun struct pcm1681_private *priv = snd_soc_component_get_drvdata(component);
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun ucontrol->value.integer.value[0] = priv->deemph;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun return 0;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
pcm1681_put_deemph(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)122*4882a593Smuzhiyun static int pcm1681_put_deemph(struct snd_kcontrol *kcontrol,
123*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
126*4882a593Smuzhiyun struct pcm1681_private *priv = snd_soc_component_get_drvdata(component);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun priv->deemph = ucontrol->value.integer.value[0];
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun return pcm1681_set_deemph(component);
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
pcm1681_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int format)133*4882a593Smuzhiyun static int pcm1681_set_dai_fmt(struct snd_soc_dai *codec_dai,
134*4882a593Smuzhiyun unsigned int format)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun struct snd_soc_component *component = codec_dai->component;
137*4882a593Smuzhiyun struct pcm1681_private *priv = snd_soc_component_get_drvdata(component);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun /* The PCM1681 can only be slave to all clocks */
140*4882a593Smuzhiyun if ((format & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) {
141*4882a593Smuzhiyun dev_err(component->dev, "Invalid clocking mode\n");
142*4882a593Smuzhiyun return -EINVAL;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun priv->format = format;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun return 0;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
pcm1681_mute(struct snd_soc_dai * dai,int mute,int direction)150*4882a593Smuzhiyun static int pcm1681_mute(struct snd_soc_dai *dai, int mute, int direction)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
153*4882a593Smuzhiyun struct pcm1681_private *priv = snd_soc_component_get_drvdata(component);
154*4882a593Smuzhiyun int val;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun if (mute)
157*4882a593Smuzhiyun val = PCM1681_SOFT_MUTE_ALL;
158*4882a593Smuzhiyun else
159*4882a593Smuzhiyun val = 0;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun return regmap_write(priv->regmap, PCM1681_SOFT_MUTE, val);
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun
pcm1681_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)164*4882a593Smuzhiyun static int pcm1681_hw_params(struct snd_pcm_substream *substream,
165*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
166*4882a593Smuzhiyun struct snd_soc_dai *dai)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
169*4882a593Smuzhiyun struct pcm1681_private *priv = snd_soc_component_get_drvdata(component);
170*4882a593Smuzhiyun int val = 0, ret;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun priv->rate = params_rate(params);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun switch (priv->format & SND_SOC_DAIFMT_FORMAT_MASK) {
175*4882a593Smuzhiyun case SND_SOC_DAIFMT_RIGHT_J:
176*4882a593Smuzhiyun switch (params_width(params)) {
177*4882a593Smuzhiyun case 24:
178*4882a593Smuzhiyun val = 0;
179*4882a593Smuzhiyun break;
180*4882a593Smuzhiyun case 16:
181*4882a593Smuzhiyun val = 3;
182*4882a593Smuzhiyun break;
183*4882a593Smuzhiyun default:
184*4882a593Smuzhiyun return -EINVAL;
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun break;
187*4882a593Smuzhiyun case SND_SOC_DAIFMT_I2S:
188*4882a593Smuzhiyun val = 0x04;
189*4882a593Smuzhiyun break;
190*4882a593Smuzhiyun case SND_SOC_DAIFMT_LEFT_J:
191*4882a593Smuzhiyun val = 0x05;
192*4882a593Smuzhiyun break;
193*4882a593Smuzhiyun default:
194*4882a593Smuzhiyun dev_err(component->dev, "Invalid DAI format\n");
195*4882a593Smuzhiyun return -EINVAL;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun ret = regmap_update_bits(priv->regmap, PCM1681_FMT_CONTROL, 0x0f, val);
199*4882a593Smuzhiyun if (ret < 0)
200*4882a593Smuzhiyun return ret;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun return pcm1681_set_deemph(component);
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun static const struct snd_soc_dai_ops pcm1681_dai_ops = {
206*4882a593Smuzhiyun .set_fmt = pcm1681_set_dai_fmt,
207*4882a593Smuzhiyun .hw_params = pcm1681_hw_params,
208*4882a593Smuzhiyun .mute_stream = pcm1681_mute,
209*4882a593Smuzhiyun .no_capture_mute = 1,
210*4882a593Smuzhiyun };
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun static const struct snd_soc_dapm_widget pcm1681_dapm_widgets[] = {
213*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUT1"),
214*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUT2"),
215*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUT3"),
216*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUT4"),
217*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUT5"),
218*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUT6"),
219*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUT7"),
220*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("VOUT8"),
221*4882a593Smuzhiyun };
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun static const struct snd_soc_dapm_route pcm1681_dapm_routes[] = {
224*4882a593Smuzhiyun { "VOUT1", NULL, "Playback" },
225*4882a593Smuzhiyun { "VOUT2", NULL, "Playback" },
226*4882a593Smuzhiyun { "VOUT3", NULL, "Playback" },
227*4882a593Smuzhiyun { "VOUT4", NULL, "Playback" },
228*4882a593Smuzhiyun { "VOUT5", NULL, "Playback" },
229*4882a593Smuzhiyun { "VOUT6", NULL, "Playback" },
230*4882a593Smuzhiyun { "VOUT7", NULL, "Playback" },
231*4882a593Smuzhiyun { "VOUT8", NULL, "Playback" },
232*4882a593Smuzhiyun };
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(pcm1681_dac_tlv, -6350, 50, 1);
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun static const struct snd_kcontrol_new pcm1681_controls[] = {
237*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Channel 1/2 Playback Volume",
238*4882a593Smuzhiyun PCM1681_ATT_CONTROL(1), PCM1681_ATT_CONTROL(2), 0,
239*4882a593Smuzhiyun 0x7f, 0, pcm1681_dac_tlv),
240*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Channel 3/4 Playback Volume",
241*4882a593Smuzhiyun PCM1681_ATT_CONTROL(3), PCM1681_ATT_CONTROL(4), 0,
242*4882a593Smuzhiyun 0x7f, 0, pcm1681_dac_tlv),
243*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Channel 5/6 Playback Volume",
244*4882a593Smuzhiyun PCM1681_ATT_CONTROL(5), PCM1681_ATT_CONTROL(6), 0,
245*4882a593Smuzhiyun 0x7f, 0, pcm1681_dac_tlv),
246*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Channel 7/8 Playback Volume",
247*4882a593Smuzhiyun PCM1681_ATT_CONTROL(7), PCM1681_ATT_CONTROL(8), 0,
248*4882a593Smuzhiyun 0x7f, 0, pcm1681_dac_tlv),
249*4882a593Smuzhiyun SOC_SINGLE_BOOL_EXT("De-emphasis Switch", 0,
250*4882a593Smuzhiyun pcm1681_get_deemph, pcm1681_put_deemph),
251*4882a593Smuzhiyun };
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun static struct snd_soc_dai_driver pcm1681_dai = {
254*4882a593Smuzhiyun .name = "pcm1681-hifi",
255*4882a593Smuzhiyun .playback = {
256*4882a593Smuzhiyun .stream_name = "Playback",
257*4882a593Smuzhiyun .channels_min = 2,
258*4882a593Smuzhiyun .channels_max = 8,
259*4882a593Smuzhiyun .rates = PCM1681_PCM_RATES,
260*4882a593Smuzhiyun .formats = PCM1681_PCM_FORMATS,
261*4882a593Smuzhiyun },
262*4882a593Smuzhiyun .ops = &pcm1681_dai_ops,
263*4882a593Smuzhiyun };
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun #ifdef CONFIG_OF
266*4882a593Smuzhiyun static const struct of_device_id pcm1681_dt_ids[] = {
267*4882a593Smuzhiyun { .compatible = "ti,pcm1681", },
268*4882a593Smuzhiyun { }
269*4882a593Smuzhiyun };
270*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, pcm1681_dt_ids);
271*4882a593Smuzhiyun #endif
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun static const struct regmap_config pcm1681_regmap = {
274*4882a593Smuzhiyun .reg_bits = 8,
275*4882a593Smuzhiyun .val_bits = 8,
276*4882a593Smuzhiyun .max_register = 0x13,
277*4882a593Smuzhiyun .reg_defaults = pcm1681_reg_defaults,
278*4882a593Smuzhiyun .num_reg_defaults = ARRAY_SIZE(pcm1681_reg_defaults),
279*4882a593Smuzhiyun .writeable_reg = pcm1681_writeable_reg,
280*4882a593Smuzhiyun .readable_reg = pcm1681_accessible_reg,
281*4882a593Smuzhiyun };
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_dev_pcm1681 = {
284*4882a593Smuzhiyun .controls = pcm1681_controls,
285*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(pcm1681_controls),
286*4882a593Smuzhiyun .dapm_widgets = pcm1681_dapm_widgets,
287*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(pcm1681_dapm_widgets),
288*4882a593Smuzhiyun .dapm_routes = pcm1681_dapm_routes,
289*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(pcm1681_dapm_routes),
290*4882a593Smuzhiyun .idle_bias_on = 1,
291*4882a593Smuzhiyun .use_pmdown_time = 1,
292*4882a593Smuzhiyun .endianness = 1,
293*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
294*4882a593Smuzhiyun };
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun static const struct i2c_device_id pcm1681_i2c_id[] = {
297*4882a593Smuzhiyun {"pcm1681", 0},
298*4882a593Smuzhiyun {}
299*4882a593Smuzhiyun };
300*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, pcm1681_i2c_id);
301*4882a593Smuzhiyun
pcm1681_i2c_probe(struct i2c_client * client,const struct i2c_device_id * id)302*4882a593Smuzhiyun static int pcm1681_i2c_probe(struct i2c_client *client,
303*4882a593Smuzhiyun const struct i2c_device_id *id)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun int ret;
306*4882a593Smuzhiyun struct pcm1681_private *priv;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
309*4882a593Smuzhiyun if (!priv)
310*4882a593Smuzhiyun return -ENOMEM;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun priv->regmap = devm_regmap_init_i2c(client, &pcm1681_regmap);
313*4882a593Smuzhiyun if (IS_ERR(priv->regmap)) {
314*4882a593Smuzhiyun ret = PTR_ERR(priv->regmap);
315*4882a593Smuzhiyun dev_err(&client->dev, "Failed to create regmap: %d\n", ret);
316*4882a593Smuzhiyun return ret;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun i2c_set_clientdata(client, priv);
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun return devm_snd_soc_register_component(&client->dev,
322*4882a593Smuzhiyun &soc_component_dev_pcm1681,
323*4882a593Smuzhiyun &pcm1681_dai, 1);
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun static struct i2c_driver pcm1681_i2c_driver = {
327*4882a593Smuzhiyun .driver = {
328*4882a593Smuzhiyun .name = "pcm1681",
329*4882a593Smuzhiyun .of_match_table = of_match_ptr(pcm1681_dt_ids),
330*4882a593Smuzhiyun },
331*4882a593Smuzhiyun .id_table = pcm1681_i2c_id,
332*4882a593Smuzhiyun .probe = pcm1681_i2c_probe,
333*4882a593Smuzhiyun };
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun module_i2c_driver(pcm1681_i2c_driver);
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun MODULE_DESCRIPTION("Texas Instruments PCM1681 ALSA SoC Codec Driver");
338*4882a593Smuzhiyun MODULE_AUTHOR("Marek Belisko <marek.belisko@streamunlimited.com>");
339*4882a593Smuzhiyun MODULE_LICENSE("GPL");
340