xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/mc13783.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
4*4882a593Smuzhiyun  * Copyright 2009 Sascha Hauer, s.hauer@pengutronix.de
5*4882a593Smuzhiyun  * Copyright 2012 Philippe Retornaz, philippe.retornaz@epfl.ch
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Initial development of this code was funded by
8*4882a593Smuzhiyun  * Phytec Messtechnik GmbH, https://www.phytec.de
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/device.h>
12*4882a593Smuzhiyun #include <linux/of.h>
13*4882a593Smuzhiyun #include <linux/mfd/mc13xxx.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <sound/core.h>
16*4882a593Smuzhiyun #include <sound/control.h>
17*4882a593Smuzhiyun #include <sound/pcm.h>
18*4882a593Smuzhiyun #include <sound/soc.h>
19*4882a593Smuzhiyun #include <sound/initval.h>
20*4882a593Smuzhiyun #include <sound/soc-dapm.h>
21*4882a593Smuzhiyun #include <linux/regmap.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include "mc13783.h"
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #define AUDIO_RX0_ALSPEN		(1 << 5)
26*4882a593Smuzhiyun #define AUDIO_RX0_ALSPSEL		(1 << 7)
27*4882a593Smuzhiyun #define AUDIO_RX0_ADDCDC		(1 << 21)
28*4882a593Smuzhiyun #define AUDIO_RX0_ADDSTDC		(1 << 22)
29*4882a593Smuzhiyun #define AUDIO_RX0_ADDRXIN		(1 << 23)
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define AUDIO_RX1_PGARXEN		(1 << 0);
32*4882a593Smuzhiyun #define AUDIO_RX1_PGASTEN		(1 << 5)
33*4882a593Smuzhiyun #define AUDIO_RX1_ARXINEN		(1 << 10)
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #define AUDIO_TX_AMC1REN		(1 << 5)
36*4882a593Smuzhiyun #define AUDIO_TX_AMC1LEN		(1 << 7)
37*4882a593Smuzhiyun #define AUDIO_TX_AMC2EN			(1 << 9)
38*4882a593Smuzhiyun #define AUDIO_TX_ATXINEN		(1 << 11)
39*4882a593Smuzhiyun #define AUDIO_TX_RXINREC		(1 << 13)
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define SSI_NETWORK_CDCTXRXSLOT(x)	(((x) & 0x3) << 2)
42*4882a593Smuzhiyun #define SSI_NETWORK_CDCTXSECSLOT(x)	(((x) & 0x3) << 4)
43*4882a593Smuzhiyun #define SSI_NETWORK_CDCRXSECSLOT(x)	(((x) & 0x3) << 6)
44*4882a593Smuzhiyun #define SSI_NETWORK_CDCRXSECGAIN(x)	(((x) & 0x3) << 8)
45*4882a593Smuzhiyun #define SSI_NETWORK_CDCSUMGAIN(x)	(1 << 10)
46*4882a593Smuzhiyun #define SSI_NETWORK_CDCFSDLY(x)		(1 << 11)
47*4882a593Smuzhiyun #define SSI_NETWORK_DAC_SLOTS_8		(1 << 12)
48*4882a593Smuzhiyun #define SSI_NETWORK_DAC_SLOTS_4		(2 << 12)
49*4882a593Smuzhiyun #define SSI_NETWORK_DAC_SLOTS_2		(3 << 12)
50*4882a593Smuzhiyun #define SSI_NETWORK_DAC_SLOT_MASK	(3 << 12)
51*4882a593Smuzhiyun #define SSI_NETWORK_DAC_RXSLOT_0_1	(0 << 14)
52*4882a593Smuzhiyun #define SSI_NETWORK_DAC_RXSLOT_2_3	(1 << 14)
53*4882a593Smuzhiyun #define SSI_NETWORK_DAC_RXSLOT_4_5	(2 << 14)
54*4882a593Smuzhiyun #define SSI_NETWORK_DAC_RXSLOT_6_7	(3 << 14)
55*4882a593Smuzhiyun #define SSI_NETWORK_DAC_RXSLOT_MASK	(3 << 14)
56*4882a593Smuzhiyun #define SSI_NETWORK_STDCRXSECSLOT(x)	(((x) & 0x3) << 16)
57*4882a593Smuzhiyun #define SSI_NETWORK_STDCRXSECGAIN(x)	(((x) & 0x3) << 18)
58*4882a593Smuzhiyun #define SSI_NETWORK_STDCSUMGAIN		(1 << 20)
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /*
61*4882a593Smuzhiyun  * MC13783_AUDIO_CODEC and MC13783_AUDIO_DAC mostly share the same
62*4882a593Smuzhiyun  * register layout
63*4882a593Smuzhiyun  */
64*4882a593Smuzhiyun #define AUDIO_SSI_SEL			(1 << 0)
65*4882a593Smuzhiyun #define AUDIO_CLK_SEL			(1 << 1)
66*4882a593Smuzhiyun #define AUDIO_CSM			(1 << 2)
67*4882a593Smuzhiyun #define AUDIO_BCL_INV			(1 << 3)
68*4882a593Smuzhiyun #define AUDIO_CFS_INV			(1 << 4)
69*4882a593Smuzhiyun #define AUDIO_CFS(x)			(((x) & 0x3) << 5)
70*4882a593Smuzhiyun #define AUDIO_CLK(x)			(((x) & 0x7) << 7)
71*4882a593Smuzhiyun #define AUDIO_C_EN			(1 << 11)
72*4882a593Smuzhiyun #define AUDIO_C_CLK_EN			(1 << 12)
73*4882a593Smuzhiyun #define AUDIO_C_RESET			(1 << 15)
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun #define AUDIO_CODEC_CDCFS8K16K		(1 << 10)
76*4882a593Smuzhiyun #define AUDIO_DAC_CFS_DLY_B		(1 << 10)
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun struct mc13783_priv {
79*4882a593Smuzhiyun 	struct mc13xxx *mc13xxx;
80*4882a593Smuzhiyun 	struct regmap *regmap;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	enum mc13783_ssi_port adc_ssi_port;
83*4882a593Smuzhiyun 	enum mc13783_ssi_port dac_ssi_port;
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun /* Mapping between sample rates and register value */
87*4882a593Smuzhiyun static unsigned int mc13783_rates[] = {
88*4882a593Smuzhiyun 	8000, 11025, 12000, 16000,
89*4882a593Smuzhiyun 	22050, 24000, 32000, 44100,
90*4882a593Smuzhiyun 	48000, 64000, 96000
91*4882a593Smuzhiyun };
92*4882a593Smuzhiyun 
mc13783_pcm_hw_params_dac(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)93*4882a593Smuzhiyun static int mc13783_pcm_hw_params_dac(struct snd_pcm_substream *substream,
94*4882a593Smuzhiyun 				struct snd_pcm_hw_params *params,
95*4882a593Smuzhiyun 				struct snd_soc_dai *dai)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
98*4882a593Smuzhiyun 	unsigned int rate = params_rate(params);
99*4882a593Smuzhiyun 	int i;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(mc13783_rates); i++) {
102*4882a593Smuzhiyun 		if (rate == mc13783_rates[i]) {
103*4882a593Smuzhiyun 			snd_soc_component_update_bits(component, MC13783_AUDIO_DAC,
104*4882a593Smuzhiyun 					0xf << 17, i << 17);
105*4882a593Smuzhiyun 			return 0;
106*4882a593Smuzhiyun 		}
107*4882a593Smuzhiyun 	}
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	return -EINVAL;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun 
mc13783_pcm_hw_params_codec(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)112*4882a593Smuzhiyun static int mc13783_pcm_hw_params_codec(struct snd_pcm_substream *substream,
113*4882a593Smuzhiyun 				struct snd_pcm_hw_params *params,
114*4882a593Smuzhiyun 				struct snd_soc_dai *dai)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
117*4882a593Smuzhiyun 	unsigned int rate = params_rate(params);
118*4882a593Smuzhiyun 	unsigned int val;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	switch (rate) {
121*4882a593Smuzhiyun 	case 8000:
122*4882a593Smuzhiyun 		val = 0;
123*4882a593Smuzhiyun 		break;
124*4882a593Smuzhiyun 	case 16000:
125*4882a593Smuzhiyun 		val = AUDIO_CODEC_CDCFS8K16K;
126*4882a593Smuzhiyun 		break;
127*4882a593Smuzhiyun 	default:
128*4882a593Smuzhiyun 		return -EINVAL;
129*4882a593Smuzhiyun 	}
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, MC13783_AUDIO_CODEC, AUDIO_CODEC_CDCFS8K16K,
132*4882a593Smuzhiyun 			val);
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	return 0;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun 
mc13783_pcm_hw_params_sync(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)137*4882a593Smuzhiyun static int mc13783_pcm_hw_params_sync(struct snd_pcm_substream *substream,
138*4882a593Smuzhiyun 				struct snd_pcm_hw_params *params,
139*4882a593Smuzhiyun 				struct snd_soc_dai *dai)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
142*4882a593Smuzhiyun 		return mc13783_pcm_hw_params_dac(substream, params, dai);
143*4882a593Smuzhiyun 	else
144*4882a593Smuzhiyun 		return mc13783_pcm_hw_params_codec(substream, params, dai);
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun 
mc13783_set_fmt(struct snd_soc_dai * dai,unsigned int fmt,unsigned int reg)147*4882a593Smuzhiyun static int mc13783_set_fmt(struct snd_soc_dai *dai, unsigned int fmt,
148*4882a593Smuzhiyun 			unsigned int reg)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
151*4882a593Smuzhiyun 	unsigned int val = 0;
152*4882a593Smuzhiyun 	unsigned int mask = AUDIO_CFS(3) | AUDIO_BCL_INV | AUDIO_CFS_INV |
153*4882a593Smuzhiyun 				AUDIO_CSM | AUDIO_C_CLK_EN | AUDIO_C_RESET;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	/* DAI mode */
157*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
158*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_I2S:
159*4882a593Smuzhiyun 		val |= AUDIO_CFS(2);
160*4882a593Smuzhiyun 		break;
161*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_DSP_A:
162*4882a593Smuzhiyun 		val |= AUDIO_CFS(1);
163*4882a593Smuzhiyun 		break;
164*4882a593Smuzhiyun 	default:
165*4882a593Smuzhiyun 		return -EINVAL;
166*4882a593Smuzhiyun 	}
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	/* DAI clock inversion */
169*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
170*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_NF:
171*4882a593Smuzhiyun 		val |= AUDIO_BCL_INV;
172*4882a593Smuzhiyun 		break;
173*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_IF:
174*4882a593Smuzhiyun 		val |= AUDIO_BCL_INV | AUDIO_CFS_INV;
175*4882a593Smuzhiyun 		break;
176*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_IB_NF:
177*4882a593Smuzhiyun 		break;
178*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_IB_IF:
179*4882a593Smuzhiyun 		val |= AUDIO_CFS_INV;
180*4882a593Smuzhiyun 		break;
181*4882a593Smuzhiyun 	}
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	/* DAI clock master masks */
184*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
185*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBM_CFM:
186*4882a593Smuzhiyun 		val |= AUDIO_C_CLK_EN;
187*4882a593Smuzhiyun 		break;
188*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBS_CFS:
189*4882a593Smuzhiyun 		val |= AUDIO_CSM;
190*4882a593Smuzhiyun 		break;
191*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBM_CFS:
192*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_CBS_CFM:
193*4882a593Smuzhiyun 		return -EINVAL;
194*4882a593Smuzhiyun 	}
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	val |= AUDIO_C_RESET;
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, reg, mask, val);
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	return 0;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun 
mc13783_set_fmt_async(struct snd_soc_dai * dai,unsigned int fmt)203*4882a593Smuzhiyun static int mc13783_set_fmt_async(struct snd_soc_dai *dai, unsigned int fmt)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun 	if (dai->id == MC13783_ID_STEREO_DAC)
206*4882a593Smuzhiyun 		return mc13783_set_fmt(dai, fmt, MC13783_AUDIO_DAC);
207*4882a593Smuzhiyun 	else
208*4882a593Smuzhiyun 		return mc13783_set_fmt(dai, fmt, MC13783_AUDIO_CODEC);
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun 
mc13783_set_fmt_sync(struct snd_soc_dai * dai,unsigned int fmt)211*4882a593Smuzhiyun static int mc13783_set_fmt_sync(struct snd_soc_dai *dai, unsigned int fmt)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun 	int ret;
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	ret = mc13783_set_fmt(dai, fmt, MC13783_AUDIO_DAC);
216*4882a593Smuzhiyun 	if (ret)
217*4882a593Smuzhiyun 		return ret;
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	/*
220*4882a593Smuzhiyun 	 * In synchronous mode force the voice codec into slave mode
221*4882a593Smuzhiyun 	 * so that the clock / framesync from the stereo DAC is used
222*4882a593Smuzhiyun 	 */
223*4882a593Smuzhiyun 	fmt &= ~SND_SOC_DAIFMT_MASTER_MASK;
224*4882a593Smuzhiyun 	fmt |= SND_SOC_DAIFMT_CBS_CFS;
225*4882a593Smuzhiyun 	ret = mc13783_set_fmt(dai, fmt, MC13783_AUDIO_CODEC);
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	return ret;
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun static int mc13783_sysclk[] = {
231*4882a593Smuzhiyun 	13000000,
232*4882a593Smuzhiyun 	15360000,
233*4882a593Smuzhiyun 	16800000,
234*4882a593Smuzhiyun 	-1,
235*4882a593Smuzhiyun 	26000000,
236*4882a593Smuzhiyun 	-1, /* 12000000, invalid for voice codec */
237*4882a593Smuzhiyun 	-1, /* 3686400, invalid for voice codec */
238*4882a593Smuzhiyun 	33600000,
239*4882a593Smuzhiyun };
240*4882a593Smuzhiyun 
mc13783_set_sysclk(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir,unsigned int reg)241*4882a593Smuzhiyun static int mc13783_set_sysclk(struct snd_soc_dai *dai,
242*4882a593Smuzhiyun 				  int clk_id, unsigned int freq, int dir,
243*4882a593Smuzhiyun 				  unsigned int reg)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
246*4882a593Smuzhiyun 	int clk;
247*4882a593Smuzhiyun 	unsigned int val = 0;
248*4882a593Smuzhiyun 	unsigned int mask = AUDIO_CLK(0x7) | AUDIO_CLK_SEL;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	for (clk = 0; clk < ARRAY_SIZE(mc13783_sysclk); clk++) {
251*4882a593Smuzhiyun 		if (mc13783_sysclk[clk] < 0)
252*4882a593Smuzhiyun 			continue;
253*4882a593Smuzhiyun 		if (mc13783_sysclk[clk] == freq)
254*4882a593Smuzhiyun 			break;
255*4882a593Smuzhiyun 	}
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	if (clk == ARRAY_SIZE(mc13783_sysclk))
258*4882a593Smuzhiyun 		return -EINVAL;
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	if (clk_id == MC13783_CLK_CLIB)
261*4882a593Smuzhiyun 		val |= AUDIO_CLK_SEL;
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	val |= AUDIO_CLK(clk);
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, reg, mask, val);
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	return 0;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun 
mc13783_set_sysclk_dac(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)270*4882a593Smuzhiyun static int mc13783_set_sysclk_dac(struct snd_soc_dai *dai,
271*4882a593Smuzhiyun 				  int clk_id, unsigned int freq, int dir)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun 	return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_DAC);
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun 
mc13783_set_sysclk_codec(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)276*4882a593Smuzhiyun static int mc13783_set_sysclk_codec(struct snd_soc_dai *dai,
277*4882a593Smuzhiyun 				  int clk_id, unsigned int freq, int dir)
278*4882a593Smuzhiyun {
279*4882a593Smuzhiyun 	return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_CODEC);
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun 
mc13783_set_sysclk_sync(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)282*4882a593Smuzhiyun static int mc13783_set_sysclk_sync(struct snd_soc_dai *dai,
283*4882a593Smuzhiyun 				  int clk_id, unsigned int freq, int dir)
284*4882a593Smuzhiyun {
285*4882a593Smuzhiyun 	int ret;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	ret = mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_DAC);
288*4882a593Smuzhiyun 	if (ret)
289*4882a593Smuzhiyun 		return ret;
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 	return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_CODEC);
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun 
mc13783_set_tdm_slot_dac(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)294*4882a593Smuzhiyun static int mc13783_set_tdm_slot_dac(struct snd_soc_dai *dai,
295*4882a593Smuzhiyun 	unsigned int tx_mask, unsigned int rx_mask, int slots,
296*4882a593Smuzhiyun 	int slot_width)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
299*4882a593Smuzhiyun 	unsigned int val = 0;
300*4882a593Smuzhiyun 	unsigned int mask = SSI_NETWORK_DAC_SLOT_MASK |
301*4882a593Smuzhiyun 				SSI_NETWORK_DAC_RXSLOT_MASK;
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 	switch (slots) {
304*4882a593Smuzhiyun 	case 2:
305*4882a593Smuzhiyun 		val |= SSI_NETWORK_DAC_SLOTS_2;
306*4882a593Smuzhiyun 		break;
307*4882a593Smuzhiyun 	case 4:
308*4882a593Smuzhiyun 		val |= SSI_NETWORK_DAC_SLOTS_4;
309*4882a593Smuzhiyun 		break;
310*4882a593Smuzhiyun 	case 8:
311*4882a593Smuzhiyun 		val |= SSI_NETWORK_DAC_SLOTS_8;
312*4882a593Smuzhiyun 		break;
313*4882a593Smuzhiyun 	default:
314*4882a593Smuzhiyun 		return -EINVAL;
315*4882a593Smuzhiyun 	}
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	switch (rx_mask) {
318*4882a593Smuzhiyun 	case 0x03:
319*4882a593Smuzhiyun 		val |= SSI_NETWORK_DAC_RXSLOT_0_1;
320*4882a593Smuzhiyun 		break;
321*4882a593Smuzhiyun 	case 0x0c:
322*4882a593Smuzhiyun 		val |= SSI_NETWORK_DAC_RXSLOT_2_3;
323*4882a593Smuzhiyun 		break;
324*4882a593Smuzhiyun 	case 0x30:
325*4882a593Smuzhiyun 		val |= SSI_NETWORK_DAC_RXSLOT_4_5;
326*4882a593Smuzhiyun 		break;
327*4882a593Smuzhiyun 	case 0xc0:
328*4882a593Smuzhiyun 		val |= SSI_NETWORK_DAC_RXSLOT_6_7;
329*4882a593Smuzhiyun 		break;
330*4882a593Smuzhiyun 	default:
331*4882a593Smuzhiyun 		return -EINVAL;
332*4882a593Smuzhiyun 	}
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, MC13783_SSI_NETWORK, mask, val);
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	return 0;
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun 
mc13783_set_tdm_slot_codec(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)339*4882a593Smuzhiyun static int mc13783_set_tdm_slot_codec(struct snd_soc_dai *dai,
340*4882a593Smuzhiyun 	unsigned int tx_mask, unsigned int rx_mask, int slots,
341*4882a593Smuzhiyun 	int slot_width)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
344*4882a593Smuzhiyun 	unsigned int val = 0;
345*4882a593Smuzhiyun 	unsigned int mask = 0x3f;
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun 	if (slots != 4)
348*4882a593Smuzhiyun 		return -EINVAL;
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	if (tx_mask != 0x3)
351*4882a593Smuzhiyun 		return -EINVAL;
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	val |= (0x00 << 2);	/* primary timeslot RX/TX(?) is 0 */
354*4882a593Smuzhiyun 	val |= (0x01 << 4);	/* secondary timeslot TX is 1 */
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, MC13783_SSI_NETWORK, mask, val);
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	return 0;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun 
mc13783_set_tdm_slot_sync(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)361*4882a593Smuzhiyun static int mc13783_set_tdm_slot_sync(struct snd_soc_dai *dai,
362*4882a593Smuzhiyun 	unsigned int tx_mask, unsigned int rx_mask, int slots,
363*4882a593Smuzhiyun 	int slot_width)
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun 	int ret;
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	ret = mc13783_set_tdm_slot_dac(dai, tx_mask, rx_mask, slots,
368*4882a593Smuzhiyun 			slot_width);
369*4882a593Smuzhiyun 	if (ret)
370*4882a593Smuzhiyun 		return ret;
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 	ret = mc13783_set_tdm_slot_codec(dai, tx_mask, rx_mask, slots,
373*4882a593Smuzhiyun 			slot_width);
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	return ret;
376*4882a593Smuzhiyun }
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun static const struct snd_kcontrol_new mc1l_amp_ctl =
379*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 7, 1, 0);
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun static const struct snd_kcontrol_new mc1r_amp_ctl =
382*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 5, 1, 0);
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun static const struct snd_kcontrol_new mc2_amp_ctl =
385*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 9, 1, 0);
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun static const struct snd_kcontrol_new atx_amp_ctl =
388*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 11, 1, 0);
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun /* Virtual mux. The chip does the input selection automatically
392*4882a593Smuzhiyun  * as soon as we enable one input. */
393*4882a593Smuzhiyun static const char * const adcl_enum_text[] = {
394*4882a593Smuzhiyun 	"MC1L", "RXINL",
395*4882a593Smuzhiyun };
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun static SOC_ENUM_SINGLE_VIRT_DECL(adcl_enum, adcl_enum_text);
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun static const struct snd_kcontrol_new left_input_mux =
400*4882a593Smuzhiyun 	SOC_DAPM_ENUM("Route", adcl_enum);
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun static const char * const adcr_enum_text[] = {
403*4882a593Smuzhiyun 	"MC1R", "MC2", "RXINR", "TXIN",
404*4882a593Smuzhiyun };
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun static SOC_ENUM_SINGLE_VIRT_DECL(adcr_enum, adcr_enum_text);
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun static const struct snd_kcontrol_new right_input_mux =
409*4882a593Smuzhiyun 	SOC_DAPM_ENUM("Route", adcr_enum);
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun static const struct snd_kcontrol_new samp_ctl =
412*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 3, 1, 0);
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun static const char * const speaker_amp_source_text[] = {
415*4882a593Smuzhiyun 	"CODEC", "Right"
416*4882a593Smuzhiyun };
417*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(speaker_amp_source, MC13783_AUDIO_RX0, 4,
418*4882a593Smuzhiyun 			    speaker_amp_source_text);
419*4882a593Smuzhiyun static const struct snd_kcontrol_new speaker_amp_source_mux =
420*4882a593Smuzhiyun 	SOC_DAPM_ENUM("Speaker Amp Source MUX", speaker_amp_source);
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun static const char * const headset_amp_source_text[] = {
423*4882a593Smuzhiyun 	"CODEC", "Mixer"
424*4882a593Smuzhiyun };
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(headset_amp_source, MC13783_AUDIO_RX0, 11,
427*4882a593Smuzhiyun 			    headset_amp_source_text);
428*4882a593Smuzhiyun static const struct snd_kcontrol_new headset_amp_source_mux =
429*4882a593Smuzhiyun 	SOC_DAPM_ENUM("Headset Amp Source MUX", headset_amp_source);
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun static const struct snd_kcontrol_new cdcout_ctl =
432*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 18, 1, 0);
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun static const struct snd_kcontrol_new adc_bypass_ctl =
435*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_CODEC, 16, 1, 0);
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun static const struct snd_kcontrol_new lamp_ctl =
438*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 5, 1, 0);
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun static const struct snd_kcontrol_new hlamp_ctl =
441*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 10, 1, 0);
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun static const struct snd_kcontrol_new hramp_ctl =
444*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 9, 1, 0);
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun static const struct snd_kcontrol_new llamp_ctl =
447*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 16, 1, 0);
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun static const struct snd_kcontrol_new lramp_ctl =
450*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 15, 1, 0);
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun static const struct snd_soc_dapm_widget mc13783_dapm_widgets[] = {
453*4882a593Smuzhiyun /* Input */
454*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("MC1LIN"),
455*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("MC1RIN"),
456*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("MC2IN"),
457*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("RXINR"),
458*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("RXINL"),
459*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("TXIN"),
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("MC1 Bias", MC13783_AUDIO_TX, 0, 0, NULL, 0),
462*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("MC2 Bias", MC13783_AUDIO_TX, 1, 0, NULL, 0),
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	SND_SOC_DAPM_SWITCH("MC1L Amp", MC13783_AUDIO_TX, 7, 0, &mc1l_amp_ctl),
465*4882a593Smuzhiyun 	SND_SOC_DAPM_SWITCH("MC1R Amp", MC13783_AUDIO_TX, 5, 0, &mc1r_amp_ctl),
466*4882a593Smuzhiyun 	SND_SOC_DAPM_SWITCH("MC2 Amp", MC13783_AUDIO_TX, 9, 0, &mc2_amp_ctl),
467*4882a593Smuzhiyun 	SND_SOC_DAPM_SWITCH("TXIN Amp", MC13783_AUDIO_TX, 11, 0, &atx_amp_ctl),
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	SND_SOC_DAPM_MUX("PGA Left Input Mux", SND_SOC_NOPM, 0, 0,
470*4882a593Smuzhiyun 			      &left_input_mux),
471*4882a593Smuzhiyun 	SND_SOC_DAPM_MUX("PGA Right Input Mux", SND_SOC_NOPM, 0, 0,
472*4882a593Smuzhiyun 			      &right_input_mux),
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 	SND_SOC_DAPM_MUX("Speaker Amp Source MUX", SND_SOC_NOPM, 0, 0,
475*4882a593Smuzhiyun 			 &speaker_amp_source_mux),
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	SND_SOC_DAPM_MUX("Headset Amp Source MUX", SND_SOC_NOPM, 0, 0,
478*4882a593Smuzhiyun 			 &headset_amp_source_mux),
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun 	SND_SOC_DAPM_PGA("PGA Left Input", SND_SOC_NOPM, 0, 0, NULL, 0),
481*4882a593Smuzhiyun 	SND_SOC_DAPM_PGA("PGA Right Input", SND_SOC_NOPM, 0, 0, NULL, 0),
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	SND_SOC_DAPM_ADC("ADC", "Capture", MC13783_AUDIO_CODEC, 11, 0),
484*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("ADC_Reset", MC13783_AUDIO_CODEC, 15, 0, NULL, 0),
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	SND_SOC_DAPM_PGA("Voice CODEC PGA", MC13783_AUDIO_RX1, 0, 0, NULL, 0),
487*4882a593Smuzhiyun 	SND_SOC_DAPM_SWITCH("Voice CODEC Bypass", MC13783_AUDIO_CODEC, 16, 0,
488*4882a593Smuzhiyun 			&adc_bypass_ctl),
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun /* Output */
491*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("DAC_E", MC13783_AUDIO_DAC, 11, 0, NULL, 0),
492*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("DAC_Reset", MC13783_AUDIO_DAC, 15, 0, NULL, 0),
493*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("RXOUTL"),
494*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("RXOUTR"),
495*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("HSL"),
496*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("HSR"),
497*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("LSPL"),
498*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("LSP"),
499*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("SP"),
500*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("CDCOUT"),
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun 	SND_SOC_DAPM_SWITCH("CDCOUT Switch", MC13783_AUDIO_RX0, 18, 0,
503*4882a593Smuzhiyun 			&cdcout_ctl),
504*4882a593Smuzhiyun 	SND_SOC_DAPM_SWITCH("Speaker Amp Switch", MC13783_AUDIO_RX0, 3, 0,
505*4882a593Smuzhiyun 			&samp_ctl),
506*4882a593Smuzhiyun 	SND_SOC_DAPM_SWITCH("Loudspeaker Amp", SND_SOC_NOPM, 0, 0, &lamp_ctl),
507*4882a593Smuzhiyun 	SND_SOC_DAPM_SWITCH("Headset Amp Left", MC13783_AUDIO_RX0, 10, 0,
508*4882a593Smuzhiyun 			&hlamp_ctl),
509*4882a593Smuzhiyun 	SND_SOC_DAPM_SWITCH("Headset Amp Right", MC13783_AUDIO_RX0, 9, 0,
510*4882a593Smuzhiyun 			&hramp_ctl),
511*4882a593Smuzhiyun 	SND_SOC_DAPM_SWITCH("Line out Amp Left", MC13783_AUDIO_RX0, 16, 0,
512*4882a593Smuzhiyun 			&llamp_ctl),
513*4882a593Smuzhiyun 	SND_SOC_DAPM_SWITCH("Line out Amp Right", MC13783_AUDIO_RX0, 15, 0,
514*4882a593Smuzhiyun 			&lramp_ctl),
515*4882a593Smuzhiyun 	SND_SOC_DAPM_DAC("DAC", "Playback", MC13783_AUDIO_RX0, 22, 0),
516*4882a593Smuzhiyun 	SND_SOC_DAPM_PGA("DAC PGA", MC13783_AUDIO_RX1, 5, 0, NULL, 0),
517*4882a593Smuzhiyun };
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun static struct snd_soc_dapm_route mc13783_routes[] = {
520*4882a593Smuzhiyun /* Input */
521*4882a593Smuzhiyun 	{ "MC1L Amp", NULL, "MC1LIN"},
522*4882a593Smuzhiyun 	{ "MC1R Amp", NULL, "MC1RIN" },
523*4882a593Smuzhiyun 	{ "MC2 Amp", NULL, "MC2IN" },
524*4882a593Smuzhiyun 	{ "TXIN Amp", NULL, "TXIN"},
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 	{ "PGA Left Input Mux", "MC1L", "MC1L Amp" },
527*4882a593Smuzhiyun 	{ "PGA Left Input Mux", "RXINL", "RXINL"},
528*4882a593Smuzhiyun 	{ "PGA Right Input Mux", "MC1R", "MC1R Amp" },
529*4882a593Smuzhiyun 	{ "PGA Right Input Mux", "MC2",  "MC2 Amp"},
530*4882a593Smuzhiyun 	{ "PGA Right Input Mux", "TXIN", "TXIN Amp"},
531*4882a593Smuzhiyun 	{ "PGA Right Input Mux", "RXINR", "RXINR"},
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	{ "PGA Left Input", NULL, "PGA Left Input Mux"},
534*4882a593Smuzhiyun 	{ "PGA Right Input", NULL, "PGA Right Input Mux"},
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	{ "ADC", NULL, "PGA Left Input"},
537*4882a593Smuzhiyun 	{ "ADC", NULL, "PGA Right Input"},
538*4882a593Smuzhiyun 	{ "ADC", NULL, "ADC_Reset"},
539*4882a593Smuzhiyun 
540*4882a593Smuzhiyun 	{ "Voice CODEC PGA", "Voice CODEC Bypass", "ADC" },
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 	{ "Speaker Amp Source MUX", "CODEC", "Voice CODEC PGA"},
543*4882a593Smuzhiyun 	{ "Speaker Amp Source MUX", "Right", "DAC PGA"},
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 	{ "Headset Amp Source MUX", "CODEC", "Voice CODEC PGA"},
546*4882a593Smuzhiyun 	{ "Headset Amp Source MUX", "Mixer", "DAC PGA"},
547*4882a593Smuzhiyun 
548*4882a593Smuzhiyun /* Output */
549*4882a593Smuzhiyun 	{ "HSL", NULL, "Headset Amp Left" },
550*4882a593Smuzhiyun 	{ "HSR", NULL, "Headset Amp Right"},
551*4882a593Smuzhiyun 	{ "RXOUTL", NULL, "Line out Amp Left"},
552*4882a593Smuzhiyun 	{ "RXOUTR", NULL, "Line out Amp Right"},
553*4882a593Smuzhiyun 	{ "SP", "Speaker Amp Switch", "Speaker Amp Source MUX"},
554*4882a593Smuzhiyun 	{ "LSP", "Loudspeaker Amp", "Speaker Amp Source MUX"},
555*4882a593Smuzhiyun 	{ "HSL", "Headset Amp Left", "Headset Amp Source MUX"},
556*4882a593Smuzhiyun 	{ "HSR", "Headset Amp Right", "Headset Amp Source MUX"},
557*4882a593Smuzhiyun 	{ "Line out Amp Left", NULL, "DAC PGA"},
558*4882a593Smuzhiyun 	{ "Line out Amp Right", NULL, "DAC PGA"},
559*4882a593Smuzhiyun 	{ "DAC PGA", NULL, "DAC"},
560*4882a593Smuzhiyun 	{ "DAC", NULL, "DAC_E"},
561*4882a593Smuzhiyun 	{ "CDCOUT", "CDCOUT Switch", "Voice CODEC PGA"},
562*4882a593Smuzhiyun };
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun static const char * const mc13783_3d_mixer[] = {"Stereo", "Phase Mix",
565*4882a593Smuzhiyun 						"Mono", "Mono Mix"};
566*4882a593Smuzhiyun 
567*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(mc13783_enum_3d_mixer,
568*4882a593Smuzhiyun 			    MC13783_AUDIO_RX1, 16,
569*4882a593Smuzhiyun 			    mc13783_3d_mixer);
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun static struct snd_kcontrol_new mc13783_control_list[] = {
572*4882a593Smuzhiyun 	SOC_SINGLE("Loudspeaker enable", MC13783_AUDIO_RX0, 5, 1, 0),
573*4882a593Smuzhiyun 	SOC_SINGLE("PCM Playback Volume", MC13783_AUDIO_RX1, 6, 15, 0),
574*4882a593Smuzhiyun 	SOC_SINGLE("PCM Playback Switch", MC13783_AUDIO_RX1, 5, 1, 0),
575*4882a593Smuzhiyun 	SOC_DOUBLE("PCM Capture Volume", MC13783_AUDIO_TX, 19, 14, 31, 0),
576*4882a593Smuzhiyun 	SOC_ENUM("3D Control", mc13783_enum_3d_mixer),
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	SOC_SINGLE("CDCOUT Switch", MC13783_AUDIO_RX0, 18, 1, 0),
579*4882a593Smuzhiyun 	SOC_SINGLE("Earpiece Amp Switch", MC13783_AUDIO_RX0, 3, 1, 0),
580*4882a593Smuzhiyun 	SOC_DOUBLE("Headset Amp Switch", MC13783_AUDIO_RX0, 10, 9, 1, 0),
581*4882a593Smuzhiyun 	SOC_DOUBLE("Line out Amp Switch", MC13783_AUDIO_RX0, 16, 15, 1, 0),
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun 	SOC_SINGLE("PCM Capture Mixin Switch", MC13783_AUDIO_RX0, 22, 1, 0),
584*4882a593Smuzhiyun 	SOC_SINGLE("Line in Capture Mixin Switch", MC13783_AUDIO_RX0, 23, 1, 0),
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	SOC_SINGLE("CODEC Capture Volume", MC13783_AUDIO_RX1, 1, 15, 0),
587*4882a593Smuzhiyun 	SOC_SINGLE("CODEC Capture Mixin Switch", MC13783_AUDIO_RX0, 21, 1, 0),
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 	SOC_SINGLE("Line in Capture Volume", MC13783_AUDIO_RX1, 12, 15, 0),
590*4882a593Smuzhiyun 	SOC_SINGLE("Line in Capture Switch", MC13783_AUDIO_RX1, 10, 1, 0),
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun 	SOC_SINGLE("MC1 Capture Bias Switch", MC13783_AUDIO_TX, 0, 1, 0),
593*4882a593Smuzhiyun 	SOC_SINGLE("MC2 Capture Bias Switch", MC13783_AUDIO_TX, 1, 1, 0),
594*4882a593Smuzhiyun };
595*4882a593Smuzhiyun 
mc13783_probe(struct snd_soc_component * component)596*4882a593Smuzhiyun static int mc13783_probe(struct snd_soc_component *component)
597*4882a593Smuzhiyun {
598*4882a593Smuzhiyun 	struct mc13783_priv *priv = snd_soc_component_get_drvdata(component);
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 	snd_soc_component_init_regmap(component,
601*4882a593Smuzhiyun 				  dev_get_regmap(component->dev->parent, NULL));
602*4882a593Smuzhiyun 
603*4882a593Smuzhiyun 	/* these are the reset values */
604*4882a593Smuzhiyun 	mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX0, 0x25893);
605*4882a593Smuzhiyun 	mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX1, 0x00d35A);
606*4882a593Smuzhiyun 	mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_TX, 0x420000);
607*4882a593Smuzhiyun 	mc13xxx_reg_write(priv->mc13xxx, MC13783_SSI_NETWORK, 0x013060);
608*4882a593Smuzhiyun 	mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_CODEC, 0x180027);
609*4882a593Smuzhiyun 	mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_DAC, 0x0e0004);
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 	if (priv->adc_ssi_port == MC13783_SSI1_PORT)
612*4882a593Smuzhiyun 		mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_CODEC,
613*4882a593Smuzhiyun 				AUDIO_SSI_SEL, 0);
614*4882a593Smuzhiyun 	else
615*4882a593Smuzhiyun 		mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_CODEC,
616*4882a593Smuzhiyun 				AUDIO_SSI_SEL, AUDIO_SSI_SEL);
617*4882a593Smuzhiyun 
618*4882a593Smuzhiyun 	if (priv->dac_ssi_port == MC13783_SSI1_PORT)
619*4882a593Smuzhiyun 		mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC,
620*4882a593Smuzhiyun 				AUDIO_SSI_SEL, 0);
621*4882a593Smuzhiyun 	else
622*4882a593Smuzhiyun 		mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC,
623*4882a593Smuzhiyun 				AUDIO_SSI_SEL, AUDIO_SSI_SEL);
624*4882a593Smuzhiyun 
625*4882a593Smuzhiyun 	return 0;
626*4882a593Smuzhiyun }
627*4882a593Smuzhiyun 
mc13783_remove(struct snd_soc_component * component)628*4882a593Smuzhiyun static void mc13783_remove(struct snd_soc_component *component)
629*4882a593Smuzhiyun {
630*4882a593Smuzhiyun 	struct mc13783_priv *priv = snd_soc_component_get_drvdata(component);
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun 	/* Make sure VAUDIOON is off */
633*4882a593Smuzhiyun 	mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_RX0, 0x3, 0);
634*4882a593Smuzhiyun }
635*4882a593Smuzhiyun 
636*4882a593Smuzhiyun #define MC13783_RATES_RECORD (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000)
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun #define MC13783_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
639*4882a593Smuzhiyun 	SNDRV_PCM_FMTBIT_S24_LE)
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun static const struct snd_soc_dai_ops mc13783_ops_dac = {
642*4882a593Smuzhiyun 	.hw_params	= mc13783_pcm_hw_params_dac,
643*4882a593Smuzhiyun 	.set_fmt	= mc13783_set_fmt_async,
644*4882a593Smuzhiyun 	.set_sysclk	= mc13783_set_sysclk_dac,
645*4882a593Smuzhiyun 	.set_tdm_slot	= mc13783_set_tdm_slot_dac,
646*4882a593Smuzhiyun };
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun static const struct snd_soc_dai_ops mc13783_ops_codec = {
649*4882a593Smuzhiyun 	.hw_params	= mc13783_pcm_hw_params_codec,
650*4882a593Smuzhiyun 	.set_fmt	= mc13783_set_fmt_async,
651*4882a593Smuzhiyun 	.set_sysclk	= mc13783_set_sysclk_codec,
652*4882a593Smuzhiyun 	.set_tdm_slot	= mc13783_set_tdm_slot_codec,
653*4882a593Smuzhiyun };
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun /*
656*4882a593Smuzhiyun  * The mc13783 has two SSI ports, both of them can be routed either
657*4882a593Smuzhiyun  * to the voice codec or the stereo DAC. When two different SSI ports
658*4882a593Smuzhiyun  * are used for the voice codec and the stereo DAC we can do different
659*4882a593Smuzhiyun  * formats and sysclock settings for playback and capture
660*4882a593Smuzhiyun  * (mc13783-hifi-playback and mc13783-hifi-capture). Using the same port
661*4882a593Smuzhiyun  * forces us to use symmetric rates (mc13783-hifi).
662*4882a593Smuzhiyun  */
663*4882a593Smuzhiyun static struct snd_soc_dai_driver mc13783_dai_async[] = {
664*4882a593Smuzhiyun 	{
665*4882a593Smuzhiyun 		.name = "mc13783-hifi-playback",
666*4882a593Smuzhiyun 		.id = MC13783_ID_STEREO_DAC,
667*4882a593Smuzhiyun 		.playback = {
668*4882a593Smuzhiyun 			.stream_name = "Playback",
669*4882a593Smuzhiyun 			.channels_min = 2,
670*4882a593Smuzhiyun 			.channels_max = 2,
671*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_8000_96000,
672*4882a593Smuzhiyun 			.formats = MC13783_FORMATS,
673*4882a593Smuzhiyun 		},
674*4882a593Smuzhiyun 		.ops = &mc13783_ops_dac,
675*4882a593Smuzhiyun 	}, {
676*4882a593Smuzhiyun 		.name = "mc13783-hifi-capture",
677*4882a593Smuzhiyun 		.id = MC13783_ID_STEREO_CODEC,
678*4882a593Smuzhiyun 		.capture = {
679*4882a593Smuzhiyun 			.stream_name = "Capture",
680*4882a593Smuzhiyun 			.channels_min = 2,
681*4882a593Smuzhiyun 			.channels_max = 2,
682*4882a593Smuzhiyun 			.rates = MC13783_RATES_RECORD,
683*4882a593Smuzhiyun 			.formats = MC13783_FORMATS,
684*4882a593Smuzhiyun 		},
685*4882a593Smuzhiyun 		.ops = &mc13783_ops_codec,
686*4882a593Smuzhiyun 	},
687*4882a593Smuzhiyun };
688*4882a593Smuzhiyun 
689*4882a593Smuzhiyun static const struct snd_soc_dai_ops mc13783_ops_sync = {
690*4882a593Smuzhiyun 	.hw_params	= mc13783_pcm_hw_params_sync,
691*4882a593Smuzhiyun 	.set_fmt	= mc13783_set_fmt_sync,
692*4882a593Smuzhiyun 	.set_sysclk	= mc13783_set_sysclk_sync,
693*4882a593Smuzhiyun 	.set_tdm_slot	= mc13783_set_tdm_slot_sync,
694*4882a593Smuzhiyun };
695*4882a593Smuzhiyun 
696*4882a593Smuzhiyun static struct snd_soc_dai_driver mc13783_dai_sync[] = {
697*4882a593Smuzhiyun 	{
698*4882a593Smuzhiyun 		.name = "mc13783-hifi",
699*4882a593Smuzhiyun 		.id = MC13783_ID_SYNC,
700*4882a593Smuzhiyun 		.playback = {
701*4882a593Smuzhiyun 			.stream_name = "Playback",
702*4882a593Smuzhiyun 			.channels_min = 2,
703*4882a593Smuzhiyun 			.channels_max = 2,
704*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_8000_96000,
705*4882a593Smuzhiyun 			.formats = MC13783_FORMATS,
706*4882a593Smuzhiyun 		},
707*4882a593Smuzhiyun 		.capture = {
708*4882a593Smuzhiyun 			.stream_name = "Capture",
709*4882a593Smuzhiyun 			.channels_min = 2,
710*4882a593Smuzhiyun 			.channels_max = 2,
711*4882a593Smuzhiyun 			.rates = MC13783_RATES_RECORD,
712*4882a593Smuzhiyun 			.formats = MC13783_FORMATS,
713*4882a593Smuzhiyun 		},
714*4882a593Smuzhiyun 		.ops = &mc13783_ops_sync,
715*4882a593Smuzhiyun 		.symmetric_rates = 1,
716*4882a593Smuzhiyun 	}
717*4882a593Smuzhiyun };
718*4882a593Smuzhiyun 
719*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_dev_mc13783 = {
720*4882a593Smuzhiyun 	.probe			= mc13783_probe,
721*4882a593Smuzhiyun 	.remove			= mc13783_remove,
722*4882a593Smuzhiyun 	.controls		= mc13783_control_list,
723*4882a593Smuzhiyun 	.num_controls		= ARRAY_SIZE(mc13783_control_list),
724*4882a593Smuzhiyun 	.dapm_widgets		= mc13783_dapm_widgets,
725*4882a593Smuzhiyun 	.num_dapm_widgets	= ARRAY_SIZE(mc13783_dapm_widgets),
726*4882a593Smuzhiyun 	.dapm_routes		= mc13783_routes,
727*4882a593Smuzhiyun 	.num_dapm_routes	= ARRAY_SIZE(mc13783_routes),
728*4882a593Smuzhiyun 	.idle_bias_on		= 1,
729*4882a593Smuzhiyun 	.use_pmdown_time	= 1,
730*4882a593Smuzhiyun 	.endianness		= 1,
731*4882a593Smuzhiyun 	.non_legacy_dai_naming	= 1,
732*4882a593Smuzhiyun };
733*4882a593Smuzhiyun 
mc13783_codec_probe(struct platform_device * pdev)734*4882a593Smuzhiyun static int __init mc13783_codec_probe(struct platform_device *pdev)
735*4882a593Smuzhiyun {
736*4882a593Smuzhiyun 	struct mc13783_priv *priv;
737*4882a593Smuzhiyun 	struct mc13xxx_codec_platform_data *pdata = pdev->dev.platform_data;
738*4882a593Smuzhiyun 	struct device_node *np;
739*4882a593Smuzhiyun 	int ret;
740*4882a593Smuzhiyun 
741*4882a593Smuzhiyun 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
742*4882a593Smuzhiyun 	if (!priv)
743*4882a593Smuzhiyun 		return -ENOMEM;
744*4882a593Smuzhiyun 
745*4882a593Smuzhiyun 	if (pdata) {
746*4882a593Smuzhiyun 		priv->adc_ssi_port = pdata->adc_ssi_port;
747*4882a593Smuzhiyun 		priv->dac_ssi_port = pdata->dac_ssi_port;
748*4882a593Smuzhiyun 	} else {
749*4882a593Smuzhiyun 		np = of_get_child_by_name(pdev->dev.parent->of_node, "codec");
750*4882a593Smuzhiyun 		if (!np)
751*4882a593Smuzhiyun 			return -ENOSYS;
752*4882a593Smuzhiyun 
753*4882a593Smuzhiyun 		ret = of_property_read_u32(np, "adc-port", &priv->adc_ssi_port);
754*4882a593Smuzhiyun 		if (ret) {
755*4882a593Smuzhiyun 			of_node_put(np);
756*4882a593Smuzhiyun 			return ret;
757*4882a593Smuzhiyun 		}
758*4882a593Smuzhiyun 
759*4882a593Smuzhiyun 		ret = of_property_read_u32(np, "dac-port", &priv->dac_ssi_port);
760*4882a593Smuzhiyun 		if (ret) {
761*4882a593Smuzhiyun 			of_node_put(np);
762*4882a593Smuzhiyun 			return ret;
763*4882a593Smuzhiyun 		}
764*4882a593Smuzhiyun 
765*4882a593Smuzhiyun 		of_node_put(np);
766*4882a593Smuzhiyun 	}
767*4882a593Smuzhiyun 
768*4882a593Smuzhiyun 	dev_set_drvdata(&pdev->dev, priv);
769*4882a593Smuzhiyun 	priv->mc13xxx = dev_get_drvdata(pdev->dev.parent);
770*4882a593Smuzhiyun 
771*4882a593Smuzhiyun 	if (priv->adc_ssi_port == priv->dac_ssi_port)
772*4882a593Smuzhiyun 		ret = devm_snd_soc_register_component(&pdev->dev, &soc_component_dev_mc13783,
773*4882a593Smuzhiyun 			mc13783_dai_sync, ARRAY_SIZE(mc13783_dai_sync));
774*4882a593Smuzhiyun 	else
775*4882a593Smuzhiyun 		ret = devm_snd_soc_register_component(&pdev->dev, &soc_component_dev_mc13783,
776*4882a593Smuzhiyun 			mc13783_dai_async, ARRAY_SIZE(mc13783_dai_async));
777*4882a593Smuzhiyun 
778*4882a593Smuzhiyun 	return ret;
779*4882a593Smuzhiyun }
780*4882a593Smuzhiyun 
mc13783_codec_remove(struct platform_device * pdev)781*4882a593Smuzhiyun static int mc13783_codec_remove(struct platform_device *pdev)
782*4882a593Smuzhiyun {
783*4882a593Smuzhiyun 	return 0;
784*4882a593Smuzhiyun }
785*4882a593Smuzhiyun 
786*4882a593Smuzhiyun static struct platform_driver mc13783_codec_driver = {
787*4882a593Smuzhiyun 	.driver = {
788*4882a593Smuzhiyun 		.name	= "mc13783-codec",
789*4882a593Smuzhiyun 	},
790*4882a593Smuzhiyun 	.remove = mc13783_codec_remove,
791*4882a593Smuzhiyun };
792*4882a593Smuzhiyun module_platform_driver_probe(mc13783_codec_driver, mc13783_codec_probe);
793*4882a593Smuzhiyun 
794*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC MC13783 driver");
795*4882a593Smuzhiyun MODULE_AUTHOR("Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>");
796*4882a593Smuzhiyun MODULE_AUTHOR("Philippe Retornaz <philippe.retornaz@epfl.ch>");
797*4882a593Smuzhiyun MODULE_LICENSE("GPL");
798