1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * isabelle.h - Low power high fidelity audio codec driver header file 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2012 Texas Instruments, Inc 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _ISABELLE_H 9*4882a593Smuzhiyun #define _ISABELLE_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <linux/bitops.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* ISABELLE REGISTERS */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define ISABELLE_PWR_CFG_REG 0x01 16*4882a593Smuzhiyun #define ISABELLE_PWR_EN_REG 0x02 17*4882a593Smuzhiyun #define ISABELLE_PS_EN1_REG 0x03 18*4882a593Smuzhiyun #define ISABELLE_INT1_STATUS_REG 0x04 19*4882a593Smuzhiyun #define ISABELLE_INT1_MASK_REG 0x05 20*4882a593Smuzhiyun #define ISABELLE_INT2_STATUS_REG 0x06 21*4882a593Smuzhiyun #define ISABELLE_INT2_MASK_REG 0x07 22*4882a593Smuzhiyun #define ISABELLE_HKCTL1_REG 0x08 23*4882a593Smuzhiyun #define ISABELLE_HKCTL2_REG 0x09 24*4882a593Smuzhiyun #define ISABELLE_HKCTL3_REG 0x0A 25*4882a593Smuzhiyun #define ISABELLE_ACCDET_STATUS_REG 0x0B 26*4882a593Smuzhiyun #define ISABELLE_BUTTON_ID_REG 0x0C 27*4882a593Smuzhiyun #define ISABELLE_PLL_CFG_REG 0x10 28*4882a593Smuzhiyun #define ISABELLE_PLL_EN_REG 0x11 29*4882a593Smuzhiyun #define ISABELLE_FS_RATE_CFG_REG 0x12 30*4882a593Smuzhiyun #define ISABELLE_INTF_CFG_REG 0x13 31*4882a593Smuzhiyun #define ISABELLE_INTF_EN_REG 0x14 32*4882a593Smuzhiyun #define ISABELLE_ULATX12_INTF_CFG_REG 0x15 33*4882a593Smuzhiyun #define ISABELLE_DL12_INTF_CFG_REG 0x16 34*4882a593Smuzhiyun #define ISABELLE_DL34_INTF_CFG_REG 0x17 35*4882a593Smuzhiyun #define ISABELLE_DL56_INTF_CFG_REG 0x18 36*4882a593Smuzhiyun #define ISABELLE_ATX_STPGA1_CFG_REG 0x19 37*4882a593Smuzhiyun #define ISABELLE_ATX_STPGA2_CFG_REG 0x1A 38*4882a593Smuzhiyun #define ISABELLE_VTX_STPGA1_CFG_REG 0x1B 39*4882a593Smuzhiyun #define ISABELLE_VTX2_STPGA2_CFG_REG 0x1C 40*4882a593Smuzhiyun #define ISABELLE_ATX1_DPGA_REG 0x1D 41*4882a593Smuzhiyun #define ISABELLE_ATX2_DPGA_REG 0x1E 42*4882a593Smuzhiyun #define ISABELLE_VTX1_DPGA_REG 0x1F 43*4882a593Smuzhiyun #define ISABELLE_VTX2_DPGA_REG 0x20 44*4882a593Smuzhiyun #define ISABELLE_TX_INPUT_CFG_REG 0x21 45*4882a593Smuzhiyun #define ISABELLE_RX_INPUT_CFG_REG 0x22 46*4882a593Smuzhiyun #define ISABELLE_RX_INPUT_CFG2_REG 0x23 47*4882a593Smuzhiyun #define ISABELLE_VOICE_HPF_CFG_REG 0x24 48*4882a593Smuzhiyun #define ISABELLE_AUDIO_HPF_CFG_REG 0x25 49*4882a593Smuzhiyun #define ISABELLE_RX1_DPGA_REG 0x26 50*4882a593Smuzhiyun #define ISABELLE_RX2_DPGA_REG 0x27 51*4882a593Smuzhiyun #define ISABELLE_RX3_DPGA_REG 0x28 52*4882a593Smuzhiyun #define ISABELLE_RX4_DPGA_REG 0x29 53*4882a593Smuzhiyun #define ISABELLE_RX5_DPGA_REG 0x2A 54*4882a593Smuzhiyun #define ISABELLE_RX6_DPGA_REG 0x2B 55*4882a593Smuzhiyun #define ISABELLE_ALU_TX_EN_REG 0x2C 56*4882a593Smuzhiyun #define ISABELLE_ALU_RX_EN_REG 0x2D 57*4882a593Smuzhiyun #define ISABELLE_IIR_RESYNC_REG 0x2E 58*4882a593Smuzhiyun #define ISABELLE_ABIAS_CFG_REG 0x30 59*4882a593Smuzhiyun #define ISABELLE_DBIAS_CFG_REG 0x31 60*4882a593Smuzhiyun #define ISABELLE_MIC1_GAIN_REG 0x32 61*4882a593Smuzhiyun #define ISABELLE_MIC2_GAIN_REG 0x33 62*4882a593Smuzhiyun #define ISABELLE_AMIC_CFG_REG 0x34 63*4882a593Smuzhiyun #define ISABELLE_DMIC_CFG_REG 0x35 64*4882a593Smuzhiyun #define ISABELLE_APGA_GAIN_REG 0x36 65*4882a593Smuzhiyun #define ISABELLE_APGA_CFG_REG 0x37 66*4882a593Smuzhiyun #define ISABELLE_TX_GAIN_DLY_REG 0x38 67*4882a593Smuzhiyun #define ISABELLE_RX_GAIN_DLY_REG 0x39 68*4882a593Smuzhiyun #define ISABELLE_RX_PWR_CTRL_REG 0x3A 69*4882a593Smuzhiyun #define ISABELLE_DPGA1LR_IN_SEL_REG 0x3B 70*4882a593Smuzhiyun #define ISABELLE_DPGA1L_GAIN_REG 0x3C 71*4882a593Smuzhiyun #define ISABELLE_DPGA1R_GAIN_REG 0x3D 72*4882a593Smuzhiyun #define ISABELLE_DPGA2L_IN_SEL_REG 0x3E 73*4882a593Smuzhiyun #define ISABELLE_DPGA2R_IN_SEL_REG 0x3F 74*4882a593Smuzhiyun #define ISABELLE_DPGA2L_GAIN_REG 0x40 75*4882a593Smuzhiyun #define ISABELLE_DPGA2R_GAIN_REG 0x41 76*4882a593Smuzhiyun #define ISABELLE_DPGA3LR_IN_SEL_REG 0x42 77*4882a593Smuzhiyun #define ISABELLE_DPGA3L_GAIN_REG 0x43 78*4882a593Smuzhiyun #define ISABELLE_DPGA3R_GAIN_REG 0x44 79*4882a593Smuzhiyun #define ISABELLE_DAC1_SOFTRAMP_REG 0x45 80*4882a593Smuzhiyun #define ISABELLE_DAC2_SOFTRAMP_REG 0x46 81*4882a593Smuzhiyun #define ISABELLE_DAC3_SOFTRAMP_REG 0x47 82*4882a593Smuzhiyun #define ISABELLE_DAC_CFG_REG 0x48 83*4882a593Smuzhiyun #define ISABELLE_EARDRV_CFG1_REG 0x49 84*4882a593Smuzhiyun #define ISABELLE_EARDRV_CFG2_REG 0x4A 85*4882a593Smuzhiyun #define ISABELLE_HSDRV_GAIN_REG 0x4B 86*4882a593Smuzhiyun #define ISABELLE_HSDRV_CFG1_REG 0x4C 87*4882a593Smuzhiyun #define ISABELLE_HSDRV_CFG2_REG 0x4D 88*4882a593Smuzhiyun #define ISABELLE_HS_NG_CFG1_REG 0x4E 89*4882a593Smuzhiyun #define ISABELLE_HS_NG_CFG2_REG 0x4F 90*4882a593Smuzhiyun #define ISABELLE_LINEAMP_GAIN_REG 0x50 91*4882a593Smuzhiyun #define ISABELLE_LINEAMP_CFG_REG 0x51 92*4882a593Smuzhiyun #define ISABELLE_HFL_VOL_CTRL_REG 0x52 93*4882a593Smuzhiyun #define ISABELLE_HFL_SFTVOL_CTRL_REG 0x53 94*4882a593Smuzhiyun #define ISABELLE_HFL_LIM_CTRL_1_REG 0x54 95*4882a593Smuzhiyun #define ISABELLE_HFL_LIM_CTRL_2_REG 0x55 96*4882a593Smuzhiyun #define ISABELLE_HFR_VOL_CTRL_REG 0x56 97*4882a593Smuzhiyun #define ISABELLE_HFR_SFTVOL_CTRL_REG 0x57 98*4882a593Smuzhiyun #define ISABELLE_HFR_LIM_CTRL_1_REG 0x58 99*4882a593Smuzhiyun #define ISABELLE_HFR_LIM_CTRL_2_REG 0x59 100*4882a593Smuzhiyun #define ISABELLE_HF_MODE_REG 0x5A 101*4882a593Smuzhiyun #define ISABELLE_HFLPGA_CFG_REG 0x5B 102*4882a593Smuzhiyun #define ISABELLE_HFRPGA_CFG_REG 0x5C 103*4882a593Smuzhiyun #define ISABELLE_HFDRV_CFG_REG 0x5D 104*4882a593Smuzhiyun #define ISABELLE_PDMOUT_CFG1_REG 0x5E 105*4882a593Smuzhiyun #define ISABELLE_PDMOUT_CFG2_REG 0x5F 106*4882a593Smuzhiyun #define ISABELLE_PDMOUT_L_WM_REG 0x60 107*4882a593Smuzhiyun #define ISABELLE_PDMOUT_R_WM_REG 0x61 108*4882a593Smuzhiyun #define ISABELLE_HF_NG_CFG1_REG 0x62 109*4882a593Smuzhiyun #define ISABELLE_HF_NG_CFG2_REG 0x63 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun /* ISABELLE_PWR_EN_REG (0x02h) */ 112*4882a593Smuzhiyun #define ISABELLE_CHIP_EN BIT(0) 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun /* ISABELLE DAI FORMATS */ 115*4882a593Smuzhiyun #define ISABELLE_AIF_FMT_MASK 0x70 116*4882a593Smuzhiyun #define ISABELLE_I2S_MODE 0x0 117*4882a593Smuzhiyun #define ISABELLE_LEFT_J_MODE 0x1 118*4882a593Smuzhiyun #define ISABELLE_PDM_MODE 0x2 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun #define ISABELLE_AIF_LENGTH_MASK 0x30 121*4882a593Smuzhiyun #define ISABELLE_AIF_LENGTH_20 0x00 122*4882a593Smuzhiyun #define ISABELLE_AIF_LENGTH_32 0x10 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun #define ISABELLE_AIF_MS 0x80 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun #define ISABELLE_FS_RATE_MASK 0xF 127*4882a593Smuzhiyun #define ISABELLE_FS_RATE_8 0x0 128*4882a593Smuzhiyun #define ISABELLE_FS_RATE_11 0x1 129*4882a593Smuzhiyun #define ISABELLE_FS_RATE_12 0x2 130*4882a593Smuzhiyun #define ISABELLE_FS_RATE_16 0x4 131*4882a593Smuzhiyun #define ISABELLE_FS_RATE_22 0x5 132*4882a593Smuzhiyun #define ISABELLE_FS_RATE_24 0x6 133*4882a593Smuzhiyun #define ISABELLE_FS_RATE_32 0x8 134*4882a593Smuzhiyun #define ISABELLE_FS_RATE_44 0x9 135*4882a593Smuzhiyun #define ISABELLE_FS_RATE_48 0xA 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun #define ISABELLE_MAX_REGISTER 0xFF 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun #endif 140