1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * isabelle.c - Low power high fidelity audio codec driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2012 Texas Instruments, Inc
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Initially based on sound/soc/codecs/twl6040.c
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/moduleparam.h>
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/delay.h>
14*4882a593Smuzhiyun #include <linux/pm.h>
15*4882a593Smuzhiyun #include <linux/regmap.h>
16*4882a593Smuzhiyun #include <linux/i2c.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun #include <sound/core.h>
19*4882a593Smuzhiyun #include <sound/pcm.h>
20*4882a593Smuzhiyun #include <sound/pcm_params.h>
21*4882a593Smuzhiyun #include <sound/soc.h>
22*4882a593Smuzhiyun #include <sound/soc-dapm.h>
23*4882a593Smuzhiyun #include <sound/tlv.h>
24*4882a593Smuzhiyun #include <sound/jack.h>
25*4882a593Smuzhiyun #include <sound/initval.h>
26*4882a593Smuzhiyun #include <asm/div64.h>
27*4882a593Smuzhiyun #include "isabelle.h"
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /* Register default values for ISABELLE driver. */
31*4882a593Smuzhiyun static const struct reg_default isabelle_reg_defs[] = {
32*4882a593Smuzhiyun { 0, 0x00 },
33*4882a593Smuzhiyun { 1, 0x00 },
34*4882a593Smuzhiyun { 2, 0x00 },
35*4882a593Smuzhiyun { 3, 0x00 },
36*4882a593Smuzhiyun { 4, 0x00 },
37*4882a593Smuzhiyun { 5, 0x00 },
38*4882a593Smuzhiyun { 6, 0x00 },
39*4882a593Smuzhiyun { 7, 0x00 },
40*4882a593Smuzhiyun { 8, 0x00 },
41*4882a593Smuzhiyun { 9, 0x00 },
42*4882a593Smuzhiyun { 10, 0x00 },
43*4882a593Smuzhiyun { 11, 0x00 },
44*4882a593Smuzhiyun { 12, 0x00 },
45*4882a593Smuzhiyun { 13, 0x00 },
46*4882a593Smuzhiyun { 14, 0x00 },
47*4882a593Smuzhiyun { 15, 0x00 },
48*4882a593Smuzhiyun { 16, 0x00 },
49*4882a593Smuzhiyun { 17, 0x00 },
50*4882a593Smuzhiyun { 18, 0x00 },
51*4882a593Smuzhiyun { 19, 0x00 },
52*4882a593Smuzhiyun { 20, 0x00 },
53*4882a593Smuzhiyun { 21, 0x02 },
54*4882a593Smuzhiyun { 22, 0x02 },
55*4882a593Smuzhiyun { 23, 0x02 },
56*4882a593Smuzhiyun { 24, 0x02 },
57*4882a593Smuzhiyun { 25, 0x0F },
58*4882a593Smuzhiyun { 26, 0x8F },
59*4882a593Smuzhiyun { 27, 0x0F },
60*4882a593Smuzhiyun { 28, 0x8F },
61*4882a593Smuzhiyun { 29, 0x00 },
62*4882a593Smuzhiyun { 30, 0x00 },
63*4882a593Smuzhiyun { 31, 0x00 },
64*4882a593Smuzhiyun { 32, 0x00 },
65*4882a593Smuzhiyun { 33, 0x00 },
66*4882a593Smuzhiyun { 34, 0x00 },
67*4882a593Smuzhiyun { 35, 0x00 },
68*4882a593Smuzhiyun { 36, 0x00 },
69*4882a593Smuzhiyun { 37, 0x00 },
70*4882a593Smuzhiyun { 38, 0x00 },
71*4882a593Smuzhiyun { 39, 0x00 },
72*4882a593Smuzhiyun { 40, 0x00 },
73*4882a593Smuzhiyun { 41, 0x00 },
74*4882a593Smuzhiyun { 42, 0x00 },
75*4882a593Smuzhiyun { 43, 0x00 },
76*4882a593Smuzhiyun { 44, 0x00 },
77*4882a593Smuzhiyun { 45, 0x00 },
78*4882a593Smuzhiyun { 46, 0x00 },
79*4882a593Smuzhiyun { 47, 0x00 },
80*4882a593Smuzhiyun { 48, 0x00 },
81*4882a593Smuzhiyun { 49, 0x00 },
82*4882a593Smuzhiyun { 50, 0x00 },
83*4882a593Smuzhiyun { 51, 0x00 },
84*4882a593Smuzhiyun { 52, 0x00 },
85*4882a593Smuzhiyun { 53, 0x00 },
86*4882a593Smuzhiyun { 54, 0x00 },
87*4882a593Smuzhiyun { 55, 0x00 },
88*4882a593Smuzhiyun { 56, 0x00 },
89*4882a593Smuzhiyun { 57, 0x00 },
90*4882a593Smuzhiyun { 58, 0x00 },
91*4882a593Smuzhiyun { 59, 0x00 },
92*4882a593Smuzhiyun { 60, 0x00 },
93*4882a593Smuzhiyun { 61, 0x00 },
94*4882a593Smuzhiyun { 62, 0x00 },
95*4882a593Smuzhiyun { 63, 0x00 },
96*4882a593Smuzhiyun { 64, 0x00 },
97*4882a593Smuzhiyun { 65, 0x00 },
98*4882a593Smuzhiyun { 66, 0x00 },
99*4882a593Smuzhiyun { 67, 0x00 },
100*4882a593Smuzhiyun { 68, 0x00 },
101*4882a593Smuzhiyun { 69, 0x90 },
102*4882a593Smuzhiyun { 70, 0x90 },
103*4882a593Smuzhiyun { 71, 0x90 },
104*4882a593Smuzhiyun { 72, 0x00 },
105*4882a593Smuzhiyun { 73, 0x00 },
106*4882a593Smuzhiyun { 74, 0x00 },
107*4882a593Smuzhiyun { 75, 0x00 },
108*4882a593Smuzhiyun { 76, 0x00 },
109*4882a593Smuzhiyun { 77, 0x00 },
110*4882a593Smuzhiyun { 78, 0x00 },
111*4882a593Smuzhiyun { 79, 0x00 },
112*4882a593Smuzhiyun { 80, 0x00 },
113*4882a593Smuzhiyun { 81, 0x00 },
114*4882a593Smuzhiyun { 82, 0x00 },
115*4882a593Smuzhiyun { 83, 0x00 },
116*4882a593Smuzhiyun { 84, 0x00 },
117*4882a593Smuzhiyun { 85, 0x07 },
118*4882a593Smuzhiyun { 86, 0x00 },
119*4882a593Smuzhiyun { 87, 0x00 },
120*4882a593Smuzhiyun { 88, 0x00 },
121*4882a593Smuzhiyun { 89, 0x07 },
122*4882a593Smuzhiyun { 90, 0x80 },
123*4882a593Smuzhiyun { 91, 0x07 },
124*4882a593Smuzhiyun { 92, 0x07 },
125*4882a593Smuzhiyun { 93, 0x00 },
126*4882a593Smuzhiyun { 94, 0x00 },
127*4882a593Smuzhiyun { 95, 0x00 },
128*4882a593Smuzhiyun { 96, 0x00 },
129*4882a593Smuzhiyun { 97, 0x00 },
130*4882a593Smuzhiyun { 98, 0x00 },
131*4882a593Smuzhiyun { 99, 0x00 },
132*4882a593Smuzhiyun };
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun static const char *isabelle_rx1_texts[] = {"VRX1", "ARX1"};
135*4882a593Smuzhiyun static const char *isabelle_rx2_texts[] = {"VRX2", "ARX2"};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun static const struct soc_enum isabelle_rx1_enum[] = {
138*4882a593Smuzhiyun SOC_ENUM_SINGLE(ISABELLE_VOICE_HPF_CFG_REG, 3,
139*4882a593Smuzhiyun ARRAY_SIZE(isabelle_rx1_texts), isabelle_rx1_texts),
140*4882a593Smuzhiyun SOC_ENUM_SINGLE(ISABELLE_AUDIO_HPF_CFG_REG, 5,
141*4882a593Smuzhiyun ARRAY_SIZE(isabelle_rx1_texts), isabelle_rx1_texts),
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun static const struct soc_enum isabelle_rx2_enum[] = {
145*4882a593Smuzhiyun SOC_ENUM_SINGLE(ISABELLE_VOICE_HPF_CFG_REG, 2,
146*4882a593Smuzhiyun ARRAY_SIZE(isabelle_rx2_texts), isabelle_rx2_texts),
147*4882a593Smuzhiyun SOC_ENUM_SINGLE(ISABELLE_AUDIO_HPF_CFG_REG, 4,
148*4882a593Smuzhiyun ARRAY_SIZE(isabelle_rx2_texts), isabelle_rx2_texts),
149*4882a593Smuzhiyun };
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun /* Headset DAC playback switches */
152*4882a593Smuzhiyun static const struct snd_kcontrol_new rx1_mux_controls =
153*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", isabelle_rx1_enum);
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun static const struct snd_kcontrol_new rx2_mux_controls =
156*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", isabelle_rx2_enum);
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun /* TX input selection */
159*4882a593Smuzhiyun static const char *isabelle_atx_texts[] = {"AMIC1", "DMIC"};
160*4882a593Smuzhiyun static const char *isabelle_vtx_texts[] = {"AMIC2", "DMIC"};
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun static const struct soc_enum isabelle_atx_enum[] = {
163*4882a593Smuzhiyun SOC_ENUM_SINGLE(ISABELLE_AMIC_CFG_REG, 7,
164*4882a593Smuzhiyun ARRAY_SIZE(isabelle_atx_texts), isabelle_atx_texts),
165*4882a593Smuzhiyun SOC_ENUM_SINGLE(ISABELLE_DMIC_CFG_REG, 0,
166*4882a593Smuzhiyun ARRAY_SIZE(isabelle_atx_texts), isabelle_atx_texts),
167*4882a593Smuzhiyun };
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun static const struct soc_enum isabelle_vtx_enum[] = {
170*4882a593Smuzhiyun SOC_ENUM_SINGLE(ISABELLE_AMIC_CFG_REG, 6,
171*4882a593Smuzhiyun ARRAY_SIZE(isabelle_vtx_texts), isabelle_vtx_texts),
172*4882a593Smuzhiyun SOC_ENUM_SINGLE(ISABELLE_DMIC_CFG_REG, 0,
173*4882a593Smuzhiyun ARRAY_SIZE(isabelle_vtx_texts), isabelle_vtx_texts),
174*4882a593Smuzhiyun };
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun static const struct snd_kcontrol_new atx_mux_controls =
177*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", isabelle_atx_enum);
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun static const struct snd_kcontrol_new vtx_mux_controls =
180*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", isabelle_vtx_enum);
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun /* Left analog microphone selection */
183*4882a593Smuzhiyun static const char *isabelle_amic1_texts[] = {
184*4882a593Smuzhiyun "Main Mic", "Headset Mic", "Aux/FM Left"};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun /* Left analog microphone selection */
187*4882a593Smuzhiyun static const char *isabelle_amic2_texts[] = {"Sub Mic", "Aux/FM Right"};
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(isabelle_amic1_enum,
190*4882a593Smuzhiyun ISABELLE_AMIC_CFG_REG, 5,
191*4882a593Smuzhiyun isabelle_amic1_texts);
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(isabelle_amic2_enum,
194*4882a593Smuzhiyun ISABELLE_AMIC_CFG_REG, 4,
195*4882a593Smuzhiyun isabelle_amic2_texts);
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun static const struct snd_kcontrol_new amic1_control =
198*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", isabelle_amic1_enum);
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun static const struct snd_kcontrol_new amic2_control =
201*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", isabelle_amic2_enum);
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun static const char *isabelle_st_audio_texts[] = {"ATX1", "ATX2"};
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun static const char *isabelle_st_voice_texts[] = {"VTX1", "VTX2"};
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun static const struct soc_enum isabelle_st_audio_enum[] = {
208*4882a593Smuzhiyun SOC_ENUM_SINGLE(ISABELLE_ATX_STPGA1_CFG_REG, 7,
209*4882a593Smuzhiyun ARRAY_SIZE(isabelle_st_audio_texts),
210*4882a593Smuzhiyun isabelle_st_audio_texts),
211*4882a593Smuzhiyun SOC_ENUM_SINGLE(ISABELLE_ATX_STPGA2_CFG_REG, 7,
212*4882a593Smuzhiyun ARRAY_SIZE(isabelle_st_audio_texts),
213*4882a593Smuzhiyun isabelle_st_audio_texts),
214*4882a593Smuzhiyun };
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun static const struct soc_enum isabelle_st_voice_enum[] = {
217*4882a593Smuzhiyun SOC_ENUM_SINGLE(ISABELLE_VTX_STPGA1_CFG_REG, 7,
218*4882a593Smuzhiyun ARRAY_SIZE(isabelle_st_voice_texts),
219*4882a593Smuzhiyun isabelle_st_voice_texts),
220*4882a593Smuzhiyun SOC_ENUM_SINGLE(ISABELLE_VTX2_STPGA2_CFG_REG, 7,
221*4882a593Smuzhiyun ARRAY_SIZE(isabelle_st_voice_texts),
222*4882a593Smuzhiyun isabelle_st_voice_texts),
223*4882a593Smuzhiyun };
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun static const struct snd_kcontrol_new st_audio_control =
226*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", isabelle_st_audio_enum);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun static const struct snd_kcontrol_new st_voice_control =
229*4882a593Smuzhiyun SOC_DAPM_ENUM("Route", isabelle_st_voice_enum);
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun /* Mixer controls */
232*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_hs_left_mixer_controls[] = {
233*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC1L Playback Switch", ISABELLE_HSDRV_CFG1_REG, 7, 1, 0),
234*4882a593Smuzhiyun SOC_DAPM_SINGLE("APGA1 Playback Switch", ISABELLE_HSDRV_CFG1_REG, 6, 1, 0),
235*4882a593Smuzhiyun };
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_hs_right_mixer_controls[] = {
238*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC1R Playback Switch", ISABELLE_HSDRV_CFG1_REG, 5, 1, 0),
239*4882a593Smuzhiyun SOC_DAPM_SINGLE("APGA2 Playback Switch", ISABELLE_HSDRV_CFG1_REG, 4, 1, 0),
240*4882a593Smuzhiyun };
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_hf_left_mixer_controls[] = {
243*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC2L Playback Switch", ISABELLE_HFLPGA_CFG_REG, 7, 1, 0),
244*4882a593Smuzhiyun SOC_DAPM_SINGLE("APGA1 Playback Switch", ISABELLE_HFLPGA_CFG_REG, 6, 1, 0),
245*4882a593Smuzhiyun };
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_hf_right_mixer_controls[] = {
248*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC2R Playback Switch", ISABELLE_HFRPGA_CFG_REG, 7, 1, 0),
249*4882a593Smuzhiyun SOC_DAPM_SINGLE("APGA2 Playback Switch", ISABELLE_HFRPGA_CFG_REG, 6, 1, 0),
250*4882a593Smuzhiyun };
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_ep_mixer_controls[] = {
253*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC2L Playback Switch", ISABELLE_EARDRV_CFG1_REG, 7, 1, 0),
254*4882a593Smuzhiyun SOC_DAPM_SINGLE("APGA1 Playback Switch", ISABELLE_EARDRV_CFG1_REG, 6, 1, 0),
255*4882a593Smuzhiyun };
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_aux_left_mixer_controls[] = {
258*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC3L Playback Switch", ISABELLE_LINEAMP_CFG_REG, 7, 1, 0),
259*4882a593Smuzhiyun SOC_DAPM_SINGLE("APGA1 Playback Switch", ISABELLE_LINEAMP_CFG_REG, 6, 1, 0),
260*4882a593Smuzhiyun };
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_aux_right_mixer_controls[] = {
263*4882a593Smuzhiyun SOC_DAPM_SINGLE("DAC3R Playback Switch", ISABELLE_LINEAMP_CFG_REG, 5, 1, 0),
264*4882a593Smuzhiyun SOC_DAPM_SINGLE("APGA2 Playback Switch", ISABELLE_LINEAMP_CFG_REG, 4, 1, 0),
265*4882a593Smuzhiyun };
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_dpga1_left_mixer_controls[] = {
268*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX1 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 7, 1, 0),
269*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX3 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 6, 1, 0),
270*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX5 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 5, 1, 0),
271*4882a593Smuzhiyun };
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_dpga1_right_mixer_controls[] = {
274*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX2 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 3, 1, 0),
275*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX4 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 2, 1, 0),
276*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX6 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 1, 1, 0),
277*4882a593Smuzhiyun };
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_dpga2_left_mixer_controls[] = {
280*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX1 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 7, 1, 0),
281*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX2 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 6, 1, 0),
282*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX3 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 5, 1, 0),
283*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX4 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 4, 1, 0),
284*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX5 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 3, 1, 0),
285*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX6 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 2, 1, 0),
286*4882a593Smuzhiyun };
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_dpga2_right_mixer_controls[] = {
289*4882a593Smuzhiyun SOC_DAPM_SINGLE("USNC Playback Switch", ISABELLE_DPGA2R_IN_SEL_REG, 7, 1, 0),
290*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX2 Playback Switch", ISABELLE_DPGA2R_IN_SEL_REG, 3, 1, 0),
291*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX4 Playback Switch", ISABELLE_DPGA2R_IN_SEL_REG, 2, 1, 0),
292*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX6 Playback Switch", ISABELLE_DPGA2R_IN_SEL_REG, 1, 1, 0),
293*4882a593Smuzhiyun };
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_dpga3_left_mixer_controls[] = {
296*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX1 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 7, 1, 0),
297*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX3 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 6, 1, 0),
298*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX5 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 5, 1, 0),
299*4882a593Smuzhiyun };
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_dpga3_right_mixer_controls[] = {
302*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX2 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 3, 1, 0),
303*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX4 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 2, 1, 0),
304*4882a593Smuzhiyun SOC_DAPM_SINGLE("RX6 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 1, 1, 0),
305*4882a593Smuzhiyun };
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_rx1_mixer_controls[] = {
308*4882a593Smuzhiyun SOC_DAPM_SINGLE("ST1 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 7, 1, 0),
309*4882a593Smuzhiyun SOC_DAPM_SINGLE("DL1 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 6, 1, 0),
310*4882a593Smuzhiyun };
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_rx2_mixer_controls[] = {
313*4882a593Smuzhiyun SOC_DAPM_SINGLE("ST2 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 5, 1, 0),
314*4882a593Smuzhiyun SOC_DAPM_SINGLE("DL2 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 4, 1, 0),
315*4882a593Smuzhiyun };
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_rx3_mixer_controls[] = {
318*4882a593Smuzhiyun SOC_DAPM_SINGLE("ST1 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 3, 1, 0),
319*4882a593Smuzhiyun SOC_DAPM_SINGLE("DL3 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 2, 1, 0),
320*4882a593Smuzhiyun };
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_rx4_mixer_controls[] = {
323*4882a593Smuzhiyun SOC_DAPM_SINGLE("ST2 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 1, 1, 0),
324*4882a593Smuzhiyun SOC_DAPM_SINGLE("DL4 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 0, 1, 0),
325*4882a593Smuzhiyun };
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_rx5_mixer_controls[] = {
328*4882a593Smuzhiyun SOC_DAPM_SINGLE("ST1 Playback Switch", ISABELLE_RX_INPUT_CFG2_REG, 7, 1, 0),
329*4882a593Smuzhiyun SOC_DAPM_SINGLE("DL5 Playback Switch", ISABELLE_RX_INPUT_CFG2_REG, 6, 1, 0),
330*4882a593Smuzhiyun };
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_rx6_mixer_controls[] = {
333*4882a593Smuzhiyun SOC_DAPM_SINGLE("ST2 Playback Switch", ISABELLE_RX_INPUT_CFG2_REG, 5, 1, 0),
334*4882a593Smuzhiyun SOC_DAPM_SINGLE("DL6 Playback Switch", ISABELLE_RX_INPUT_CFG2_REG, 4, 1, 0),
335*4882a593Smuzhiyun };
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun static const struct snd_kcontrol_new ep_path_enable_control =
338*4882a593Smuzhiyun SOC_DAPM_SINGLE("Switch", ISABELLE_EARDRV_CFG2_REG, 0, 1, 0);
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun /* TLV Declarations */
341*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(mic_amp_tlv, 0, 100, 0);
342*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(afm_amp_tlv, -3300, 300, 0);
343*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(dac_tlv, -1200, 200, 0);
344*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(hf_tlv, -5000, 200, 0);
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun /* from -63 to 0 dB in 1 dB steps */
347*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(dpga_tlv, -6300, 100, 1);
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun /* from -63 to 9 dB in 1 dB steps */
350*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(rx_tlv, -6300, 100, 1);
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(st_tlv, -2700, 300, 1);
353*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(tx_tlv, -600, 100, 0);
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun static const struct snd_kcontrol_new isabelle_snd_controls[] = {
356*4882a593Smuzhiyun SOC_DOUBLE_TLV("Headset Playback Volume", ISABELLE_HSDRV_GAIN_REG,
357*4882a593Smuzhiyun 4, 0, 0xF, 0, dac_tlv),
358*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("Handsfree Playback Volume",
359*4882a593Smuzhiyun ISABELLE_HFLPGA_CFG_REG, ISABELLE_HFRPGA_CFG_REG,
360*4882a593Smuzhiyun 0, 0x1F, 0, hf_tlv),
361*4882a593Smuzhiyun SOC_DOUBLE_TLV("Aux Playback Volume", ISABELLE_LINEAMP_GAIN_REG,
362*4882a593Smuzhiyun 4, 0, 0xF, 0, dac_tlv),
363*4882a593Smuzhiyun SOC_SINGLE_TLV("Earpiece Playback Volume", ISABELLE_EARDRV_CFG1_REG,
364*4882a593Smuzhiyun 0, 0xF, 0, dac_tlv),
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun SOC_DOUBLE_TLV("Aux FM Volume", ISABELLE_APGA_GAIN_REG, 4, 0, 0xF, 0,
367*4882a593Smuzhiyun afm_amp_tlv),
368*4882a593Smuzhiyun SOC_SINGLE_TLV("Mic1 Capture Volume", ISABELLE_MIC1_GAIN_REG, 3, 0x1F,
369*4882a593Smuzhiyun 0, mic_amp_tlv),
370*4882a593Smuzhiyun SOC_SINGLE_TLV("Mic2 Capture Volume", ISABELLE_MIC2_GAIN_REG, 3, 0x1F,
371*4882a593Smuzhiyun 0, mic_amp_tlv),
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("DPGA1 Volume", ISABELLE_DPGA1L_GAIN_REG,
374*4882a593Smuzhiyun ISABELLE_DPGA1R_GAIN_REG, 0, 0x3F, 0, dpga_tlv),
375*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("DPGA2 Volume", ISABELLE_DPGA2L_GAIN_REG,
376*4882a593Smuzhiyun ISABELLE_DPGA2R_GAIN_REG, 0, 0x3F, 0, dpga_tlv),
377*4882a593Smuzhiyun SOC_DOUBLE_R_TLV("DPGA3 Volume", ISABELLE_DPGA3L_GAIN_REG,
378*4882a593Smuzhiyun ISABELLE_DPGA3R_GAIN_REG, 0, 0x3F, 0, dpga_tlv),
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun SOC_SINGLE_TLV("Sidetone Audio TX1 Volume",
381*4882a593Smuzhiyun ISABELLE_ATX_STPGA1_CFG_REG, 0, 0xF, 0, st_tlv),
382*4882a593Smuzhiyun SOC_SINGLE_TLV("Sidetone Audio TX2 Volume",
383*4882a593Smuzhiyun ISABELLE_ATX_STPGA2_CFG_REG, 0, 0xF, 0, st_tlv),
384*4882a593Smuzhiyun SOC_SINGLE_TLV("Sidetone Voice TX1 Volume",
385*4882a593Smuzhiyun ISABELLE_VTX_STPGA1_CFG_REG, 0, 0xF, 0, st_tlv),
386*4882a593Smuzhiyun SOC_SINGLE_TLV("Sidetone Voice TX2 Volume",
387*4882a593Smuzhiyun ISABELLE_VTX2_STPGA2_CFG_REG, 0, 0xF, 0, st_tlv),
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun SOC_SINGLE_TLV("Audio TX1 Volume", ISABELLE_ATX1_DPGA_REG, 4, 0xF, 0,
390*4882a593Smuzhiyun tx_tlv),
391*4882a593Smuzhiyun SOC_SINGLE_TLV("Audio TX2 Volume", ISABELLE_ATX2_DPGA_REG, 4, 0xF, 0,
392*4882a593Smuzhiyun tx_tlv),
393*4882a593Smuzhiyun SOC_SINGLE_TLV("Voice TX1 Volume", ISABELLE_VTX1_DPGA_REG, 4, 0xF, 0,
394*4882a593Smuzhiyun tx_tlv),
395*4882a593Smuzhiyun SOC_SINGLE_TLV("Voice TX2 Volume", ISABELLE_VTX2_DPGA_REG, 4, 0xF, 0,
396*4882a593Smuzhiyun tx_tlv),
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun SOC_SINGLE_TLV("RX1 DPGA Volume", ISABELLE_RX1_DPGA_REG, 0, 0x3F, 0,
399*4882a593Smuzhiyun rx_tlv),
400*4882a593Smuzhiyun SOC_SINGLE_TLV("RX2 DPGA Volume", ISABELLE_RX2_DPGA_REG, 0, 0x3F, 0,
401*4882a593Smuzhiyun rx_tlv),
402*4882a593Smuzhiyun SOC_SINGLE_TLV("RX3 DPGA Volume", ISABELLE_RX3_DPGA_REG, 0, 0x3F, 0,
403*4882a593Smuzhiyun rx_tlv),
404*4882a593Smuzhiyun SOC_SINGLE_TLV("RX4 DPGA Volume", ISABELLE_RX4_DPGA_REG, 0, 0x3F, 0,
405*4882a593Smuzhiyun rx_tlv),
406*4882a593Smuzhiyun SOC_SINGLE_TLV("RX5 DPGA Volume", ISABELLE_RX5_DPGA_REG, 0, 0x3F, 0,
407*4882a593Smuzhiyun rx_tlv),
408*4882a593Smuzhiyun SOC_SINGLE_TLV("RX6 DPGA Volume", ISABELLE_RX6_DPGA_REG, 0, 0x3F, 0,
409*4882a593Smuzhiyun rx_tlv),
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun SOC_SINGLE("Headset Noise Gate", ISABELLE_HS_NG_CFG1_REG, 7, 1, 0),
412*4882a593Smuzhiyun SOC_SINGLE("Handsfree Noise Gate", ISABELLE_HF_NG_CFG1_REG, 7, 1, 0),
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun SOC_SINGLE("ATX1 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
415*4882a593Smuzhiyun 7, 1, 0),
416*4882a593Smuzhiyun SOC_SINGLE("ATX2 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
417*4882a593Smuzhiyun 6, 1, 0),
418*4882a593Smuzhiyun SOC_SINGLE("ARX1 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
419*4882a593Smuzhiyun 5, 1, 0),
420*4882a593Smuzhiyun SOC_SINGLE("ARX2 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
421*4882a593Smuzhiyun 4, 1, 0),
422*4882a593Smuzhiyun SOC_SINGLE("ARX3 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
423*4882a593Smuzhiyun 3, 1, 0),
424*4882a593Smuzhiyun SOC_SINGLE("ARX4 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
425*4882a593Smuzhiyun 2, 1, 0),
426*4882a593Smuzhiyun SOC_SINGLE("ARX5 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
427*4882a593Smuzhiyun 1, 1, 0),
428*4882a593Smuzhiyun SOC_SINGLE("ARX6 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
429*4882a593Smuzhiyun 0, 1, 0),
430*4882a593Smuzhiyun SOC_SINGLE("VRX1 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
431*4882a593Smuzhiyun 3, 1, 0),
432*4882a593Smuzhiyun SOC_SINGLE("VRX2 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG,
433*4882a593Smuzhiyun 2, 1, 0),
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun SOC_SINGLE("ATX1 Filter Enable Switch", ISABELLE_ALU_TX_EN_REG,
436*4882a593Smuzhiyun 7, 1, 0),
437*4882a593Smuzhiyun SOC_SINGLE("ATX2 Filter Enable Switch", ISABELLE_ALU_TX_EN_REG,
438*4882a593Smuzhiyun 6, 1, 0),
439*4882a593Smuzhiyun SOC_SINGLE("VTX1 Filter Enable Switch", ISABELLE_ALU_TX_EN_REG,
440*4882a593Smuzhiyun 5, 1, 0),
441*4882a593Smuzhiyun SOC_SINGLE("VTX2 Filter Enable Switch", ISABELLE_ALU_TX_EN_REG,
442*4882a593Smuzhiyun 4, 1, 0),
443*4882a593Smuzhiyun SOC_SINGLE("RX1 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG,
444*4882a593Smuzhiyun 5, 1, 0),
445*4882a593Smuzhiyun SOC_SINGLE("RX2 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG,
446*4882a593Smuzhiyun 4, 1, 0),
447*4882a593Smuzhiyun SOC_SINGLE("RX3 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG,
448*4882a593Smuzhiyun 3, 1, 0),
449*4882a593Smuzhiyun SOC_SINGLE("RX4 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG,
450*4882a593Smuzhiyun 2, 1, 0),
451*4882a593Smuzhiyun SOC_SINGLE("RX5 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG,
452*4882a593Smuzhiyun 1, 1, 0),
453*4882a593Smuzhiyun SOC_SINGLE("RX6 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG,
454*4882a593Smuzhiyun 0, 1, 0),
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun SOC_SINGLE("ULATX12 Capture Switch", ISABELLE_ULATX12_INTF_CFG_REG,
457*4882a593Smuzhiyun 7, 1, 0),
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun SOC_SINGLE("DL12 Playback Switch", ISABELLE_DL12_INTF_CFG_REG,
460*4882a593Smuzhiyun 7, 1, 0),
461*4882a593Smuzhiyun SOC_SINGLE("DL34 Playback Switch", ISABELLE_DL34_INTF_CFG_REG,
462*4882a593Smuzhiyun 7, 1, 0),
463*4882a593Smuzhiyun SOC_SINGLE("DL56 Playback Switch", ISABELLE_DL56_INTF_CFG_REG,
464*4882a593Smuzhiyun 7, 1, 0),
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun /* DMIC Switch */
467*4882a593Smuzhiyun SOC_SINGLE("DMIC Switch", ISABELLE_DMIC_CFG_REG, 0, 1, 0),
468*4882a593Smuzhiyun };
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun static const struct snd_soc_dapm_widget isabelle_dapm_widgets[] = {
471*4882a593Smuzhiyun /* Inputs */
472*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("MAINMIC"),
473*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("HSMIC"),
474*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("SUBMIC"),
475*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LINEIN1"),
476*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LINEIN2"),
477*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("DMICDAT"),
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun /* Outputs */
480*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("HSOL"),
481*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("HSOR"),
482*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("HFL"),
483*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("HFR"),
484*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("EP"),
485*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("LINEOUT1"),
486*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("LINEOUT2"),
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun SND_SOC_DAPM_PGA("DL1", SND_SOC_NOPM, 0, 0, NULL, 0),
489*4882a593Smuzhiyun SND_SOC_DAPM_PGA("DL2", SND_SOC_NOPM, 0, 0, NULL, 0),
490*4882a593Smuzhiyun SND_SOC_DAPM_PGA("DL3", SND_SOC_NOPM, 0, 0, NULL, 0),
491*4882a593Smuzhiyun SND_SOC_DAPM_PGA("DL4", SND_SOC_NOPM, 0, 0, NULL, 0),
492*4882a593Smuzhiyun SND_SOC_DAPM_PGA("DL5", SND_SOC_NOPM, 0, 0, NULL, 0),
493*4882a593Smuzhiyun SND_SOC_DAPM_PGA("DL6", SND_SOC_NOPM, 0, 0, NULL, 0),
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun /* Analog input muxes for the capture amplifiers */
496*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Analog Left Capture Route",
497*4882a593Smuzhiyun SND_SOC_NOPM, 0, 0, &amic1_control),
498*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Analog Right Capture Route",
499*4882a593Smuzhiyun SND_SOC_NOPM, 0, 0, &amic2_control),
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Sidetone Audio Playback", SND_SOC_NOPM, 0, 0,
502*4882a593Smuzhiyun &st_audio_control),
503*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Sidetone Voice Playback", SND_SOC_NOPM, 0, 0,
504*4882a593Smuzhiyun &st_voice_control),
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun /* AIF */
507*4882a593Smuzhiyun SND_SOC_DAPM_AIF_IN("INTF1_SDI", NULL, 0, ISABELLE_INTF_EN_REG, 7, 0),
508*4882a593Smuzhiyun SND_SOC_DAPM_AIF_IN("INTF2_SDI", NULL, 0, ISABELLE_INTF_EN_REG, 6, 0),
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun SND_SOC_DAPM_AIF_OUT("INTF1_SDO", NULL, 0, ISABELLE_INTF_EN_REG, 5, 0),
511*4882a593Smuzhiyun SND_SOC_DAPM_AIF_OUT("INTF2_SDO", NULL, 0, ISABELLE_INTF_EN_REG, 4, 0),
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun SND_SOC_DAPM_OUT_DRV("ULATX1", SND_SOC_NOPM, 0, 0, NULL, 0),
514*4882a593Smuzhiyun SND_SOC_DAPM_OUT_DRV("ULATX2", SND_SOC_NOPM, 0, 0, NULL, 0),
515*4882a593Smuzhiyun SND_SOC_DAPM_OUT_DRV("ULVTX1", SND_SOC_NOPM, 0, 0, NULL, 0),
516*4882a593Smuzhiyun SND_SOC_DAPM_OUT_DRV("ULVTX2", SND_SOC_NOPM, 0, 0, NULL, 0),
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun /* Analog Capture PGAs */
519*4882a593Smuzhiyun SND_SOC_DAPM_PGA("MicAmp1", ISABELLE_AMIC_CFG_REG, 5, 0, NULL, 0),
520*4882a593Smuzhiyun SND_SOC_DAPM_PGA("MicAmp2", ISABELLE_AMIC_CFG_REG, 4, 0, NULL, 0),
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun /* Auxiliary FM PGAs */
523*4882a593Smuzhiyun SND_SOC_DAPM_PGA("APGA1", ISABELLE_APGA_CFG_REG, 7, 0, NULL, 0),
524*4882a593Smuzhiyun SND_SOC_DAPM_PGA("APGA2", ISABELLE_APGA_CFG_REG, 6, 0, NULL, 0),
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun /* ADCs */
527*4882a593Smuzhiyun SND_SOC_DAPM_ADC("ADC1", "Left Front Capture",
528*4882a593Smuzhiyun ISABELLE_AMIC_CFG_REG, 7, 0),
529*4882a593Smuzhiyun SND_SOC_DAPM_ADC("ADC2", "Right Front Capture",
530*4882a593Smuzhiyun ISABELLE_AMIC_CFG_REG, 6, 0),
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun /* Microphone Bias */
533*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("Headset Mic Bias", ISABELLE_ABIAS_CFG_REG,
534*4882a593Smuzhiyun 3, 0, NULL, 0),
535*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("Main Mic Bias", ISABELLE_ABIAS_CFG_REG,
536*4882a593Smuzhiyun 2, 0, NULL, 0),
537*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("Digital Mic1 Bias",
538*4882a593Smuzhiyun ISABELLE_DBIAS_CFG_REG, 3, 0, NULL, 0),
539*4882a593Smuzhiyun SND_SOC_DAPM_SUPPLY("Digital Mic2 Bias",
540*4882a593Smuzhiyun ISABELLE_DBIAS_CFG_REG, 2, 0, NULL, 0),
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun /* Mixers */
543*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Headset Left Mixer", SND_SOC_NOPM, 0, 0,
544*4882a593Smuzhiyun isabelle_hs_left_mixer_controls,
545*4882a593Smuzhiyun ARRAY_SIZE(isabelle_hs_left_mixer_controls)),
546*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Headset Right Mixer", SND_SOC_NOPM, 0, 0,
547*4882a593Smuzhiyun isabelle_hs_right_mixer_controls,
548*4882a593Smuzhiyun ARRAY_SIZE(isabelle_hs_right_mixer_controls)),
549*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Handsfree Left Mixer", SND_SOC_NOPM, 0, 0,
550*4882a593Smuzhiyun isabelle_hf_left_mixer_controls,
551*4882a593Smuzhiyun ARRAY_SIZE(isabelle_hf_left_mixer_controls)),
552*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Handsfree Right Mixer", SND_SOC_NOPM, 0, 0,
553*4882a593Smuzhiyun isabelle_hf_right_mixer_controls,
554*4882a593Smuzhiyun ARRAY_SIZE(isabelle_hf_right_mixer_controls)),
555*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
556*4882a593Smuzhiyun isabelle_aux_left_mixer_controls,
557*4882a593Smuzhiyun ARRAY_SIZE(isabelle_aux_left_mixer_controls)),
558*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
559*4882a593Smuzhiyun isabelle_aux_right_mixer_controls,
560*4882a593Smuzhiyun ARRAY_SIZE(isabelle_aux_right_mixer_controls)),
561*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("Earphone Mixer", SND_SOC_NOPM, 0, 0,
562*4882a593Smuzhiyun isabelle_ep_mixer_controls,
563*4882a593Smuzhiyun ARRAY_SIZE(isabelle_ep_mixer_controls)),
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("DPGA1L Mixer", SND_SOC_NOPM, 0, 0,
566*4882a593Smuzhiyun isabelle_dpga1_left_mixer_controls,
567*4882a593Smuzhiyun ARRAY_SIZE(isabelle_dpga1_left_mixer_controls)),
568*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("DPGA1R Mixer", SND_SOC_NOPM, 0, 0,
569*4882a593Smuzhiyun isabelle_dpga1_right_mixer_controls,
570*4882a593Smuzhiyun ARRAY_SIZE(isabelle_dpga1_right_mixer_controls)),
571*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("DPGA2L Mixer", SND_SOC_NOPM, 0, 0,
572*4882a593Smuzhiyun isabelle_dpga2_left_mixer_controls,
573*4882a593Smuzhiyun ARRAY_SIZE(isabelle_dpga2_left_mixer_controls)),
574*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("DPGA2R Mixer", SND_SOC_NOPM, 0, 0,
575*4882a593Smuzhiyun isabelle_dpga2_right_mixer_controls,
576*4882a593Smuzhiyun ARRAY_SIZE(isabelle_dpga2_right_mixer_controls)),
577*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("DPGA3L Mixer", SND_SOC_NOPM, 0, 0,
578*4882a593Smuzhiyun isabelle_dpga3_left_mixer_controls,
579*4882a593Smuzhiyun ARRAY_SIZE(isabelle_dpga3_left_mixer_controls)),
580*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("DPGA3R Mixer", SND_SOC_NOPM, 0, 0,
581*4882a593Smuzhiyun isabelle_dpga3_right_mixer_controls,
582*4882a593Smuzhiyun ARRAY_SIZE(isabelle_dpga3_right_mixer_controls)),
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("RX1 Mixer", SND_SOC_NOPM, 0, 0,
585*4882a593Smuzhiyun isabelle_rx1_mixer_controls,
586*4882a593Smuzhiyun ARRAY_SIZE(isabelle_rx1_mixer_controls)),
587*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("RX2 Mixer", SND_SOC_NOPM, 0, 0,
588*4882a593Smuzhiyun isabelle_rx2_mixer_controls,
589*4882a593Smuzhiyun ARRAY_SIZE(isabelle_rx2_mixer_controls)),
590*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("RX3 Mixer", SND_SOC_NOPM, 0, 0,
591*4882a593Smuzhiyun isabelle_rx3_mixer_controls,
592*4882a593Smuzhiyun ARRAY_SIZE(isabelle_rx3_mixer_controls)),
593*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("RX4 Mixer", SND_SOC_NOPM, 0, 0,
594*4882a593Smuzhiyun isabelle_rx4_mixer_controls,
595*4882a593Smuzhiyun ARRAY_SIZE(isabelle_rx4_mixer_controls)),
596*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("RX5 Mixer", SND_SOC_NOPM, 0, 0,
597*4882a593Smuzhiyun isabelle_rx5_mixer_controls,
598*4882a593Smuzhiyun ARRAY_SIZE(isabelle_rx5_mixer_controls)),
599*4882a593Smuzhiyun SND_SOC_DAPM_MIXER("RX6 Mixer", SND_SOC_NOPM, 0, 0,
600*4882a593Smuzhiyun isabelle_rx6_mixer_controls,
601*4882a593Smuzhiyun ARRAY_SIZE(isabelle_rx6_mixer_controls)),
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun /* DACs */
604*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC1L", "Headset Playback", ISABELLE_DAC_CFG_REG,
605*4882a593Smuzhiyun 5, 0),
606*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC1R", "Headset Playback", ISABELLE_DAC_CFG_REG,
607*4882a593Smuzhiyun 4, 0),
608*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC2L", "Handsfree Playback", ISABELLE_DAC_CFG_REG,
609*4882a593Smuzhiyun 3, 0),
610*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC2R", "Handsfree Playback", ISABELLE_DAC_CFG_REG,
611*4882a593Smuzhiyun 2, 0),
612*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC3L", "Lineout Playback", ISABELLE_DAC_CFG_REG,
613*4882a593Smuzhiyun 1, 0),
614*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC3R", "Lineout Playback", ISABELLE_DAC_CFG_REG,
615*4882a593Smuzhiyun 0, 0),
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun /* Analog Playback PGAs */
618*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Sidetone Audio PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
619*4882a593Smuzhiyun SND_SOC_DAPM_PGA("Sidetone Voice PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
620*4882a593Smuzhiyun SND_SOC_DAPM_PGA("HF Left PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
621*4882a593Smuzhiyun SND_SOC_DAPM_PGA("HF Right PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
622*4882a593Smuzhiyun SND_SOC_DAPM_PGA("DPGA1L", SND_SOC_NOPM, 0, 0, NULL, 0),
623*4882a593Smuzhiyun SND_SOC_DAPM_PGA("DPGA1R", SND_SOC_NOPM, 0, 0, NULL, 0),
624*4882a593Smuzhiyun SND_SOC_DAPM_PGA("DPGA2L", SND_SOC_NOPM, 0, 0, NULL, 0),
625*4882a593Smuzhiyun SND_SOC_DAPM_PGA("DPGA2R", SND_SOC_NOPM, 0, 0, NULL, 0),
626*4882a593Smuzhiyun SND_SOC_DAPM_PGA("DPGA3L", SND_SOC_NOPM, 0, 0, NULL, 0),
627*4882a593Smuzhiyun SND_SOC_DAPM_PGA("DPGA3R", SND_SOC_NOPM, 0, 0, NULL, 0),
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun /* Analog Playback Mux */
630*4882a593Smuzhiyun SND_SOC_DAPM_MUX("RX1 Playback", ISABELLE_ALU_RX_EN_REG, 5, 0,
631*4882a593Smuzhiyun &rx1_mux_controls),
632*4882a593Smuzhiyun SND_SOC_DAPM_MUX("RX2 Playback", ISABELLE_ALU_RX_EN_REG, 4, 0,
633*4882a593Smuzhiyun &rx2_mux_controls),
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun /* TX Select */
636*4882a593Smuzhiyun SND_SOC_DAPM_MUX("ATX Select", ISABELLE_TX_INPUT_CFG_REG,
637*4882a593Smuzhiyun 7, 0, &atx_mux_controls),
638*4882a593Smuzhiyun SND_SOC_DAPM_MUX("VTX Select", ISABELLE_TX_INPUT_CFG_REG,
639*4882a593Smuzhiyun 6, 0, &vtx_mux_controls),
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun SND_SOC_DAPM_SWITCH("Earphone Playback", SND_SOC_NOPM, 0, 0,
642*4882a593Smuzhiyun &ep_path_enable_control),
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun /* Output Drivers */
645*4882a593Smuzhiyun SND_SOC_DAPM_OUT_DRV("HS Left Driver", ISABELLE_HSDRV_CFG2_REG,
646*4882a593Smuzhiyun 1, 0, NULL, 0),
647*4882a593Smuzhiyun SND_SOC_DAPM_OUT_DRV("HS Right Driver", ISABELLE_HSDRV_CFG2_REG,
648*4882a593Smuzhiyun 0, 0, NULL, 0),
649*4882a593Smuzhiyun SND_SOC_DAPM_OUT_DRV("LINEOUT1 Left Driver", ISABELLE_LINEAMP_CFG_REG,
650*4882a593Smuzhiyun 1, 0, NULL, 0),
651*4882a593Smuzhiyun SND_SOC_DAPM_OUT_DRV("LINEOUT2 Right Driver", ISABELLE_LINEAMP_CFG_REG,
652*4882a593Smuzhiyun 0, 0, NULL, 0),
653*4882a593Smuzhiyun SND_SOC_DAPM_OUT_DRV("Earphone Driver", ISABELLE_EARDRV_CFG2_REG,
654*4882a593Smuzhiyun 1, 0, NULL, 0),
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun SND_SOC_DAPM_OUT_DRV("HF Left Driver", ISABELLE_HFDRV_CFG_REG,
657*4882a593Smuzhiyun 1, 0, NULL, 0),
658*4882a593Smuzhiyun SND_SOC_DAPM_OUT_DRV("HF Right Driver", ISABELLE_HFDRV_CFG_REG,
659*4882a593Smuzhiyun 0, 0, NULL, 0),
660*4882a593Smuzhiyun };
661*4882a593Smuzhiyun
662*4882a593Smuzhiyun static const struct snd_soc_dapm_route isabelle_intercon[] = {
663*4882a593Smuzhiyun /* Interface mapping */
664*4882a593Smuzhiyun { "DL1", "DL12 Playback Switch", "INTF1_SDI" },
665*4882a593Smuzhiyun { "DL2", "DL12 Playback Switch", "INTF1_SDI" },
666*4882a593Smuzhiyun { "DL3", "DL34 Playback Switch", "INTF1_SDI" },
667*4882a593Smuzhiyun { "DL4", "DL34 Playback Switch", "INTF1_SDI" },
668*4882a593Smuzhiyun { "DL5", "DL56 Playback Switch", "INTF1_SDI" },
669*4882a593Smuzhiyun { "DL6", "DL56 Playback Switch", "INTF1_SDI" },
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun { "DL1", "DL12 Playback Switch", "INTF2_SDI" },
672*4882a593Smuzhiyun { "DL2", "DL12 Playback Switch", "INTF2_SDI" },
673*4882a593Smuzhiyun { "DL3", "DL34 Playback Switch", "INTF2_SDI" },
674*4882a593Smuzhiyun { "DL4", "DL34 Playback Switch", "INTF2_SDI" },
675*4882a593Smuzhiyun { "DL5", "DL56 Playback Switch", "INTF2_SDI" },
676*4882a593Smuzhiyun { "DL6", "DL56 Playback Switch", "INTF2_SDI" },
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun /* Input side mapping */
679*4882a593Smuzhiyun { "Sidetone Audio PGA", NULL, "Sidetone Audio Playback" },
680*4882a593Smuzhiyun { "Sidetone Voice PGA", NULL, "Sidetone Voice Playback" },
681*4882a593Smuzhiyun
682*4882a593Smuzhiyun { "RX1 Mixer", "ST1 Playback Switch", "Sidetone Audio PGA" },
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun { "RX1 Mixer", "ST1 Playback Switch", "Sidetone Voice PGA" },
685*4882a593Smuzhiyun { "RX1 Mixer", "DL1 Playback Switch", "DL1" },
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun { "RX2 Mixer", "ST2 Playback Switch", "Sidetone Audio PGA" },
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun { "RX2 Mixer", "ST2 Playback Switch", "Sidetone Voice PGA" },
690*4882a593Smuzhiyun { "RX2 Mixer", "DL2 Playback Switch", "DL2" },
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun { "RX3 Mixer", "ST1 Playback Switch", "Sidetone Voice PGA" },
693*4882a593Smuzhiyun { "RX3 Mixer", "DL3 Playback Switch", "DL3" },
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun { "RX4 Mixer", "ST2 Playback Switch", "Sidetone Voice PGA" },
696*4882a593Smuzhiyun { "RX4 Mixer", "DL4 Playback Switch", "DL4" },
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun { "RX5 Mixer", "ST1 Playback Switch", "Sidetone Voice PGA" },
699*4882a593Smuzhiyun { "RX5 Mixer", "DL5 Playback Switch", "DL5" },
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun { "RX6 Mixer", "ST2 Playback Switch", "Sidetone Voice PGA" },
702*4882a593Smuzhiyun { "RX6 Mixer", "DL6 Playback Switch", "DL6" },
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun /* Capture path */
705*4882a593Smuzhiyun { "Analog Left Capture Route", "Headset Mic", "HSMIC" },
706*4882a593Smuzhiyun { "Analog Left Capture Route", "Main Mic", "MAINMIC" },
707*4882a593Smuzhiyun { "Analog Left Capture Route", "Aux/FM Left", "LINEIN1" },
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun { "Analog Right Capture Route", "Sub Mic", "SUBMIC" },
710*4882a593Smuzhiyun { "Analog Right Capture Route", "Aux/FM Right", "LINEIN2" },
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun { "MicAmp1", NULL, "Analog Left Capture Route" },
713*4882a593Smuzhiyun { "MicAmp2", NULL, "Analog Right Capture Route" },
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun { "ADC1", NULL, "MicAmp1" },
716*4882a593Smuzhiyun { "ADC2", NULL, "MicAmp2" },
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun { "ATX Select", "AMIC1", "ADC1" },
719*4882a593Smuzhiyun { "ATX Select", "DMIC", "DMICDAT" },
720*4882a593Smuzhiyun { "ATX Select", "AMIC2", "ADC2" },
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun { "VTX Select", "AMIC1", "ADC1" },
723*4882a593Smuzhiyun { "VTX Select", "DMIC", "DMICDAT" },
724*4882a593Smuzhiyun { "VTX Select", "AMIC2", "ADC2" },
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun { "ULATX1", "ATX1 Filter Enable Switch", "ATX Select" },
727*4882a593Smuzhiyun { "ULATX1", "ATX1 Filter Bypass Switch", "ATX Select" },
728*4882a593Smuzhiyun { "ULATX2", "ATX2 Filter Enable Switch", "ATX Select" },
729*4882a593Smuzhiyun { "ULATX2", "ATX2 Filter Bypass Switch", "ATX Select" },
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun { "ULVTX1", "VTX1 Filter Enable Switch", "VTX Select" },
732*4882a593Smuzhiyun { "ULVTX1", "VTX1 Filter Bypass Switch", "VTX Select" },
733*4882a593Smuzhiyun { "ULVTX2", "VTX2 Filter Enable Switch", "VTX Select" },
734*4882a593Smuzhiyun { "ULVTX2", "VTX2 Filter Bypass Switch", "VTX Select" },
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun { "INTF1_SDO", "ULATX12 Capture Switch", "ULATX1" },
737*4882a593Smuzhiyun { "INTF1_SDO", "ULATX12 Capture Switch", "ULATX2" },
738*4882a593Smuzhiyun { "INTF2_SDO", "ULATX12 Capture Switch", "ULATX1" },
739*4882a593Smuzhiyun { "INTF2_SDO", "ULATX12 Capture Switch", "ULATX2" },
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun { "INTF1_SDO", NULL, "ULVTX1" },
742*4882a593Smuzhiyun { "INTF1_SDO", NULL, "ULVTX2" },
743*4882a593Smuzhiyun { "INTF2_SDO", NULL, "ULVTX1" },
744*4882a593Smuzhiyun { "INTF2_SDO", NULL, "ULVTX2" },
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun /* AFM Path */
747*4882a593Smuzhiyun { "APGA1", NULL, "LINEIN1" },
748*4882a593Smuzhiyun { "APGA2", NULL, "LINEIN2" },
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun { "RX1 Playback", "VRX1 Filter Bypass Switch", "RX1 Mixer" },
751*4882a593Smuzhiyun { "RX1 Playback", "ARX1 Filter Bypass Switch", "RX1 Mixer" },
752*4882a593Smuzhiyun { "RX1 Playback", "RX1 Filter Enable Switch", "RX1 Mixer" },
753*4882a593Smuzhiyun
754*4882a593Smuzhiyun { "RX2 Playback", "VRX2 Filter Bypass Switch", "RX2 Mixer" },
755*4882a593Smuzhiyun { "RX2 Playback", "ARX2 Filter Bypass Switch", "RX2 Mixer" },
756*4882a593Smuzhiyun { "RX2 Playback", "RX2 Filter Enable Switch", "RX2 Mixer" },
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun { "RX3 Playback", "ARX3 Filter Bypass Switch", "RX3 Mixer" },
759*4882a593Smuzhiyun { "RX3 Playback", "RX3 Filter Enable Switch", "RX3 Mixer" },
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun { "RX4 Playback", "ARX4 Filter Bypass Switch", "RX4 Mixer" },
762*4882a593Smuzhiyun { "RX4 Playback", "RX4 Filter Enable Switch", "RX4 Mixer" },
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun { "RX5 Playback", "ARX5 Filter Bypass Switch", "RX5 Mixer" },
765*4882a593Smuzhiyun { "RX5 Playback", "RX5 Filter Enable Switch", "RX5 Mixer" },
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun { "RX6 Playback", "ARX6 Filter Bypass Switch", "RX6 Mixer" },
768*4882a593Smuzhiyun { "RX6 Playback", "RX6 Filter Enable Switch", "RX6 Mixer" },
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun { "DPGA1L Mixer", "RX1 Playback Switch", "RX1 Playback" },
771*4882a593Smuzhiyun { "DPGA1L Mixer", "RX3 Playback Switch", "RX3 Playback" },
772*4882a593Smuzhiyun { "DPGA1L Mixer", "RX5 Playback Switch", "RX5 Playback" },
773*4882a593Smuzhiyun
774*4882a593Smuzhiyun { "DPGA1R Mixer", "RX2 Playback Switch", "RX2 Playback" },
775*4882a593Smuzhiyun { "DPGA1R Mixer", "RX4 Playback Switch", "RX4 Playback" },
776*4882a593Smuzhiyun { "DPGA1R Mixer", "RX6 Playback Switch", "RX6 Playback" },
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun { "DPGA1L", NULL, "DPGA1L Mixer" },
779*4882a593Smuzhiyun { "DPGA1R", NULL, "DPGA1R Mixer" },
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun { "DAC1L", NULL, "DPGA1L" },
782*4882a593Smuzhiyun { "DAC1R", NULL, "DPGA1R" },
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun { "DPGA2L Mixer", "RX1 Playback Switch", "RX1 Playback" },
785*4882a593Smuzhiyun { "DPGA2L Mixer", "RX2 Playback Switch", "RX2 Playback" },
786*4882a593Smuzhiyun { "DPGA2L Mixer", "RX3 Playback Switch", "RX3 Playback" },
787*4882a593Smuzhiyun { "DPGA2L Mixer", "RX4 Playback Switch", "RX4 Playback" },
788*4882a593Smuzhiyun { "DPGA2L Mixer", "RX5 Playback Switch", "RX5 Playback" },
789*4882a593Smuzhiyun { "DPGA2L Mixer", "RX6 Playback Switch", "RX6 Playback" },
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun { "DPGA2R Mixer", "RX2 Playback Switch", "RX2 Playback" },
792*4882a593Smuzhiyun { "DPGA2R Mixer", "RX4 Playback Switch", "RX4 Playback" },
793*4882a593Smuzhiyun { "DPGA2R Mixer", "RX6 Playback Switch", "RX6 Playback" },
794*4882a593Smuzhiyun
795*4882a593Smuzhiyun { "DPGA2L", NULL, "DPGA2L Mixer" },
796*4882a593Smuzhiyun { "DPGA2R", NULL, "DPGA2R Mixer" },
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun { "DAC2L", NULL, "DPGA2L" },
799*4882a593Smuzhiyun { "DAC2R", NULL, "DPGA2R" },
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun { "DPGA3L Mixer", "RX1 Playback Switch", "RX1 Playback" },
802*4882a593Smuzhiyun { "DPGA3L Mixer", "RX3 Playback Switch", "RX3 Playback" },
803*4882a593Smuzhiyun { "DPGA3L Mixer", "RX5 Playback Switch", "RX5 Playback" },
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun { "DPGA3R Mixer", "RX2 Playback Switch", "RX2 Playback" },
806*4882a593Smuzhiyun { "DPGA3R Mixer", "RX4 Playback Switch", "RX4 Playback" },
807*4882a593Smuzhiyun { "DPGA3R Mixer", "RX6 Playback Switch", "RX6 Playback" },
808*4882a593Smuzhiyun
809*4882a593Smuzhiyun { "DPGA3L", NULL, "DPGA3L Mixer" },
810*4882a593Smuzhiyun { "DPGA3R", NULL, "DPGA3R Mixer" },
811*4882a593Smuzhiyun
812*4882a593Smuzhiyun { "DAC3L", NULL, "DPGA3L" },
813*4882a593Smuzhiyun { "DAC3R", NULL, "DPGA3R" },
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun { "Headset Left Mixer", "DAC1L Playback Switch", "DAC1L" },
816*4882a593Smuzhiyun { "Headset Left Mixer", "APGA1 Playback Switch", "APGA1" },
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun { "Headset Right Mixer", "DAC1R Playback Switch", "DAC1R" },
819*4882a593Smuzhiyun { "Headset Right Mixer", "APGA2 Playback Switch", "APGA2" },
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun { "HS Left Driver", NULL, "Headset Left Mixer" },
822*4882a593Smuzhiyun { "HS Right Driver", NULL, "Headset Right Mixer" },
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun { "HSOL", NULL, "HS Left Driver" },
825*4882a593Smuzhiyun { "HSOR", NULL, "HS Right Driver" },
826*4882a593Smuzhiyun
827*4882a593Smuzhiyun /* Earphone playback path */
828*4882a593Smuzhiyun { "Earphone Mixer", "DAC2L Playback Switch", "DAC2L" },
829*4882a593Smuzhiyun { "Earphone Mixer", "APGA1 Playback Switch", "APGA1" },
830*4882a593Smuzhiyun
831*4882a593Smuzhiyun { "Earphone Playback", "Switch", "Earphone Mixer" },
832*4882a593Smuzhiyun { "Earphone Driver", NULL, "Earphone Playback" },
833*4882a593Smuzhiyun { "EP", NULL, "Earphone Driver" },
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun { "Handsfree Left Mixer", "DAC2L Playback Switch", "DAC2L" },
836*4882a593Smuzhiyun { "Handsfree Left Mixer", "APGA1 Playback Switch", "APGA1" },
837*4882a593Smuzhiyun
838*4882a593Smuzhiyun { "Handsfree Right Mixer", "DAC2R Playback Switch", "DAC2R" },
839*4882a593Smuzhiyun { "Handsfree Right Mixer", "APGA2 Playback Switch", "APGA2" },
840*4882a593Smuzhiyun
841*4882a593Smuzhiyun { "HF Left PGA", NULL, "Handsfree Left Mixer" },
842*4882a593Smuzhiyun { "HF Right PGA", NULL, "Handsfree Right Mixer" },
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun { "HF Left Driver", NULL, "HF Left PGA" },
845*4882a593Smuzhiyun { "HF Right Driver", NULL, "HF Right PGA" },
846*4882a593Smuzhiyun
847*4882a593Smuzhiyun { "HFL", NULL, "HF Left Driver" },
848*4882a593Smuzhiyun { "HFR", NULL, "HF Right Driver" },
849*4882a593Smuzhiyun
850*4882a593Smuzhiyun { "LINEOUT1 Mixer", "DAC3L Playback Switch", "DAC3L" },
851*4882a593Smuzhiyun { "LINEOUT1 Mixer", "APGA1 Playback Switch", "APGA1" },
852*4882a593Smuzhiyun
853*4882a593Smuzhiyun { "LINEOUT2 Mixer", "DAC3R Playback Switch", "DAC3R" },
854*4882a593Smuzhiyun { "LINEOUT2 Mixer", "APGA2 Playback Switch", "APGA2" },
855*4882a593Smuzhiyun
856*4882a593Smuzhiyun { "LINEOUT1 Driver", NULL, "LINEOUT1 Mixer" },
857*4882a593Smuzhiyun { "LINEOUT2 Driver", NULL, "LINEOUT2 Mixer" },
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun { "LINEOUT1", NULL, "LINEOUT1 Driver" },
860*4882a593Smuzhiyun { "LINEOUT2", NULL, "LINEOUT2 Driver" },
861*4882a593Smuzhiyun };
862*4882a593Smuzhiyun
isabelle_hs_mute(struct snd_soc_dai * dai,int mute,int direction)863*4882a593Smuzhiyun static int isabelle_hs_mute(struct snd_soc_dai *dai, int mute, int direction)
864*4882a593Smuzhiyun {
865*4882a593Smuzhiyun snd_soc_component_update_bits(dai->component, ISABELLE_DAC1_SOFTRAMP_REG,
866*4882a593Smuzhiyun BIT(4), (mute ? BIT(4) : 0));
867*4882a593Smuzhiyun
868*4882a593Smuzhiyun return 0;
869*4882a593Smuzhiyun }
870*4882a593Smuzhiyun
isabelle_hf_mute(struct snd_soc_dai * dai,int mute,int direction)871*4882a593Smuzhiyun static int isabelle_hf_mute(struct snd_soc_dai *dai, int mute, int direction)
872*4882a593Smuzhiyun {
873*4882a593Smuzhiyun snd_soc_component_update_bits(dai->component, ISABELLE_DAC2_SOFTRAMP_REG,
874*4882a593Smuzhiyun BIT(4), (mute ? BIT(4) : 0));
875*4882a593Smuzhiyun
876*4882a593Smuzhiyun return 0;
877*4882a593Smuzhiyun }
878*4882a593Smuzhiyun
isabelle_line_mute(struct snd_soc_dai * dai,int mute,int direction)879*4882a593Smuzhiyun static int isabelle_line_mute(struct snd_soc_dai *dai, int mute, int direction)
880*4882a593Smuzhiyun {
881*4882a593Smuzhiyun snd_soc_component_update_bits(dai->component, ISABELLE_DAC3_SOFTRAMP_REG,
882*4882a593Smuzhiyun BIT(4), (mute ? BIT(4) : 0));
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun return 0;
885*4882a593Smuzhiyun }
886*4882a593Smuzhiyun
isabelle_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)887*4882a593Smuzhiyun static int isabelle_set_bias_level(struct snd_soc_component *component,
888*4882a593Smuzhiyun enum snd_soc_bias_level level)
889*4882a593Smuzhiyun {
890*4882a593Smuzhiyun switch (level) {
891*4882a593Smuzhiyun case SND_SOC_BIAS_ON:
892*4882a593Smuzhiyun break;
893*4882a593Smuzhiyun case SND_SOC_BIAS_PREPARE:
894*4882a593Smuzhiyun break;
895*4882a593Smuzhiyun
896*4882a593Smuzhiyun case SND_SOC_BIAS_STANDBY:
897*4882a593Smuzhiyun snd_soc_component_update_bits(component, ISABELLE_PWR_EN_REG,
898*4882a593Smuzhiyun ISABELLE_CHIP_EN, BIT(0));
899*4882a593Smuzhiyun break;
900*4882a593Smuzhiyun
901*4882a593Smuzhiyun case SND_SOC_BIAS_OFF:
902*4882a593Smuzhiyun snd_soc_component_update_bits(component, ISABELLE_PWR_EN_REG,
903*4882a593Smuzhiyun ISABELLE_CHIP_EN, 0);
904*4882a593Smuzhiyun break;
905*4882a593Smuzhiyun }
906*4882a593Smuzhiyun
907*4882a593Smuzhiyun return 0;
908*4882a593Smuzhiyun }
909*4882a593Smuzhiyun
isabelle_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)910*4882a593Smuzhiyun static int isabelle_hw_params(struct snd_pcm_substream *substream,
911*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
912*4882a593Smuzhiyun struct snd_soc_dai *dai)
913*4882a593Smuzhiyun {
914*4882a593Smuzhiyun struct snd_soc_component *component = dai->component;
915*4882a593Smuzhiyun u16 aif = 0;
916*4882a593Smuzhiyun unsigned int fs_val = 0;
917*4882a593Smuzhiyun
918*4882a593Smuzhiyun switch (params_rate(params)) {
919*4882a593Smuzhiyun case 8000:
920*4882a593Smuzhiyun fs_val = ISABELLE_FS_RATE_8;
921*4882a593Smuzhiyun break;
922*4882a593Smuzhiyun case 11025:
923*4882a593Smuzhiyun fs_val = ISABELLE_FS_RATE_11;
924*4882a593Smuzhiyun break;
925*4882a593Smuzhiyun case 12000:
926*4882a593Smuzhiyun fs_val = ISABELLE_FS_RATE_12;
927*4882a593Smuzhiyun break;
928*4882a593Smuzhiyun case 16000:
929*4882a593Smuzhiyun fs_val = ISABELLE_FS_RATE_16;
930*4882a593Smuzhiyun break;
931*4882a593Smuzhiyun case 22050:
932*4882a593Smuzhiyun fs_val = ISABELLE_FS_RATE_22;
933*4882a593Smuzhiyun break;
934*4882a593Smuzhiyun case 24000:
935*4882a593Smuzhiyun fs_val = ISABELLE_FS_RATE_24;
936*4882a593Smuzhiyun break;
937*4882a593Smuzhiyun case 32000:
938*4882a593Smuzhiyun fs_val = ISABELLE_FS_RATE_32;
939*4882a593Smuzhiyun break;
940*4882a593Smuzhiyun case 44100:
941*4882a593Smuzhiyun fs_val = ISABELLE_FS_RATE_44;
942*4882a593Smuzhiyun break;
943*4882a593Smuzhiyun case 48000:
944*4882a593Smuzhiyun fs_val = ISABELLE_FS_RATE_48;
945*4882a593Smuzhiyun break;
946*4882a593Smuzhiyun default:
947*4882a593Smuzhiyun return -EINVAL;
948*4882a593Smuzhiyun }
949*4882a593Smuzhiyun
950*4882a593Smuzhiyun snd_soc_component_update_bits(component, ISABELLE_FS_RATE_CFG_REG,
951*4882a593Smuzhiyun ISABELLE_FS_RATE_MASK, fs_val);
952*4882a593Smuzhiyun
953*4882a593Smuzhiyun /* bit size */
954*4882a593Smuzhiyun switch (params_width(params)) {
955*4882a593Smuzhiyun case 20:
956*4882a593Smuzhiyun aif |= ISABELLE_AIF_LENGTH_20;
957*4882a593Smuzhiyun break;
958*4882a593Smuzhiyun case 32:
959*4882a593Smuzhiyun aif |= ISABELLE_AIF_LENGTH_32;
960*4882a593Smuzhiyun break;
961*4882a593Smuzhiyun default:
962*4882a593Smuzhiyun return -EINVAL;
963*4882a593Smuzhiyun }
964*4882a593Smuzhiyun
965*4882a593Smuzhiyun snd_soc_component_update_bits(component, ISABELLE_INTF_CFG_REG,
966*4882a593Smuzhiyun ISABELLE_AIF_LENGTH_MASK, aif);
967*4882a593Smuzhiyun
968*4882a593Smuzhiyun return 0;
969*4882a593Smuzhiyun }
970*4882a593Smuzhiyun
isabelle_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)971*4882a593Smuzhiyun static int isabelle_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
972*4882a593Smuzhiyun {
973*4882a593Smuzhiyun struct snd_soc_component *component = codec_dai->component;
974*4882a593Smuzhiyun unsigned int aif_val = 0;
975*4882a593Smuzhiyun
976*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
977*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBS_CFS:
978*4882a593Smuzhiyun aif_val &= ~ISABELLE_AIF_MS;
979*4882a593Smuzhiyun break;
980*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBM_CFM:
981*4882a593Smuzhiyun aif_val |= ISABELLE_AIF_MS;
982*4882a593Smuzhiyun break;
983*4882a593Smuzhiyun default:
984*4882a593Smuzhiyun return -EINVAL;
985*4882a593Smuzhiyun }
986*4882a593Smuzhiyun
987*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
988*4882a593Smuzhiyun case SND_SOC_DAIFMT_I2S:
989*4882a593Smuzhiyun aif_val |= ISABELLE_I2S_MODE;
990*4882a593Smuzhiyun break;
991*4882a593Smuzhiyun case SND_SOC_DAIFMT_LEFT_J:
992*4882a593Smuzhiyun aif_val |= ISABELLE_LEFT_J_MODE;
993*4882a593Smuzhiyun break;
994*4882a593Smuzhiyun case SND_SOC_DAIFMT_PDM:
995*4882a593Smuzhiyun aif_val |= ISABELLE_PDM_MODE;
996*4882a593Smuzhiyun break;
997*4882a593Smuzhiyun default:
998*4882a593Smuzhiyun return -EINVAL;
999*4882a593Smuzhiyun }
1000*4882a593Smuzhiyun
1001*4882a593Smuzhiyun snd_soc_component_update_bits(component, ISABELLE_INTF_CFG_REG,
1002*4882a593Smuzhiyun (ISABELLE_AIF_MS | ISABELLE_AIF_FMT_MASK), aif_val);
1003*4882a593Smuzhiyun
1004*4882a593Smuzhiyun return 0;
1005*4882a593Smuzhiyun }
1006*4882a593Smuzhiyun
1007*4882a593Smuzhiyun /* Rates supported by Isabelle driver */
1008*4882a593Smuzhiyun #define ISABELLE_RATES SNDRV_PCM_RATE_8000_48000
1009*4882a593Smuzhiyun
1010*4882a593Smuzhiyun /* Formates supported by Isabelle driver. */
1011*4882a593Smuzhiyun #define ISABELLE_FORMATS (SNDRV_PCM_FMTBIT_S20_3LE |\
1012*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S32_LE)
1013*4882a593Smuzhiyun
1014*4882a593Smuzhiyun static const struct snd_soc_dai_ops isabelle_hs_dai_ops = {
1015*4882a593Smuzhiyun .hw_params = isabelle_hw_params,
1016*4882a593Smuzhiyun .set_fmt = isabelle_set_dai_fmt,
1017*4882a593Smuzhiyun .mute_stream = isabelle_hs_mute,
1018*4882a593Smuzhiyun .no_capture_mute = 1,
1019*4882a593Smuzhiyun };
1020*4882a593Smuzhiyun
1021*4882a593Smuzhiyun static const struct snd_soc_dai_ops isabelle_hf_dai_ops = {
1022*4882a593Smuzhiyun .hw_params = isabelle_hw_params,
1023*4882a593Smuzhiyun .set_fmt = isabelle_set_dai_fmt,
1024*4882a593Smuzhiyun .mute_stream = isabelle_hf_mute,
1025*4882a593Smuzhiyun .no_capture_mute = 1,
1026*4882a593Smuzhiyun };
1027*4882a593Smuzhiyun
1028*4882a593Smuzhiyun static const struct snd_soc_dai_ops isabelle_line_dai_ops = {
1029*4882a593Smuzhiyun .hw_params = isabelle_hw_params,
1030*4882a593Smuzhiyun .set_fmt = isabelle_set_dai_fmt,
1031*4882a593Smuzhiyun .mute_stream = isabelle_line_mute,
1032*4882a593Smuzhiyun .no_capture_mute = 1,
1033*4882a593Smuzhiyun };
1034*4882a593Smuzhiyun
1035*4882a593Smuzhiyun static const struct snd_soc_dai_ops isabelle_ul_dai_ops = {
1036*4882a593Smuzhiyun .hw_params = isabelle_hw_params,
1037*4882a593Smuzhiyun .set_fmt = isabelle_set_dai_fmt,
1038*4882a593Smuzhiyun };
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun /* ISABELLE dai structure */
1041*4882a593Smuzhiyun static struct snd_soc_dai_driver isabelle_dai[] = {
1042*4882a593Smuzhiyun {
1043*4882a593Smuzhiyun .name = "isabelle-dl1",
1044*4882a593Smuzhiyun .playback = {
1045*4882a593Smuzhiyun .stream_name = "Headset Playback",
1046*4882a593Smuzhiyun .channels_min = 1,
1047*4882a593Smuzhiyun .channels_max = 2,
1048*4882a593Smuzhiyun .rates = ISABELLE_RATES,
1049*4882a593Smuzhiyun .formats = ISABELLE_FORMATS,
1050*4882a593Smuzhiyun },
1051*4882a593Smuzhiyun .ops = &isabelle_hs_dai_ops,
1052*4882a593Smuzhiyun },
1053*4882a593Smuzhiyun {
1054*4882a593Smuzhiyun .name = "isabelle-dl2",
1055*4882a593Smuzhiyun .playback = {
1056*4882a593Smuzhiyun .stream_name = "Handsfree Playback",
1057*4882a593Smuzhiyun .channels_min = 1,
1058*4882a593Smuzhiyun .channels_max = 2,
1059*4882a593Smuzhiyun .rates = ISABELLE_RATES,
1060*4882a593Smuzhiyun .formats = ISABELLE_FORMATS,
1061*4882a593Smuzhiyun },
1062*4882a593Smuzhiyun .ops = &isabelle_hf_dai_ops,
1063*4882a593Smuzhiyun },
1064*4882a593Smuzhiyun {
1065*4882a593Smuzhiyun .name = "isabelle-lineout",
1066*4882a593Smuzhiyun .playback = {
1067*4882a593Smuzhiyun .stream_name = "Lineout Playback",
1068*4882a593Smuzhiyun .channels_min = 1,
1069*4882a593Smuzhiyun .channels_max = 2,
1070*4882a593Smuzhiyun .rates = ISABELLE_RATES,
1071*4882a593Smuzhiyun .formats = ISABELLE_FORMATS,
1072*4882a593Smuzhiyun },
1073*4882a593Smuzhiyun .ops = &isabelle_line_dai_ops,
1074*4882a593Smuzhiyun },
1075*4882a593Smuzhiyun {
1076*4882a593Smuzhiyun .name = "isabelle-ul",
1077*4882a593Smuzhiyun .capture = {
1078*4882a593Smuzhiyun .stream_name = "Capture",
1079*4882a593Smuzhiyun .channels_min = 1,
1080*4882a593Smuzhiyun .channels_max = 2,
1081*4882a593Smuzhiyun .rates = ISABELLE_RATES,
1082*4882a593Smuzhiyun .formats = ISABELLE_FORMATS,
1083*4882a593Smuzhiyun },
1084*4882a593Smuzhiyun .ops = &isabelle_ul_dai_ops,
1085*4882a593Smuzhiyun },
1086*4882a593Smuzhiyun };
1087*4882a593Smuzhiyun
1088*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_dev_isabelle = {
1089*4882a593Smuzhiyun .set_bias_level = isabelle_set_bias_level,
1090*4882a593Smuzhiyun .controls = isabelle_snd_controls,
1091*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(isabelle_snd_controls),
1092*4882a593Smuzhiyun .dapm_widgets = isabelle_dapm_widgets,
1093*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(isabelle_dapm_widgets),
1094*4882a593Smuzhiyun .dapm_routes = isabelle_intercon,
1095*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(isabelle_intercon),
1096*4882a593Smuzhiyun .use_pmdown_time = 1,
1097*4882a593Smuzhiyun .endianness = 1,
1098*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
1099*4882a593Smuzhiyun };
1100*4882a593Smuzhiyun
1101*4882a593Smuzhiyun static const struct regmap_config isabelle_regmap_config = {
1102*4882a593Smuzhiyun .reg_bits = 8,
1103*4882a593Smuzhiyun .val_bits = 8,
1104*4882a593Smuzhiyun
1105*4882a593Smuzhiyun .max_register = ISABELLE_MAX_REGISTER,
1106*4882a593Smuzhiyun .reg_defaults = isabelle_reg_defs,
1107*4882a593Smuzhiyun .num_reg_defaults = ARRAY_SIZE(isabelle_reg_defs),
1108*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
1109*4882a593Smuzhiyun };
1110*4882a593Smuzhiyun
isabelle_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)1111*4882a593Smuzhiyun static int isabelle_i2c_probe(struct i2c_client *i2c,
1112*4882a593Smuzhiyun const struct i2c_device_id *id)
1113*4882a593Smuzhiyun {
1114*4882a593Smuzhiyun struct regmap *isabelle_regmap;
1115*4882a593Smuzhiyun int ret = 0;
1116*4882a593Smuzhiyun
1117*4882a593Smuzhiyun isabelle_regmap = devm_regmap_init_i2c(i2c, &isabelle_regmap_config);
1118*4882a593Smuzhiyun if (IS_ERR(isabelle_regmap)) {
1119*4882a593Smuzhiyun ret = PTR_ERR(isabelle_regmap);
1120*4882a593Smuzhiyun dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1121*4882a593Smuzhiyun ret);
1122*4882a593Smuzhiyun return ret;
1123*4882a593Smuzhiyun }
1124*4882a593Smuzhiyun i2c_set_clientdata(i2c, isabelle_regmap);
1125*4882a593Smuzhiyun
1126*4882a593Smuzhiyun ret = devm_snd_soc_register_component(&i2c->dev,
1127*4882a593Smuzhiyun &soc_component_dev_isabelle, isabelle_dai,
1128*4882a593Smuzhiyun ARRAY_SIZE(isabelle_dai));
1129*4882a593Smuzhiyun if (ret < 0) {
1130*4882a593Smuzhiyun dev_err(&i2c->dev, "Failed to register component: %d\n", ret);
1131*4882a593Smuzhiyun return ret;
1132*4882a593Smuzhiyun }
1133*4882a593Smuzhiyun
1134*4882a593Smuzhiyun return ret;
1135*4882a593Smuzhiyun }
1136*4882a593Smuzhiyun
1137*4882a593Smuzhiyun static const struct i2c_device_id isabelle_i2c_id[] = {
1138*4882a593Smuzhiyun { "isabelle", 0 },
1139*4882a593Smuzhiyun { }
1140*4882a593Smuzhiyun };
1141*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, isabelle_i2c_id);
1142*4882a593Smuzhiyun
1143*4882a593Smuzhiyun static struct i2c_driver isabelle_i2c_driver = {
1144*4882a593Smuzhiyun .driver = {
1145*4882a593Smuzhiyun .name = "isabelle",
1146*4882a593Smuzhiyun },
1147*4882a593Smuzhiyun .probe = isabelle_i2c_probe,
1148*4882a593Smuzhiyun .id_table = isabelle_i2c_id,
1149*4882a593Smuzhiyun };
1150*4882a593Smuzhiyun
1151*4882a593Smuzhiyun module_i2c_driver(isabelle_i2c_driver);
1152*4882a593Smuzhiyun
1153*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC ISABELLE driver");
1154*4882a593Smuzhiyun MODULE_AUTHOR("Vishwas A Deshpande <vishwas.a.deshpande@ti.com>");
1155*4882a593Smuzhiyun MODULE_AUTHOR("M R Swami Reddy <MR.Swami.Reddy@ti.com>");
1156*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
1157