1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * ALSA SoC codec for HDMI encoder drivers
4*4882a593Smuzhiyun * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com/
5*4882a593Smuzhiyun * Author: Jyri Sarha <jsarha@ti.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun #include <linux/module.h>
8*4882a593Smuzhiyun #include <linux/string.h>
9*4882a593Smuzhiyun #include <sound/core.h>
10*4882a593Smuzhiyun #include <sound/jack.h>
11*4882a593Smuzhiyun #include <sound/pcm.h>
12*4882a593Smuzhiyun #include <sound/pcm_params.h>
13*4882a593Smuzhiyun #include <sound/soc.h>
14*4882a593Smuzhiyun #include <sound/tlv.h>
15*4882a593Smuzhiyun #include <sound/pcm_drm_eld.h>
16*4882a593Smuzhiyun #include <sound/hdmi-codec.h>
17*4882a593Smuzhiyun #include <sound/pcm_iec958.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <drm/drm_crtc.h> /* This is only to get MAX_ELD_BYTES */
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define HDMI_CODEC_CHMAP_IDX_UNKNOWN -1
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun struct hdmi_codec_channel_map_table {
24*4882a593Smuzhiyun unsigned char map; /* ALSA API channel map position */
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /*
28*4882a593Smuzhiyun * CEA speaker placement for HDMI 1.4:
29*4882a593Smuzhiyun *
30*4882a593Smuzhiyun * FL FLC FC FRC FR FRW
31*4882a593Smuzhiyun *
32*4882a593Smuzhiyun * LFE
33*4882a593Smuzhiyun *
34*4882a593Smuzhiyun * RL RLC RC RRC RR
35*4882a593Smuzhiyun *
36*4882a593Smuzhiyun * Speaker placement has to be extended to support HDMI 2.0
37*4882a593Smuzhiyun */
38*4882a593Smuzhiyun enum hdmi_codec_cea_spk_placement {
39*4882a593Smuzhiyun FL = BIT(0), /* Front Left */
40*4882a593Smuzhiyun FC = BIT(1), /* Front Center */
41*4882a593Smuzhiyun FR = BIT(2), /* Front Right */
42*4882a593Smuzhiyun FLC = BIT(3), /* Front Left Center */
43*4882a593Smuzhiyun FRC = BIT(4), /* Front Right Center */
44*4882a593Smuzhiyun RL = BIT(5), /* Rear Left */
45*4882a593Smuzhiyun RC = BIT(6), /* Rear Center */
46*4882a593Smuzhiyun RR = BIT(7), /* Rear Right */
47*4882a593Smuzhiyun RLC = BIT(8), /* Rear Left Center */
48*4882a593Smuzhiyun RRC = BIT(9), /* Rear Right Center */
49*4882a593Smuzhiyun LFE = BIT(10), /* Low Frequency Effect */
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun /*
53*4882a593Smuzhiyun * cea Speaker allocation structure
54*4882a593Smuzhiyun */
55*4882a593Smuzhiyun struct hdmi_codec_cea_spk_alloc {
56*4882a593Smuzhiyun const int ca_id;
57*4882a593Smuzhiyun unsigned int n_ch;
58*4882a593Smuzhiyun unsigned long mask;
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /* Channel maps stereo HDMI */
62*4882a593Smuzhiyun static const struct snd_pcm_chmap_elem hdmi_codec_stereo_chmaps[] = {
63*4882a593Smuzhiyun { .channels = 2,
64*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } },
65*4882a593Smuzhiyun { }
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /* Channel maps for multi-channel playbacks, up to 8 n_ch */
69*4882a593Smuzhiyun static const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = {
70*4882a593Smuzhiyun { .channels = 2, /* CA_ID 0x00 */
71*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } },
72*4882a593Smuzhiyun { .channels = 4, /* CA_ID 0x01 */
73*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
74*4882a593Smuzhiyun SNDRV_CHMAP_NA } },
75*4882a593Smuzhiyun { .channels = 4, /* CA_ID 0x02 */
76*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
77*4882a593Smuzhiyun SNDRV_CHMAP_FC } },
78*4882a593Smuzhiyun { .channels = 4, /* CA_ID 0x03 */
79*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
80*4882a593Smuzhiyun SNDRV_CHMAP_FC } },
81*4882a593Smuzhiyun { .channels = 6, /* CA_ID 0x04 */
82*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
83*4882a593Smuzhiyun SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
84*4882a593Smuzhiyun { .channels = 6, /* CA_ID 0x05 */
85*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
86*4882a593Smuzhiyun SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
87*4882a593Smuzhiyun { .channels = 6, /* CA_ID 0x06 */
88*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
89*4882a593Smuzhiyun SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
90*4882a593Smuzhiyun { .channels = 6, /* CA_ID 0x07 */
91*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
92*4882a593Smuzhiyun SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
93*4882a593Smuzhiyun { .channels = 6, /* CA_ID 0x08 */
94*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
95*4882a593Smuzhiyun SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
96*4882a593Smuzhiyun { .channels = 6, /* CA_ID 0x09 */
97*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
98*4882a593Smuzhiyun SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
99*4882a593Smuzhiyun { .channels = 6, /* CA_ID 0x0A */
100*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
101*4882a593Smuzhiyun SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
102*4882a593Smuzhiyun { .channels = 6, /* CA_ID 0x0B */
103*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
104*4882a593Smuzhiyun SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
105*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x0C */
106*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
107*4882a593Smuzhiyun SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
108*4882a593Smuzhiyun SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
109*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x0D */
110*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
111*4882a593Smuzhiyun SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
112*4882a593Smuzhiyun SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
113*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x0E */
114*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
115*4882a593Smuzhiyun SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
116*4882a593Smuzhiyun SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
117*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x0F */
118*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
119*4882a593Smuzhiyun SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
120*4882a593Smuzhiyun SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
121*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x10 */
122*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
123*4882a593Smuzhiyun SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
124*4882a593Smuzhiyun SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
125*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x11 */
126*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
127*4882a593Smuzhiyun SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
128*4882a593Smuzhiyun SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
129*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x12 */
130*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
131*4882a593Smuzhiyun SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
132*4882a593Smuzhiyun SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
133*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x13 */
134*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
135*4882a593Smuzhiyun SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
136*4882a593Smuzhiyun SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
137*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x14 */
138*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
139*4882a593Smuzhiyun SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
140*4882a593Smuzhiyun SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
141*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x15 */
142*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
143*4882a593Smuzhiyun SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
144*4882a593Smuzhiyun SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
145*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x16 */
146*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
147*4882a593Smuzhiyun SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
148*4882a593Smuzhiyun SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
149*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x17 */
150*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
151*4882a593Smuzhiyun SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
152*4882a593Smuzhiyun SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
153*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x18 */
154*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
155*4882a593Smuzhiyun SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
156*4882a593Smuzhiyun SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
157*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x19 */
158*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
159*4882a593Smuzhiyun SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
160*4882a593Smuzhiyun SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
161*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x1A */
162*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
163*4882a593Smuzhiyun SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
164*4882a593Smuzhiyun SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
165*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x1B */
166*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
167*4882a593Smuzhiyun SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
168*4882a593Smuzhiyun SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
169*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x1C */
170*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
171*4882a593Smuzhiyun SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
172*4882a593Smuzhiyun SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
173*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x1D */
174*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
175*4882a593Smuzhiyun SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
176*4882a593Smuzhiyun SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
177*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x1E */
178*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
179*4882a593Smuzhiyun SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
180*4882a593Smuzhiyun SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
181*4882a593Smuzhiyun { .channels = 8, /* CA_ID 0x1F */
182*4882a593Smuzhiyun .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
183*4882a593Smuzhiyun SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
184*4882a593Smuzhiyun SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
185*4882a593Smuzhiyun { }
186*4882a593Smuzhiyun };
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun /*
189*4882a593Smuzhiyun * hdmi_codec_channel_alloc: speaker configuration available for CEA
190*4882a593Smuzhiyun *
191*4882a593Smuzhiyun * This is an ordered list that must match with hdmi_codec_8ch_chmaps struct
192*4882a593Smuzhiyun * The preceding ones have better chances to be selected by
193*4882a593Smuzhiyun * hdmi_codec_get_ch_alloc_table_idx().
194*4882a593Smuzhiyun */
195*4882a593Smuzhiyun static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = {
196*4882a593Smuzhiyun { .ca_id = 0x00, .n_ch = 2,
197*4882a593Smuzhiyun .mask = FL | FR},
198*4882a593Smuzhiyun /* 2.1 */
199*4882a593Smuzhiyun { .ca_id = 0x01, .n_ch = 4,
200*4882a593Smuzhiyun .mask = FL | FR | LFE},
201*4882a593Smuzhiyun /* Dolby Surround */
202*4882a593Smuzhiyun { .ca_id = 0x02, .n_ch = 4,
203*4882a593Smuzhiyun .mask = FL | FR | FC },
204*4882a593Smuzhiyun /* surround51 */
205*4882a593Smuzhiyun { .ca_id = 0x0b, .n_ch = 6,
206*4882a593Smuzhiyun .mask = FL | FR | LFE | FC | RL | RR},
207*4882a593Smuzhiyun /* surround40 */
208*4882a593Smuzhiyun { .ca_id = 0x08, .n_ch = 6,
209*4882a593Smuzhiyun .mask = FL | FR | RL | RR },
210*4882a593Smuzhiyun /* surround41 */
211*4882a593Smuzhiyun { .ca_id = 0x09, .n_ch = 6,
212*4882a593Smuzhiyun .mask = FL | FR | LFE | RL | RR },
213*4882a593Smuzhiyun /* surround50 */
214*4882a593Smuzhiyun { .ca_id = 0x0a, .n_ch = 6,
215*4882a593Smuzhiyun .mask = FL | FR | FC | RL | RR },
216*4882a593Smuzhiyun /* 6.1 */
217*4882a593Smuzhiyun { .ca_id = 0x0f, .n_ch = 8,
218*4882a593Smuzhiyun .mask = FL | FR | LFE | FC | RL | RR | RC },
219*4882a593Smuzhiyun /* surround71 */
220*4882a593Smuzhiyun { .ca_id = 0x13, .n_ch = 8,
221*4882a593Smuzhiyun .mask = FL | FR | LFE | FC | RL | RR | RLC | RRC },
222*4882a593Smuzhiyun /* others */
223*4882a593Smuzhiyun { .ca_id = 0x03, .n_ch = 8,
224*4882a593Smuzhiyun .mask = FL | FR | LFE | FC },
225*4882a593Smuzhiyun { .ca_id = 0x04, .n_ch = 8,
226*4882a593Smuzhiyun .mask = FL | FR | RC},
227*4882a593Smuzhiyun { .ca_id = 0x05, .n_ch = 8,
228*4882a593Smuzhiyun .mask = FL | FR | LFE | RC },
229*4882a593Smuzhiyun { .ca_id = 0x06, .n_ch = 8,
230*4882a593Smuzhiyun .mask = FL | FR | FC | RC },
231*4882a593Smuzhiyun { .ca_id = 0x07, .n_ch = 8,
232*4882a593Smuzhiyun .mask = FL | FR | LFE | FC | RC },
233*4882a593Smuzhiyun { .ca_id = 0x0c, .n_ch = 8,
234*4882a593Smuzhiyun .mask = FL | FR | RC | RL | RR },
235*4882a593Smuzhiyun { .ca_id = 0x0d, .n_ch = 8,
236*4882a593Smuzhiyun .mask = FL | FR | LFE | RL | RR | RC },
237*4882a593Smuzhiyun { .ca_id = 0x0e, .n_ch = 8,
238*4882a593Smuzhiyun .mask = FL | FR | FC | RL | RR | RC },
239*4882a593Smuzhiyun { .ca_id = 0x10, .n_ch = 8,
240*4882a593Smuzhiyun .mask = FL | FR | RL | RR | RLC | RRC },
241*4882a593Smuzhiyun { .ca_id = 0x11, .n_ch = 8,
242*4882a593Smuzhiyun .mask = FL | FR | LFE | RL | RR | RLC | RRC },
243*4882a593Smuzhiyun { .ca_id = 0x12, .n_ch = 8,
244*4882a593Smuzhiyun .mask = FL | FR | FC | RL | RR | RLC | RRC },
245*4882a593Smuzhiyun { .ca_id = 0x14, .n_ch = 8,
246*4882a593Smuzhiyun .mask = FL | FR | FLC | FRC },
247*4882a593Smuzhiyun { .ca_id = 0x15, .n_ch = 8,
248*4882a593Smuzhiyun .mask = FL | FR | LFE | FLC | FRC },
249*4882a593Smuzhiyun { .ca_id = 0x16, .n_ch = 8,
250*4882a593Smuzhiyun .mask = FL | FR | FC | FLC | FRC },
251*4882a593Smuzhiyun { .ca_id = 0x17, .n_ch = 8,
252*4882a593Smuzhiyun .mask = FL | FR | LFE | FC | FLC | FRC },
253*4882a593Smuzhiyun { .ca_id = 0x18, .n_ch = 8,
254*4882a593Smuzhiyun .mask = FL | FR | RC | FLC | FRC },
255*4882a593Smuzhiyun { .ca_id = 0x19, .n_ch = 8,
256*4882a593Smuzhiyun .mask = FL | FR | LFE | RC | FLC | FRC },
257*4882a593Smuzhiyun { .ca_id = 0x1a, .n_ch = 8,
258*4882a593Smuzhiyun .mask = FL | FR | RC | FC | FLC | FRC },
259*4882a593Smuzhiyun { .ca_id = 0x1b, .n_ch = 8,
260*4882a593Smuzhiyun .mask = FL | FR | LFE | RC | FC | FLC | FRC },
261*4882a593Smuzhiyun { .ca_id = 0x1c, .n_ch = 8,
262*4882a593Smuzhiyun .mask = FL | FR | RL | RR | FLC | FRC },
263*4882a593Smuzhiyun { .ca_id = 0x1d, .n_ch = 8,
264*4882a593Smuzhiyun .mask = FL | FR | LFE | RL | RR | FLC | FRC },
265*4882a593Smuzhiyun { .ca_id = 0x1e, .n_ch = 8,
266*4882a593Smuzhiyun .mask = FL | FR | FC | RL | RR | FLC | FRC },
267*4882a593Smuzhiyun { .ca_id = 0x1f, .n_ch = 8,
268*4882a593Smuzhiyun .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
269*4882a593Smuzhiyun };
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun struct hdmi_codec_priv {
272*4882a593Smuzhiyun struct hdmi_codec_pdata hcd;
273*4882a593Smuzhiyun uint8_t eld[MAX_ELD_BYTES];
274*4882a593Smuzhiyun struct snd_pcm_chmap *chmap_info;
275*4882a593Smuzhiyun unsigned int chmap_idx;
276*4882a593Smuzhiyun struct mutex lock;
277*4882a593Smuzhiyun bool busy;
278*4882a593Smuzhiyun bool eld_bypass;
279*4882a593Smuzhiyun struct snd_soc_jack *jack;
280*4882a593Smuzhiyun unsigned int jack_status;
281*4882a593Smuzhiyun u8 iec_status[24];
282*4882a593Smuzhiyun struct snd_pcm_substream *substream;
283*4882a593Smuzhiyun };
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun static const struct snd_soc_dapm_widget hdmi_widgets[] = {
286*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("TX"),
287*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("RX"),
288*4882a593Smuzhiyun };
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun enum {
291*4882a593Smuzhiyun DAI_ID_I2S = 0,
292*4882a593Smuzhiyun DAI_ID_SPDIF,
293*4882a593Smuzhiyun };
294*4882a593Smuzhiyun
hdmi_eld_ctl_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)295*4882a593Smuzhiyun static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
296*4882a593Smuzhiyun struct snd_ctl_elem_info *uinfo)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
299*4882a593Smuzhiyun uinfo->count = sizeof_field(struct hdmi_codec_priv, eld);
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun return 0;
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun
hdmi_eld_ctl_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)304*4882a593Smuzhiyun static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
305*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
308*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun memcpy(ucontrol->value.bytes.data, hcp->eld, sizeof(hcp->eld));
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun return 0;
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun
hdmi_codec_spk_mask_from_alloc(int spk_alloc)315*4882a593Smuzhiyun static unsigned long hdmi_codec_spk_mask_from_alloc(int spk_alloc)
316*4882a593Smuzhiyun {
317*4882a593Smuzhiyun int i;
318*4882a593Smuzhiyun static const unsigned long hdmi_codec_eld_spk_alloc_bits[] = {
319*4882a593Smuzhiyun [0] = FL | FR, [1] = LFE, [2] = FC, [3] = RL | RR,
320*4882a593Smuzhiyun [4] = RC, [5] = FLC | FRC, [6] = RLC | RRC,
321*4882a593Smuzhiyun };
322*4882a593Smuzhiyun unsigned long spk_mask = 0;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(hdmi_codec_eld_spk_alloc_bits); i++) {
325*4882a593Smuzhiyun if (spk_alloc & (1 << i))
326*4882a593Smuzhiyun spk_mask |= hdmi_codec_eld_spk_alloc_bits[i];
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun return spk_mask;
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun
hdmi_codec_eld_chmap(struct hdmi_codec_priv * hcp)332*4882a593Smuzhiyun static void hdmi_codec_eld_chmap(struct hdmi_codec_priv *hcp)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun u8 spk_alloc;
335*4882a593Smuzhiyun unsigned long spk_mask;
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun spk_alloc = drm_eld_get_spk_alloc(hcp->eld);
338*4882a593Smuzhiyun spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc);
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun /* Detect if only stereo supported, else return 8 channels mappings */
341*4882a593Smuzhiyun if ((spk_mask & ~(FL | FR)) && hcp->chmap_info->max_channels > 2)
342*4882a593Smuzhiyun hcp->chmap_info->chmap = hdmi_codec_8ch_chmaps;
343*4882a593Smuzhiyun else
344*4882a593Smuzhiyun hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
hdmi_codec_get_ch_alloc_table_idx(struct hdmi_codec_priv * hcp,unsigned char channels)347*4882a593Smuzhiyun static int hdmi_codec_get_ch_alloc_table_idx(struct hdmi_codec_priv *hcp,
348*4882a593Smuzhiyun unsigned char channels)
349*4882a593Smuzhiyun {
350*4882a593Smuzhiyun int i;
351*4882a593Smuzhiyun u8 spk_alloc;
352*4882a593Smuzhiyun unsigned long spk_mask;
353*4882a593Smuzhiyun const struct hdmi_codec_cea_spk_alloc *cap = hdmi_codec_channel_alloc;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun if (hcp->eld_bypass)
356*4882a593Smuzhiyun return 0;
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun spk_alloc = drm_eld_get_spk_alloc(hcp->eld);
359*4882a593Smuzhiyun spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc);
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(hdmi_codec_channel_alloc); i++, cap++) {
362*4882a593Smuzhiyun /* If spk_alloc == 0, HDMI is unplugged return stereo config*/
363*4882a593Smuzhiyun if (!spk_alloc && cap->ca_id == 0)
364*4882a593Smuzhiyun return i;
365*4882a593Smuzhiyun if (cap->n_ch != channels)
366*4882a593Smuzhiyun continue;
367*4882a593Smuzhiyun if (!(cap->mask == (spk_mask & cap->mask)))
368*4882a593Smuzhiyun continue;
369*4882a593Smuzhiyun return i;
370*4882a593Smuzhiyun }
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun return -EINVAL;
373*4882a593Smuzhiyun }
hdmi_codec_chmap_ctl_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)374*4882a593Smuzhiyun static int hdmi_codec_chmap_ctl_get(struct snd_kcontrol *kcontrol,
375*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
376*4882a593Smuzhiyun {
377*4882a593Smuzhiyun unsigned const char *map;
378*4882a593Smuzhiyun unsigned int i;
379*4882a593Smuzhiyun struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
380*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = info->private_data;
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun map = info->chmap[hcp->chmap_idx].map;
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun for (i = 0; i < info->max_channels; i++) {
385*4882a593Smuzhiyun if (hcp->chmap_idx == HDMI_CODEC_CHMAP_IDX_UNKNOWN)
386*4882a593Smuzhiyun ucontrol->value.integer.value[i] = 0;
387*4882a593Smuzhiyun else
388*4882a593Smuzhiyun ucontrol->value.integer.value[i] = map[i];
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun return 0;
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun
hdmi_codec_iec958_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)394*4882a593Smuzhiyun static int hdmi_codec_iec958_info(struct snd_kcontrol *kcontrol,
395*4882a593Smuzhiyun struct snd_ctl_elem_info *uinfo)
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
398*4882a593Smuzhiyun uinfo->count = 1;
399*4882a593Smuzhiyun return 0;
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun
hdmi_codec_iec958_default_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)402*4882a593Smuzhiyun static int hdmi_codec_iec958_default_get(struct snd_kcontrol *kcontrol,
403*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
404*4882a593Smuzhiyun {
405*4882a593Smuzhiyun struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
406*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun memcpy(ucontrol->value.iec958.status, hcp->iec_status,
409*4882a593Smuzhiyun sizeof(hcp->iec_status));
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun return 0;
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun
hdmi_codec_iec958_default_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)414*4882a593Smuzhiyun static int hdmi_codec_iec958_default_put(struct snd_kcontrol *kcontrol,
415*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
418*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun memcpy(hcp->iec_status, ucontrol->value.iec958.status,
421*4882a593Smuzhiyun sizeof(hcp->iec_status));
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun return 0;
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun
hdmi_codec_iec958_mask_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)426*4882a593Smuzhiyun static int hdmi_codec_iec958_mask_get(struct snd_kcontrol *kcontrol,
427*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
428*4882a593Smuzhiyun {
429*4882a593Smuzhiyun memset(ucontrol->value.iec958.status, 0xff,
430*4882a593Smuzhiyun sizeof_field(struct hdmi_codec_priv, iec_status));
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun return 0;
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun
hdmi_codec_eld_bypass_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)435*4882a593Smuzhiyun static int hdmi_codec_eld_bypass_get(struct snd_kcontrol *kcontrol,
436*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
437*4882a593Smuzhiyun {
438*4882a593Smuzhiyun struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
439*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun ucontrol->value.integer.value[0] = hcp->eld_bypass;
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun return 0;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun
hdmi_codec_eld_bypass_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)446*4882a593Smuzhiyun static int hdmi_codec_eld_bypass_put(struct snd_kcontrol *kcontrol,
447*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
450*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun if (hcp->eld_bypass == ucontrol->value.integer.value[0])
453*4882a593Smuzhiyun return 0;
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun hcp->eld_bypass = ucontrol->value.integer.value[0];
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun return 1;
458*4882a593Smuzhiyun }
459*4882a593Smuzhiyun
hdmi_codec_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)460*4882a593Smuzhiyun static int hdmi_codec_startup(struct snd_pcm_substream *substream,
461*4882a593Smuzhiyun struct snd_soc_dai *dai)
462*4882a593Smuzhiyun {
463*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
464*4882a593Smuzhiyun bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
465*4882a593Smuzhiyun int ret = 0;
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun mutex_lock(&hcp->lock);
468*4882a593Smuzhiyun if (hcp->busy) {
469*4882a593Smuzhiyun dev_err(dai->dev, "Only one simultaneous stream supported!\n");
470*4882a593Smuzhiyun mutex_unlock(&hcp->lock);
471*4882a593Smuzhiyun return -EINVAL;
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun if (hcp->hcd.ops->audio_startup) {
475*4882a593Smuzhiyun ret = hcp->hcd.ops->audio_startup(dai->dev->parent, hcp->hcd.data);
476*4882a593Smuzhiyun if (ret)
477*4882a593Smuzhiyun goto err;
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun if (tx && !hcp->eld_bypass && hcp->hcd.ops->get_eld) {
481*4882a593Smuzhiyun ret = hcp->hcd.ops->get_eld(dai->dev->parent, hcp->hcd.data,
482*4882a593Smuzhiyun hcp->eld, sizeof(hcp->eld));
483*4882a593Smuzhiyun if (ret)
484*4882a593Smuzhiyun goto err;
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun ret = snd_pcm_hw_constraint_eld(substream->runtime, hcp->eld);
487*4882a593Smuzhiyun if (ret)
488*4882a593Smuzhiyun goto err;
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun /* Select chmap supported */
491*4882a593Smuzhiyun hdmi_codec_eld_chmap(hcp);
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun hcp->busy = true;
495*4882a593Smuzhiyun hcp->substream = substream;
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun err:
498*4882a593Smuzhiyun mutex_unlock(&hcp->lock);
499*4882a593Smuzhiyun return ret;
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun
hdmi_codec_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)502*4882a593Smuzhiyun static void hdmi_codec_shutdown(struct snd_pcm_substream *substream,
503*4882a593Smuzhiyun struct snd_soc_dai *dai)
504*4882a593Smuzhiyun {
505*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN;
508*4882a593Smuzhiyun hcp->hcd.ops->audio_shutdown(dai->dev->parent, hcp->hcd.data);
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun mutex_lock(&hcp->lock);
511*4882a593Smuzhiyun hcp->substream = NULL;
512*4882a593Smuzhiyun hcp->busy = false;
513*4882a593Smuzhiyun mutex_unlock(&hcp->lock);
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun
hdmi_codec_fill_codec_params(struct snd_soc_dai * dai,unsigned int sample_width,unsigned int sample_rate,unsigned int channels,struct hdmi_codec_params * hp)516*4882a593Smuzhiyun static int hdmi_codec_fill_codec_params(struct snd_soc_dai *dai,
517*4882a593Smuzhiyun unsigned int sample_width,
518*4882a593Smuzhiyun unsigned int sample_rate,
519*4882a593Smuzhiyun unsigned int channels,
520*4882a593Smuzhiyun struct hdmi_codec_params *hp)
521*4882a593Smuzhiyun {
522*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
523*4882a593Smuzhiyun int idx;
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun /* Select a channel allocation that matches with ELD and pcm channels */
526*4882a593Smuzhiyun idx = hdmi_codec_get_ch_alloc_table_idx(hcp, channels);
527*4882a593Smuzhiyun if (idx < 0) {
528*4882a593Smuzhiyun dev_err(dai->dev, "Not able to map channels to speakers (%d)\n",
529*4882a593Smuzhiyun idx);
530*4882a593Smuzhiyun hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN;
531*4882a593Smuzhiyun return idx;
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun memset(hp, 0, sizeof(*hp));
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun hdmi_audio_infoframe_init(&hp->cea);
537*4882a593Smuzhiyun hp->cea.channels = channels;
538*4882a593Smuzhiyun hp->cea.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM;
539*4882a593Smuzhiyun hp->cea.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM;
540*4882a593Smuzhiyun hp->cea.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM;
541*4882a593Smuzhiyun hp->cea.channel_allocation = hdmi_codec_channel_alloc[idx].ca_id;
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun hp->sample_width = sample_width;
544*4882a593Smuzhiyun hp->sample_rate = sample_rate;
545*4882a593Smuzhiyun hp->channels = channels;
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun hcp->chmap_idx = hdmi_codec_channel_alloc[idx].ca_id;
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun return 0;
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun
hdmi_codec_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)552*4882a593Smuzhiyun static int hdmi_codec_hw_params(struct snd_pcm_substream *substream,
553*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
554*4882a593Smuzhiyun struct snd_soc_dai *dai)
555*4882a593Smuzhiyun {
556*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
557*4882a593Smuzhiyun struct hdmi_codec_daifmt *cf = dai->playback_dma_data;
558*4882a593Smuzhiyun struct hdmi_codec_params hp = {
559*4882a593Smuzhiyun .iec = {
560*4882a593Smuzhiyun .status = { 0 },
561*4882a593Smuzhiyun .subcode = { 0 },
562*4882a593Smuzhiyun .pad = 0,
563*4882a593Smuzhiyun .dig_subframe = { 0 },
564*4882a593Smuzhiyun }
565*4882a593Smuzhiyun };
566*4882a593Smuzhiyun int ret;
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun if (!hcp->hcd.ops->hw_params)
569*4882a593Smuzhiyun return 0;
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun dev_dbg(dai->dev, "%s() width %d rate %d channels %d\n", __func__,
572*4882a593Smuzhiyun params_width(params), params_rate(params),
573*4882a593Smuzhiyun params_channels(params));
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun ret = hdmi_codec_fill_codec_params(dai,
576*4882a593Smuzhiyun params_width(params),
577*4882a593Smuzhiyun params_rate(params),
578*4882a593Smuzhiyun params_channels(params),
579*4882a593Smuzhiyun &hp);
580*4882a593Smuzhiyun if (ret < 0)
581*4882a593Smuzhiyun return ret;
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun memcpy(hp.iec.status, hcp->iec_status, sizeof(hp.iec.status));
584*4882a593Smuzhiyun ret = snd_pcm_fill_iec958_consumer_hw_params(params, hp.iec.status,
585*4882a593Smuzhiyun sizeof(hp.iec.status));
586*4882a593Smuzhiyun if (ret < 0) {
587*4882a593Smuzhiyun dev_err(dai->dev, "Creating IEC958 channel status failed %d\n",
588*4882a593Smuzhiyun ret);
589*4882a593Smuzhiyun return ret;
590*4882a593Smuzhiyun }
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun cf->bit_fmt = params_format(params);
593*4882a593Smuzhiyun return hcp->hcd.ops->hw_params(dai->dev->parent, hcp->hcd.data,
594*4882a593Smuzhiyun cf, &hp);
595*4882a593Smuzhiyun }
596*4882a593Smuzhiyun
hdmi_codec_prepare(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)597*4882a593Smuzhiyun static int hdmi_codec_prepare(struct snd_pcm_substream *substream,
598*4882a593Smuzhiyun struct snd_soc_dai *dai)
599*4882a593Smuzhiyun {
600*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
601*4882a593Smuzhiyun struct hdmi_codec_daifmt *cf = dai->playback_dma_data;
602*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
603*4882a593Smuzhiyun unsigned int channels = runtime->channels;
604*4882a593Smuzhiyun unsigned int width = snd_pcm_format_width(runtime->format);
605*4882a593Smuzhiyun unsigned int rate = runtime->rate;
606*4882a593Smuzhiyun struct hdmi_codec_params hp;
607*4882a593Smuzhiyun int ret;
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun if (!hcp->hcd.ops->prepare)
610*4882a593Smuzhiyun return 0;
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun dev_dbg(dai->dev, "%s() width %d rate %d channels %d\n", __func__,
613*4882a593Smuzhiyun width, rate, channels);
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun ret = hdmi_codec_fill_codec_params(dai, width, rate, channels, &hp);
616*4882a593Smuzhiyun if (ret < 0)
617*4882a593Smuzhiyun return ret;
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun memcpy(hp.iec.status, hcp->iec_status, sizeof(hp.iec.status));
620*4882a593Smuzhiyun ret = snd_pcm_fill_iec958_consumer(runtime, hp.iec.status,
621*4882a593Smuzhiyun sizeof(hp.iec.status));
622*4882a593Smuzhiyun if (ret < 0) {
623*4882a593Smuzhiyun dev_err(dai->dev, "Creating IEC958 channel status failed %d\n",
624*4882a593Smuzhiyun ret);
625*4882a593Smuzhiyun return ret;
626*4882a593Smuzhiyun }
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun cf->bit_fmt = runtime->format;
629*4882a593Smuzhiyun return hcp->hcd.ops->prepare(dai->dev->parent, hcp->hcd.data,
630*4882a593Smuzhiyun cf, &hp);
631*4882a593Smuzhiyun }
632*4882a593Smuzhiyun
hdmi_codec_i2s_set_fmt(struct snd_soc_dai * dai,unsigned int fmt)633*4882a593Smuzhiyun static int hdmi_codec_i2s_set_fmt(struct snd_soc_dai *dai,
634*4882a593Smuzhiyun unsigned int fmt)
635*4882a593Smuzhiyun {
636*4882a593Smuzhiyun struct hdmi_codec_daifmt *cf = dai->playback_dma_data;
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun /* Reset daifmt */
639*4882a593Smuzhiyun memset(cf, 0, sizeof(*cf));
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
642*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBM_CFM:
643*4882a593Smuzhiyun cf->bit_clk_master = 1;
644*4882a593Smuzhiyun cf->frame_clk_master = 1;
645*4882a593Smuzhiyun break;
646*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBS_CFM:
647*4882a593Smuzhiyun cf->frame_clk_master = 1;
648*4882a593Smuzhiyun break;
649*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBM_CFS:
650*4882a593Smuzhiyun cf->bit_clk_master = 1;
651*4882a593Smuzhiyun break;
652*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBS_CFS:
653*4882a593Smuzhiyun break;
654*4882a593Smuzhiyun default:
655*4882a593Smuzhiyun return -EINVAL;
656*4882a593Smuzhiyun }
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
659*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_NF:
660*4882a593Smuzhiyun break;
661*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_IF:
662*4882a593Smuzhiyun cf->frame_clk_inv = 1;
663*4882a593Smuzhiyun break;
664*4882a593Smuzhiyun case SND_SOC_DAIFMT_IB_NF:
665*4882a593Smuzhiyun cf->bit_clk_inv = 1;
666*4882a593Smuzhiyun break;
667*4882a593Smuzhiyun case SND_SOC_DAIFMT_IB_IF:
668*4882a593Smuzhiyun cf->frame_clk_inv = 1;
669*4882a593Smuzhiyun cf->bit_clk_inv = 1;
670*4882a593Smuzhiyun break;
671*4882a593Smuzhiyun }
672*4882a593Smuzhiyun
673*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
674*4882a593Smuzhiyun case SND_SOC_DAIFMT_I2S:
675*4882a593Smuzhiyun cf->fmt = HDMI_I2S;
676*4882a593Smuzhiyun break;
677*4882a593Smuzhiyun case SND_SOC_DAIFMT_DSP_A:
678*4882a593Smuzhiyun cf->fmt = HDMI_DSP_A;
679*4882a593Smuzhiyun break;
680*4882a593Smuzhiyun case SND_SOC_DAIFMT_DSP_B:
681*4882a593Smuzhiyun cf->fmt = HDMI_DSP_B;
682*4882a593Smuzhiyun break;
683*4882a593Smuzhiyun case SND_SOC_DAIFMT_RIGHT_J:
684*4882a593Smuzhiyun cf->fmt = HDMI_RIGHT_J;
685*4882a593Smuzhiyun break;
686*4882a593Smuzhiyun case SND_SOC_DAIFMT_LEFT_J:
687*4882a593Smuzhiyun cf->fmt = HDMI_LEFT_J;
688*4882a593Smuzhiyun break;
689*4882a593Smuzhiyun case SND_SOC_DAIFMT_AC97:
690*4882a593Smuzhiyun cf->fmt = HDMI_AC97;
691*4882a593Smuzhiyun break;
692*4882a593Smuzhiyun default:
693*4882a593Smuzhiyun dev_err(dai->dev, "Invalid DAI interface format\n");
694*4882a593Smuzhiyun return -EINVAL;
695*4882a593Smuzhiyun }
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun return 0;
698*4882a593Smuzhiyun }
699*4882a593Smuzhiyun
hdmi_codec_mute(struct snd_soc_dai * dai,int mute,int direction)700*4882a593Smuzhiyun static int hdmi_codec_mute(struct snd_soc_dai *dai, int mute, int direction)
701*4882a593Smuzhiyun {
702*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun /*
705*4882a593Smuzhiyun * ignore if direction was CAPTURE
706*4882a593Smuzhiyun * and it had .no_capture_mute flag
707*4882a593Smuzhiyun * see
708*4882a593Smuzhiyun * snd_soc_dai_digital_mute()
709*4882a593Smuzhiyun */
710*4882a593Smuzhiyun if (hcp->hcd.ops->mute_stream &&
711*4882a593Smuzhiyun (direction == SNDRV_PCM_STREAM_PLAYBACK ||
712*4882a593Smuzhiyun !hcp->hcd.ops->no_capture_mute))
713*4882a593Smuzhiyun return hcp->hcd.ops->mute_stream(dai->dev->parent,
714*4882a593Smuzhiyun hcp->hcd.data,
715*4882a593Smuzhiyun mute, direction);
716*4882a593Smuzhiyun
717*4882a593Smuzhiyun return -ENOTSUPP;
718*4882a593Smuzhiyun }
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun static const struct snd_soc_dai_ops hdmi_codec_i2s_dai_ops = {
721*4882a593Smuzhiyun .startup = hdmi_codec_startup,
722*4882a593Smuzhiyun .shutdown = hdmi_codec_shutdown,
723*4882a593Smuzhiyun .hw_params = hdmi_codec_hw_params,
724*4882a593Smuzhiyun .prepare = hdmi_codec_prepare,
725*4882a593Smuzhiyun .set_fmt = hdmi_codec_i2s_set_fmt,
726*4882a593Smuzhiyun .mute_stream = hdmi_codec_mute,
727*4882a593Smuzhiyun };
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun static const struct snd_soc_dai_ops hdmi_codec_spdif_dai_ops = {
730*4882a593Smuzhiyun .startup = hdmi_codec_startup,
731*4882a593Smuzhiyun .shutdown = hdmi_codec_shutdown,
732*4882a593Smuzhiyun .hw_params = hdmi_codec_hw_params,
733*4882a593Smuzhiyun .mute_stream = hdmi_codec_mute,
734*4882a593Smuzhiyun };
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun #define HDMI_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
737*4882a593Smuzhiyun SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\
738*4882a593Smuzhiyun SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
739*4882a593Smuzhiyun SNDRV_PCM_RATE_192000)
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun #define SPDIF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |\
742*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE |\
743*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |\
744*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun /*
747*4882a593Smuzhiyun * This list is only for formats allowed on the I2S bus. So there is
748*4882a593Smuzhiyun * some formats listed that are not supported by HDMI interface. For
749*4882a593Smuzhiyun * instance allowing the 32-bit formats enables 24-precision with CPU
750*4882a593Smuzhiyun * DAIs that do not support 24-bit formats. If the extra formats cause
751*4882a593Smuzhiyun * problems, we should add the video side driver an option to disable
752*4882a593Smuzhiyun * them.
753*4882a593Smuzhiyun */
754*4882a593Smuzhiyun #define I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |\
755*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE |\
756*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |\
757*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE |\
758*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE |\
759*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE)
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun static struct snd_kcontrol_new hdmi_codec_controls[] = {
762*4882a593Smuzhiyun {
763*4882a593Smuzhiyun .access = SNDRV_CTL_ELEM_ACCESS_READ,
764*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
765*4882a593Smuzhiyun .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),
766*4882a593Smuzhiyun .info = hdmi_codec_iec958_info,
767*4882a593Smuzhiyun .get = hdmi_codec_iec958_mask_get,
768*4882a593Smuzhiyun },
769*4882a593Smuzhiyun {
770*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
771*4882a593Smuzhiyun .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
772*4882a593Smuzhiyun .info = hdmi_codec_iec958_info,
773*4882a593Smuzhiyun .get = hdmi_codec_iec958_default_get,
774*4882a593Smuzhiyun .put = hdmi_codec_iec958_default_put,
775*4882a593Smuzhiyun },
776*4882a593Smuzhiyun {
777*4882a593Smuzhiyun .access = (SNDRV_CTL_ELEM_ACCESS_READ |
778*4882a593Smuzhiyun SNDRV_CTL_ELEM_ACCESS_VOLATILE),
779*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_PCM,
780*4882a593Smuzhiyun .name = "ELD",
781*4882a593Smuzhiyun .info = hdmi_eld_ctl_info,
782*4882a593Smuzhiyun .get = hdmi_eld_ctl_get,
783*4882a593Smuzhiyun },
784*4882a593Smuzhiyun SOC_SINGLE_BOOL_EXT("ELD Bypass Switch", 0,
785*4882a593Smuzhiyun hdmi_codec_eld_bypass_get, hdmi_codec_eld_bypass_put),
786*4882a593Smuzhiyun };
787*4882a593Smuzhiyun
hdmi_codec_pcm_new(struct snd_soc_pcm_runtime * rtd,struct snd_soc_dai * dai)788*4882a593Smuzhiyun static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd,
789*4882a593Smuzhiyun struct snd_soc_dai *dai)
790*4882a593Smuzhiyun {
791*4882a593Smuzhiyun struct snd_soc_dai_driver *drv = dai->driver;
792*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
793*4882a593Smuzhiyun unsigned int i;
794*4882a593Smuzhiyun int ret;
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun ret = snd_pcm_add_chmap_ctls(rtd->pcm, SNDRV_PCM_STREAM_PLAYBACK,
797*4882a593Smuzhiyun NULL, drv->playback.channels_max, 0,
798*4882a593Smuzhiyun &hcp->chmap_info);
799*4882a593Smuzhiyun if (ret < 0)
800*4882a593Smuzhiyun return ret;
801*4882a593Smuzhiyun
802*4882a593Smuzhiyun /* override handlers */
803*4882a593Smuzhiyun hcp->chmap_info->private_data = hcp;
804*4882a593Smuzhiyun hcp->chmap_info->kctl->get = hdmi_codec_chmap_ctl_get;
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun /* default chmap supported is stereo */
807*4882a593Smuzhiyun hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps;
808*4882a593Smuzhiyun hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN;
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(hdmi_codec_controls); i++) {
811*4882a593Smuzhiyun struct snd_kcontrol *kctl;
812*4882a593Smuzhiyun
813*4882a593Smuzhiyun /* add ELD ctl with the device number corresponding to the PCM stream */
814*4882a593Smuzhiyun kctl = snd_ctl_new1(&hdmi_codec_controls[i], dai->component);
815*4882a593Smuzhiyun if (!kctl)
816*4882a593Smuzhiyun return -ENOMEM;
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun kctl->id.device = rtd->pcm->device;
819*4882a593Smuzhiyun ret = snd_ctl_add(rtd->card->snd_card, kctl);
820*4882a593Smuzhiyun if (ret < 0)
821*4882a593Smuzhiyun return ret;
822*4882a593Smuzhiyun }
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun return 0;
825*4882a593Smuzhiyun }
826*4882a593Smuzhiyun
hdmi_dai_probe(struct snd_soc_dai * dai)827*4882a593Smuzhiyun static int hdmi_dai_probe(struct snd_soc_dai *dai)
828*4882a593Smuzhiyun {
829*4882a593Smuzhiyun struct snd_soc_dapm_context *dapm;
830*4882a593Smuzhiyun struct hdmi_codec_daifmt *daifmt;
831*4882a593Smuzhiyun struct snd_soc_dapm_route route[] = {
832*4882a593Smuzhiyun {
833*4882a593Smuzhiyun .sink = "TX",
834*4882a593Smuzhiyun .source = dai->driver->playback.stream_name,
835*4882a593Smuzhiyun },
836*4882a593Smuzhiyun {
837*4882a593Smuzhiyun .sink = dai->driver->capture.stream_name,
838*4882a593Smuzhiyun .source = "RX",
839*4882a593Smuzhiyun },
840*4882a593Smuzhiyun };
841*4882a593Smuzhiyun int ret;
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun dapm = snd_soc_component_get_dapm(dai->component);
844*4882a593Smuzhiyun ret = snd_soc_dapm_add_routes(dapm, route, 2);
845*4882a593Smuzhiyun if (ret)
846*4882a593Smuzhiyun return ret;
847*4882a593Smuzhiyun
848*4882a593Smuzhiyun daifmt = kzalloc(sizeof(*daifmt), GFP_KERNEL);
849*4882a593Smuzhiyun if (!daifmt)
850*4882a593Smuzhiyun return -ENOMEM;
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun dai->playback_dma_data = daifmt;
853*4882a593Smuzhiyun return 0;
854*4882a593Smuzhiyun }
855*4882a593Smuzhiyun
hdmi_codec_jack_report(struct hdmi_codec_priv * hcp,unsigned int jack_status)856*4882a593Smuzhiyun static void hdmi_codec_jack_report(struct hdmi_codec_priv *hcp,
857*4882a593Smuzhiyun unsigned int jack_status)
858*4882a593Smuzhiyun {
859*4882a593Smuzhiyun if (hcp->jack && jack_status != hcp->jack_status) {
860*4882a593Smuzhiyun snd_soc_jack_report(hcp->jack, jack_status, SND_JACK_LINEOUT);
861*4882a593Smuzhiyun hcp->jack_status = jack_status;
862*4882a593Smuzhiyun }
863*4882a593Smuzhiyun }
864*4882a593Smuzhiyun
plugged_cb(struct device * dev,bool plugged)865*4882a593Smuzhiyun static void plugged_cb(struct device *dev, bool plugged)
866*4882a593Smuzhiyun {
867*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = dev_get_drvdata(dev);
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun if (plugged) {
870*4882a593Smuzhiyun if (!hcp->eld_bypass && hcp->hcd.ops->get_eld) {
871*4882a593Smuzhiyun hcp->hcd.ops->get_eld(dev->parent, hcp->hcd.data,
872*4882a593Smuzhiyun hcp->eld, sizeof(hcp->eld));
873*4882a593Smuzhiyun }
874*4882a593Smuzhiyun hdmi_codec_jack_report(hcp, SND_JACK_LINEOUT);
875*4882a593Smuzhiyun } else {
876*4882a593Smuzhiyun hdmi_codec_jack_report(hcp, 0);
877*4882a593Smuzhiyun memset(hcp->eld, 0, sizeof(hcp->eld));
878*4882a593Smuzhiyun }
879*4882a593Smuzhiyun
880*4882a593Smuzhiyun mutex_lock(&hcp->lock);
881*4882a593Smuzhiyun if (hcp->substream) {
882*4882a593Smuzhiyun /*
883*4882a593Smuzhiyun * Workaround for HDMIIN and HDMIOUT plug-{in,out} when streaming.
884*4882a593Smuzhiyun *
885*4882a593Smuzhiyun * Actually, we should do stop stream both for HDMI_{OUT,IN} on
886*4882a593Smuzhiyun * plug-{out,in} event. but for better experience and depop stream,
887*4882a593Smuzhiyun * we optimize as follows:
888*4882a593Smuzhiyun *
889*4882a593Smuzhiyun * a) Do stop stream for HDMIIN on plug-out when streaming.
890*4882a593Smuzhiyun * because HDMIIN work as SLAVE mode, CLK lost after HDMI cable
891*4882a593Smuzhiyun * plugged out which will make stream stuck until ALSA timeout(10s).
892*4882a593Smuzhiyun * so, for better experience, we should stop stream at the moment.
893*4882a593Smuzhiyun *
894*4882a593Smuzhiyun * b) Do stop stream for HDMIOUT on plug-in when streaming.
895*4882a593Smuzhiyun * because HDMIOUT work as MASTER mode, there is no clk-issue like
896*4882a593Smuzhiyun * HDMIIN, but, on HDR situation, HDMI will be reconfigured which
897*4882a593Smuzhiyun * make HDMI audio configure lost, especially for NLPCM/HBR bitstream
898*4882a593Smuzhiyun * which require IEC937 packet alignment, so, for this situation,
899*4882a593Smuzhiyun * we stop stream to notify user to re-open and configure sound card
900*4882a593Smuzhiyun * and then go on streaming.
901*4882a593Smuzhiyun */
902*4882a593Smuzhiyun int stream = hcp->substream->stream;
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun if (stream == SNDRV_PCM_STREAM_PLAYBACK && plugged)
905*4882a593Smuzhiyun snd_pcm_stop(hcp->substream, SNDRV_PCM_STATE_SETUP);
906*4882a593Smuzhiyun else if (stream == SNDRV_PCM_STREAM_CAPTURE && !plugged)
907*4882a593Smuzhiyun snd_pcm_stop(hcp->substream, SNDRV_PCM_STATE_DISCONNECTED);
908*4882a593Smuzhiyun
909*4882a593Smuzhiyun dev_dbg(dev, "stream[%d]: %s\n", stream, plugged ? "plug in" : "plug out");
910*4882a593Smuzhiyun }
911*4882a593Smuzhiyun mutex_unlock(&hcp->lock);
912*4882a593Smuzhiyun }
913*4882a593Smuzhiyun
hdmi_codec_set_jack(struct snd_soc_component * component,struct snd_soc_jack * jack,void * data)914*4882a593Smuzhiyun static int hdmi_codec_set_jack(struct snd_soc_component *component,
915*4882a593Smuzhiyun struct snd_soc_jack *jack,
916*4882a593Smuzhiyun void *data)
917*4882a593Smuzhiyun {
918*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
919*4882a593Smuzhiyun int ret = -ENOTSUPP;
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun if (hcp->hcd.ops->hook_plugged_cb) {
922*4882a593Smuzhiyun hcp->jack = jack;
923*4882a593Smuzhiyun ret = hcp->hcd.ops->hook_plugged_cb(component->dev->parent,
924*4882a593Smuzhiyun hcp->hcd.data,
925*4882a593Smuzhiyun plugged_cb,
926*4882a593Smuzhiyun component->dev);
927*4882a593Smuzhiyun if (ret)
928*4882a593Smuzhiyun hcp->jack = NULL;
929*4882a593Smuzhiyun }
930*4882a593Smuzhiyun return ret;
931*4882a593Smuzhiyun }
932*4882a593Smuzhiyun
hdmi_dai_spdif_probe(struct snd_soc_dai * dai)933*4882a593Smuzhiyun static int hdmi_dai_spdif_probe(struct snd_soc_dai *dai)
934*4882a593Smuzhiyun {
935*4882a593Smuzhiyun struct hdmi_codec_daifmt *cf;
936*4882a593Smuzhiyun int ret;
937*4882a593Smuzhiyun
938*4882a593Smuzhiyun ret = hdmi_dai_probe(dai);
939*4882a593Smuzhiyun if (ret)
940*4882a593Smuzhiyun return ret;
941*4882a593Smuzhiyun
942*4882a593Smuzhiyun cf = dai->playback_dma_data;
943*4882a593Smuzhiyun cf->fmt = HDMI_SPDIF;
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun return 0;
946*4882a593Smuzhiyun }
947*4882a593Smuzhiyun
hdmi_codec_dai_remove(struct snd_soc_dai * dai)948*4882a593Smuzhiyun static int hdmi_codec_dai_remove(struct snd_soc_dai *dai)
949*4882a593Smuzhiyun {
950*4882a593Smuzhiyun kfree(dai->playback_dma_data);
951*4882a593Smuzhiyun return 0;
952*4882a593Smuzhiyun }
953*4882a593Smuzhiyun
954*4882a593Smuzhiyun static const struct snd_soc_dai_driver hdmi_i2s_dai = {
955*4882a593Smuzhiyun .name = "i2s-hifi",
956*4882a593Smuzhiyun .id = DAI_ID_I2S,
957*4882a593Smuzhiyun .probe = hdmi_dai_probe,
958*4882a593Smuzhiyun .remove = hdmi_codec_dai_remove,
959*4882a593Smuzhiyun .playback = {
960*4882a593Smuzhiyun .stream_name = "I2S Playback",
961*4882a593Smuzhiyun .channels_min = 2,
962*4882a593Smuzhiyun .channels_max = 8,
963*4882a593Smuzhiyun .rates = HDMI_RATES,
964*4882a593Smuzhiyun .formats = I2S_FORMATS,
965*4882a593Smuzhiyun .sig_bits = 24,
966*4882a593Smuzhiyun },
967*4882a593Smuzhiyun .capture = {
968*4882a593Smuzhiyun .stream_name = "Capture",
969*4882a593Smuzhiyun .channels_min = 2,
970*4882a593Smuzhiyun .channels_max = 8,
971*4882a593Smuzhiyun .rates = HDMI_RATES,
972*4882a593Smuzhiyun .formats = I2S_FORMATS,
973*4882a593Smuzhiyun .sig_bits = 24,
974*4882a593Smuzhiyun },
975*4882a593Smuzhiyun .ops = &hdmi_codec_i2s_dai_ops,
976*4882a593Smuzhiyun .pcm_new = hdmi_codec_pcm_new,
977*4882a593Smuzhiyun };
978*4882a593Smuzhiyun
979*4882a593Smuzhiyun static const struct snd_soc_dai_driver hdmi_spdif_dai = {
980*4882a593Smuzhiyun .name = "spdif-hifi",
981*4882a593Smuzhiyun .id = DAI_ID_SPDIF,
982*4882a593Smuzhiyun .probe = hdmi_dai_spdif_probe,
983*4882a593Smuzhiyun .remove = hdmi_codec_dai_remove,
984*4882a593Smuzhiyun .playback = {
985*4882a593Smuzhiyun .stream_name = "SPDIF Playback",
986*4882a593Smuzhiyun .channels_min = 2,
987*4882a593Smuzhiyun .channels_max = 2,
988*4882a593Smuzhiyun .rates = HDMI_RATES,
989*4882a593Smuzhiyun .formats = SPDIF_FORMATS,
990*4882a593Smuzhiyun },
991*4882a593Smuzhiyun .capture = {
992*4882a593Smuzhiyun .stream_name = "Capture",
993*4882a593Smuzhiyun .channels_min = 2,
994*4882a593Smuzhiyun .channels_max = 2,
995*4882a593Smuzhiyun .rates = HDMI_RATES,
996*4882a593Smuzhiyun .formats = SPDIF_FORMATS,
997*4882a593Smuzhiyun },
998*4882a593Smuzhiyun .ops = &hdmi_codec_spdif_dai_ops,
999*4882a593Smuzhiyun .pcm_new = hdmi_codec_pcm_new,
1000*4882a593Smuzhiyun };
1001*4882a593Smuzhiyun
hdmi_of_xlate_dai_id(struct snd_soc_component * component,struct device_node * endpoint)1002*4882a593Smuzhiyun static int hdmi_of_xlate_dai_id(struct snd_soc_component *component,
1003*4882a593Smuzhiyun struct device_node *endpoint)
1004*4882a593Smuzhiyun {
1005*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
1006*4882a593Smuzhiyun int ret = -ENOTSUPP; /* see snd_soc_get_dai_id() */
1007*4882a593Smuzhiyun
1008*4882a593Smuzhiyun if (hcp->hcd.ops->get_dai_id)
1009*4882a593Smuzhiyun ret = hcp->hcd.ops->get_dai_id(component, endpoint);
1010*4882a593Smuzhiyun
1011*4882a593Smuzhiyun return ret;
1012*4882a593Smuzhiyun }
1013*4882a593Smuzhiyun
hdmi_remove(struct snd_soc_component * component)1014*4882a593Smuzhiyun static void hdmi_remove(struct snd_soc_component *component)
1015*4882a593Smuzhiyun {
1016*4882a593Smuzhiyun struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
1017*4882a593Smuzhiyun
1018*4882a593Smuzhiyun if (hcp->hcd.ops->hook_plugged_cb)
1019*4882a593Smuzhiyun hcp->hcd.ops->hook_plugged_cb(component->dev->parent,
1020*4882a593Smuzhiyun hcp->hcd.data, NULL, NULL);
1021*4882a593Smuzhiyun }
1022*4882a593Smuzhiyun
1023*4882a593Smuzhiyun static const struct snd_soc_component_driver hdmi_driver = {
1024*4882a593Smuzhiyun .remove = hdmi_remove,
1025*4882a593Smuzhiyun .dapm_widgets = hdmi_widgets,
1026*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(hdmi_widgets),
1027*4882a593Smuzhiyun .of_xlate_dai_id = hdmi_of_xlate_dai_id,
1028*4882a593Smuzhiyun .idle_bias_on = 1,
1029*4882a593Smuzhiyun .use_pmdown_time = 1,
1030*4882a593Smuzhiyun .endianness = 1,
1031*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
1032*4882a593Smuzhiyun .set_jack = hdmi_codec_set_jack,
1033*4882a593Smuzhiyun };
1034*4882a593Smuzhiyun
hdmi_codec_probe(struct platform_device * pdev)1035*4882a593Smuzhiyun static int hdmi_codec_probe(struct platform_device *pdev)
1036*4882a593Smuzhiyun {
1037*4882a593Smuzhiyun struct hdmi_codec_pdata *hcd = pdev->dev.platform_data;
1038*4882a593Smuzhiyun struct snd_soc_dai_driver *daidrv;
1039*4882a593Smuzhiyun struct device *dev = &pdev->dev;
1040*4882a593Smuzhiyun struct hdmi_codec_priv *hcp;
1041*4882a593Smuzhiyun int dai_count, i = 0;
1042*4882a593Smuzhiyun int ret;
1043*4882a593Smuzhiyun
1044*4882a593Smuzhiyun if (!hcd) {
1045*4882a593Smuzhiyun dev_err(dev, "%s: No platform data\n", __func__);
1046*4882a593Smuzhiyun return -EINVAL;
1047*4882a593Smuzhiyun }
1048*4882a593Smuzhiyun
1049*4882a593Smuzhiyun dai_count = hcd->i2s + hcd->spdif;
1050*4882a593Smuzhiyun if (dai_count < 1 || !hcd->ops ||
1051*4882a593Smuzhiyun (!hcd->ops->hw_params && !hcd->ops->prepare) ||
1052*4882a593Smuzhiyun !hcd->ops->audio_shutdown) {
1053*4882a593Smuzhiyun dev_err(dev, "%s: Invalid parameters\n", __func__);
1054*4882a593Smuzhiyun return -EINVAL;
1055*4882a593Smuzhiyun }
1056*4882a593Smuzhiyun
1057*4882a593Smuzhiyun hcp = devm_kzalloc(dev, sizeof(*hcp), GFP_KERNEL);
1058*4882a593Smuzhiyun if (!hcp)
1059*4882a593Smuzhiyun return -ENOMEM;
1060*4882a593Smuzhiyun
1061*4882a593Smuzhiyun hcp->hcd = *hcd;
1062*4882a593Smuzhiyun mutex_init(&hcp->lock);
1063*4882a593Smuzhiyun
1064*4882a593Smuzhiyun ret = snd_pcm_create_iec958_consumer_default(hcp->iec_status,
1065*4882a593Smuzhiyun sizeof(hcp->iec_status));
1066*4882a593Smuzhiyun if (ret < 0)
1067*4882a593Smuzhiyun return ret;
1068*4882a593Smuzhiyun
1069*4882a593Smuzhiyun daidrv = devm_kcalloc(dev, dai_count, sizeof(*daidrv), GFP_KERNEL);
1070*4882a593Smuzhiyun if (!daidrv)
1071*4882a593Smuzhiyun return -ENOMEM;
1072*4882a593Smuzhiyun
1073*4882a593Smuzhiyun if (hcd->i2s) {
1074*4882a593Smuzhiyun daidrv[i] = hdmi_i2s_dai;
1075*4882a593Smuzhiyun daidrv[i].playback.channels_max = hcd->max_i2s_channels;
1076*4882a593Smuzhiyun i++;
1077*4882a593Smuzhiyun }
1078*4882a593Smuzhiyun
1079*4882a593Smuzhiyun if (hcd->spdif)
1080*4882a593Smuzhiyun daidrv[i] = hdmi_spdif_dai;
1081*4882a593Smuzhiyun
1082*4882a593Smuzhiyun dev_set_drvdata(dev, hcp);
1083*4882a593Smuzhiyun
1084*4882a593Smuzhiyun ret = devm_snd_soc_register_component(dev, &hdmi_driver, daidrv,
1085*4882a593Smuzhiyun dai_count);
1086*4882a593Smuzhiyun if (ret) {
1087*4882a593Smuzhiyun dev_err(dev, "%s: snd_soc_register_component() failed (%d)\n",
1088*4882a593Smuzhiyun __func__, ret);
1089*4882a593Smuzhiyun return ret;
1090*4882a593Smuzhiyun }
1091*4882a593Smuzhiyun return 0;
1092*4882a593Smuzhiyun }
1093*4882a593Smuzhiyun
1094*4882a593Smuzhiyun static struct platform_driver hdmi_codec_driver = {
1095*4882a593Smuzhiyun .driver = {
1096*4882a593Smuzhiyun .name = HDMI_CODEC_DRV_NAME,
1097*4882a593Smuzhiyun },
1098*4882a593Smuzhiyun .probe = hdmi_codec_probe,
1099*4882a593Smuzhiyun };
1100*4882a593Smuzhiyun
1101*4882a593Smuzhiyun module_platform_driver(hdmi_codec_driver);
1102*4882a593Smuzhiyun
1103*4882a593Smuzhiyun MODULE_AUTHOR("Jyri Sarha <jsarha@ti.com>");
1104*4882a593Smuzhiyun MODULE_DESCRIPTION("HDMI Audio Codec Driver");
1105*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1106*4882a593Smuzhiyun MODULE_ALIAS("platform:" HDMI_CODEC_DRV_NAME);
1107