1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright(c) 2015-18 Intel Corporation. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef __HDAC_HDA_H__ 7*4882a593Smuzhiyun #define __HDAC_HDA_H__ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun enum { 10*4882a593Smuzhiyun HDAC_ANALOG_DAI_ID = 0, 11*4882a593Smuzhiyun HDAC_DIGITAL_DAI_ID, 12*4882a593Smuzhiyun HDAC_ALT_ANALOG_DAI_ID, 13*4882a593Smuzhiyun HDAC_HDMI_0_DAI_ID, 14*4882a593Smuzhiyun HDAC_HDMI_1_DAI_ID, 15*4882a593Smuzhiyun HDAC_HDMI_2_DAI_ID, 16*4882a593Smuzhiyun HDAC_HDMI_3_DAI_ID, 17*4882a593Smuzhiyun HDAC_DAI_ID_NUM 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun struct hdac_hda_pcm { 21*4882a593Smuzhiyun int stream_tag[2]; 22*4882a593Smuzhiyun unsigned int format_val[2]; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun struct hdac_hda_priv { 26*4882a593Smuzhiyun struct hda_codec codec; 27*4882a593Smuzhiyun struct hdac_hda_pcm pcm[HDAC_DAI_ID_NUM]; 28*4882a593Smuzhiyun bool need_display_power; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun struct hdac_ext_bus_ops *snd_soc_hdac_hda_get_ops(void); 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #endif /* __HDAC_HDA_H__ */ 34