xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/es8328.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * es8328.h  --  ES8328 ALSA SoC Audio driver
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #ifndef _ES8328_H
7*4882a593Smuzhiyun #define _ES8328_H
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/regmap.h>
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun struct device;
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun extern const struct regmap_config es8328_regmap_config;
14*4882a593Smuzhiyun int es8328_probe(struct device *dev, struct regmap *regmap);
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define ES8328_DACLVOL 46
17*4882a593Smuzhiyun #define ES8328_DACRVOL 47
18*4882a593Smuzhiyun #define ES8328_DACCTL 28
19*4882a593Smuzhiyun #define ES8328_RATEMASK (0x1f << 0)
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define ES8328_CONTROL1		0x00
22*4882a593Smuzhiyun #define ES8328_CONTROL1_VMIDSEL_OFF (0 << 0)
23*4882a593Smuzhiyun #define ES8328_CONTROL1_VMIDSEL_50k (1 << 0)
24*4882a593Smuzhiyun #define ES8328_CONTROL1_VMIDSEL_500k (2 << 0)
25*4882a593Smuzhiyun #define ES8328_CONTROL1_VMIDSEL_5k (3 << 0)
26*4882a593Smuzhiyun #define ES8328_CONTROL1_VMIDSEL_MASK (3 << 0)
27*4882a593Smuzhiyun #define ES8328_CONTROL1_ENREF (1 << 2)
28*4882a593Smuzhiyun #define ES8328_CONTROL1_SEQEN (1 << 3)
29*4882a593Smuzhiyun #define ES8328_CONTROL1_SAMEFS (1 << 4)
30*4882a593Smuzhiyun #define ES8328_CONTROL1_DACMCLK_ADC (0 << 5)
31*4882a593Smuzhiyun #define ES8328_CONTROL1_DACMCLK_DAC (1 << 5)
32*4882a593Smuzhiyun #define ES8328_CONTROL1_LRCM (1 << 6)
33*4882a593Smuzhiyun #define ES8328_CONTROL1_SCP_RESET (1 << 7)
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #define ES8328_CONTROL2		0x01
36*4882a593Smuzhiyun #define ES8328_CONTROL2_VREF_BUF_OFF (1 << 0)
37*4882a593Smuzhiyun #define ES8328_CONTROL2_VREF_LOWPOWER (1 << 1)
38*4882a593Smuzhiyun #define ES8328_CONTROL2_IBIASGEN_OFF (1 << 2)
39*4882a593Smuzhiyun #define ES8328_CONTROL2_ANALOG_OFF (1 << 3)
40*4882a593Smuzhiyun #define ES8328_CONTROL2_VREF_BUF_LOWPOWER (1 << 4)
41*4882a593Smuzhiyun #define ES8328_CONTROL2_VCM_MOD_LOWPOWER (1 << 5)
42*4882a593Smuzhiyun #define ES8328_CONTROL2_OVERCURRENT_ON (1 << 6)
43*4882a593Smuzhiyun #define ES8328_CONTROL2_THERMAL_SHUTDOWN_ON (1 << 7)
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #define ES8328_CHIPPOWER	0x02
46*4882a593Smuzhiyun #define ES8328_CHIPPOWER_DACVREF_OFF 0
47*4882a593Smuzhiyun #define ES8328_CHIPPOWER_ADCVREF_OFF 1
48*4882a593Smuzhiyun #define ES8328_CHIPPOWER_DACDLL_OFF 2
49*4882a593Smuzhiyun #define ES8328_CHIPPOWER_ADCDLL_OFF 3
50*4882a593Smuzhiyun #define ES8328_CHIPPOWER_DACSTM_RESET 4
51*4882a593Smuzhiyun #define ES8328_CHIPPOWER_ADCSTM_RESET 5
52*4882a593Smuzhiyun #define ES8328_CHIPPOWER_DACDIG_OFF 6
53*4882a593Smuzhiyun #define ES8328_CHIPPOWER_ADCDIG_OFF 7
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun #define ES8328_ADCPOWER		0x03
56*4882a593Smuzhiyun #define ES8328_ADCPOWER_INT1_LOWPOWER 0
57*4882a593Smuzhiyun #define ES8328_ADCPOWER_FLASH_ADC_LOWPOWER 1
58*4882a593Smuzhiyun #define ES8328_ADCPOWER_ADC_BIAS_GEN_OFF 2
59*4882a593Smuzhiyun #define ES8328_ADCPOWER_MIC_BIAS_OFF 3
60*4882a593Smuzhiyun #define ES8328_ADCPOWER_ADCR_OFF 4
61*4882a593Smuzhiyun #define ES8328_ADCPOWER_ADCL_OFF 5
62*4882a593Smuzhiyun #define ES8328_ADCPOWER_AINR_OFF 6
63*4882a593Smuzhiyun #define ES8328_ADCPOWER_AINL_OFF 7
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun #define ES8328_DACPOWER		0x04
66*4882a593Smuzhiyun #define ES8328_DACPOWER_OUT3_ON 0
67*4882a593Smuzhiyun #define ES8328_DACPOWER_MONO_ON 1
68*4882a593Smuzhiyun #define ES8328_DACPOWER_ROUT2_ON 2
69*4882a593Smuzhiyun #define ES8328_DACPOWER_LOUT2_ON 3
70*4882a593Smuzhiyun #define ES8328_DACPOWER_ROUT1_ON 4
71*4882a593Smuzhiyun #define ES8328_DACPOWER_LOUT1_ON 5
72*4882a593Smuzhiyun #define ES8328_DACPOWER_RDAC_OFF 6
73*4882a593Smuzhiyun #define ES8328_DACPOWER_LDAC_OFF 7
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun #define ES8328_CHIPLOPOW1	0x05
76*4882a593Smuzhiyun #define ES8328_CHIPLOPOW2	0x06
77*4882a593Smuzhiyun #define ES8328_ANAVOLMANAG	0x07
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun #define ES8328_MASTERMODE	0x08
80*4882a593Smuzhiyun #define ES8328_MASTERMODE_BCLKDIV (0 << 0)
81*4882a593Smuzhiyun #define ES8328_MASTERMODE_BCLK_INV (1 << 5)
82*4882a593Smuzhiyun #define ES8328_MASTERMODE_MCLKDIV2 (1 << 6)
83*4882a593Smuzhiyun #define ES8328_MASTERMODE_MSC (1 << 7)
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun #define ES8328_ADCCONTROL1	0x09
86*4882a593Smuzhiyun #define ES8328_ADCCONTROL2	0x0a
87*4882a593Smuzhiyun #define ES8328_ADCCONTROL3	0x0b
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun #define ES8328_ADCCONTROL4	0x0c
90*4882a593Smuzhiyun #define ES8328_ADCCONTROL4_ADCFORMAT_MASK (3 << 0)
91*4882a593Smuzhiyun #define ES8328_ADCCONTROL4_ADCFORMAT_I2S (0 << 0)
92*4882a593Smuzhiyun #define ES8328_ADCCONTROL4_ADCFORMAT_LJUST (1 << 0)
93*4882a593Smuzhiyun #define ES8328_ADCCONTROL4_ADCFORMAT_RJUST (2 << 0)
94*4882a593Smuzhiyun #define ES8328_ADCCONTROL4_ADCFORMAT_PCM (3 << 0)
95*4882a593Smuzhiyun #define ES8328_ADCCONTROL4_ADCWL_SHIFT 2
96*4882a593Smuzhiyun #define ES8328_ADCCONTROL4_ADCWL_MASK (7 << 2)
97*4882a593Smuzhiyun #define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_NORMAL (0 << 5)
98*4882a593Smuzhiyun #define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_INV (1 << 5)
99*4882a593Smuzhiyun #define ES8328_ADCCONTROL4_ADCLRP_PCM_MSB_CLK2 (0 << 5)
100*4882a593Smuzhiyun #define ES8328_ADCCONTROL4_ADCLRP_PCM_MSB_CLK1 (1 << 5)
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun #define ES8328_ADCCONTROL5	0x0d
103*4882a593Smuzhiyun #define ES8328_ADCCONTROL5_RATEMASK (0x1f << 0)
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun #define ES8328_ADCCONTROL6	0x0e
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun #define ES8328_ADCCONTROL7	0x0f
108*4882a593Smuzhiyun #define ES8328_ADCCONTROL7_ADC_MUTE (1 << 2)
109*4882a593Smuzhiyun #define ES8328_ADCCONTROL7_ADC_LER (1 << 3)
110*4882a593Smuzhiyun #define ES8328_ADCCONTROL7_ADC_ZERO_CROSS (1 << 4)
111*4882a593Smuzhiyun #define ES8328_ADCCONTROL7_ADC_SOFT_RAMP (1 << 5)
112*4882a593Smuzhiyun #define ES8328_ADCCONTROL7_ADC_RAMP_RATE_4 (0 << 6)
113*4882a593Smuzhiyun #define ES8328_ADCCONTROL7_ADC_RAMP_RATE_8 (1 << 6)
114*4882a593Smuzhiyun #define ES8328_ADCCONTROL7_ADC_RAMP_RATE_16 (2 << 6)
115*4882a593Smuzhiyun #define ES8328_ADCCONTROL7_ADC_RAMP_RATE_32 (3 << 6)
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun #define ES8328_ADCCONTROL8	0x10
118*4882a593Smuzhiyun #define ES8328_ADCCONTROL9	0x11
119*4882a593Smuzhiyun #define ES8328_ADCCONTROL10	0x12
120*4882a593Smuzhiyun #define ES8328_ADCCONTROL11	0x13
121*4882a593Smuzhiyun #define ES8328_ADCCONTROL12	0x14
122*4882a593Smuzhiyun #define ES8328_ADCCONTROL13	0x15
123*4882a593Smuzhiyun #define ES8328_ADCCONTROL14	0x16
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun #define ES8328_DACCONTROL1	0x17
126*4882a593Smuzhiyun #define ES8328_DACCONTROL1_DACFORMAT_MASK (3 << 1)
127*4882a593Smuzhiyun #define ES8328_DACCONTROL1_DACFORMAT_I2S (0 << 1)
128*4882a593Smuzhiyun #define ES8328_DACCONTROL1_DACFORMAT_LJUST (1 << 1)
129*4882a593Smuzhiyun #define ES8328_DACCONTROL1_DACFORMAT_RJUST (2 << 1)
130*4882a593Smuzhiyun #define ES8328_DACCONTROL1_DACFORMAT_PCM (3 << 1)
131*4882a593Smuzhiyun #define ES8328_DACCONTROL1_DACWL_SHIFT 3
132*4882a593Smuzhiyun #define ES8328_DACCONTROL1_DACWL_MASK (7 << 3)
133*4882a593Smuzhiyun #define ES8328_DACCONTROL1_DACLRP_I2S_POL_NORMAL (0 << 6)
134*4882a593Smuzhiyun #define ES8328_DACCONTROL1_DACLRP_I2S_POL_INV (1 << 6)
135*4882a593Smuzhiyun #define ES8328_DACCONTROL1_DACLRP_PCM_MSB_CLK2 (0 << 6)
136*4882a593Smuzhiyun #define ES8328_DACCONTROL1_DACLRP_PCM_MSB_CLK1 (1 << 6)
137*4882a593Smuzhiyun #define ES8328_DACCONTROL1_LRSWAP (1 << 7)
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun #define ES8328_DACCONTROL2	0x18
140*4882a593Smuzhiyun #define ES8328_DACCONTROL2_RATEMASK (0x1f << 0)
141*4882a593Smuzhiyun #define ES8328_DACCONTROL2_DOUBLESPEED (1 << 5)
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun #define ES8328_DACCONTROL3	0x19
144*4882a593Smuzhiyun #define ES8328_DACCONTROL3_AUTOMUTE (1 << 2)
145*4882a593Smuzhiyun #define ES8328_DACCONTROL3_DACMUTE (1 << 2)
146*4882a593Smuzhiyun #define ES8328_DACCONTROL3_LEFTGAINVOL (1 << 3)
147*4882a593Smuzhiyun #define ES8328_DACCONTROL3_DACZEROCROSS (1 << 4)
148*4882a593Smuzhiyun #define ES8328_DACCONTROL3_DACSOFTRAMP (1 << 5)
149*4882a593Smuzhiyun #define ES8328_DACCONTROL3_DACRAMPRATE (3 << 6)
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun #define ES8328_LDACVOL 0x1a
152*4882a593Smuzhiyun #define ES8328_LDACVOL_MASK (0 << 0)
153*4882a593Smuzhiyun #define ES8328_LDACVOL_MAX (0xc0)
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun #define ES8328_RDACVOL 0x1b
156*4882a593Smuzhiyun #define ES8328_RDACVOL_MASK (0 << 0)
157*4882a593Smuzhiyun #define ES8328_RDACVOL_MAX (0xc0)
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun #define ES8328_DACVOL_MAX (0xc0)
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun #define ES8328_DACCONTROL4	0x1a
162*4882a593Smuzhiyun #define ES8328_DACCONTROL5	0x1b
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun #define ES8328_DACCONTROL6	0x1c
165*4882a593Smuzhiyun #define ES8328_DACCONTROL6_CLICKFREE (1 << 3)
166*4882a593Smuzhiyun #define ES8328_DACCONTROL6_DAC_INVR (1 << 4)
167*4882a593Smuzhiyun #define ES8328_DACCONTROL6_DAC_INVL (1 << 5)
168*4882a593Smuzhiyun #define ES8328_DACCONTROL6_DEEMPH_MASK (3 << 6)
169*4882a593Smuzhiyun #define ES8328_DACCONTROL6_DEEMPH_OFF (0 << 6)
170*4882a593Smuzhiyun #define ES8328_DACCONTROL6_DEEMPH_32k (1 << 6)
171*4882a593Smuzhiyun #define ES8328_DACCONTROL6_DEEMPH_44_1k (2 << 6)
172*4882a593Smuzhiyun #define ES8328_DACCONTROL6_DEEMPH_48k (3 << 6)
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun #define ES8328_DACCONTROL7	0x1d
175*4882a593Smuzhiyun #define ES8328_DACCONTROL7_VPP_SCALE_3p5	(0 << 0)
176*4882a593Smuzhiyun #define ES8328_DACCONTROL7_VPP_SCALE_4p0	(1 << 0)
177*4882a593Smuzhiyun #define ES8328_DACCONTROL7_VPP_SCALE_3p0	(2 << 0)
178*4882a593Smuzhiyun #define ES8328_DACCONTROL7_VPP_SCALE_2p5	(3 << 0)
179*4882a593Smuzhiyun #define ES8328_DACCONTROL7_SHELVING_STRENGTH (1 << 2) /* In eights */
180*4882a593Smuzhiyun #define ES8328_DACCONTROL7_MONO		(1 << 5)
181*4882a593Smuzhiyun #define ES8328_DACCONTROL7_ZEROR	(1 << 6)
182*4882a593Smuzhiyun #define ES8328_DACCONTROL7_ZEROL	(1 << 7)
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun /* Shelving filter */
185*4882a593Smuzhiyun #define ES8328_DACCONTROL8	0x1e
186*4882a593Smuzhiyun #define ES8328_DACCONTROL9	0x1f
187*4882a593Smuzhiyun #define ES8328_DACCONTROL10	0x20
188*4882a593Smuzhiyun #define ES8328_DACCONTROL11	0x21
189*4882a593Smuzhiyun #define ES8328_DACCONTROL12	0x22
190*4882a593Smuzhiyun #define ES8328_DACCONTROL13	0x23
191*4882a593Smuzhiyun #define ES8328_DACCONTROL14	0x24
192*4882a593Smuzhiyun #define ES8328_DACCONTROL15	0x25
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun #define ES8328_DACCONTROL16	0x26
195*4882a593Smuzhiyun #define ES8328_DACCONTROL16_RMIXSEL_RIN1 (0 << 0)
196*4882a593Smuzhiyun #define ES8328_DACCONTROL16_RMIXSEL_RIN2 (1 << 0)
197*4882a593Smuzhiyun #define ES8328_DACCONTROL16_RMIXSEL_RIN3 (2 << 0)
198*4882a593Smuzhiyun #define ES8328_DACCONTROL16_RMIXSEL_RADC (3 << 0)
199*4882a593Smuzhiyun #define ES8328_DACCONTROL16_LMIXSEL_LIN1 (0 << 3)
200*4882a593Smuzhiyun #define ES8328_DACCONTROL16_LMIXSEL_LIN2 (1 << 3)
201*4882a593Smuzhiyun #define ES8328_DACCONTROL16_LMIXSEL_LIN3 (2 << 3)
202*4882a593Smuzhiyun #define ES8328_DACCONTROL16_LMIXSEL_LADC (3 << 3)
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun #define ES8328_DACCONTROL17	0x27
205*4882a593Smuzhiyun #define ES8328_DACCONTROL17_LI2LOVOL (7 << 3)
206*4882a593Smuzhiyun #define ES8328_DACCONTROL17_LI2LO (1 << 6)
207*4882a593Smuzhiyun #define ES8328_DACCONTROL17_LD2LO (1 << 7)
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun #define ES8328_DACCONTROL18	0x28
210*4882a593Smuzhiyun #define ES8328_DACCONTROL18_RI2LOVOL (7 << 3)
211*4882a593Smuzhiyun #define ES8328_DACCONTROL18_RI2LO (1 << 6)
212*4882a593Smuzhiyun #define ES8328_DACCONTROL18_RD2LO (1 << 7)
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun #define ES8328_DACCONTROL19	0x29
215*4882a593Smuzhiyun #define ES8328_DACCONTROL19_LI2ROVOL (7 << 3)
216*4882a593Smuzhiyun #define ES8328_DACCONTROL19_LI2RO (1 << 6)
217*4882a593Smuzhiyun #define ES8328_DACCONTROL19_LD2RO (1 << 7)
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun #define ES8328_DACCONTROL20	0x2a
220*4882a593Smuzhiyun #define ES8328_DACCONTROL20_RI2ROVOL (7 << 3)
221*4882a593Smuzhiyun #define ES8328_DACCONTROL20_RI2RO (1 << 6)
222*4882a593Smuzhiyun #define ES8328_DACCONTROL20_RD2RO (1 << 7)
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun #define ES8328_DACCONTROL21	0x2b
225*4882a593Smuzhiyun #define ES8328_DACCONTROL21_LI2MOVOL (7 << 3)
226*4882a593Smuzhiyun #define ES8328_DACCONTROL21_LI2MO (1 << 6)
227*4882a593Smuzhiyun #define ES8328_DACCONTROL21_LD2MO (1 << 7)
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun #define ES8328_DACCONTROL22	0x2c
230*4882a593Smuzhiyun #define ES8328_DACCONTROL22_RI2MOVOL (7 << 3)
231*4882a593Smuzhiyun #define ES8328_DACCONTROL22_RI2MO (1 << 6)
232*4882a593Smuzhiyun #define ES8328_DACCONTROL22_RD2MO (1 << 7)
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun #define ES8328_DACCONTROL23	0x2d
235*4882a593Smuzhiyun #define ES8328_DACCONTROL23_MOUTINV		(1 << 1)
236*4882a593Smuzhiyun #define ES8328_DACCONTROL23_HPSWPOL		(1 << 2)
237*4882a593Smuzhiyun #define ES8328_DACCONTROL23_HPSWEN		(1 << 3)
238*4882a593Smuzhiyun #define ES8328_DACCONTROL23_VROI_1p5k		(0 << 4)
239*4882a593Smuzhiyun #define ES8328_DACCONTROL23_VROI_40k		(1 << 4)
240*4882a593Smuzhiyun #define ES8328_DACCONTROL23_OUT3_VREF		(0 << 5)
241*4882a593Smuzhiyun #define ES8328_DACCONTROL23_OUT3_ROUT1		(1 << 5)
242*4882a593Smuzhiyun #define ES8328_DACCONTROL23_OUT3_MONOOUT	(2 << 5)
243*4882a593Smuzhiyun #define ES8328_DACCONTROL23_OUT3_RIGHT_MIXER	(3 << 5)
244*4882a593Smuzhiyun #define ES8328_DACCONTROL23_ROUT2INV		(1 << 7)
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun /* LOUT1 Amplifier */
247*4882a593Smuzhiyun #define ES8328_LOUT1VOL 0x2e
248*4882a593Smuzhiyun #define ES8328_LOUT1VOL_MASK (0 << 5)
249*4882a593Smuzhiyun #define ES8328_LOUT1VOL_MAX (0x24)
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun /* ROUT1 Amplifier */
252*4882a593Smuzhiyun #define ES8328_ROUT1VOL 0x2f
253*4882a593Smuzhiyun #define ES8328_ROUT1VOL_MASK (0 << 5)
254*4882a593Smuzhiyun #define ES8328_ROUT1VOL_MAX (0x24)
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun #define ES8328_OUT1VOL_MAX (0x24)
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun /* LOUT2 Amplifier */
259*4882a593Smuzhiyun #define ES8328_LOUT2VOL 0x30
260*4882a593Smuzhiyun #define ES8328_LOUT2VOL_MASK (0 << 5)
261*4882a593Smuzhiyun #define ES8328_LOUT2VOL_MAX (0x24)
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun /* ROUT2 Amplifier */
264*4882a593Smuzhiyun #define ES8328_ROUT2VOL 0x31
265*4882a593Smuzhiyun #define ES8328_ROUT2VOL_MASK (0 << 5)
266*4882a593Smuzhiyun #define ES8328_ROUT2VOL_MAX (0x24)
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun #define ES8328_OUT2VOL_MAX (0x24)
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun /* Mono Out Amplifier */
271*4882a593Smuzhiyun #define ES8328_MONOOUTVOL 0x32
272*4882a593Smuzhiyun #define ES8328_MONOOUTVOL_MASK (0 << 5)
273*4882a593Smuzhiyun #define ES8328_MONOOUTVOL_MAX (0x24)
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun #define ES8328_DACCONTROL29	0x33
276*4882a593Smuzhiyun #define ES8328_DACCONTROL30	0x34
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun #define ES8328_SYSCLK		0
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun #define ES8328_REG_MAX		0x35
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun #define ES8328_1536FS		1536
283*4882a593Smuzhiyun #define ES8328_1024FS		1024
284*4882a593Smuzhiyun #define ES8328_768FS		768
285*4882a593Smuzhiyun #define ES8328_512FS		512
286*4882a593Smuzhiyun #define ES8328_384FS		384
287*4882a593Smuzhiyun #define ES8328_256FS		256
288*4882a593Smuzhiyun #define ES8328_128FS		128
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun #endif
291