xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/es8326.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * es8326.h -- es8326 ALSA SoC audio driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2021 Everest Semiconductor Co Ltd.
6*4882a593Smuzhiyun  * Copyright (c) 2021 Rockchip Electronics Co. Ltd.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Author: David <zhuning@everset-semi.com>
9*4882a593Smuzhiyun  * Author: Xing Zheng <zhengxing@rock-chips.com>
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify
12*4882a593Smuzhiyun  * it under the terms of the GNU General Public License version 2 as
13*4882a593Smuzhiyun  * published by the Free Software Foundation.
14*4882a593Smuzhiyun  */
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #ifndef _ES8326_H
17*4882a593Smuzhiyun #define _ES8326_H
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define CONFIG_HHTECH_MINIPMP		1
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /* ES8326 register space */
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define ES8326_RESET_00			0x00
24*4882a593Smuzhiyun #define ES8326_CLK_CTL_01		0x01
25*4882a593Smuzhiyun #define ES8326_CLK_INV_02		0x02
26*4882a593Smuzhiyun #define ES8326_CLK_RESAMPLE_03		0x03
27*4882a593Smuzhiyun #define ES8326_CLK_DIV1_04		0x04
28*4882a593Smuzhiyun #define ES8326_CLK_DIV2_05		0x05
29*4882a593Smuzhiyun #define ES8326_CLK_DLL_06		0x06
30*4882a593Smuzhiyun #define ES8326_CLK_MUX_07		0x07
31*4882a593Smuzhiyun #define ES8326_CLK_ADC_SEL_08		0x08
32*4882a593Smuzhiyun #define ES8326_CLK_DAC_SEL_09		0x09
33*4882a593Smuzhiyun #define ES8326_CLK_ADC_OSR_0A		0x0a
34*4882a593Smuzhiyun #define ES8326_CLK_DAC_OSR_0B		0x0b
35*4882a593Smuzhiyun #define ES8326_CLK_DIV_CPC_0C		0x0c
36*4882a593Smuzhiyun #define ES8326_CLK_DIV_BCLK_0D		0x0d
37*4882a593Smuzhiyun #define ES8326_CLK_TRI_0E		0x0e
38*4882a593Smuzhiyun #define ES8326_CLK_DIV_LRCK_0F		0x0f
39*4882a593Smuzhiyun #define ES8326_CLK_VMIDS1_10		0x10
40*4882a593Smuzhiyun #define ES8326_CLK_VMIDS2_11		0x11
41*4882a593Smuzhiyun #define ES8326_CLK_CAL_TIME_12		0x12
42*4882a593Smuzhiyun #define ES8326_FMT_13			0x13
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #define ES8326_DAC_MUTE_14		0x14
45*4882a593Smuzhiyun #define ES8326_ADC_MUTE_15		0x15
46*4882a593Smuzhiyun #define ES8326_ANA_PDN_16		0x16
47*4882a593Smuzhiyun #define ES8326_PGA_PDN_17		0x17
48*4882a593Smuzhiyun #define ES8326_VMIDSEL_18		0x18
49*4882a593Smuzhiyun #define ES8326_ANA_LOWPOWER_19		0x19
50*4882a593Smuzhiyun #define ES8326_ANA_DMS_1A		0x1a
51*4882a593Smuzhiyun #define ES8326_ANA_MICBIAS_1B		0x1b
52*4882a593Smuzhiyun #define ES8326_ANA_VSEL_1C		0x1c
53*4882a593Smuzhiyun #define ES8326_SYS_BIAS_1D		0x1d
54*4882a593Smuzhiyun #define ES8326_BIAS_SW1_1E		0x1e
55*4882a593Smuzhiyun #define ES8326_BIAS_SW2_1F		0x1f
56*4882a593Smuzhiyun #define ES8326_BIAS_SW3_20		0x20
57*4882a593Smuzhiyun #define ES8326_BIAS_SW4_21		0x21
58*4882a593Smuzhiyun #define ES8326_VMIDLOW_22		0x22
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun #define ES8326_PAGGAIN_23		0x23
61*4882a593Smuzhiyun #define ES8326_HP_DRVIER_24		0x24
62*4882a593Smuzhiyun #define ES8326_DAC2HPMIX_25		0x25
63*4882a593Smuzhiyun #define ES8326_HP_VOL_26		0x26
64*4882a593Smuzhiyun #define ES8326_HP_CAL_27		0x27
65*4882a593Smuzhiyun #define ES8326_HP_DRIVER_REF_28		0x28
66*4882a593Smuzhiyun #define ES8326_ADC_SCALE_29		0x29
67*4882a593Smuzhiyun #define ES8326_ADC1_SRC_2A		0x2a
68*4882a593Smuzhiyun #define ES8326_ADC2_SRC_2B		0x2b
69*4882a593Smuzhiyun #define ES8326_ADC1_VOL_2C		0x2c
70*4882a593Smuzhiyun #define ES8326_ADC2_VOL_2D		0x2d
71*4882a593Smuzhiyun #define ES8326_ADC_RAMPRATE_2E		0x2e
72*4882a593Smuzhiyun #define ES8326_2F			0x2f
73*4882a593Smuzhiyun #define ES8326_30			0x30
74*4882a593Smuzhiyun #define ES8326_31			0x31
75*4882a593Smuzhiyun #define ES8326_ALC_RECOVERY_32		0x32
76*4882a593Smuzhiyun #define ES8326_ALC_LEVEL_33		0x33
77*4882a593Smuzhiyun #define ES8326_ADC_HPFS1_34		0x34
78*4882a593Smuzhiyun #define ES8326_ADC_HPFS2_35		0x35
79*4882a593Smuzhiyun #define ES8326_ADC_EQ_36		0x36
80*4882a593Smuzhiyun #define ES8326_HP_CAL_4A		0x4A
81*4882a593Smuzhiyun #define ES8326_HPL_OFFSET_INI_4B	0x4B
82*4882a593Smuzhiyun #define ES8326_HPR_OFFSET_INI_4C	0x4C
83*4882a593Smuzhiyun #define ES8326_DAC_DSM_4D		0x4D
84*4882a593Smuzhiyun #define ES8326_DAC_RAMPRATE_4E		0x4E
85*4882a593Smuzhiyun #define ES8326_DAC_VPPSCALE_4F		0x4F
86*4882a593Smuzhiyun #define ES8326_DAC_VOL_50		0x50
87*4882a593Smuzhiyun #define ES8326_DRC_RECOVERY_53		0x53
88*4882a593Smuzhiyun #define ES8326_DRC_WINSIZE_54		0x54
89*4882a593Smuzhiyun #define ES8326_HPJACK_TIMER_56		0x56
90*4882a593Smuzhiyun #define ES8326_HPJACK_POL_57		0x57
91*4882a593Smuzhiyun #define ES8326_INT_SOURCE_58		0x58
92*4882a593Smuzhiyun #define ES8326_INTOUT_IO_59		0x59
93*4882a593Smuzhiyun #define ES8326_SDINOUT1_IO_5A		0x5A
94*4882a593Smuzhiyun #define ES8326_SDINOUT23_IO_5B		0x5B
95*4882a593Smuzhiyun #define ES8326_JACK_PULSE_5C		0x5C
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun #define ES8326_PULLUP_CTL_F9		0xF9
98*4882a593Smuzhiyun #define ES8326_HP_DECTECT_FB		0xFB
99*4882a593Smuzhiyun #define ES8326_CHIP_ID1_FD		0xFD
100*4882a593Smuzhiyun #define ES8326_CHIP_ID2_FE		0xFE
101*4882a593Smuzhiyun #define ES8326_CHIP_VERSION_FF		0xFF
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun #define ES8326_LADC_VOL			ES8326_ADCCONTROL8
104*4882a593Smuzhiyun #define ES8326_RADC_VOL			ES8326_ADCCONTROL9
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun #define ES8326_LDAC_VOL			ES8326_DACCONTROL4
107*4882a593Smuzhiyun #define ES8326_RDAC_VOL			ES8326_DACCONTROL5
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun #define ES8326_LOUT1_VOL		ES8326_DACCONTROL24
110*4882a593Smuzhiyun #define ES8326_ROUT1_VOL		ES8326_DACCONTROL25
111*4882a593Smuzhiyun #define ES8326_LOUT2_VOL		ES8326_DACCONTROL26
112*4882a593Smuzhiyun #define ES8326_ROUT2_VOL		ES8326_DACCONTROL27
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun #define ES8326_ADC_MUTE			ES8326_ADCCONTROL7
115*4882a593Smuzhiyun #define ES8326_DAC_MUTE			ES8326_DACCONTROL3
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun #define ES8326_IFACE			ES8326_MASTERMODE
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun #define ES8326_ADC_IFACE		ES8326_ADCCONTROL4
120*4882a593Smuzhiyun #define ES8326_ADC_SRATE		ES8326_ADCCONTROL5
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun #define ES8326_DAC_IFACE		ES8326_DACCONTROL1
123*4882a593Smuzhiyun #define ES8326_DAC_SRATE		ES8326_DACCONTROL2
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun #define ES8326_CACHEREGNUM		53
126*4882a593Smuzhiyun #define ES8326_SYSCLK			0
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun #define ES8326_PLL1			0
129*4882a593Smuzhiyun #define ES8326_PLL2			1
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun /* clock inputs */
132*4882a593Smuzhiyun #define ES8326_MCLK			0
133*4882a593Smuzhiyun #define ES8326_PCMCLK			1
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun /* clock divider id's */
136*4882a593Smuzhiyun #define ES8326_PCMDIV			0
137*4882a593Smuzhiyun #define ES8326_BCLKDIV			1
138*4882a593Smuzhiyun #define ES8326_VXCLKDIV			2
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun /* PCM clock dividers */
141*4882a593Smuzhiyun #define ES8326_PCM_DIV_1		(0 << 6)
142*4882a593Smuzhiyun #define ES8326_PCM_DIV_3		(2 << 6)
143*4882a593Smuzhiyun #define ES8326_PCM_DIV_5_5		(3 << 6)
144*4882a593Smuzhiyun #define ES8326_PCM_DIV_2		(4 << 6)
145*4882a593Smuzhiyun #define ES8326_PCM_DIV_4		(5 << 6)
146*4882a593Smuzhiyun #define ES8326_PCM_DIV_6		(6 << 6)
147*4882a593Smuzhiyun #define ES8326_PCM_DIV_8		(7 << 6)
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun /* BCLK clock dividers */
150*4882a593Smuzhiyun #define ES8326_BCLK_DIV_1		(0 << 7)
151*4882a593Smuzhiyun #define ES8326_BCLK_DIV_2		(1 << 7)
152*4882a593Smuzhiyun #define ES8326_BCLK_DIV_4		(2 << 7)
153*4882a593Smuzhiyun #define ES8326_BCLK_DIV_8		(3 << 7)
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun /* VXCLK clock dividers */
156*4882a593Smuzhiyun #define ES8326_VXCLK_DIV_1		(0 << 6)
157*4882a593Smuzhiyun #define ES8326_VXCLK_DIV_2		(1 << 6)
158*4882a593Smuzhiyun #define ES8326_VXCLK_DIV_4		(2 << 6)
159*4882a593Smuzhiyun #define ES8326_VXCLK_DIV_8		(3 << 6)
160*4882a593Smuzhiyun #define ES8326_VXCLK_DIV_16		(4 << 6)
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun #define ES8326_DAI_HIFI			0
163*4882a593Smuzhiyun #define ES8326_DAI_VOICE		1
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun #define ES8326_1536FS			1536
166*4882a593Smuzhiyun #define ES8326_1024FS			1024
167*4882a593Smuzhiyun #define ES8326_768FS			768
168*4882a593Smuzhiyun #define ES8326_512FS			512
169*4882a593Smuzhiyun #define ES8326_384FS			384
170*4882a593Smuzhiyun #define ES8326_256FS			256
171*4882a593Smuzhiyun #define ES8326_128FS			128
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun #endif /* _ES8326_H */
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