1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright Everest Semiconductor Co.,Ltd 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Author: David Yang <yangxiaohua@everest-semi.com> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _ES8316_H 9*4882a593Smuzhiyun #define _ES8316_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* 12*4882a593Smuzhiyun * ES8316 register space 13*4882a593Smuzhiyun */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* Reset Control */ 16*4882a593Smuzhiyun #define ES8316_RESET 0x00 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* Clock Management */ 19*4882a593Smuzhiyun #define ES8316_CLKMGR_CLKSW 0x01 20*4882a593Smuzhiyun #define ES8316_CLKMGR_CLKSEL 0x02 21*4882a593Smuzhiyun #define ES8316_CLKMGR_ADCOSR 0x03 22*4882a593Smuzhiyun #define ES8316_CLKMGR_ADCDIV1 0x04 23*4882a593Smuzhiyun #define ES8316_CLKMGR_ADCDIV2 0x05 24*4882a593Smuzhiyun #define ES8316_CLKMGR_DACDIV1 0x06 25*4882a593Smuzhiyun #define ES8316_CLKMGR_DACDIV2 0x07 26*4882a593Smuzhiyun #define ES8316_CLKMGR_CPDIV 0x08 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* Serial Data Port Control */ 29*4882a593Smuzhiyun #define ES8316_SERDATA1 0x09 30*4882a593Smuzhiyun #define ES8316_SERDATA_ADC 0x0a 31*4882a593Smuzhiyun #define ES8316_SERDATA_DAC 0x0b 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* System Control */ 34*4882a593Smuzhiyun #define ES8316_SYS_VMIDSEL 0x0c 35*4882a593Smuzhiyun #define ES8316_SYS_PDN 0x0d 36*4882a593Smuzhiyun #define ES8316_SYS_LP1 0x0e 37*4882a593Smuzhiyun #define ES8316_SYS_LP2 0x0f 38*4882a593Smuzhiyun #define ES8316_SYS_VMIDLOW 0x10 39*4882a593Smuzhiyun #define ES8316_SYS_VSEL 0x11 40*4882a593Smuzhiyun #define ES8316_SYS_REF 0x12 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* Headphone Mixer */ 43*4882a593Smuzhiyun #define ES8316_HPMIX_SEL 0x13 44*4882a593Smuzhiyun #define ES8316_HPMIX_SWITCH 0x14 45*4882a593Smuzhiyun #define ES8316_HPMIX_PDN 0x15 46*4882a593Smuzhiyun #define ES8316_HPMIX_VOL 0x16 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* Charge Pump Headphone driver */ 49*4882a593Smuzhiyun #define ES8316_CPHP_OUTEN 0x17 50*4882a593Smuzhiyun #define ES8316_CPHP_ICAL_VOL 0x18 51*4882a593Smuzhiyun #define ES8316_CPHP_PDN1 0x19 52*4882a593Smuzhiyun #define ES8316_CPHP_PDN2 0x1a 53*4882a593Smuzhiyun #define ES8316_CPHP_LDOCTL 0x1b 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun /* Calibration */ 56*4882a593Smuzhiyun #define ES8316_CAL_TYPE 0x1c 57*4882a593Smuzhiyun #define ES8316_CAL_SET 0x1d 58*4882a593Smuzhiyun #define ES8316_CAL_HPLIV 0x1e 59*4882a593Smuzhiyun #define ES8316_CAL_HPRIV 0x1f 60*4882a593Smuzhiyun #define ES8316_CAL_HPLMV 0x20 61*4882a593Smuzhiyun #define ES8316_CAL_HPRMV 0x21 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun /* ADC Control */ 64*4882a593Smuzhiyun #define ES8316_ADC_PDN_LINSEL 0x22 65*4882a593Smuzhiyun #define ES8316_ADC_PGAGAIN 0x23 66*4882a593Smuzhiyun #define ES8316_ADC_D2SEPGA 0x24 67*4882a593Smuzhiyun #define ES8316_ADC_DMIC 0x25 68*4882a593Smuzhiyun #define ES8316_ADC_MUTE 0x26 69*4882a593Smuzhiyun #define ES8316_ADC_VOLUME 0x27 70*4882a593Smuzhiyun #define ES8316_ADC_ALC1 0x29 71*4882a593Smuzhiyun #define ES8316_ADC_ALC2 0x2a 72*4882a593Smuzhiyun #define ES8316_ADC_ALC3 0x2b 73*4882a593Smuzhiyun #define ES8316_ADC_ALC4 0x2c 74*4882a593Smuzhiyun #define ES8316_ADC_ALC5 0x2d 75*4882a593Smuzhiyun #define ES8316_ADC_ALC_NG 0x2e 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /* DAC Control */ 78*4882a593Smuzhiyun #define ES8316_DAC_PDN 0x2f 79*4882a593Smuzhiyun #define ES8316_DAC_SET1 0x30 80*4882a593Smuzhiyun #define ES8316_DAC_SET2 0x31 81*4882a593Smuzhiyun #define ES8316_DAC_SET3 0x32 82*4882a593Smuzhiyun #define ES8316_DAC_VOLL 0x33 83*4882a593Smuzhiyun #define ES8316_DAC_VOLR 0x34 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /* GPIO */ 86*4882a593Smuzhiyun #define ES8316_GPIO_SEL 0x4d 87*4882a593Smuzhiyun #define ES8316_GPIO_DEBOUNCE 0x4e 88*4882a593Smuzhiyun #define ES8316_GPIO_FLAG 0x4f 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun /* Test mode */ 91*4882a593Smuzhiyun #define ES8316_TESTMODE 0x50 92*4882a593Smuzhiyun #define ES8316_TEST1 0x51 93*4882a593Smuzhiyun #define ES8316_TEST2 0x52 94*4882a593Smuzhiyun #define ES8316_TEST3 0x53 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun /* 97*4882a593Smuzhiyun * Field definitions 98*4882a593Smuzhiyun */ 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun /* ES8316_RESET */ 101*4882a593Smuzhiyun #define ES8316_RESET_CSM_ON 0x80 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun /* ES8316_CLKMGR_CLKSW */ 104*4882a593Smuzhiyun #define ES8316_CLKMGR_CLKSW_MCLK_ON 0x40 105*4882a593Smuzhiyun #define ES8316_CLKMGR_CLKSW_BCLK_ON 0x20 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun /* ES8316_SERDATA1 */ 108*4882a593Smuzhiyun #define ES8316_SERDATA1_MASTER 0x80 109*4882a593Smuzhiyun #define ES8316_SERDATA1_BCLK_INV 0x20 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun /* ES8316_SERDATA_ADC and _DAC */ 112*4882a593Smuzhiyun #define ES8316_SERDATA2_FMT_MASK 0x3 113*4882a593Smuzhiyun #define ES8316_SERDATA2_FMT_I2S 0x00 114*4882a593Smuzhiyun #define ES8316_SERDATA2_FMT_LEFTJ 0x01 115*4882a593Smuzhiyun #define ES8316_SERDATA2_FMT_RIGHTJ 0x02 116*4882a593Smuzhiyun #define ES8316_SERDATA2_FMT_PCM 0x03 117*4882a593Smuzhiyun #define ES8316_SERDATA2_ADCLRP 0x20 118*4882a593Smuzhiyun #define ES8316_SERDATA2_LEN_MASK 0x1c 119*4882a593Smuzhiyun #define ES8316_SERDATA2_LEN_24 0x00 120*4882a593Smuzhiyun #define ES8316_SERDATA2_LEN_20 0x04 121*4882a593Smuzhiyun #define ES8316_SERDATA2_LEN_18 0x08 122*4882a593Smuzhiyun #define ES8316_SERDATA2_LEN_16 0x0c 123*4882a593Smuzhiyun #define ES8316_SERDATA2_LEN_32 0x10 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun /* ES8316_GPIO_DEBOUNCE */ 126*4882a593Smuzhiyun #define ES8316_GPIO_ENABLE_INTERRUPT 0x02 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun /* ES8316_GPIO_FLAG */ 129*4882a593Smuzhiyun #define ES8316_GPIO_FLAG_GM_NOT_SHORTED 0x02 130*4882a593Smuzhiyun #define ES8316_GPIO_FLAG_HP_NOT_INSERTED 0x04 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun #endif 133