xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/es8316.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * es8316.c -- es8316 ALSA SoC audio driver
4*4882a593Smuzhiyun  * Copyright Everest Semiconductor Co.,Ltd
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Authors: David Yang <yangxiaohua@everest-semi.com>,
7*4882a593Smuzhiyun  *          Daniel Drake <drake@endlessm.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/acpi.h>
12*4882a593Smuzhiyun #include <linux/clk.h>
13*4882a593Smuzhiyun #include <linux/delay.h>
14*4882a593Smuzhiyun #include <linux/i2c.h>
15*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
16*4882a593Smuzhiyun #include <linux/mutex.h>
17*4882a593Smuzhiyun #include <linux/regmap.h>
18*4882a593Smuzhiyun #include <sound/pcm.h>
19*4882a593Smuzhiyun #include <sound/pcm_params.h>
20*4882a593Smuzhiyun #include <sound/soc.h>
21*4882a593Smuzhiyun #include <sound/soc-dapm.h>
22*4882a593Smuzhiyun #include <sound/tlv.h>
23*4882a593Smuzhiyun #include <sound/jack.h>
24*4882a593Smuzhiyun #include "es8316.h"
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun /* In slave mode at single speed, the codec is documented as accepting 5
27*4882a593Smuzhiyun  * MCLK/LRCK ratios, but we also add ratio 400, which is commonly used on
28*4882a593Smuzhiyun  * Intel Cherry Trail platforms (19.2MHz MCLK, 48kHz LRCK).
29*4882a593Smuzhiyun  */
30*4882a593Smuzhiyun #define NR_SUPPORTED_MCLK_LRCK_RATIOS 6
31*4882a593Smuzhiyun static const unsigned int supported_mclk_lrck_ratios[] = {
32*4882a593Smuzhiyun 	256, 384, 400, 512, 768, 1024
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun struct es8316_priv {
36*4882a593Smuzhiyun 	struct mutex lock;
37*4882a593Smuzhiyun 	struct clk *mclk;
38*4882a593Smuzhiyun 	struct regmap *regmap;
39*4882a593Smuzhiyun 	struct snd_soc_component *component;
40*4882a593Smuzhiyun 	struct snd_soc_jack *jack;
41*4882a593Smuzhiyun 	int irq;
42*4882a593Smuzhiyun 	unsigned int sysclk;
43*4882a593Smuzhiyun 	unsigned int allowed_rates[NR_SUPPORTED_MCLK_LRCK_RATIOS];
44*4882a593Smuzhiyun 	struct snd_pcm_hw_constraint_list sysclk_constraints;
45*4882a593Smuzhiyun 	bool jd_inverted;
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun /*
49*4882a593Smuzhiyun  * ES8316 controls
50*4882a593Smuzhiyun  */
51*4882a593Smuzhiyun static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9600, 50, 1);
52*4882a593Smuzhiyun static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9600, 50, 1);
53*4882a593Smuzhiyun static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(alc_max_gain_tlv, -650, 150, 0);
54*4882a593Smuzhiyun static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(alc_min_gain_tlv, -1200, 150, 0);
55*4882a593Smuzhiyun static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(alc_target_tlv, -1650, 150, 0);
56*4882a593Smuzhiyun static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(hpmixer_gain_tlv,
57*4882a593Smuzhiyun 	0, 4, TLV_DB_SCALE_ITEM(-1200, 150, 0),
58*4882a593Smuzhiyun 	8, 11, TLV_DB_SCALE_ITEM(-450, 150, 0),
59*4882a593Smuzhiyun );
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(adc_pga_gain_tlv,
62*4882a593Smuzhiyun 	0, 0, TLV_DB_SCALE_ITEM(-350, 0, 0),
63*4882a593Smuzhiyun 	1, 1, TLV_DB_SCALE_ITEM(0, 0, 0),
64*4882a593Smuzhiyun 	2, 2, TLV_DB_SCALE_ITEM(250, 0, 0),
65*4882a593Smuzhiyun 	3, 3, TLV_DB_SCALE_ITEM(450, 0, 0),
66*4882a593Smuzhiyun 	4, 7, TLV_DB_SCALE_ITEM(700, 300, 0),
67*4882a593Smuzhiyun 	8, 10, TLV_DB_SCALE_ITEM(1800, 300, 0),
68*4882a593Smuzhiyun );
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(hpout_vol_tlv,
71*4882a593Smuzhiyun 	0, 0, TLV_DB_SCALE_ITEM(-4800, 0, 0),
72*4882a593Smuzhiyun 	1, 3, TLV_DB_SCALE_ITEM(-2400, 1200, 0),
73*4882a593Smuzhiyun );
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun static const char * const ng_type_txt[] =
76*4882a593Smuzhiyun 	{ "Constant PGA Gain", "Mute ADC Output" };
77*4882a593Smuzhiyun static const struct soc_enum ng_type =
78*4882a593Smuzhiyun 	SOC_ENUM_SINGLE(ES8316_ADC_ALC_NG, 6, 2, ng_type_txt);
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun static const char * const adcpol_txt[] = { "Normal", "Invert" };
81*4882a593Smuzhiyun static const struct soc_enum adcpol =
82*4882a593Smuzhiyun 	SOC_ENUM_SINGLE(ES8316_ADC_MUTE, 1, 2, adcpol_txt);
83*4882a593Smuzhiyun static const char *const dacpol_txt[] =
84*4882a593Smuzhiyun 	{ "Normal", "R Invert", "L Invert", "L + R Invert" };
85*4882a593Smuzhiyun static const struct soc_enum dacpol =
86*4882a593Smuzhiyun 	SOC_ENUM_SINGLE(ES8316_DAC_SET1, 0, 4, dacpol_txt);
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun static const struct snd_kcontrol_new es8316_snd_controls[] = {
89*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("Headphone Playback Volume", ES8316_CPHP_ICAL_VOL,
90*4882a593Smuzhiyun 		       4, 0, 3, 1, hpout_vol_tlv),
91*4882a593Smuzhiyun 	SOC_DOUBLE_TLV("Headphone Mixer Volume", ES8316_HPMIX_VOL,
92*4882a593Smuzhiyun 		       4, 0, 11, 0, hpmixer_gain_tlv),
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	SOC_ENUM("Playback Polarity", dacpol),
95*4882a593Smuzhiyun 	SOC_DOUBLE_R_TLV("DAC Playback Volume", ES8316_DAC_VOLL,
96*4882a593Smuzhiyun 			 ES8316_DAC_VOLR, 0, 0xc0, 1, dac_vol_tlv),
97*4882a593Smuzhiyun 	SOC_SINGLE("DAC Soft Ramp Switch", ES8316_DAC_SET1, 4, 1, 1),
98*4882a593Smuzhiyun 	SOC_SINGLE("DAC Soft Ramp Rate", ES8316_DAC_SET1, 2, 4, 0),
99*4882a593Smuzhiyun 	SOC_SINGLE("DAC Notch Filter Switch", ES8316_DAC_SET2, 6, 1, 0),
100*4882a593Smuzhiyun 	SOC_SINGLE("DAC Double Fs Switch", ES8316_DAC_SET2, 7, 1, 0),
101*4882a593Smuzhiyun 	SOC_SINGLE("DAC Stereo Enhancement", ES8316_DAC_SET3, 0, 7, 0),
102*4882a593Smuzhiyun 	SOC_SINGLE("DAC Mono Mix Switch", ES8316_DAC_SET3, 3, 1, 0),
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	SOC_ENUM("Capture Polarity", adcpol),
105*4882a593Smuzhiyun 	SOC_SINGLE("Mic Boost Switch", ES8316_ADC_D2SEPGA, 0, 1, 0),
106*4882a593Smuzhiyun 	SOC_SINGLE_TLV("ADC Capture Volume", ES8316_ADC_VOLUME,
107*4882a593Smuzhiyun 		       0, 0xc0, 1, adc_vol_tlv),
108*4882a593Smuzhiyun 	SOC_SINGLE_TLV("ADC PGA Gain Volume", ES8316_ADC_PGAGAIN,
109*4882a593Smuzhiyun 		       4, 10, 0, adc_pga_gain_tlv),
110*4882a593Smuzhiyun 	SOC_SINGLE("ADC Soft Ramp Switch", ES8316_ADC_MUTE, 4, 1, 0),
111*4882a593Smuzhiyun 	SOC_SINGLE("ADC Double Fs Switch", ES8316_ADC_DMIC, 4, 1, 0),
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	SOC_SINGLE("ALC Capture Switch", ES8316_ADC_ALC1, 6, 1, 0),
114*4882a593Smuzhiyun 	SOC_SINGLE_TLV("ALC Capture Max Volume", ES8316_ADC_ALC1, 0, 28, 0,
115*4882a593Smuzhiyun 		       alc_max_gain_tlv),
116*4882a593Smuzhiyun 	SOC_SINGLE_TLV("ALC Capture Min Volume", ES8316_ADC_ALC2, 0, 28, 0,
117*4882a593Smuzhiyun 		       alc_min_gain_tlv),
118*4882a593Smuzhiyun 	SOC_SINGLE_TLV("ALC Capture Target Volume", ES8316_ADC_ALC3, 4, 10, 0,
119*4882a593Smuzhiyun 		       alc_target_tlv),
120*4882a593Smuzhiyun 	SOC_SINGLE("ALC Capture Hold Time", ES8316_ADC_ALC3, 0, 10, 0),
121*4882a593Smuzhiyun 	SOC_SINGLE("ALC Capture Decay Time", ES8316_ADC_ALC4, 4, 10, 0),
122*4882a593Smuzhiyun 	SOC_SINGLE("ALC Capture Attack Time", ES8316_ADC_ALC4, 0, 10, 0),
123*4882a593Smuzhiyun 	SOC_SINGLE("ALC Capture Noise Gate Switch", ES8316_ADC_ALC_NG,
124*4882a593Smuzhiyun 		   5, 1, 0),
125*4882a593Smuzhiyun 	SOC_SINGLE("ALC Capture Noise Gate Threshold", ES8316_ADC_ALC_NG,
126*4882a593Smuzhiyun 		   0, 31, 0),
127*4882a593Smuzhiyun 	SOC_ENUM("ALC Capture Noise Gate Type", ng_type),
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun /* Analog Input Mux */
131*4882a593Smuzhiyun static const char * const es8316_analog_in_txt[] = {
132*4882a593Smuzhiyun 		"lin1-rin1",
133*4882a593Smuzhiyun 		"lin2-rin2",
134*4882a593Smuzhiyun 		"lin1-rin1 with 20db Boost",
135*4882a593Smuzhiyun 		"lin2-rin2 with 20db Boost"
136*4882a593Smuzhiyun };
137*4882a593Smuzhiyun static const unsigned int es8316_analog_in_values[] = { 0, 1, 2, 3 };
138*4882a593Smuzhiyun static const struct soc_enum es8316_analog_input_enum =
139*4882a593Smuzhiyun 	SOC_VALUE_ENUM_SINGLE(ES8316_ADC_PDN_LINSEL, 4, 3,
140*4882a593Smuzhiyun 			      ARRAY_SIZE(es8316_analog_in_txt),
141*4882a593Smuzhiyun 			      es8316_analog_in_txt,
142*4882a593Smuzhiyun 			      es8316_analog_in_values);
143*4882a593Smuzhiyun static const struct snd_kcontrol_new es8316_analog_in_mux_controls =
144*4882a593Smuzhiyun 	SOC_DAPM_ENUM("Route", es8316_analog_input_enum);
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun static const char * const es8316_dmic_txt[] = {
147*4882a593Smuzhiyun 		"dmic disable",
148*4882a593Smuzhiyun 		"dmic data at high level",
149*4882a593Smuzhiyun 		"dmic data at low level",
150*4882a593Smuzhiyun };
151*4882a593Smuzhiyun static const unsigned int es8316_dmic_values[] = { 0, 1, 2 };
152*4882a593Smuzhiyun static const struct soc_enum es8316_dmic_src_enum =
153*4882a593Smuzhiyun 	SOC_VALUE_ENUM_SINGLE(ES8316_ADC_DMIC, 0, 3,
154*4882a593Smuzhiyun 			      ARRAY_SIZE(es8316_dmic_txt),
155*4882a593Smuzhiyun 			      es8316_dmic_txt,
156*4882a593Smuzhiyun 			      es8316_dmic_values);
157*4882a593Smuzhiyun static const struct snd_kcontrol_new es8316_dmic_src_controls =
158*4882a593Smuzhiyun 	SOC_DAPM_ENUM("Route", es8316_dmic_src_enum);
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun /* hp mixer mux */
161*4882a593Smuzhiyun static const char * const es8316_hpmux_texts[] = {
162*4882a593Smuzhiyun 	"lin1-rin1",
163*4882a593Smuzhiyun 	"lin2-rin2",
164*4882a593Smuzhiyun 	"lin-rin with Boost",
165*4882a593Smuzhiyun 	"lin-rin with Boost and PGA"
166*4882a593Smuzhiyun };
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(es8316_left_hpmux_enum, ES8316_HPMIX_SEL,
169*4882a593Smuzhiyun 	4, es8316_hpmux_texts);
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun static const struct snd_kcontrol_new es8316_left_hpmux_controls =
172*4882a593Smuzhiyun 	SOC_DAPM_ENUM("Route", es8316_left_hpmux_enum);
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(es8316_right_hpmux_enum, ES8316_HPMIX_SEL,
175*4882a593Smuzhiyun 	0, es8316_hpmux_texts);
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun static const struct snd_kcontrol_new es8316_right_hpmux_controls =
178*4882a593Smuzhiyun 	SOC_DAPM_ENUM("Route", es8316_right_hpmux_enum);
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun /* headphone Output Mixer */
181*4882a593Smuzhiyun static const struct snd_kcontrol_new es8316_out_left_mix[] = {
182*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("LLIN Switch", ES8316_HPMIX_SWITCH, 6, 1, 0),
183*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Left DAC Switch", ES8316_HPMIX_SWITCH, 7, 1, 0),
184*4882a593Smuzhiyun };
185*4882a593Smuzhiyun static const struct snd_kcontrol_new es8316_out_right_mix[] = {
186*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("RLIN Switch", ES8316_HPMIX_SWITCH, 2, 1, 0),
187*4882a593Smuzhiyun 	SOC_DAPM_SINGLE("Right DAC Switch", ES8316_HPMIX_SWITCH, 3, 1, 0),
188*4882a593Smuzhiyun };
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun /* DAC data source mux */
191*4882a593Smuzhiyun static const char * const es8316_dacsrc_texts[] = {
192*4882a593Smuzhiyun 	"LDATA TO LDAC, RDATA TO RDAC",
193*4882a593Smuzhiyun 	"LDATA TO LDAC, LDATA TO RDAC",
194*4882a593Smuzhiyun 	"RDATA TO LDAC, RDATA TO RDAC",
195*4882a593Smuzhiyun 	"RDATA TO LDAC, LDATA TO RDAC",
196*4882a593Smuzhiyun };
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(es8316_dacsrc_mux_enum, ES8316_DAC_SET1,
199*4882a593Smuzhiyun 	6, es8316_dacsrc_texts);
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun static const struct snd_kcontrol_new es8316_dacsrc_mux_controls =
202*4882a593Smuzhiyun 	SOC_DAPM_ENUM("Route", es8316_dacsrc_mux_enum);
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun static const struct snd_soc_dapm_widget es8316_dapm_widgets[] = {
205*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("Bias", ES8316_SYS_PDN, 3, 1, NULL, 0),
206*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("Analog power", ES8316_SYS_PDN, 4, 1, NULL, 0),
207*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("Mic Bias", ES8316_SYS_PDN, 5, 1, NULL, 0),
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("DMIC"),
210*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("MIC1"),
211*4882a593Smuzhiyun 	SND_SOC_DAPM_INPUT("MIC2"),
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	/* Input Mux */
214*4882a593Smuzhiyun 	SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
215*4882a593Smuzhiyun 			 &es8316_analog_in_mux_controls),
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("ADC Vref", ES8316_SYS_PDN, 1, 1, NULL, 0),
218*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("ADC bias", ES8316_SYS_PDN, 2, 1, NULL, 0),
219*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("ADC Clock", ES8316_CLKMGR_CLKSW, 3, 0, NULL, 0),
220*4882a593Smuzhiyun 	SND_SOC_DAPM_PGA("Line input PGA", ES8316_ADC_PDN_LINSEL,
221*4882a593Smuzhiyun 			 7, 1, NULL, 0),
222*4882a593Smuzhiyun 	SND_SOC_DAPM_ADC("Mono ADC", NULL, ES8316_ADC_PDN_LINSEL, 6, 1),
223*4882a593Smuzhiyun 	SND_SOC_DAPM_MUX("Digital Mic Mux", SND_SOC_NOPM, 0, 0,
224*4882a593Smuzhiyun 			 &es8316_dmic_src_controls),
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	/* Digital Interface */
227*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture",  1,
228*4882a593Smuzhiyun 			     ES8316_SERDATA_ADC, 6, 1),
229*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0,
230*4882a593Smuzhiyun 			    SND_SOC_NOPM, 0, 0),
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	SND_SOC_DAPM_MUX("DAC Source Mux", SND_SOC_NOPM, 0, 0,
233*4882a593Smuzhiyun 			 &es8316_dacsrc_mux_controls),
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("DAC Vref", ES8316_SYS_PDN, 0, 1, NULL, 0),
236*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("DAC Clock", ES8316_CLKMGR_CLKSW, 2, 0, NULL, 0),
237*4882a593Smuzhiyun 	SND_SOC_DAPM_DAC("Right DAC", NULL, ES8316_DAC_PDN, 0, 1),
238*4882a593Smuzhiyun 	SND_SOC_DAPM_DAC("Left DAC", NULL, ES8316_DAC_PDN, 4, 1),
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	/* Headphone Output Side */
241*4882a593Smuzhiyun 	SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0,
242*4882a593Smuzhiyun 			 &es8316_left_hpmux_controls),
243*4882a593Smuzhiyun 	SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0,
244*4882a593Smuzhiyun 			 &es8316_right_hpmux_controls),
245*4882a593Smuzhiyun 	SND_SOC_DAPM_MIXER("Left Headphone Mixer", ES8316_HPMIX_PDN,
246*4882a593Smuzhiyun 			   5, 1, &es8316_out_left_mix[0],
247*4882a593Smuzhiyun 			   ARRAY_SIZE(es8316_out_left_mix)),
248*4882a593Smuzhiyun 	SND_SOC_DAPM_MIXER("Right Headphone Mixer", ES8316_HPMIX_PDN,
249*4882a593Smuzhiyun 			   1, 1, &es8316_out_right_mix[0],
250*4882a593Smuzhiyun 			   ARRAY_SIZE(es8316_out_right_mix)),
251*4882a593Smuzhiyun 	SND_SOC_DAPM_PGA("Left Headphone Mixer Out", ES8316_HPMIX_PDN,
252*4882a593Smuzhiyun 			 4, 1, NULL, 0),
253*4882a593Smuzhiyun 	SND_SOC_DAPM_PGA("Right Headphone Mixer Out", ES8316_HPMIX_PDN,
254*4882a593Smuzhiyun 			 0, 1, NULL, 0),
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	SND_SOC_DAPM_OUT_DRV("Left Headphone Charge Pump", ES8316_CPHP_OUTEN,
257*4882a593Smuzhiyun 			     6, 0, NULL, 0),
258*4882a593Smuzhiyun 	SND_SOC_DAPM_OUT_DRV("Right Headphone Charge Pump", ES8316_CPHP_OUTEN,
259*4882a593Smuzhiyun 			     2, 0, NULL, 0),
260*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("Headphone Charge Pump", ES8316_CPHP_PDN2,
261*4882a593Smuzhiyun 			    5, 1, NULL, 0),
262*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("Headphone Charge Pump Clock", ES8316_CLKMGR_CLKSW,
263*4882a593Smuzhiyun 			    4, 0, NULL, 0),
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	SND_SOC_DAPM_OUT_DRV("Left Headphone Driver", ES8316_CPHP_OUTEN,
266*4882a593Smuzhiyun 			     5, 0, NULL, 0),
267*4882a593Smuzhiyun 	SND_SOC_DAPM_OUT_DRV("Right Headphone Driver", ES8316_CPHP_OUTEN,
268*4882a593Smuzhiyun 			     1, 0, NULL, 0),
269*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("Headphone Out", ES8316_CPHP_PDN1, 2, 1, NULL, 0),
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	/* pdn_Lical and pdn_Rical bits are documented as Reserved, but must
272*4882a593Smuzhiyun 	 * be explicitly unset in order to enable HP output
273*4882a593Smuzhiyun 	 */
274*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("Left Headphone ical", ES8316_CPHP_ICAL_VOL,
275*4882a593Smuzhiyun 			    7, 1, NULL, 0),
276*4882a593Smuzhiyun 	SND_SOC_DAPM_SUPPLY("Right Headphone ical", ES8316_CPHP_ICAL_VOL,
277*4882a593Smuzhiyun 			    3, 1, NULL, 0),
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("HPOL"),
280*4882a593Smuzhiyun 	SND_SOC_DAPM_OUTPUT("HPOR"),
281*4882a593Smuzhiyun };
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun static const struct snd_soc_dapm_route es8316_dapm_routes[] = {
284*4882a593Smuzhiyun 	/* Recording */
285*4882a593Smuzhiyun 	{"MIC1", NULL, "Mic Bias"},
286*4882a593Smuzhiyun 	{"MIC2", NULL, "Mic Bias"},
287*4882a593Smuzhiyun 	{"MIC1", NULL, "Bias"},
288*4882a593Smuzhiyun 	{"MIC2", NULL, "Bias"},
289*4882a593Smuzhiyun 	{"MIC1", NULL, "Analog power"},
290*4882a593Smuzhiyun 	{"MIC2", NULL, "Analog power"},
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	{"Differential Mux", "lin1-rin1", "MIC1"},
293*4882a593Smuzhiyun 	{"Differential Mux", "lin2-rin2", "MIC2"},
294*4882a593Smuzhiyun 	{"Line input PGA", NULL, "Differential Mux"},
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	{"Mono ADC", NULL, "ADC Clock"},
297*4882a593Smuzhiyun 	{"Mono ADC", NULL, "ADC Vref"},
298*4882a593Smuzhiyun 	{"Mono ADC", NULL, "ADC bias"},
299*4882a593Smuzhiyun 	{"Mono ADC", NULL, "Line input PGA"},
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	/* It's not clear why, but to avoid recording only silence,
302*4882a593Smuzhiyun 	 * the DAC clock must be running for the ADC to work.
303*4882a593Smuzhiyun 	 */
304*4882a593Smuzhiyun 	{"Mono ADC", NULL, "DAC Clock"},
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	{"Digital Mic Mux", "dmic disable", "Mono ADC"},
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	{"I2S OUT", NULL, "Digital Mic Mux"},
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	/* Playback */
311*4882a593Smuzhiyun 	{"DAC Source Mux", "LDATA TO LDAC, RDATA TO RDAC", "I2S IN"},
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	{"Left DAC", NULL, "DAC Clock"},
314*4882a593Smuzhiyun 	{"Right DAC", NULL, "DAC Clock"},
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	{"Left DAC", NULL, "DAC Vref"},
317*4882a593Smuzhiyun 	{"Right DAC", NULL, "DAC Vref"},
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	{"Left DAC", NULL, "DAC Source Mux"},
320*4882a593Smuzhiyun 	{"Right DAC", NULL, "DAC Source Mux"},
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	{"Left Headphone Mux", "lin-rin with Boost and PGA", "Line input PGA"},
323*4882a593Smuzhiyun 	{"Right Headphone Mux", "lin-rin with Boost and PGA", "Line input PGA"},
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	{"Left Headphone Mixer", "LLIN Switch", "Left Headphone Mux"},
326*4882a593Smuzhiyun 	{"Left Headphone Mixer", "Left DAC Switch", "Left DAC"},
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	{"Right Headphone Mixer", "RLIN Switch", "Right Headphone Mux"},
329*4882a593Smuzhiyun 	{"Right Headphone Mixer", "Right DAC Switch", "Right DAC"},
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	{"Left Headphone Mixer Out", NULL, "Left Headphone Mixer"},
332*4882a593Smuzhiyun 	{"Right Headphone Mixer Out", NULL, "Right Headphone Mixer"},
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	{"Left Headphone Charge Pump", NULL, "Left Headphone Mixer Out"},
335*4882a593Smuzhiyun 	{"Right Headphone Charge Pump", NULL, "Right Headphone Mixer Out"},
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	{"Left Headphone Charge Pump", NULL, "Headphone Charge Pump"},
338*4882a593Smuzhiyun 	{"Right Headphone Charge Pump", NULL, "Headphone Charge Pump"},
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	{"Left Headphone Charge Pump", NULL, "Headphone Charge Pump Clock"},
341*4882a593Smuzhiyun 	{"Right Headphone Charge Pump", NULL, "Headphone Charge Pump Clock"},
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	{"Left Headphone Driver", NULL, "Left Headphone Charge Pump"},
344*4882a593Smuzhiyun 	{"Right Headphone Driver", NULL, "Right Headphone Charge Pump"},
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	{"HPOL", NULL, "Left Headphone Driver"},
347*4882a593Smuzhiyun 	{"HPOR", NULL, "Right Headphone Driver"},
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	{"HPOL", NULL, "Left Headphone ical"},
350*4882a593Smuzhiyun 	{"HPOR", NULL, "Right Headphone ical"},
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	{"Headphone Out", NULL, "Bias"},
353*4882a593Smuzhiyun 	{"Headphone Out", NULL, "Analog power"},
354*4882a593Smuzhiyun 	{"HPOL", NULL, "Headphone Out"},
355*4882a593Smuzhiyun 	{"HPOR", NULL, "Headphone Out"},
356*4882a593Smuzhiyun };
357*4882a593Smuzhiyun 
es8316_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)358*4882a593Smuzhiyun static int es8316_set_dai_sysclk(struct snd_soc_dai *codec_dai,
359*4882a593Smuzhiyun 				 int clk_id, unsigned int freq, int dir)
360*4882a593Smuzhiyun {
361*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
362*4882a593Smuzhiyun 	struct es8316_priv *es8316 = snd_soc_component_get_drvdata(component);
363*4882a593Smuzhiyun 	int i, ret;
364*4882a593Smuzhiyun 	int count = 0;
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	es8316->sysclk = freq;
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	if (freq == 0) {
369*4882a593Smuzhiyun 		es8316->sysclk_constraints.list = NULL;
370*4882a593Smuzhiyun 		es8316->sysclk_constraints.count = 0;
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 		return 0;
373*4882a593Smuzhiyun 	}
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	ret = clk_set_rate(es8316->mclk, freq);
376*4882a593Smuzhiyun 	if (ret)
377*4882a593Smuzhiyun 		return ret;
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun 	/* Limit supported sample rates to ones that can be autodetected
380*4882a593Smuzhiyun 	 * by the codec running in slave mode.
381*4882a593Smuzhiyun 	 */
382*4882a593Smuzhiyun 	for (i = 0; i < NR_SUPPORTED_MCLK_LRCK_RATIOS; i++) {
383*4882a593Smuzhiyun 		const unsigned int ratio = supported_mclk_lrck_ratios[i];
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 		if (freq % ratio == 0)
386*4882a593Smuzhiyun 			es8316->allowed_rates[count++] = freq / ratio;
387*4882a593Smuzhiyun 	}
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 	es8316->sysclk_constraints.list = es8316->allowed_rates;
390*4882a593Smuzhiyun 	es8316->sysclk_constraints.count = count;
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	return 0;
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun 
es8316_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)395*4882a593Smuzhiyun static int es8316_set_dai_fmt(struct snd_soc_dai *codec_dai,
396*4882a593Smuzhiyun 			      unsigned int fmt)
397*4882a593Smuzhiyun {
398*4882a593Smuzhiyun 	struct snd_soc_component *component = codec_dai->component;
399*4882a593Smuzhiyun 	u8 serdata1 = 0;
400*4882a593Smuzhiyun 	u8 serdata2 = 0;
401*4882a593Smuzhiyun 	u8 clksw;
402*4882a593Smuzhiyun 	u8 mask;
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun 	if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) {
405*4882a593Smuzhiyun 		dev_err(component->dev, "Codec driver only supports slave mode\n");
406*4882a593Smuzhiyun 		return -EINVAL;
407*4882a593Smuzhiyun 	}
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 	if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) != SND_SOC_DAIFMT_I2S) {
410*4882a593Smuzhiyun 		dev_err(component->dev, "Codec driver only supports I2S format\n");
411*4882a593Smuzhiyun 		return -EINVAL;
412*4882a593Smuzhiyun 	}
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	/* Clock inversion */
415*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
416*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_NF:
417*4882a593Smuzhiyun 		break;
418*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_IB_IF:
419*4882a593Smuzhiyun 		serdata1 |= ES8316_SERDATA1_BCLK_INV;
420*4882a593Smuzhiyun 		serdata2 |= ES8316_SERDATA2_ADCLRP;
421*4882a593Smuzhiyun 		break;
422*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_IB_NF:
423*4882a593Smuzhiyun 		serdata1 |= ES8316_SERDATA1_BCLK_INV;
424*4882a593Smuzhiyun 		break;
425*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_NB_IF:
426*4882a593Smuzhiyun 		serdata2 |= ES8316_SERDATA2_ADCLRP;
427*4882a593Smuzhiyun 		break;
428*4882a593Smuzhiyun 	default:
429*4882a593Smuzhiyun 		return -EINVAL;
430*4882a593Smuzhiyun 	}
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 	mask = ES8316_SERDATA1_MASTER | ES8316_SERDATA1_BCLK_INV;
433*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ES8316_SERDATA1, mask, serdata1);
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	mask = ES8316_SERDATA2_FMT_MASK | ES8316_SERDATA2_ADCLRP;
436*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ES8316_SERDATA_ADC, mask, serdata2);
437*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ES8316_SERDATA_DAC, mask, serdata2);
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun 	/* Enable BCLK and MCLK inputs in slave mode */
440*4882a593Smuzhiyun 	clksw = ES8316_CLKMGR_CLKSW_MCLK_ON | ES8316_CLKMGR_CLKSW_BCLK_ON;
441*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ES8316_CLKMGR_CLKSW, clksw, clksw);
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	return 0;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun 
es8316_pcm_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)446*4882a593Smuzhiyun static int es8316_pcm_startup(struct snd_pcm_substream *substream,
447*4882a593Smuzhiyun 			      struct snd_soc_dai *dai)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
450*4882a593Smuzhiyun 	struct es8316_priv *es8316 = snd_soc_component_get_drvdata(component);
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 	if (es8316->sysclk_constraints.list)
453*4882a593Smuzhiyun 		snd_pcm_hw_constraint_list(substream->runtime, 0,
454*4882a593Smuzhiyun 					   SNDRV_PCM_HW_PARAM_RATE,
455*4882a593Smuzhiyun 					   &es8316->sysclk_constraints);
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	return 0;
458*4882a593Smuzhiyun }
459*4882a593Smuzhiyun 
es8316_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)460*4882a593Smuzhiyun static int es8316_pcm_hw_params(struct snd_pcm_substream *substream,
461*4882a593Smuzhiyun 				struct snd_pcm_hw_params *params,
462*4882a593Smuzhiyun 				struct snd_soc_dai *dai)
463*4882a593Smuzhiyun {
464*4882a593Smuzhiyun 	struct snd_soc_component *component = dai->component;
465*4882a593Smuzhiyun 	struct es8316_priv *es8316 = snd_soc_component_get_drvdata(component);
466*4882a593Smuzhiyun 	u8 wordlen = 0;
467*4882a593Smuzhiyun 	int i;
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	/* Validate supported sample rates that are autodetected from MCLK */
470*4882a593Smuzhiyun 	for (i = 0; i < NR_SUPPORTED_MCLK_LRCK_RATIOS; i++) {
471*4882a593Smuzhiyun 		const unsigned int ratio = supported_mclk_lrck_ratios[i];
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun 		if (es8316->sysclk % ratio != 0)
474*4882a593Smuzhiyun 			continue;
475*4882a593Smuzhiyun 		if (es8316->sysclk / ratio == params_rate(params))
476*4882a593Smuzhiyun 			break;
477*4882a593Smuzhiyun 	}
478*4882a593Smuzhiyun 	if (i == NR_SUPPORTED_MCLK_LRCK_RATIOS)
479*4882a593Smuzhiyun 		return -EINVAL;
480*4882a593Smuzhiyun 
481*4882a593Smuzhiyun 	switch (params_format(params)) {
482*4882a593Smuzhiyun 	case SNDRV_PCM_FORMAT_S16_LE:
483*4882a593Smuzhiyun 		wordlen = ES8316_SERDATA2_LEN_16;
484*4882a593Smuzhiyun 		break;
485*4882a593Smuzhiyun 	case SNDRV_PCM_FORMAT_S20_3LE:
486*4882a593Smuzhiyun 		wordlen = ES8316_SERDATA2_LEN_20;
487*4882a593Smuzhiyun 		break;
488*4882a593Smuzhiyun 	case SNDRV_PCM_FORMAT_S24_LE:
489*4882a593Smuzhiyun 		wordlen = ES8316_SERDATA2_LEN_24;
490*4882a593Smuzhiyun 		break;
491*4882a593Smuzhiyun 	case SNDRV_PCM_FORMAT_S32_LE:
492*4882a593Smuzhiyun 		wordlen = ES8316_SERDATA2_LEN_32;
493*4882a593Smuzhiyun 		break;
494*4882a593Smuzhiyun 	default:
495*4882a593Smuzhiyun 		return -EINVAL;
496*4882a593Smuzhiyun 	}
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ES8316_SERDATA_DAC,
499*4882a593Smuzhiyun 			    ES8316_SERDATA2_LEN_MASK, wordlen);
500*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ES8316_SERDATA_ADC,
501*4882a593Smuzhiyun 			    ES8316_SERDATA2_LEN_MASK, wordlen);
502*4882a593Smuzhiyun 	return 0;
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun 
es8316_mute(struct snd_soc_dai * dai,int mute,int direction)505*4882a593Smuzhiyun static int es8316_mute(struct snd_soc_dai *dai, int mute, int direction)
506*4882a593Smuzhiyun {
507*4882a593Smuzhiyun 	snd_soc_component_update_bits(dai->component, ES8316_DAC_SET1, 0x20,
508*4882a593Smuzhiyun 			    mute ? 0x20 : 0);
509*4882a593Smuzhiyun 	return 0;
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun #define ES8316_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
513*4882a593Smuzhiyun 			SNDRV_PCM_FMTBIT_S24_LE)
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun static const struct snd_soc_dai_ops es8316_ops = {
516*4882a593Smuzhiyun 	.startup = es8316_pcm_startup,
517*4882a593Smuzhiyun 	.hw_params = es8316_pcm_hw_params,
518*4882a593Smuzhiyun 	.set_fmt = es8316_set_dai_fmt,
519*4882a593Smuzhiyun 	.set_sysclk = es8316_set_dai_sysclk,
520*4882a593Smuzhiyun 	.mute_stream = es8316_mute,
521*4882a593Smuzhiyun 	.no_capture_mute = 1,
522*4882a593Smuzhiyun };
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun static struct snd_soc_dai_driver es8316_dai = {
525*4882a593Smuzhiyun 	.name = "ES8316 HiFi",
526*4882a593Smuzhiyun 	.playback = {
527*4882a593Smuzhiyun 		.stream_name = "Playback",
528*4882a593Smuzhiyun 		.channels_min = 1,
529*4882a593Smuzhiyun 		.channels_max = 2,
530*4882a593Smuzhiyun 		.rates = SNDRV_PCM_RATE_8000_48000,
531*4882a593Smuzhiyun 		.formats = ES8316_FORMATS,
532*4882a593Smuzhiyun 	},
533*4882a593Smuzhiyun 	.capture = {
534*4882a593Smuzhiyun 		.stream_name = "Capture",
535*4882a593Smuzhiyun 		.channels_min = 1,
536*4882a593Smuzhiyun 		.channels_max = 2,
537*4882a593Smuzhiyun 		.rates = SNDRV_PCM_RATE_8000_48000,
538*4882a593Smuzhiyun 		.formats = ES8316_FORMATS,
539*4882a593Smuzhiyun 	},
540*4882a593Smuzhiyun 	.ops = &es8316_ops,
541*4882a593Smuzhiyun 	.symmetric_rates = 1,
542*4882a593Smuzhiyun };
543*4882a593Smuzhiyun 
es8316_enable_micbias_for_mic_gnd_short_detect(struct snd_soc_component * component)544*4882a593Smuzhiyun static void es8316_enable_micbias_for_mic_gnd_short_detect(
545*4882a593Smuzhiyun 	struct snd_soc_component *component)
546*4882a593Smuzhiyun {
547*4882a593Smuzhiyun 	struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 	snd_soc_dapm_mutex_lock(dapm);
550*4882a593Smuzhiyun 	snd_soc_dapm_force_enable_pin_unlocked(dapm, "Bias");
551*4882a593Smuzhiyun 	snd_soc_dapm_force_enable_pin_unlocked(dapm, "Analog power");
552*4882a593Smuzhiyun 	snd_soc_dapm_force_enable_pin_unlocked(dapm, "Mic Bias");
553*4882a593Smuzhiyun 	snd_soc_dapm_sync_unlocked(dapm);
554*4882a593Smuzhiyun 	snd_soc_dapm_mutex_unlock(dapm);
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun 	msleep(20);
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun 
es8316_disable_micbias_for_mic_gnd_short_detect(struct snd_soc_component * component)559*4882a593Smuzhiyun static void es8316_disable_micbias_for_mic_gnd_short_detect(
560*4882a593Smuzhiyun 	struct snd_soc_component *component)
561*4882a593Smuzhiyun {
562*4882a593Smuzhiyun 	struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun 	snd_soc_dapm_mutex_lock(dapm);
565*4882a593Smuzhiyun 	snd_soc_dapm_disable_pin_unlocked(dapm, "Mic Bias");
566*4882a593Smuzhiyun 	snd_soc_dapm_disable_pin_unlocked(dapm, "Analog power");
567*4882a593Smuzhiyun 	snd_soc_dapm_disable_pin_unlocked(dapm, "Bias");
568*4882a593Smuzhiyun 	snd_soc_dapm_sync_unlocked(dapm);
569*4882a593Smuzhiyun 	snd_soc_dapm_mutex_unlock(dapm);
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun 
es8316_irq(int irq,void * data)572*4882a593Smuzhiyun static irqreturn_t es8316_irq(int irq, void *data)
573*4882a593Smuzhiyun {
574*4882a593Smuzhiyun 	struct es8316_priv *es8316 = data;
575*4882a593Smuzhiyun 	struct snd_soc_component *comp = es8316->component;
576*4882a593Smuzhiyun 	unsigned int flags;
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	mutex_lock(&es8316->lock);
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun 	regmap_read(es8316->regmap, ES8316_GPIO_FLAG, &flags);
581*4882a593Smuzhiyun 	if (flags == 0x00)
582*4882a593Smuzhiyun 		goto out; /* Powered-down / reset */
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	/* Catch spurious IRQ before set_jack is called */
585*4882a593Smuzhiyun 	if (!es8316->jack)
586*4882a593Smuzhiyun 		goto out;
587*4882a593Smuzhiyun 
588*4882a593Smuzhiyun 	if (es8316->jd_inverted)
589*4882a593Smuzhiyun 		flags ^= ES8316_GPIO_FLAG_HP_NOT_INSERTED;
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 	dev_dbg(comp->dev, "gpio flags %#04x\n", flags);
592*4882a593Smuzhiyun 	if (flags & ES8316_GPIO_FLAG_HP_NOT_INSERTED) {
593*4882a593Smuzhiyun 		/* Jack removed, or spurious IRQ? */
594*4882a593Smuzhiyun 		if (es8316->jack->status & SND_JACK_MICROPHONE)
595*4882a593Smuzhiyun 			es8316_disable_micbias_for_mic_gnd_short_detect(comp);
596*4882a593Smuzhiyun 
597*4882a593Smuzhiyun 		if (es8316->jack->status & SND_JACK_HEADPHONE) {
598*4882a593Smuzhiyun 			snd_soc_jack_report(es8316->jack, 0,
599*4882a593Smuzhiyun 					    SND_JACK_HEADSET | SND_JACK_BTN_0);
600*4882a593Smuzhiyun 			dev_dbg(comp->dev, "jack unplugged\n");
601*4882a593Smuzhiyun 		}
602*4882a593Smuzhiyun 	} else if (!(es8316->jack->status & SND_JACK_HEADPHONE)) {
603*4882a593Smuzhiyun 		/* Jack inserted, determine type */
604*4882a593Smuzhiyun 		es8316_enable_micbias_for_mic_gnd_short_detect(comp);
605*4882a593Smuzhiyun 		regmap_read(es8316->regmap, ES8316_GPIO_FLAG, &flags);
606*4882a593Smuzhiyun 		if (es8316->jd_inverted)
607*4882a593Smuzhiyun 			flags ^= ES8316_GPIO_FLAG_HP_NOT_INSERTED;
608*4882a593Smuzhiyun 		dev_dbg(comp->dev, "gpio flags %#04x\n", flags);
609*4882a593Smuzhiyun 		if (flags & ES8316_GPIO_FLAG_HP_NOT_INSERTED) {
610*4882a593Smuzhiyun 			/* Jack unplugged underneath us */
611*4882a593Smuzhiyun 			es8316_disable_micbias_for_mic_gnd_short_detect(comp);
612*4882a593Smuzhiyun 		} else if (flags & ES8316_GPIO_FLAG_GM_NOT_SHORTED) {
613*4882a593Smuzhiyun 			/* Open, headset */
614*4882a593Smuzhiyun 			snd_soc_jack_report(es8316->jack,
615*4882a593Smuzhiyun 					    SND_JACK_HEADSET,
616*4882a593Smuzhiyun 					    SND_JACK_HEADSET);
617*4882a593Smuzhiyun 			/* Keep mic-gnd-short detection on for button press */
618*4882a593Smuzhiyun 		} else {
619*4882a593Smuzhiyun 			/* Shorted, headphones */
620*4882a593Smuzhiyun 			snd_soc_jack_report(es8316->jack,
621*4882a593Smuzhiyun 					    SND_JACK_HEADPHONE,
622*4882a593Smuzhiyun 					    SND_JACK_HEADSET);
623*4882a593Smuzhiyun 			/* No longer need mic-gnd-short detection */
624*4882a593Smuzhiyun 			es8316_disable_micbias_for_mic_gnd_short_detect(comp);
625*4882a593Smuzhiyun 		}
626*4882a593Smuzhiyun 	} else if (es8316->jack->status & SND_JACK_MICROPHONE) {
627*4882a593Smuzhiyun 		/* Interrupt while jack inserted, report button state */
628*4882a593Smuzhiyun 		if (flags & ES8316_GPIO_FLAG_GM_NOT_SHORTED) {
629*4882a593Smuzhiyun 			/* Open, button release */
630*4882a593Smuzhiyun 			snd_soc_jack_report(es8316->jack, 0, SND_JACK_BTN_0);
631*4882a593Smuzhiyun 		} else {
632*4882a593Smuzhiyun 			/* Short, button press */
633*4882a593Smuzhiyun 			snd_soc_jack_report(es8316->jack,
634*4882a593Smuzhiyun 					    SND_JACK_BTN_0,
635*4882a593Smuzhiyun 					    SND_JACK_BTN_0);
636*4882a593Smuzhiyun 		}
637*4882a593Smuzhiyun 	}
638*4882a593Smuzhiyun 
639*4882a593Smuzhiyun out:
640*4882a593Smuzhiyun 	mutex_unlock(&es8316->lock);
641*4882a593Smuzhiyun 	return IRQ_HANDLED;
642*4882a593Smuzhiyun }
643*4882a593Smuzhiyun 
es8316_enable_jack_detect(struct snd_soc_component * component,struct snd_soc_jack * jack)644*4882a593Smuzhiyun static void es8316_enable_jack_detect(struct snd_soc_component *component,
645*4882a593Smuzhiyun 				      struct snd_soc_jack *jack)
646*4882a593Smuzhiyun {
647*4882a593Smuzhiyun 	struct es8316_priv *es8316 = snd_soc_component_get_drvdata(component);
648*4882a593Smuzhiyun 
649*4882a593Smuzhiyun 	/*
650*4882a593Smuzhiyun 	 * Init es8316->jd_inverted here and not in the probe, as we cannot
651*4882a593Smuzhiyun 	 * guarantee that the bytchr-es8316 driver, which might set this
652*4882a593Smuzhiyun 	 * property, will probe before us.
653*4882a593Smuzhiyun 	 */
654*4882a593Smuzhiyun 	es8316->jd_inverted = device_property_read_bool(component->dev,
655*4882a593Smuzhiyun 							"everest,jack-detect-inverted");
656*4882a593Smuzhiyun 
657*4882a593Smuzhiyun 	mutex_lock(&es8316->lock);
658*4882a593Smuzhiyun 
659*4882a593Smuzhiyun 	es8316->jack = jack;
660*4882a593Smuzhiyun 
661*4882a593Smuzhiyun 	if (es8316->jack->status & SND_JACK_MICROPHONE)
662*4882a593Smuzhiyun 		es8316_enable_micbias_for_mic_gnd_short_detect(component);
663*4882a593Smuzhiyun 
664*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ES8316_GPIO_DEBOUNCE,
665*4882a593Smuzhiyun 				      ES8316_GPIO_ENABLE_INTERRUPT,
666*4882a593Smuzhiyun 				      ES8316_GPIO_ENABLE_INTERRUPT);
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun 	mutex_unlock(&es8316->lock);
669*4882a593Smuzhiyun 
670*4882a593Smuzhiyun 	/* Enable irq and sync initial jack state */
671*4882a593Smuzhiyun 	enable_irq(es8316->irq);
672*4882a593Smuzhiyun 	es8316_irq(es8316->irq, es8316);
673*4882a593Smuzhiyun }
674*4882a593Smuzhiyun 
es8316_disable_jack_detect(struct snd_soc_component * component)675*4882a593Smuzhiyun static void es8316_disable_jack_detect(struct snd_soc_component *component)
676*4882a593Smuzhiyun {
677*4882a593Smuzhiyun 	struct es8316_priv *es8316 = snd_soc_component_get_drvdata(component);
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun 	disable_irq(es8316->irq);
680*4882a593Smuzhiyun 
681*4882a593Smuzhiyun 	mutex_lock(&es8316->lock);
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun 	snd_soc_component_update_bits(component, ES8316_GPIO_DEBOUNCE,
684*4882a593Smuzhiyun 				      ES8316_GPIO_ENABLE_INTERRUPT, 0);
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun 	if (es8316->jack->status & SND_JACK_MICROPHONE) {
687*4882a593Smuzhiyun 		es8316_disable_micbias_for_mic_gnd_short_detect(component);
688*4882a593Smuzhiyun 		snd_soc_jack_report(es8316->jack, 0, SND_JACK_BTN_0);
689*4882a593Smuzhiyun 	}
690*4882a593Smuzhiyun 
691*4882a593Smuzhiyun 	es8316->jack = NULL;
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 	mutex_unlock(&es8316->lock);
694*4882a593Smuzhiyun }
695*4882a593Smuzhiyun 
es8316_set_jack(struct snd_soc_component * component,struct snd_soc_jack * jack,void * data)696*4882a593Smuzhiyun static int es8316_set_jack(struct snd_soc_component *component,
697*4882a593Smuzhiyun 			   struct snd_soc_jack *jack, void *data)
698*4882a593Smuzhiyun {
699*4882a593Smuzhiyun 	if (jack)
700*4882a593Smuzhiyun 		es8316_enable_jack_detect(component, jack);
701*4882a593Smuzhiyun 	else
702*4882a593Smuzhiyun 		es8316_disable_jack_detect(component);
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 	return 0;
705*4882a593Smuzhiyun }
706*4882a593Smuzhiyun 
es8316_probe(struct snd_soc_component * component)707*4882a593Smuzhiyun static int es8316_probe(struct snd_soc_component *component)
708*4882a593Smuzhiyun {
709*4882a593Smuzhiyun 	struct es8316_priv *es8316 = snd_soc_component_get_drvdata(component);
710*4882a593Smuzhiyun 	int ret;
711*4882a593Smuzhiyun 
712*4882a593Smuzhiyun 	es8316->component = component;
713*4882a593Smuzhiyun 
714*4882a593Smuzhiyun 	es8316->mclk = devm_clk_get_optional(component->dev, "mclk");
715*4882a593Smuzhiyun 	if (IS_ERR(es8316->mclk)) {
716*4882a593Smuzhiyun 		dev_err(component->dev, "unable to get mclk\n");
717*4882a593Smuzhiyun 		return PTR_ERR(es8316->mclk);
718*4882a593Smuzhiyun 	}
719*4882a593Smuzhiyun 	if (!es8316->mclk)
720*4882a593Smuzhiyun 		dev_warn(component->dev, "assuming static mclk\n");
721*4882a593Smuzhiyun 
722*4882a593Smuzhiyun 	ret = clk_prepare_enable(es8316->mclk);
723*4882a593Smuzhiyun 	if (ret) {
724*4882a593Smuzhiyun 		dev_err(component->dev, "unable to enable mclk\n");
725*4882a593Smuzhiyun 		return ret;
726*4882a593Smuzhiyun 	}
727*4882a593Smuzhiyun 
728*4882a593Smuzhiyun 	/* Reset codec and enable current state machine */
729*4882a593Smuzhiyun 	snd_soc_component_write(component, ES8316_RESET, 0x3f);
730*4882a593Smuzhiyun 	usleep_range(5000, 5500);
731*4882a593Smuzhiyun 	snd_soc_component_write(component, ES8316_RESET, ES8316_RESET_CSM_ON);
732*4882a593Smuzhiyun 	msleep(30);
733*4882a593Smuzhiyun 
734*4882a593Smuzhiyun 	/*
735*4882a593Smuzhiyun 	 * Documentation is unclear, but this value from the vendor driver is
736*4882a593Smuzhiyun 	 * needed otherwise audio output is silent.
737*4882a593Smuzhiyun 	 */
738*4882a593Smuzhiyun 	snd_soc_component_write(component, ES8316_SYS_VMIDSEL, 0xff);
739*4882a593Smuzhiyun 
740*4882a593Smuzhiyun 	/*
741*4882a593Smuzhiyun 	 * Documentation for this register is unclear and incomplete,
742*4882a593Smuzhiyun 	 * but here is a vendor-provided value that improves volume
743*4882a593Smuzhiyun 	 * and quality for Intel CHT platforms.
744*4882a593Smuzhiyun 	 */
745*4882a593Smuzhiyun 	snd_soc_component_write(component, ES8316_CLKMGR_ADCOSR, 0x32);
746*4882a593Smuzhiyun 
747*4882a593Smuzhiyun 	return 0;
748*4882a593Smuzhiyun }
749*4882a593Smuzhiyun 
es8316_remove(struct snd_soc_component * component)750*4882a593Smuzhiyun static void es8316_remove(struct snd_soc_component *component)
751*4882a593Smuzhiyun {
752*4882a593Smuzhiyun 	struct es8316_priv *es8316 = snd_soc_component_get_drvdata(component);
753*4882a593Smuzhiyun 
754*4882a593Smuzhiyun 	clk_disable_unprepare(es8316->mclk);
755*4882a593Smuzhiyun }
756*4882a593Smuzhiyun 
757*4882a593Smuzhiyun static const struct snd_soc_component_driver soc_component_dev_es8316 = {
758*4882a593Smuzhiyun 	.probe			= es8316_probe,
759*4882a593Smuzhiyun 	.remove			= es8316_remove,
760*4882a593Smuzhiyun 	.set_jack		= es8316_set_jack,
761*4882a593Smuzhiyun 	.controls		= es8316_snd_controls,
762*4882a593Smuzhiyun 	.num_controls		= ARRAY_SIZE(es8316_snd_controls),
763*4882a593Smuzhiyun 	.dapm_widgets		= es8316_dapm_widgets,
764*4882a593Smuzhiyun 	.num_dapm_widgets	= ARRAY_SIZE(es8316_dapm_widgets),
765*4882a593Smuzhiyun 	.dapm_routes		= es8316_dapm_routes,
766*4882a593Smuzhiyun 	.num_dapm_routes	= ARRAY_SIZE(es8316_dapm_routes),
767*4882a593Smuzhiyun 	.use_pmdown_time	= 1,
768*4882a593Smuzhiyun 	.endianness		= 1,
769*4882a593Smuzhiyun 	.non_legacy_dai_naming	= 1,
770*4882a593Smuzhiyun };
771*4882a593Smuzhiyun 
772*4882a593Smuzhiyun static const struct regmap_range es8316_volatile_ranges[] = {
773*4882a593Smuzhiyun 	regmap_reg_range(ES8316_GPIO_FLAG, ES8316_GPIO_FLAG),
774*4882a593Smuzhiyun };
775*4882a593Smuzhiyun 
776*4882a593Smuzhiyun static const struct regmap_access_table es8316_volatile_table = {
777*4882a593Smuzhiyun 	.yes_ranges	= es8316_volatile_ranges,
778*4882a593Smuzhiyun 	.n_yes_ranges	= ARRAY_SIZE(es8316_volatile_ranges),
779*4882a593Smuzhiyun };
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun static const struct regmap_config es8316_regmap = {
782*4882a593Smuzhiyun 	.reg_bits = 8,
783*4882a593Smuzhiyun 	.val_bits = 8,
784*4882a593Smuzhiyun 	.max_register = 0x53,
785*4882a593Smuzhiyun 	.volatile_table	= &es8316_volatile_table,
786*4882a593Smuzhiyun 	.cache_type = REGCACHE_RBTREE,
787*4882a593Smuzhiyun };
788*4882a593Smuzhiyun 
es8316_i2c_probe(struct i2c_client * i2c_client,const struct i2c_device_id * id)789*4882a593Smuzhiyun static int es8316_i2c_probe(struct i2c_client *i2c_client,
790*4882a593Smuzhiyun 			    const struct i2c_device_id *id)
791*4882a593Smuzhiyun {
792*4882a593Smuzhiyun 	struct device *dev = &i2c_client->dev;
793*4882a593Smuzhiyun 	struct es8316_priv *es8316;
794*4882a593Smuzhiyun 	int ret;
795*4882a593Smuzhiyun 
796*4882a593Smuzhiyun 	es8316 = devm_kzalloc(&i2c_client->dev, sizeof(struct es8316_priv),
797*4882a593Smuzhiyun 			      GFP_KERNEL);
798*4882a593Smuzhiyun 	if (es8316 == NULL)
799*4882a593Smuzhiyun 		return -ENOMEM;
800*4882a593Smuzhiyun 
801*4882a593Smuzhiyun 	i2c_set_clientdata(i2c_client, es8316);
802*4882a593Smuzhiyun 
803*4882a593Smuzhiyun 	es8316->regmap = devm_regmap_init_i2c(i2c_client, &es8316_regmap);
804*4882a593Smuzhiyun 	if (IS_ERR(es8316->regmap))
805*4882a593Smuzhiyun 		return PTR_ERR(es8316->regmap);
806*4882a593Smuzhiyun 
807*4882a593Smuzhiyun 	es8316->irq = i2c_client->irq;
808*4882a593Smuzhiyun 	mutex_init(&es8316->lock);
809*4882a593Smuzhiyun 
810*4882a593Smuzhiyun 	ret = devm_request_threaded_irq(dev, es8316->irq, NULL, es8316_irq,
811*4882a593Smuzhiyun 					IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
812*4882a593Smuzhiyun 					"es8316", es8316);
813*4882a593Smuzhiyun 	if (ret == 0) {
814*4882a593Smuzhiyun 		/* Gets re-enabled by es8316_set_jack() */
815*4882a593Smuzhiyun 		disable_irq(es8316->irq);
816*4882a593Smuzhiyun 	} else {
817*4882a593Smuzhiyun 		dev_warn(dev, "Failed to get IRQ %d: %d\n", es8316->irq, ret);
818*4882a593Smuzhiyun 		es8316->irq = -ENXIO;
819*4882a593Smuzhiyun 	}
820*4882a593Smuzhiyun 
821*4882a593Smuzhiyun 	return devm_snd_soc_register_component(&i2c_client->dev,
822*4882a593Smuzhiyun 				      &soc_component_dev_es8316,
823*4882a593Smuzhiyun 				      &es8316_dai, 1);
824*4882a593Smuzhiyun }
825*4882a593Smuzhiyun 
826*4882a593Smuzhiyun static const struct i2c_device_id es8316_i2c_id[] = {
827*4882a593Smuzhiyun 	{"es8316", 0 },
828*4882a593Smuzhiyun 	{}
829*4882a593Smuzhiyun };
830*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, es8316_i2c_id);
831*4882a593Smuzhiyun 
832*4882a593Smuzhiyun static const struct of_device_id es8316_of_match[] = {
833*4882a593Smuzhiyun 	{ .compatible = "everest,es8316", },
834*4882a593Smuzhiyun 	{},
835*4882a593Smuzhiyun };
836*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, es8316_of_match);
837*4882a593Smuzhiyun 
838*4882a593Smuzhiyun #ifdef CONFIG_ACPI
839*4882a593Smuzhiyun static const struct acpi_device_id es8316_acpi_match[] = {
840*4882a593Smuzhiyun 	{"ESSX8316", 0},
841*4882a593Smuzhiyun 	{},
842*4882a593Smuzhiyun };
843*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, es8316_acpi_match);
844*4882a593Smuzhiyun #endif
845*4882a593Smuzhiyun 
846*4882a593Smuzhiyun static struct i2c_driver es8316_i2c_driver = {
847*4882a593Smuzhiyun 	.driver = {
848*4882a593Smuzhiyun 		.name			= "es8316",
849*4882a593Smuzhiyun 		.acpi_match_table	= ACPI_PTR(es8316_acpi_match),
850*4882a593Smuzhiyun 		.of_match_table		= of_match_ptr(es8316_of_match),
851*4882a593Smuzhiyun 	},
852*4882a593Smuzhiyun 	.probe		= es8316_i2c_probe,
853*4882a593Smuzhiyun 	.id_table	= es8316_i2c_id,
854*4882a593Smuzhiyun };
855*4882a593Smuzhiyun module_i2c_driver(es8316_i2c_driver);
856*4882a593Smuzhiyun 
857*4882a593Smuzhiyun MODULE_DESCRIPTION("Everest Semi ES8316 ALSA SoC Codec Driver");
858*4882a593Smuzhiyun MODULE_AUTHOR("David Yang <yangxiaohua@everest-semi.com>");
859*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
860