1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * ALSA SoC ES7243E adc driver
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Author: David Yang, <yangxiaohua@everest-semi.com>
5*4882a593Smuzhiyun * or
6*4882a593Smuzhiyun * <info@everest-semi.com>
7*4882a593Smuzhiyun * Copyright: (C) 2017 Everest Semiconductor Co Ltd.,
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Based on sound/soc/codecs/es7243.c by DavidYang
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify
12*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as
13*4882a593Smuzhiyun * published by the Free Software Foundation.
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * Notes:
16*4882a593Smuzhiyun * ES7243E is a stereo Audio ADC for Microphone Array
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun */
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <linux/module.h>
21*4882a593Smuzhiyun #include <linux/moduleparam.h>
22*4882a593Smuzhiyun #include <linux/init.h>
23*4882a593Smuzhiyun #include <linux/delay.h>
24*4882a593Smuzhiyun #include <linux/pm.h>
25*4882a593Smuzhiyun #include <linux/i2c.h>
26*4882a593Smuzhiyun #include <linux/slab.h>
27*4882a593Smuzhiyun #include <sound/core.h>
28*4882a593Smuzhiyun #include <sound/pcm.h>
29*4882a593Smuzhiyun #include <sound/pcm_params.h>
30*4882a593Smuzhiyun #include <sound/soc.h>
31*4882a593Smuzhiyun #include <sound/soc-dapm.h>
32*4882a593Smuzhiyun #include <sound/tlv.h>
33*4882a593Smuzhiyun #include <sound/initval.h>
34*4882a593Smuzhiyun #include <linux/regmap.h>
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #include "es7243e_usr_cfg.h"
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun static struct i2c_client *i2c_clt[(ES7243E_CHANNELS_MAX) / 2];
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /* codec private data */
41*4882a593Smuzhiyun struct es7243e_priv {
42*4882a593Smuzhiyun struct regmap *regmap;
43*4882a593Smuzhiyun struct i2c_client *i2c;
44*4882a593Smuzhiyun unsigned int sysclk;
45*4882a593Smuzhiyun struct snd_pcm_hw_constraint_list *sysclk_constraints;
46*4882a593Smuzhiyun bool dmic;
47*4882a593Smuzhiyun u8 mclksrc;
48*4882a593Smuzhiyun bool mclkinv;
49*4882a593Smuzhiyun bool bclkinv;
50*4882a593Smuzhiyun u8 tdm;
51*4882a593Smuzhiyun u8 vdda;
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun static struct snd_soc_component *tron_component[8];
54*4882a593Smuzhiyun static int es7243e_codec_num = 0;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun static const struct regmap_config es7243e_regmap_config = {
57*4882a593Smuzhiyun .reg_bits = 8, //Number of bits in a register address
58*4882a593Smuzhiyun .val_bits = 8, //Number of bits in a register value
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /*
62*4882a593Smuzhiyun * ES7243 register cache
63*4882a593Smuzhiyun */
64*4882a593Smuzhiyun static const u8 es7243_reg[] = {
65*4882a593Smuzhiyun 0x00, 0x00, 0x10, 0x04, /* 0 */
66*4882a593Smuzhiyun 0x02, 0x13, 0x00, 0x3f, /* 4 */
67*4882a593Smuzhiyun 0x11, 0x00, 0xc0, 0xc0, /* 8 */
68*4882a593Smuzhiyun 0x12, 0xa0, 0x40, /* 12 */
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun static const struct reg_default es7243_reg_defaults[] = {
72*4882a593Smuzhiyun {0x00, 0x00}, {0x01, 0x00}, {0x02, 0x10}, {0x03, 0x04}, /* 0 */
73*4882a593Smuzhiyun {0x04, 0x02}, {0x05, 0x13}, {0x06, 0x00}, {0x07, 0x3f}, /* 4 */
74*4882a593Smuzhiyun {0x08, 0x11}, {0x09, 0x00}, {0x0a, 0xc0}, {0x0b, 0xc0}, /* 8 */
75*4882a593Smuzhiyun {0x0c, 0x12}, {0x0d, 0xa0}, {0x0e, 0x40}, /* 12 */
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun
es7243e_read(u8 reg,u8 * rt_value,struct i2c_client * client)78*4882a593Smuzhiyun static int es7243e_read(u8 reg, u8 * rt_value, struct i2c_client *client)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun int ret;
81*4882a593Smuzhiyun u8 read_cmd[3] = { 0 };
82*4882a593Smuzhiyun u8 cmd_len = 0;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun read_cmd[0] = reg;
85*4882a593Smuzhiyun cmd_len = 1;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun if (client->adapter == NULL)
88*4882a593Smuzhiyun pr_err("es7243_read client->adapter==NULL\n");
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun ret = i2c_master_send(client, read_cmd, cmd_len);
91*4882a593Smuzhiyun if (ret != cmd_len) {
92*4882a593Smuzhiyun pr_err("es7243_read error1\n");
93*4882a593Smuzhiyun return -1;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun ret = i2c_master_recv(client, rt_value, 1);
97*4882a593Smuzhiyun if (ret != 1) {
98*4882a593Smuzhiyun pr_err("es7243_read error2, ret = %d.\n", ret);
99*4882a593Smuzhiyun return -1;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun return 0;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun static int
es7243e_write(u8 reg,unsigned char value,struct i2c_client * client)106*4882a593Smuzhiyun es7243e_write(u8 reg, unsigned char value, struct i2c_client *client)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun int ret = 0;
109*4882a593Smuzhiyun u8 write_cmd[2] = { 0 };
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun write_cmd[0] = reg;
112*4882a593Smuzhiyun write_cmd[1] = value;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun ret = i2c_master_send(client, write_cmd, 2);
115*4882a593Smuzhiyun if (ret != 2) {
116*4882a593Smuzhiyun pr_err("es7243_write error->[REG-0x%02x,val-0x%02x]\n",
117*4882a593Smuzhiyun reg, value);
118*4882a593Smuzhiyun return -1;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun return 0;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun static int
es7243e_update_bits(u8 reg,u8 mask,u8 value,struct i2c_client * client)125*4882a593Smuzhiyun es7243e_update_bits(u8 reg, u8 mask, u8 value, struct i2c_client *client)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun u8 val_old = 0, val_new = 0;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun es7243e_read(reg, &val_old, client);
130*4882a593Smuzhiyun val_new = (val_old & ~mask) | (value & mask);
131*4882a593Smuzhiyun if (val_new != val_old) {
132*4882a593Smuzhiyun es7243e_write(reg, val_new, client);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun return 0;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun struct _coeff_div {
139*4882a593Smuzhiyun u32 mclk; //mclk frequency
140*4882a593Smuzhiyun u32 sr_rate; //sample rate
141*4882a593Smuzhiyun u8 osr; //adc over sample rate
142*4882a593Smuzhiyun u8 prediv_premulti; //adcclk and dacclk divider
143*4882a593Smuzhiyun u8 cf_dsp_div; //adclrck divider and daclrck divider
144*4882a593Smuzhiyun u8 scale;
145*4882a593Smuzhiyun u8 lrckdiv_h;
146*4882a593Smuzhiyun u8 lrckdiv_l;
147*4882a593Smuzhiyun u8 bclkdiv; //sclk divider
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun /* codec hifi mclk clock divider coefficients */
151*4882a593Smuzhiyun static const struct _coeff_div coeff_div[] = {
152*4882a593Smuzhiyun //mclk lrck, osr, pre, div ,scale, lrckdiv_h, lrckdiv_l, bclkdiv
153*4882a593Smuzhiyun /* 24.576MHZ */
154*4882a593Smuzhiyun {24576000, 8000, 0x20, 0x50, 0x00, 0x00, 0x0b, 0xff, 0x2f},
155*4882a593Smuzhiyun {24576000, 12000, 0x20, 0x30, 0x00, 0x00, 0x07, 0xff, 0x1f},
156*4882a593Smuzhiyun {24576000, 16000, 0x20, 0x20, 0x00, 0x00, 0x05, 0xff, 0x17},
157*4882a593Smuzhiyun {24576000, 24000, 0x20, 0x10, 0x00, 0x00, 0x03, 0xff, 0x0f},
158*4882a593Smuzhiyun {24576000, 32000, 0x20, 0x21, 0x00, 0x00, 0x02, 0xff, 0x0b},
159*4882a593Smuzhiyun {24576000, 48000, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
160*4882a593Smuzhiyun /* 12.288MHZ */
161*4882a593Smuzhiyun {12288000, 8000, 0x20, 0x20, 0x00, 0x00, 0x05, 0xff, 0x17},
162*4882a593Smuzhiyun {12288000, 12000, 0x20, 0x10, 0x00, 0x00, 0x03, 0xff, 0x0f},
163*4882a593Smuzhiyun {12288000, 16000, 0x20, 0x21, 0x00, 0x00, 0x02, 0xff, 0x0b},
164*4882a593Smuzhiyun {12288000, 24000, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
165*4882a593Smuzhiyun {12288000, 32000, 0x20, 0x22, 0x00, 0x00, 0x01, 0x7f, 0x05},
166*4882a593Smuzhiyun {12288000, 48000, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
167*4882a593Smuzhiyun /* 6.144MHZ */
168*4882a593Smuzhiyun {6144000, 8000, 0x20, 0x21, 0x00, 0x00, 0x02, 0xff, 0x0b},
169*4882a593Smuzhiyun {6144000, 12000, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
170*4882a593Smuzhiyun {6144000, 16000, 0x20, 0x22, 0x00, 0x00, 0x01, 0x7f, 0x05},
171*4882a593Smuzhiyun {6144000, 24000, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
172*4882a593Smuzhiyun {6144000, 32000, 0x20, 0x23, 0x00, 0x00, 0x00, 0xbf, 0x02},
173*4882a593Smuzhiyun {6144000, 48000, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
174*4882a593Smuzhiyun /* 3.072MHZ */
175*4882a593Smuzhiyun {3072000, 8000, 0x20, 0x22, 0x00, 0x00, 0x01, 0x7f, 0x05},
176*4882a593Smuzhiyun {3072000, 12000, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
177*4882a593Smuzhiyun {3072000, 16000, 0x20, 0x23, 0x00, 0x00, 0x00, 0xbf, 0x02},
178*4882a593Smuzhiyun {3072000, 24000, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
179*4882a593Smuzhiyun {3072000, 32000, 0x10, 0x03, 0x20, 0x04, 0x00, 0x5f, 0x02},
180*4882a593Smuzhiyun {3072000, 48000, 0x20, 0x03, 0x00, 0x00, 0x00, 0x3f, 0x00},
181*4882a593Smuzhiyun /* 1.536MHZ */
182*4882a593Smuzhiyun {1536000, 8000, 0x20, 0x23, 0x00, 0x00, 0x00, 0xbf, 0x02},
183*4882a593Smuzhiyun {1536000, 12000, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
184*4882a593Smuzhiyun {1536000, 16000, 0x10, 0x03, 0x20, 0x04, 0x00, 0x5f, 0x00},
185*4882a593Smuzhiyun {1536000, 24000, 0x20, 0x03, 0x00, 0x00, 0x00, 0x3f, 0x00},
186*4882a593Smuzhiyun /* 32.768MHZ */
187*4882a593Smuzhiyun {32768000, 8000, 0x20, 0x70, 0x00, 0x00, 0x0f, 0xff, 0x3f},
188*4882a593Smuzhiyun {32768000, 16000, 0x20, 0x30, 0x00, 0x00, 0x07, 0xff, 0x1f},
189*4882a593Smuzhiyun {32768000, 32000, 0x20, 0x10, 0x00, 0x00, 0x03, 0xff, 0x0f},
190*4882a593Smuzhiyun /* 16.384MHZ */
191*4882a593Smuzhiyun {16384000, 8000, 0x20, 0x30, 0x00, 0x00, 0x07, 0xff, 0x1f},
192*4882a593Smuzhiyun {16384000, 16000, 0x20, 0x10, 0x00, 0x00, 0x03, 0xff, 0x0f},
193*4882a593Smuzhiyun {16384000, 32000, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
194*4882a593Smuzhiyun /* 8.192MHZ */
195*4882a593Smuzhiyun {8192000, 8000, 0x20, 0x10, 0x00, 0x00, 0x03, 0xff, 0x0f},
196*4882a593Smuzhiyun {8192000, 16000, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
197*4882a593Smuzhiyun {8192000, 32000, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
198*4882a593Smuzhiyun /* 4.096MHZ */
199*4882a593Smuzhiyun {4096000, 8000, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
200*4882a593Smuzhiyun {4096000, 16000, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
201*4882a593Smuzhiyun {4096000, 32000, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
202*4882a593Smuzhiyun /* 2.048MHZ */
203*4882a593Smuzhiyun {2048000, 8000, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
204*4882a593Smuzhiyun {2048000, 16000, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
205*4882a593Smuzhiyun {2048000, 32000, 0x20, 0x03, 0x00, 0x00, 0x00, 0x3f, 0x00},
206*4882a593Smuzhiyun /* 1.024MHZ */
207*4882a593Smuzhiyun {1024000, 8000, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
208*4882a593Smuzhiyun {1024000, 16000, 0x20, 0x03, 0x00, 0x00, 0x00, 0x3f, 0x00},
209*4882a593Smuzhiyun /* 22.5792MHz */
210*4882a593Smuzhiyun {22579200, 11025, 0x20, 0x30, 0x00, 0x00, 0x07, 0xff, 0x1f},
211*4882a593Smuzhiyun {22579200, 22050, 0x20, 0x10, 0x00, 0x00, 0x03, 0xff, 0x0f},
212*4882a593Smuzhiyun {22579200, 44100, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
213*4882a593Smuzhiyun /* 11.2896MHz */
214*4882a593Smuzhiyun {11289600, 11025, 0x20, 0x10, 0x00, 0x00, 0x03, 0xff, 0x0f},
215*4882a593Smuzhiyun {11289600, 22050, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
216*4882a593Smuzhiyun {11289600, 44100, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
217*4882a593Smuzhiyun /* 5.6448MHz */
218*4882a593Smuzhiyun {56448000, 11025, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
219*4882a593Smuzhiyun {56448000, 22050, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
220*4882a593Smuzhiyun {56448000, 44100, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
221*4882a593Smuzhiyun /* 2.8224MHz */
222*4882a593Smuzhiyun {28224000, 11025, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
223*4882a593Smuzhiyun {28224000, 22050, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
224*4882a593Smuzhiyun {28224000, 44100, 0x20, 0x03, 0x00, 0x00, 0x00, 0x3f, 0x00},
225*4882a593Smuzhiyun /* 1.4112MHz */
226*4882a593Smuzhiyun {14112000, 11025, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
227*4882a593Smuzhiyun {14112000, 22050, 0x20, 0x03, 0x00, 0x00, 0x00, 0x3f, 0x00},
228*4882a593Smuzhiyun };
229*4882a593Smuzhiyun
get_coeff(int mclk,int rate)230*4882a593Smuzhiyun static inline int get_coeff(int mclk, int rate)
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun int i;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
235*4882a593Smuzhiyun if (coeff_div[i].sr_rate == rate && coeff_div[i].mclk == mclk)
236*4882a593Smuzhiyun return i;
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun return -EINVAL;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun /* The set of rates we can generate from the above for each SYSCLK */
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun static unsigned int rates_12288[] = {
245*4882a593Smuzhiyun 8000, 12000, 16000, 24000, 32000, 48000, 64000, 96000, 128000, 192000,
246*4882a593Smuzhiyun };
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun static unsigned int rates_8192[] = {
249*4882a593Smuzhiyun 8000, 16000, 32000, 64000, 128000,
250*4882a593Smuzhiyun };
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun static struct snd_pcm_hw_constraint_list constraints_12288 = {
253*4882a593Smuzhiyun .count = ARRAY_SIZE(rates_12288),
254*4882a593Smuzhiyun .list = rates_12288,
255*4882a593Smuzhiyun };
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun static struct snd_pcm_hw_constraint_list constraints_8192 = {
258*4882a593Smuzhiyun .count = ARRAY_SIZE(rates_8192),
259*4882a593Smuzhiyun .list = rates_8192,
260*4882a593Smuzhiyun };
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun static unsigned int rates_112896[] = {
263*4882a593Smuzhiyun 8000, 11025, 22050, 44100,
264*4882a593Smuzhiyun };
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun static struct snd_pcm_hw_constraint_list constraints_112896 = {
267*4882a593Smuzhiyun .count = ARRAY_SIZE(rates_112896),
268*4882a593Smuzhiyun .list = rates_112896,
269*4882a593Smuzhiyun };
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun #if 0
272*4882a593Smuzhiyun static unsigned int rates_12[] = {
273*4882a593Smuzhiyun 8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000,
274*4882a593Smuzhiyun 48000, 88235, 96000,
275*4882a593Smuzhiyun };
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun static struct snd_pcm_hw_constraint_list constraints_12 = {
278*4882a593Smuzhiyun .count = ARRAY_SIZE(rates_12),
279*4882a593Smuzhiyun .list = rates_12,
280*4882a593Smuzhiyun };
281*4882a593Smuzhiyun #endif
282*4882a593Smuzhiyun /*
283*4882a593Smuzhiyun * Note that this should be called from init rather than from hw_params.
284*4882a593Smuzhiyun */
285*4882a593Smuzhiyun static int
es7243e_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)286*4882a593Smuzhiyun es7243e_set_dai_sysclk(struct snd_soc_dai *codec_dai,
287*4882a593Smuzhiyun int clk_id, unsigned int freq, int dir)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun struct snd_soc_component *component = codec_dai->component;
290*4882a593Smuzhiyun struct es7243e_priv *es7243e = snd_soc_component_get_drvdata(component);
291*4882a593Smuzhiyun printk("Enter into %s(), freq = %d\n", __func__, freq);
292*4882a593Smuzhiyun switch (freq) {
293*4882a593Smuzhiyun case 11289600:
294*4882a593Smuzhiyun case 22579200:
295*4882a593Smuzhiyun es7243e->sysclk_constraints = &constraints_112896;
296*4882a593Smuzhiyun es7243e->sysclk = freq;
297*4882a593Smuzhiyun return 0;
298*4882a593Smuzhiyun case 12288000:
299*4882a593Smuzhiyun case 24576000:
300*4882a593Smuzhiyun es7243e->sysclk_constraints = &constraints_12288;
301*4882a593Smuzhiyun es7243e->sysclk = freq;
302*4882a593Smuzhiyun return 0;
303*4882a593Smuzhiyun case 4096000:
304*4882a593Smuzhiyun case 8192000:
305*4882a593Smuzhiyun es7243e->sysclk_constraints = &constraints_8192;
306*4882a593Smuzhiyun es7243e->sysclk = freq;
307*4882a593Smuzhiyun return 0;
308*4882a593Smuzhiyun /*
309*4882a593Smuzhiyun case 12000000:
310*4882a593Smuzhiyun case 24000000:
311*4882a593Smuzhiyun es7243e->sysclk_constraints = &constraints_12;
312*4882a593Smuzhiyun es7243e->sysclk = freq;
313*4882a593Smuzhiyun return 0;
314*4882a593Smuzhiyun */
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun // return -EINVAL;
317*4882a593Smuzhiyun return 0;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun
es7243e_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)320*4882a593Smuzhiyun static int es7243e_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun #if 0
323*4882a593Smuzhiyun u8 iface = 0;
324*4882a593Smuzhiyun u8 adciface = 0;
325*4882a593Smuzhiyun u8 clksel = 0;
326*4882a593Smuzhiyun u8 i;
327*4882a593Smuzhiyun printk("Enter into %s()\n", __func__);
328*4882a593Smuzhiyun for (i = 0; i < (ES7243E_CHANNELS_MAX) / 2; i++) {
329*4882a593Smuzhiyun es7243e_read(0x0b, &adciface, i2c_clt[i]); //get interface format
330*4882a593Smuzhiyun es7243e_read(0x00, &iface, i2c_clt[i]); //get spd interface
331*4882a593Smuzhiyun es7243e_read(0x02, &clksel, i2c_clt[i]); //get spd interface
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun /* set master/slave audio interface */
334*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
335*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBM_CFM: // MASTER MODE
336*4882a593Smuzhiyun iface |= 0x40;
337*4882a593Smuzhiyun break;
338*4882a593Smuzhiyun case SND_SOC_DAIFMT_CBS_CFS: // SLAVE MODE
339*4882a593Smuzhiyun iface &= 0xbf;
340*4882a593Smuzhiyun break;
341*4882a593Smuzhiyun default:
342*4882a593Smuzhiyun return -EINVAL;
343*4882a593Smuzhiyun }
344*4882a593Smuzhiyun /* interface format */
345*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
346*4882a593Smuzhiyun case SND_SOC_DAIFMT_I2S:
347*4882a593Smuzhiyun adciface &= 0xFC;
348*4882a593Smuzhiyun break;
349*4882a593Smuzhiyun case SND_SOC_DAIFMT_RIGHT_J:
350*4882a593Smuzhiyun return -EINVAL;
351*4882a593Smuzhiyun case SND_SOC_DAIFMT_LEFT_J:
352*4882a593Smuzhiyun adciface &= 0xFC;
353*4882a593Smuzhiyun adciface |= 0x01;
354*4882a593Smuzhiyun break;
355*4882a593Smuzhiyun case SND_SOC_DAIFMT_DSP_A:
356*4882a593Smuzhiyun adciface &= 0xDC;
357*4882a593Smuzhiyun adciface |= 0x03;
358*4882a593Smuzhiyun break;
359*4882a593Smuzhiyun case SND_SOC_DAIFMT_DSP_B:
360*4882a593Smuzhiyun adciface &= 0xDC;
361*4882a593Smuzhiyun adciface |= 0x23;
362*4882a593Smuzhiyun break;
363*4882a593Smuzhiyun default:
364*4882a593Smuzhiyun return -EINVAL;
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun /* clock inversion */
368*4882a593Smuzhiyun switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
369*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_NF:
370*4882a593Smuzhiyun adciface &= 0xdf;
371*4882a593Smuzhiyun clksel &= 0xfe;
372*4882a593Smuzhiyun break;
373*4882a593Smuzhiyun case SND_SOC_DAIFMT_IB_IF:
374*4882a593Smuzhiyun adciface |= 0x20;
375*4882a593Smuzhiyun clksel |= 0x01;
376*4882a593Smuzhiyun break;
377*4882a593Smuzhiyun case SND_SOC_DAIFMT_IB_NF:
378*4882a593Smuzhiyun adciface &= 0xdf;
379*4882a593Smuzhiyun clksel |= 0x01;
380*4882a593Smuzhiyun break;
381*4882a593Smuzhiyun case SND_SOC_DAIFMT_NB_IF:
382*4882a593Smuzhiyun adciface |= 0x20;
383*4882a593Smuzhiyun clksel &= 0xfe;
384*4882a593Smuzhiyun break;
385*4882a593Smuzhiyun default:
386*4882a593Smuzhiyun return -EINVAL;
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun es7243e_write(0x00, iface, i2c_clt[i]);
390*4882a593Smuzhiyun es7243e_write(0x02, clksel, i2c_clt[i]);
391*4882a593Smuzhiyun es7243e_write(0x0b, adciface, i2c_clt[i]);
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun #endif
394*4882a593Smuzhiyun return 0;
395*4882a593Smuzhiyun }
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun static int
es7243e_pcm_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)398*4882a593Smuzhiyun es7243e_pcm_startup(struct snd_pcm_substream *substream,
399*4882a593Smuzhiyun struct snd_soc_dai *dai)
400*4882a593Smuzhiyun {
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun return 0;
403*4882a593Smuzhiyun }
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun static int
es7243e_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)406*4882a593Smuzhiyun es7243e_pcm_hw_params(struct snd_pcm_substream *substream,
407*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
408*4882a593Smuzhiyun struct snd_soc_dai *dai)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun // struct snd_soc_pcm_runtime *rtd = substream->private_data;
411*4882a593Smuzhiyun // struct snd_soc_codec *codec = rtd->codec;
412*4882a593Smuzhiyun // struct es7243e_priv *es7243e = snd_soc_codec_get_drvdata(codec);
413*4882a593Smuzhiyun u8 index, regv = 0;
414*4882a593Smuzhiyun // int coeff;
415*4882a593Smuzhiyun printk("Enter into %s()\n", __func__);
416*4882a593Smuzhiyun #if 0
417*4882a593Smuzhiyun coeff = get_coeff(es7243e->sysclk, params_rate(params));
418*4882a593Smuzhiyun if (coeff < 0) {
419*4882a593Smuzhiyun printk("Unable to configure sample rate %dHz with %dHz MCLK",
420*4882a593Smuzhiyun params_rate(params), es7243e->sysclk);
421*4882a593Smuzhiyun return coeff;
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun /*
424*4882a593Smuzhiyun * set clock parameters
425*4882a593Smuzhiyun */
426*4882a593Smuzhiyun if (coeff >= 0) {
427*4882a593Smuzhiyun for (index = 0; index < (ES7243E_CHANNELS_MAX) / 2; index++) {
428*4882a593Smuzhiyun es7243e_write(0x03, coeff_div[coeff].osr,
429*4882a593Smuzhiyun i2c_clt[index]);
430*4882a593Smuzhiyun es7243e_write(0x04,
431*4882a593Smuzhiyun coeff_div[coeff].prediv_premulti,
432*4882a593Smuzhiyun i2c_clt[index]);
433*4882a593Smuzhiyun es7243e_write(0x05, coeff_div[coeff].cf_dsp_div,
434*4882a593Smuzhiyun i2c_clt[index]);
435*4882a593Smuzhiyun es7243e_write(0x0d, coeff_div[coeff].scale,
436*4882a593Smuzhiyun i2c_clt[index]);
437*4882a593Smuzhiyun es7243e_write(0x03, coeff_div[coeff].osr,
438*4882a593Smuzhiyun i2c_clt[index]);
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun es7243e_read(0x07, ®v, i2c_clt[index]);
441*4882a593Smuzhiyun regv &= 0xf0;
442*4882a593Smuzhiyun regv |= (coeff_div[coeff].lrckdiv_h & 0x0f);
443*4882a593Smuzhiyun es7243e_write(0x07, regv, i2c_clt[index]);
444*4882a593Smuzhiyun es7243e_write(0x06, coeff_div[coeff].bclkdiv,
445*4882a593Smuzhiyun i2c_clt[index]);
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun #endif
450*4882a593Smuzhiyun /*
451*4882a593Smuzhiyun * set data length
452*4882a593Smuzhiyun */
453*4882a593Smuzhiyun for (index = 0; index < (ES7243E_CHANNELS_MAX) / 2; index++) {
454*4882a593Smuzhiyun es7243e_read(0x0b, ®v, i2c_clt[index]);
455*4882a593Smuzhiyun regv &= 0xe3;
456*4882a593Smuzhiyun switch (params_format(params)) {
457*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_S16_LE:
458*4882a593Smuzhiyun regv |= 0x0c;
459*4882a593Smuzhiyun break;
460*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_S20_3LE:
461*4882a593Smuzhiyun regv |= 0x04;
462*4882a593Smuzhiyun break;
463*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_S24_LE:
464*4882a593Smuzhiyun break;
465*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_S32_LE:
466*4882a593Smuzhiyun regv |= 0x10;
467*4882a593Smuzhiyun break;
468*4882a593Smuzhiyun default:
469*4882a593Smuzhiyun regv |= 0x0c;
470*4882a593Smuzhiyun break;
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun es7243e_write(0x0b, regv, i2c_clt[index]);
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun msleep(50);
475*4882a593Smuzhiyun for (index = 0; index < (ES7243E_CHANNELS_MAX) / 2; index++) {
476*4882a593Smuzhiyun es7243e_read(0x0b, ®v, i2c_clt[index]);
477*4882a593Smuzhiyun regv &= 0x3f;
478*4882a593Smuzhiyun es7243e_write(0x0b, regv, i2c_clt[index]);
479*4882a593Smuzhiyun }
480*4882a593Smuzhiyun return 0;
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
es7243e_mute(struct snd_soc_dai * dai,int mute,int stream)483*4882a593Smuzhiyun static int es7243e_mute(struct snd_soc_dai *dai, int mute, int stream)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun //struct snd_soc_codec *codec = dai->codec;
486*4882a593Smuzhiyun u8 i;
487*4882a593Smuzhiyun printk("Enter into %s()\n", __func__);
488*4882a593Smuzhiyun if (stream == SNDRV_PCM_STREAM_PLAYBACK)
489*4882a593Smuzhiyun return 0;
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun for (i = 0; i < (ES7243E_CHANNELS_MAX) / 2; i++) {
492*4882a593Smuzhiyun if (mute)
493*4882a593Smuzhiyun es7243e_update_bits(0x0b, 0xc0, 0xc0, i2c_clt[i]);
494*4882a593Smuzhiyun else
495*4882a593Smuzhiyun es7243e_update_bits(0x0b, 0xc0, 0x00, i2c_clt[i]);
496*4882a593Smuzhiyun }
497*4882a593Smuzhiyun return 0;
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun static int
es7243e_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)501*4882a593Smuzhiyun es7243e_set_bias_level(struct snd_soc_component *component,
502*4882a593Smuzhiyun enum snd_soc_bias_level level)
503*4882a593Smuzhiyun {
504*4882a593Smuzhiyun u8 i, regv = 0;
505*4882a593Smuzhiyun switch (level) {
506*4882a593Smuzhiyun case SND_SOC_BIAS_ON:
507*4882a593Smuzhiyun printk("%s on\n", __func__);
508*4882a593Smuzhiyun break;
509*4882a593Smuzhiyun case SND_SOC_BIAS_PREPARE:
510*4882a593Smuzhiyun printk("%s prepare\n", __func__);
511*4882a593Smuzhiyun break;
512*4882a593Smuzhiyun case SND_SOC_BIAS_STANDBY:
513*4882a593Smuzhiyun printk("%s standby\n", __func__);
514*4882a593Smuzhiyun for (i = 0; i < (ES7243E_CHANNELS_MAX) / 2; i++) {
515*4882a593Smuzhiyun /*
516*4882a593Smuzhiyun * enable clock
517*4882a593Smuzhiyun */
518*4882a593Smuzhiyun es7243e_read(0x01, ®v, i2c_clt[i]);
519*4882a593Smuzhiyun regv |= 0x0A;
520*4882a593Smuzhiyun es7243e_write(0x01, regv, i2c_clt[i]);
521*4882a593Smuzhiyun es7243e_write(0x16, 0x00, i2c_clt[i]); //power up analog
522*4882a593Smuzhiyun /*
523*4882a593Smuzhiyun * enable mic input 1
524*4882a593Smuzhiyun */
525*4882a593Smuzhiyun es7243e_read(0x20, ®v, i2c_clt[i]);
526*4882a593Smuzhiyun regv |= 0x10;
527*4882a593Smuzhiyun es7243e_write(0x20, regv, i2c_clt[i]);
528*4882a593Smuzhiyun /*
529*4882a593Smuzhiyun * enable mic input 2
530*4882a593Smuzhiyun */
531*4882a593Smuzhiyun es7243e_read(0x21, ®v, i2c_clt[i]);
532*4882a593Smuzhiyun regv |= 0x10;
533*4882a593Smuzhiyun es7243e_write(0x21, regv, i2c_clt[i]);
534*4882a593Smuzhiyun msleep(100);
535*4882a593Smuzhiyun es7243e_update_bits(0x0b, 0xc0, 0x00, i2c_clt[i]); //mute SDP
536*4882a593Smuzhiyun }
537*4882a593Smuzhiyun break;
538*4882a593Smuzhiyun case SND_SOC_BIAS_OFF:
539*4882a593Smuzhiyun printk("%s off\n", __func__);
540*4882a593Smuzhiyun for (i = 0; i < (ES7243E_CHANNELS_MAX) / 2; i++) {
541*4882a593Smuzhiyun es7243e_update_bits(0x0b, 0xc0, 0xc0, i2c_clt[i]); //mute SDP
542*4882a593Smuzhiyun /*
543*4882a593Smuzhiyun * disable mic input 1
544*4882a593Smuzhiyun */
545*4882a593Smuzhiyun es7243e_read(0x20, ®v, i2c_clt[i]);
546*4882a593Smuzhiyun regv &= 0xef;
547*4882a593Smuzhiyun es7243e_write(0x20, regv, i2c_clt[i]);
548*4882a593Smuzhiyun /*
549*4882a593Smuzhiyun * disable mic input 2
550*4882a593Smuzhiyun */
551*4882a593Smuzhiyun es7243e_read(0x21, ®v, i2c_clt[i]);
552*4882a593Smuzhiyun regv &= 0xef;
553*4882a593Smuzhiyun es7243e_write(0x21, regv, i2c_clt[i]);
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun es7243e_write(0x16, 0xff, i2c_clt[i]); //power down analog
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun /*
558*4882a593Smuzhiyun * disable clock
559*4882a593Smuzhiyun */
560*4882a593Smuzhiyun es7243e_read(0x01, ®v, i2c_clt[i]);
561*4882a593Smuzhiyun regv &= 0xf5;
562*4882a593Smuzhiyun es7243e_write(0x01, regv, i2c_clt[i]);
563*4882a593Smuzhiyun }
564*4882a593Smuzhiyun break;
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun //codec->dapm.bias_level = level;
567*4882a593Smuzhiyun return 0;
568*4882a593Smuzhiyun }
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun /*
571*4882a593Smuzhiyun * snd_controls for PGA gain, Mute, suspend and resume
572*4882a593Smuzhiyun */
573*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(mic_boost_tlv, 0, 300, 0);
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 0
576*4882a593Smuzhiyun static int
es7243e_micboost1_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)577*4882a593Smuzhiyun es7243e_micboost1_setting_set(struct snd_kcontrol *kcontrol,
578*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
579*4882a593Smuzhiyun {
580*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x0F,
581*4882a593Smuzhiyun ucontrol->value.integer.value[0] & 0x0f,
582*4882a593Smuzhiyun i2c_clt[0]);
583*4882a593Smuzhiyun return 0;
584*4882a593Smuzhiyun }
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun static int
es7243e_micboost1_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)587*4882a593Smuzhiyun es7243e_micboost1_setting_get(struct snd_kcontrol *kcontrol,
588*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
589*4882a593Smuzhiyun {
590*4882a593Smuzhiyun u8 val = 0;
591*4882a593Smuzhiyun es7243e_read(0x20, &val, i2c_clt[0]);
592*4882a593Smuzhiyun ucontrol->value.integer.value[0] = val & 0x0f;
593*4882a593Smuzhiyun return 0;
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun static int
es7243e_micboost2_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)597*4882a593Smuzhiyun es7243e_micboost2_setting_set(struct snd_kcontrol *kcontrol,
598*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
599*4882a593Smuzhiyun {
600*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x0F,
601*4882a593Smuzhiyun ucontrol->value.integer.value[0] & 0x0f,
602*4882a593Smuzhiyun i2c_clt[0]);
603*4882a593Smuzhiyun return 0;
604*4882a593Smuzhiyun }
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun static int
es7243e_micboost2_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)607*4882a593Smuzhiyun es7243e_micboost2_setting_get(struct snd_kcontrol *kcontrol,
608*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
609*4882a593Smuzhiyun {
610*4882a593Smuzhiyun u8 val = 0;
611*4882a593Smuzhiyun es7243e_read(0x21, &val, i2c_clt[0]);
612*4882a593Smuzhiyun ucontrol->value.integer.value[0] = val & 0x0f;
613*4882a593Smuzhiyun return 0;
614*4882a593Smuzhiyun }
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun static int
es7243e_adc1_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)617*4882a593Smuzhiyun es7243e_adc1_mute_set(struct snd_kcontrol *kcontrol,
618*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
619*4882a593Smuzhiyun {
620*4882a593Smuzhiyun es7243e_update_bits(0x0B, 0x40,
621*4882a593Smuzhiyun (ucontrol->value.integer.value[0] & 0x01) << 6,
622*4882a593Smuzhiyun i2c_clt[0]);
623*4882a593Smuzhiyun return 0;
624*4882a593Smuzhiyun }
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun static int
es7243e_adc1_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)627*4882a593Smuzhiyun es7243e_adc1_mute_get(struct snd_kcontrol *kcontrol,
628*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
629*4882a593Smuzhiyun {
630*4882a593Smuzhiyun u8 val = 0;
631*4882a593Smuzhiyun es7243e_read(0x0B, &val, i2c_clt[0]);
632*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x40) >> 6;
633*4882a593Smuzhiyun return 0;
634*4882a593Smuzhiyun }
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun static int
es7243e_adc2_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)637*4882a593Smuzhiyun es7243e_adc2_mute_set(struct snd_kcontrol *kcontrol,
638*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
639*4882a593Smuzhiyun {
640*4882a593Smuzhiyun es7243e_update_bits(0x0B, 0x80,
641*4882a593Smuzhiyun (ucontrol->value.integer.value[0] & 0x01) << 7,
642*4882a593Smuzhiyun i2c_clt[0]);
643*4882a593Smuzhiyun return 0;
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun static int
es7243e_adc2_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)647*4882a593Smuzhiyun es7243e_adc2_mute_get(struct snd_kcontrol *kcontrol,
648*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
649*4882a593Smuzhiyun {
650*4882a593Smuzhiyun u8 val = 0;
651*4882a593Smuzhiyun es7243e_read(0x0B, &val, i2c_clt[0]);
652*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x80) >> 7;
653*4882a593Smuzhiyun return 0;
654*4882a593Smuzhiyun }
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun static int
es7243e_adc1adc2_suspend_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)657*4882a593Smuzhiyun es7243e_adc1adc2_suspend_get(struct snd_kcontrol *kcontrol,
658*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
659*4882a593Smuzhiyun {
660*4882a593Smuzhiyun u8 val = 0;
661*4882a593Smuzhiyun es7243e_read(0x17, &val, i2c_clt[0]);
662*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x02) >> 1;
663*4882a593Smuzhiyun return 0;
664*4882a593Smuzhiyun }
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun static int
es7243e_adc1adc2_suspend_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)667*4882a593Smuzhiyun es7243e_adc1adc2_suspend_set(struct snd_kcontrol *kcontrol,
668*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
669*4882a593Smuzhiyun {
670*4882a593Smuzhiyun //u8 val;
671*4882a593Smuzhiyun if ((ucontrol->value.integer.value[0] & 0x01) == 1) { //suspend
672*4882a593Smuzhiyun es7243e_write(0x04, 0x02, i2c_clt[0]);
673*4882a593Smuzhiyun es7243e_write(0x04, 0x01, i2c_clt[0]);
674*4882a593Smuzhiyun es7243e_write(0xf7, 0x30, i2c_clt[0]);
675*4882a593Smuzhiyun es7243e_write(0xf9, 0x01, i2c_clt[0]);
676*4882a593Smuzhiyun es7243e_write(0x16, 0xff, i2c_clt[0]);
677*4882a593Smuzhiyun es7243e_write(0x17, 0x00, i2c_clt[0]);
678*4882a593Smuzhiyun es7243e_write(0x01, 0x38, i2c_clt[0]);
679*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x10, 0x00, i2c_clt[0]);
680*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x10, 0x00, i2c_clt[0]);
681*4882a593Smuzhiyun es7243e_write(0x00, 0x8e, i2c_clt[0]);
682*4882a593Smuzhiyun es7243e_write(0x01, 0x30, i2c_clt[0]);
683*4882a593Smuzhiyun } else { //resume
684*4882a593Smuzhiyun es7243e_write(0x01, 0x3a, i2c_clt[0]);
685*4882a593Smuzhiyun es7243e_write(0x00, 0x80, i2c_clt[0]);
686*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x10, 0x10, i2c_clt[0]);
687*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x10, 0x10, i2c_clt[0]);
688*4882a593Smuzhiyun es7243e_write(0x16, 0x00, i2c_clt[0]);
689*4882a593Smuzhiyun es7243e_write(0x17, 0x02, i2c_clt[0]);
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun return 0;
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun #endif
694*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 2
695*4882a593Smuzhiyun static int
es7243e_micboost3_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)696*4882a593Smuzhiyun es7243e_micboost3_setting_set(struct snd_kcontrol *kcontrol,
697*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
698*4882a593Smuzhiyun {
699*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x0F,
700*4882a593Smuzhiyun ucontrol->value.integer.value[0] & 0x0f,
701*4882a593Smuzhiyun i2c_clt[1]);
702*4882a593Smuzhiyun return 0;
703*4882a593Smuzhiyun }
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun static int
es7243e_micboost3_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)706*4882a593Smuzhiyun es7243e_micboost3_setting_get(struct snd_kcontrol *kcontrol,
707*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
708*4882a593Smuzhiyun {
709*4882a593Smuzhiyun u8 val = 0;
710*4882a593Smuzhiyun es7243e_read(0x20, &val, i2c_clt[1]);
711*4882a593Smuzhiyun ucontrol->value.integer.value[0] = val & 0x0f;
712*4882a593Smuzhiyun return 0;
713*4882a593Smuzhiyun }
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun static int
es7243e_micboost4_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)716*4882a593Smuzhiyun es7243e_micboost4_setting_set(struct snd_kcontrol *kcontrol,
717*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
718*4882a593Smuzhiyun {
719*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x0F,
720*4882a593Smuzhiyun ucontrol->value.integer.value[0] & 0x0f,
721*4882a593Smuzhiyun i2c_clt[1]);
722*4882a593Smuzhiyun return 0;
723*4882a593Smuzhiyun }
724*4882a593Smuzhiyun
725*4882a593Smuzhiyun static int
es7243e_micboost4_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)726*4882a593Smuzhiyun es7243e_micboost4_setting_get(struct snd_kcontrol *kcontrol,
727*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
728*4882a593Smuzhiyun {
729*4882a593Smuzhiyun u8 val = 0;
730*4882a593Smuzhiyun es7243e_read(0x21, &val, i2c_clt[1]);
731*4882a593Smuzhiyun ucontrol->value.integer.value[0] = val & 0x0f;
732*4882a593Smuzhiyun return 0;
733*4882a593Smuzhiyun }
734*4882a593Smuzhiyun
735*4882a593Smuzhiyun static int
es7243e_adc3_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)736*4882a593Smuzhiyun es7243e_adc3_mute_set(struct snd_kcontrol *kcontrol,
737*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
738*4882a593Smuzhiyun {
739*4882a593Smuzhiyun es7243e_update_bits(0x0B, 0x40,
740*4882a593Smuzhiyun (ucontrol->value.integer.value[0] & 0x01) << 6,
741*4882a593Smuzhiyun i2c_clt[1]);
742*4882a593Smuzhiyun return 0;
743*4882a593Smuzhiyun }
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun static int
es7243e_adc3_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)746*4882a593Smuzhiyun es7243e_adc3_mute_get(struct snd_kcontrol *kcontrol,
747*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
748*4882a593Smuzhiyun {
749*4882a593Smuzhiyun u8 val = 0;
750*4882a593Smuzhiyun es7243e_read(0x0B, &val, i2c_clt[1]);
751*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0X40) >> 6;
752*4882a593Smuzhiyun return 0;
753*4882a593Smuzhiyun }
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun static int
es7243e_adc4_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)756*4882a593Smuzhiyun es7243e_adc4_mute_set(struct snd_kcontrol *kcontrol,
757*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
758*4882a593Smuzhiyun {
759*4882a593Smuzhiyun es7243e_update_bits(0x0B, 0x80,
760*4882a593Smuzhiyun (ucontrol->value.integer.value[0] & 0x01) << 7,
761*4882a593Smuzhiyun i2c_clt[1]);
762*4882a593Smuzhiyun return 0;
763*4882a593Smuzhiyun }
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun static int
es7243e_adc4_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)766*4882a593Smuzhiyun es7243e_adc4_mute_get(struct snd_kcontrol *kcontrol,
767*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
768*4882a593Smuzhiyun {
769*4882a593Smuzhiyun u8 val = 0;
770*4882a593Smuzhiyun es7243e_read(0x0B, &val, i2c_clt[1]);
771*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x80) >> 7;
772*4882a593Smuzhiyun return 0;
773*4882a593Smuzhiyun }
774*4882a593Smuzhiyun
775*4882a593Smuzhiyun static int
es7243e_adc3adc4_suspend_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)776*4882a593Smuzhiyun es7243e_adc3adc4_suspend_get(struct snd_kcontrol *kcontrol,
777*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
778*4882a593Smuzhiyun {
779*4882a593Smuzhiyun u8 val = 0;
780*4882a593Smuzhiyun es7243e_read(0x17, &val, i2c_clt[1]);
781*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x02) >> 1;
782*4882a593Smuzhiyun return 0;
783*4882a593Smuzhiyun }
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun static int
es7243e_adc3adc4_suspend_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)786*4882a593Smuzhiyun es7243e_adc3adc4_suspend_set(struct snd_kcontrol *kcontrol,
787*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
788*4882a593Smuzhiyun {
789*4882a593Smuzhiyun //u8 val;
790*4882a593Smuzhiyun if ((ucontrol->value.integer.value[0] & 0x01) == 1) { //suspend
791*4882a593Smuzhiyun es7243e_write(0x04, 0x02, i2c_clt[1]);
792*4882a593Smuzhiyun es7243e_write(0x04, 0x01, i2c_clt[1]);
793*4882a593Smuzhiyun es7243e_write(0xf7, 0x30, i2c_clt[1]);
794*4882a593Smuzhiyun es7243e_write(0xf9, 0x01, i2c_clt[1]);
795*4882a593Smuzhiyun es7243e_write(0x16, 0xff, i2c_clt[1]);
796*4882a593Smuzhiyun es7243e_write(0x17, 0x00, i2c_clt[1]);
797*4882a593Smuzhiyun es7243e_write(0x01, 0x38, i2c_clt[1]);
798*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x10, 0x00, i2c_clt[1]);
799*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x10, 0x00, i2c_clt[1]);
800*4882a593Smuzhiyun es7243e_write(0x00, 0x8e, i2c_clt[1]);
801*4882a593Smuzhiyun es7243e_write(0x01, 0x30, i2c_clt[1]);
802*4882a593Smuzhiyun } else { //resume
803*4882a593Smuzhiyun es7243e_write(0x01, 0x3a, i2c_clt[1]);
804*4882a593Smuzhiyun es7243e_write(0x00, 0x80, i2c_clt[1]);
805*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x10, 0x10, i2c_clt[1]);
806*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x10, 0x10, i2c_clt[1]);
807*4882a593Smuzhiyun es7243e_write(0x16, 0x00, i2c_clt[1]);
808*4882a593Smuzhiyun es7243e_write(0x17, 0x02, i2c_clt[1]);
809*4882a593Smuzhiyun }
810*4882a593Smuzhiyun return 0;
811*4882a593Smuzhiyun }
812*4882a593Smuzhiyun #endif
813*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 4
814*4882a593Smuzhiyun static int
es7243e_micboost5_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)815*4882a593Smuzhiyun es7243e_micboost5_setting_set(struct snd_kcontrol *kcontrol,
816*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
817*4882a593Smuzhiyun {
818*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x0F,
819*4882a593Smuzhiyun ucontrol->value.integer.value[0] & 0x0f,
820*4882a593Smuzhiyun i2c_clt[2]);
821*4882a593Smuzhiyun return 0;
822*4882a593Smuzhiyun }
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun static int
es7243e_micboost5_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)825*4882a593Smuzhiyun es7243e_micboost5_setting_get(struct snd_kcontrol *kcontrol,
826*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
827*4882a593Smuzhiyun {
828*4882a593Smuzhiyun u8 val = 0;
829*4882a593Smuzhiyun es7243e_read(0x20, &val, i2c_clt[2]);
830*4882a593Smuzhiyun ucontrol->value.integer.value[0] = val & 0x0f;
831*4882a593Smuzhiyun return 0;
832*4882a593Smuzhiyun }
833*4882a593Smuzhiyun
834*4882a593Smuzhiyun static int
es7243e_micboost6_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)835*4882a593Smuzhiyun es7243e_micboost6_setting_set(struct snd_kcontrol *kcontrol,
836*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
837*4882a593Smuzhiyun {
838*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x0F,
839*4882a593Smuzhiyun ucontrol->value.integer.value[0] & 0x0f,
840*4882a593Smuzhiyun i2c_clt[2]);
841*4882a593Smuzhiyun return 0;
842*4882a593Smuzhiyun }
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun static int
es7243e_micboost6_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)845*4882a593Smuzhiyun es7243e_micboost6_setting_get(struct snd_kcontrol *kcontrol,
846*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
847*4882a593Smuzhiyun {
848*4882a593Smuzhiyun u8 val = 0;
849*4882a593Smuzhiyun es7243e_read(0x21, &val, i2c_clt[2]);
850*4882a593Smuzhiyun ucontrol->value.integer.value[0] = val & 0x0f;
851*4882a593Smuzhiyun return 0;
852*4882a593Smuzhiyun }
853*4882a593Smuzhiyun
854*4882a593Smuzhiyun static int
es7243e_adc5_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)855*4882a593Smuzhiyun es7243e_adc5_mute_set(struct snd_kcontrol *kcontrol,
856*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
857*4882a593Smuzhiyun {
858*4882a593Smuzhiyun es7243e_update_bits(0x0B, 0x40,
859*4882a593Smuzhiyun (ucontrol->value.integer.value[0] & 0x01) << 6,
860*4882a593Smuzhiyun i2c_clt[2]);
861*4882a593Smuzhiyun return 0;
862*4882a593Smuzhiyun }
863*4882a593Smuzhiyun
864*4882a593Smuzhiyun static int
es7243e_adc5_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)865*4882a593Smuzhiyun es7243e_adc5_mute_get(struct snd_kcontrol *kcontrol,
866*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
867*4882a593Smuzhiyun {
868*4882a593Smuzhiyun u8 val = 0;
869*4882a593Smuzhiyun es7243e_read(0x0B, &val, i2c_clt[2]);
870*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x40) >> 6;
871*4882a593Smuzhiyun return 0;
872*4882a593Smuzhiyun }
873*4882a593Smuzhiyun
874*4882a593Smuzhiyun static int
es7243e_adc6_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)875*4882a593Smuzhiyun es7243e_adc6_mute_set(struct snd_kcontrol *kcontrol,
876*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
877*4882a593Smuzhiyun {
878*4882a593Smuzhiyun es7243e_update_bits(0x0B, 0x80,
879*4882a593Smuzhiyun (ucontrol->value.integer.value[0] & 0x01) << 7,
880*4882a593Smuzhiyun i2c_clt[2]);
881*4882a593Smuzhiyun return 0;
882*4882a593Smuzhiyun }
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun static int
es7243e_adc6_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)885*4882a593Smuzhiyun es7243e_adc6_mute_get(struct snd_kcontrol *kcontrol,
886*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
887*4882a593Smuzhiyun {
888*4882a593Smuzhiyun u8 val = 0;
889*4882a593Smuzhiyun es7243e_read(0x0B, &val, i2c_clt[2]);
890*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x80) >> 7;
891*4882a593Smuzhiyun return 0;
892*4882a593Smuzhiyun }
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun static int
es7243e_adc5adc6_suspend_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)895*4882a593Smuzhiyun es7243e_adc5adc6_suspend_get(struct snd_kcontrol *kcontrol,
896*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
897*4882a593Smuzhiyun {
898*4882a593Smuzhiyun u8 val = 0;
899*4882a593Smuzhiyun es7243e_read(0x17, &val, i2c_clt[2]);
900*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x02) >> 1;
901*4882a593Smuzhiyun return 0;
902*4882a593Smuzhiyun }
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun static int
es7243e_adc5adc6_suspend_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)905*4882a593Smuzhiyun es7243e_adc5adc6_suspend_set(struct snd_kcontrol *kcontrol,
906*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
907*4882a593Smuzhiyun {
908*4882a593Smuzhiyun //u8 val;
909*4882a593Smuzhiyun if ((ucontrol->value.integer.value[0] & 0x01) == 1) { //suspend
910*4882a593Smuzhiyun es7243e_write(0x04, 0x02, i2c_clt[2]);
911*4882a593Smuzhiyun es7243e_write(0x04, 0x01, i2c_clt[2]);
912*4882a593Smuzhiyun es7243e_write(0xf7, 0x30, i2c_clt[2]);
913*4882a593Smuzhiyun es7243e_write(0xf9, 0x01, i2c_clt[2]);
914*4882a593Smuzhiyun es7243e_write(0x16, 0xff, i2c_clt[2]);
915*4882a593Smuzhiyun es7243e_write(0x17, 0x00, i2c_clt[2]);
916*4882a593Smuzhiyun es7243e_write(0x01, 0x38, i2c_clt[2]);
917*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x10, 0x00, i2c_clt[2]);
918*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x10, 0x00, i2c_clt[2]);
919*4882a593Smuzhiyun es7243e_write(0x00, 0x8e, i2c_clt[2]);
920*4882a593Smuzhiyun es7243e_write(0x01, 0x30, i2c_clt[2]);
921*4882a593Smuzhiyun } else { //resume
922*4882a593Smuzhiyun es7243e_write(0x01, 0x3a, i2c_clt[2]);
923*4882a593Smuzhiyun es7243e_write(0x00, 0x80, i2c_clt[2]);
924*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x10, 0x10, i2c_clt[2]);
925*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x10, 0x10, i2c_clt[2]);
926*4882a593Smuzhiyun es7243e_write(0x16, 0x00, i2c_clt[2]);
927*4882a593Smuzhiyun es7243e_write(0x17, 0x02, i2c_clt[2]);
928*4882a593Smuzhiyun }
929*4882a593Smuzhiyun return 0;
930*4882a593Smuzhiyun }
931*4882a593Smuzhiyun #endif
932*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 6
933*4882a593Smuzhiyun static int
es7243e_micboost7_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)934*4882a593Smuzhiyun es7243e_micboost7_setting_set(struct snd_kcontrol *kcontrol,
935*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
936*4882a593Smuzhiyun {
937*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x0F,
938*4882a593Smuzhiyun ucontrol->value.integer.value[0] & 0x0f,
939*4882a593Smuzhiyun i2c_clt[3]);
940*4882a593Smuzhiyun return 0;
941*4882a593Smuzhiyun }
942*4882a593Smuzhiyun
943*4882a593Smuzhiyun static int
es7243e_micboost7_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)944*4882a593Smuzhiyun es7243e_micboost7_setting_get(struct snd_kcontrol *kcontrol,
945*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
946*4882a593Smuzhiyun {
947*4882a593Smuzhiyun u8 val = 0;
948*4882a593Smuzhiyun es7243e_read(0x20, &val, i2c_clt[3]);
949*4882a593Smuzhiyun ucontrol->value.integer.value[0] = val & 0x0f;
950*4882a593Smuzhiyun return 0;
951*4882a593Smuzhiyun }
952*4882a593Smuzhiyun
953*4882a593Smuzhiyun static int
es7243e_micboost8_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)954*4882a593Smuzhiyun es7243e_micboost8_setting_set(struct snd_kcontrol *kcontrol,
955*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
956*4882a593Smuzhiyun {
957*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x0F,
958*4882a593Smuzhiyun ucontrol->value.integer.value[0] & 0x0f,
959*4882a593Smuzhiyun i2c_clt[3]);
960*4882a593Smuzhiyun return 0;
961*4882a593Smuzhiyun }
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun static int
es7243e_micboost8_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)964*4882a593Smuzhiyun es7243e_micboost8_setting_get(struct snd_kcontrol *kcontrol,
965*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
966*4882a593Smuzhiyun {
967*4882a593Smuzhiyun u8 val = 0;
968*4882a593Smuzhiyun es7243e_read(0x21, &val, i2c_clt[3]);
969*4882a593Smuzhiyun ucontrol->value.integer.value[0] = val & 0x0f;
970*4882a593Smuzhiyun return 0;
971*4882a593Smuzhiyun }
972*4882a593Smuzhiyun
973*4882a593Smuzhiyun static int
es7243e_adc7_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)974*4882a593Smuzhiyun es7243e_adc7_mute_set(struct snd_kcontrol *kcontrol,
975*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
976*4882a593Smuzhiyun {
977*4882a593Smuzhiyun es7243e_update_bits(0x0B, 0x40,
978*4882a593Smuzhiyun (ucontrol->value.integer.value[0] & 0x01) << 6,
979*4882a593Smuzhiyun i2c_clt[3]);
980*4882a593Smuzhiyun return 0;
981*4882a593Smuzhiyun }
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun static int
es7243e_adc7_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)984*4882a593Smuzhiyun es7243e_adc7_mute_get(struct snd_kcontrol *kcontrol,
985*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
986*4882a593Smuzhiyun {
987*4882a593Smuzhiyun u8 val = 0;
988*4882a593Smuzhiyun es7243e_read(0x0B, &val, i2c_clt[3]);
989*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x40) >> 6;
990*4882a593Smuzhiyun return 0;
991*4882a593Smuzhiyun }
992*4882a593Smuzhiyun
993*4882a593Smuzhiyun static int
es7243e_adc8_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)994*4882a593Smuzhiyun es7243e_adc8_mute_set(struct snd_kcontrol *kcontrol,
995*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
996*4882a593Smuzhiyun {
997*4882a593Smuzhiyun es7243e_update_bits(0x0B, 0x80,
998*4882a593Smuzhiyun (ucontrol->value.integer.value[0] & 0x01) << 7,
999*4882a593Smuzhiyun i2c_clt[3]);
1000*4882a593Smuzhiyun return 0;
1001*4882a593Smuzhiyun }
1002*4882a593Smuzhiyun
1003*4882a593Smuzhiyun static int
es7243e_adc8_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1004*4882a593Smuzhiyun es7243e_adc8_mute_get(struct snd_kcontrol *kcontrol,
1005*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1006*4882a593Smuzhiyun {
1007*4882a593Smuzhiyun u8 val = 0;
1008*4882a593Smuzhiyun es7243e_read(0x0B, &val, i2c_clt[3]);
1009*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x80) >> 7;
1010*4882a593Smuzhiyun return 0;
1011*4882a593Smuzhiyun }
1012*4882a593Smuzhiyun
1013*4882a593Smuzhiyun static int
es7243e_adc7adc8_suspend_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1014*4882a593Smuzhiyun es7243e_adc7adc8_suspend_get(struct snd_kcontrol *kcontrol,
1015*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1016*4882a593Smuzhiyun {
1017*4882a593Smuzhiyun u8 val = 0;
1018*4882a593Smuzhiyun es7243e_read(0x17, &val, i2c_clt[3]);
1019*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x02) >> 2;
1020*4882a593Smuzhiyun return 0;
1021*4882a593Smuzhiyun }
1022*4882a593Smuzhiyun
1023*4882a593Smuzhiyun static int
es7243e_adc7adc8_suspend_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1024*4882a593Smuzhiyun es7243e_adc7adc8_suspend_set(struct snd_kcontrol *kcontrol,
1025*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1026*4882a593Smuzhiyun {
1027*4882a593Smuzhiyun // u8 val;
1028*4882a593Smuzhiyun if ((ucontrol->value.integer.value[0] & 0x01) == 1) { //suspend
1029*4882a593Smuzhiyun es7243e_write(0x04, 0x02, i2c_clt[3]);
1030*4882a593Smuzhiyun es7243e_write(0x04, 0x01, i2c_clt[3]);
1031*4882a593Smuzhiyun es7243e_write(0xf7, 0x30, i2c_clt[3]);
1032*4882a593Smuzhiyun es7243e_write(0xf9, 0x01, i2c_clt[3]);
1033*4882a593Smuzhiyun es7243e_write(0x16, 0xff, i2c_clt[3]);
1034*4882a593Smuzhiyun es7243e_write(0x17, 0x00, i2c_clt[3]);
1035*4882a593Smuzhiyun es7243e_write(0x01, 0x38, i2c_clt[3]);
1036*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x10, 0x00, i2c_clt[3]);
1037*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x10, 0x00, i2c_clt[3]);
1038*4882a593Smuzhiyun es7243e_write(0x00, 0x8e, i2c_clt[3]);
1039*4882a593Smuzhiyun es7243e_write(0x01, 0x30, i2c_clt[3]);
1040*4882a593Smuzhiyun } else { //resume
1041*4882a593Smuzhiyun es7243e_write(0x01, 0x3a, i2c_clt[3]);
1042*4882a593Smuzhiyun es7243e_write(0x00, 0x80, i2c_clt[3]);
1043*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x10, 0x10, i2c_clt[3]);
1044*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x10, 0x10, i2c_clt[3]);
1045*4882a593Smuzhiyun es7243e_write(0x16, 0x00, i2c_clt[3]);
1046*4882a593Smuzhiyun es7243e_write(0x17, 0x02, i2c_clt[3]);
1047*4882a593Smuzhiyun }
1048*4882a593Smuzhiyun return 0;
1049*4882a593Smuzhiyun }
1050*4882a593Smuzhiyun #endif
1051*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 8
1052*4882a593Smuzhiyun static int
es7243e_micboost9_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1053*4882a593Smuzhiyun es7243e_micboost9_setting_set(struct snd_kcontrol *kcontrol,
1054*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1055*4882a593Smuzhiyun {
1056*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x0F,
1057*4882a593Smuzhiyun ucontrol->value.integer.value[0] & 0x0f,
1058*4882a593Smuzhiyun i2c_clt[4]);
1059*4882a593Smuzhiyun return 0;
1060*4882a593Smuzhiyun }
1061*4882a593Smuzhiyun
1062*4882a593Smuzhiyun static int
es7243e_micboost9_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1063*4882a593Smuzhiyun es7243e_micboost9_setting_get(struct snd_kcontrol *kcontrol,
1064*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1065*4882a593Smuzhiyun {
1066*4882a593Smuzhiyun u8 val = 0;
1067*4882a593Smuzhiyun es7243e_read(0x20, &val, i2c_clt[4]);
1068*4882a593Smuzhiyun ucontrol->value.integer.value[0] = val & 0x0f;
1069*4882a593Smuzhiyun return 0;
1070*4882a593Smuzhiyun }
1071*4882a593Smuzhiyun
1072*4882a593Smuzhiyun static int
es7243e_micboost10_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1073*4882a593Smuzhiyun es7243e_micboost10_setting_set(struct snd_kcontrol *kcontrol,
1074*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1075*4882a593Smuzhiyun {
1076*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x0F,
1077*4882a593Smuzhiyun ucontrol->value.integer.value[0] & 0x0f,
1078*4882a593Smuzhiyun i2c_clt[4]);
1079*4882a593Smuzhiyun return 0;
1080*4882a593Smuzhiyun }
1081*4882a593Smuzhiyun
1082*4882a593Smuzhiyun static int
es7243e_micboost10_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1083*4882a593Smuzhiyun es7243e_micboost10_setting_get(struct snd_kcontrol *kcontrol,
1084*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1085*4882a593Smuzhiyun {
1086*4882a593Smuzhiyun u8 val = 0;
1087*4882a593Smuzhiyun es7243e_read(0x21, &val, i2c_clt[4]);
1088*4882a593Smuzhiyun ucontrol->value.integer.value[0] = val & 0x0f;
1089*4882a593Smuzhiyun return 0;
1090*4882a593Smuzhiyun }
1091*4882a593Smuzhiyun
1092*4882a593Smuzhiyun static int
es7243e_adc9_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1093*4882a593Smuzhiyun es7243e_adc9_mute_set(struct snd_kcontrol *kcontrol,
1094*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1095*4882a593Smuzhiyun {
1096*4882a593Smuzhiyun es7243e_update_bits(0x0B, 0x40,
1097*4882a593Smuzhiyun (ucontrol->value.integer.value[0] & 0x01) << 6,
1098*4882a593Smuzhiyun i2c_clt[4]);
1099*4882a593Smuzhiyun return 0;
1100*4882a593Smuzhiyun }
1101*4882a593Smuzhiyun
1102*4882a593Smuzhiyun static int
es7243e_adc9_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1103*4882a593Smuzhiyun es7243e_adc9_mute_get(struct snd_kcontrol *kcontrol,
1104*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1105*4882a593Smuzhiyun {
1106*4882a593Smuzhiyun u8 val = 0;
1107*4882a593Smuzhiyun es7243e_read(0x0B, &val, i2c_clt[4]);
1108*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x40) >> 6;
1109*4882a593Smuzhiyun return 0;
1110*4882a593Smuzhiyun }
1111*4882a593Smuzhiyun
1112*4882a593Smuzhiyun static int
es7243e_adc10_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1113*4882a593Smuzhiyun es7243e_adc10_mute_set(struct snd_kcontrol *kcontrol,
1114*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1115*4882a593Smuzhiyun {
1116*4882a593Smuzhiyun es7243e_update_bits(0x0B, 0x80,
1117*4882a593Smuzhiyun (ucontrol->value.integer.value[0] & 0x01) << 7,
1118*4882a593Smuzhiyun i2c_clt[4]);
1119*4882a593Smuzhiyun return 0;
1120*4882a593Smuzhiyun }
1121*4882a593Smuzhiyun
1122*4882a593Smuzhiyun static int
es7243e_adc10_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1123*4882a593Smuzhiyun es7243e_adc10_mute_get(struct snd_kcontrol *kcontrol,
1124*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1125*4882a593Smuzhiyun {
1126*4882a593Smuzhiyun u8 val = 0;
1127*4882a593Smuzhiyun es7243e_read(0x0B, &val, i2c_clt[4]);
1128*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x80) >> 7;
1129*4882a593Smuzhiyun return 0;
1130*4882a593Smuzhiyun }
1131*4882a593Smuzhiyun
1132*4882a593Smuzhiyun static int
es7243e_adc9adc10_suspend_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1133*4882a593Smuzhiyun es7243e_adc9adc10_suspend_get(struct snd_kcontrol *kcontrol,
1134*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1135*4882a593Smuzhiyun {
1136*4882a593Smuzhiyun u8 val = 0;
1137*4882a593Smuzhiyun es7243e_read(0x17, &val, i2c_clt[4]);
1138*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x02) >> 2;
1139*4882a593Smuzhiyun return 0;
1140*4882a593Smuzhiyun }
1141*4882a593Smuzhiyun
1142*4882a593Smuzhiyun static int
es7243e_adc9adc10_suspend_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1143*4882a593Smuzhiyun es7243e_adc9adc10_suspend_set(struct snd_kcontrol *kcontrol,
1144*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1145*4882a593Smuzhiyun {
1146*4882a593Smuzhiyun // u8 val;
1147*4882a593Smuzhiyun if ((ucontrol->value.integer.value[0] & 0x01) == 1) { //suspend
1148*4882a593Smuzhiyun es7243e_write(0x04, 0x02, i2c_clt[4]);
1149*4882a593Smuzhiyun es7243e_write(0x04, 0x01, i2c_clt[4]);
1150*4882a593Smuzhiyun es7243e_write(0xf7, 0x30, i2c_clt[4]);
1151*4882a593Smuzhiyun es7243e_write(0xf9, 0x01, i2c_clt[4]);
1152*4882a593Smuzhiyun es7243e_write(0x16, 0xff, i2c_clt[4]);
1153*4882a593Smuzhiyun es7243e_write(0x17, 0x00, i2c_clt[4]);
1154*4882a593Smuzhiyun es7243e_write(0x01, 0x38, i2c_clt[4]);
1155*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x10, 0x00, i2c_clt[4]);
1156*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x10, 0x00, i2c_clt[4]);
1157*4882a593Smuzhiyun es7243e_write(0x00, 0x8e, i2c_clt[4]);
1158*4882a593Smuzhiyun es7243e_write(0x01, 0x30, i2c_clt[4]);
1159*4882a593Smuzhiyun } else { //resume
1160*4882a593Smuzhiyun es7243e_write(0x01, 0x3a, i2c_clt[4]);
1161*4882a593Smuzhiyun es7243e_write(0x00, 0x80, i2c_clt[4]);
1162*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x10, 0x10, i2c_clt[4]);
1163*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x10, 0x10, i2c_clt[4]);
1164*4882a593Smuzhiyun es7243e_write(0x16, 0x00, i2c_clt[4]);
1165*4882a593Smuzhiyun es7243e_write(0x17, 0x02, i2c_clt[4]);
1166*4882a593Smuzhiyun }
1167*4882a593Smuzhiyun return 0;
1168*4882a593Smuzhiyun }
1169*4882a593Smuzhiyun #endif
1170*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 10
1171*4882a593Smuzhiyun static int
es7243e_micboost11_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1172*4882a593Smuzhiyun es7243e_micboost11_setting_set(struct snd_kcontrol *kcontrol,
1173*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1174*4882a593Smuzhiyun {
1175*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x0F,
1176*4882a593Smuzhiyun ucontrol->value.integer.value[0] & 0x0f,
1177*4882a593Smuzhiyun i2c_clt[5]);
1178*4882a593Smuzhiyun return 0;
1179*4882a593Smuzhiyun }
1180*4882a593Smuzhiyun
1181*4882a593Smuzhiyun static int
es7243e_micboost11_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1182*4882a593Smuzhiyun es7243e_micboost11_setting_get(struct snd_kcontrol *kcontrol,
1183*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1184*4882a593Smuzhiyun {
1185*4882a593Smuzhiyun u8 val = 0;
1186*4882a593Smuzhiyun es7243e_read(0x20, &val, i2c_clt[5]);
1187*4882a593Smuzhiyun ucontrol->value.integer.value[0] = val & 0x0f;
1188*4882a593Smuzhiyun return 0;
1189*4882a593Smuzhiyun }
1190*4882a593Smuzhiyun
1191*4882a593Smuzhiyun static int
es7243e_micboost12_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1192*4882a593Smuzhiyun es7243e_micboost12_setting_set(struct snd_kcontrol *kcontrol,
1193*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1194*4882a593Smuzhiyun {
1195*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x0F,
1196*4882a593Smuzhiyun ucontrol->value.integer.value[0] & 0x0f,
1197*4882a593Smuzhiyun i2c_clt[5]);
1198*4882a593Smuzhiyun return 0;
1199*4882a593Smuzhiyun }
1200*4882a593Smuzhiyun
1201*4882a593Smuzhiyun static int
es7243e_micboost12_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1202*4882a593Smuzhiyun es7243e_micboost12_setting_get(struct snd_kcontrol *kcontrol,
1203*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1204*4882a593Smuzhiyun {
1205*4882a593Smuzhiyun u8 val = 0;
1206*4882a593Smuzhiyun es7243e_read(0x21, &val, i2c_clt[5]);
1207*4882a593Smuzhiyun ucontrol->value.integer.value[0] = val & 0x0f;
1208*4882a593Smuzhiyun return 0;
1209*4882a593Smuzhiyun }
1210*4882a593Smuzhiyun
1211*4882a593Smuzhiyun static int
es7243e_adc11_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1212*4882a593Smuzhiyun es7243e_adc11_mute_set(struct snd_kcontrol *kcontrol,
1213*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1214*4882a593Smuzhiyun {
1215*4882a593Smuzhiyun es7243e_update_bits(0x0B, 0x40,
1216*4882a593Smuzhiyun (ucontrol->value.integer.value[0] & 0x01) << 6,
1217*4882a593Smuzhiyun i2c_clt[5]);
1218*4882a593Smuzhiyun return 0;
1219*4882a593Smuzhiyun }
1220*4882a593Smuzhiyun
1221*4882a593Smuzhiyun static int
es7243e_adc11_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1222*4882a593Smuzhiyun es7243e_adc11_mute_get(struct snd_kcontrol *kcontrol,
1223*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1224*4882a593Smuzhiyun {
1225*4882a593Smuzhiyun u8 val = 0;
1226*4882a593Smuzhiyun es7243e_read(0x0B, &val, i2c_clt[5]);
1227*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x40) >> 6;
1228*4882a593Smuzhiyun return 0;
1229*4882a593Smuzhiyun }
1230*4882a593Smuzhiyun
1231*4882a593Smuzhiyun static int
es7243e_adc12_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1232*4882a593Smuzhiyun es7243e_adc12_mute_set(struct snd_kcontrol *kcontrol,
1233*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1234*4882a593Smuzhiyun {
1235*4882a593Smuzhiyun es7243e_update_bits(0x0B, 0x80,
1236*4882a593Smuzhiyun (ucontrol->value.integer.value[0] & 0x01) << 7,
1237*4882a593Smuzhiyun i2c_clt[5]);
1238*4882a593Smuzhiyun return 0;
1239*4882a593Smuzhiyun }
1240*4882a593Smuzhiyun
1241*4882a593Smuzhiyun static int
es7243e_adc12_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1242*4882a593Smuzhiyun es7243e_adc12_mute_get(struct snd_kcontrol *kcontrol,
1243*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1244*4882a593Smuzhiyun {
1245*4882a593Smuzhiyun u8 val = 0;
1246*4882a593Smuzhiyun es7243e_read(0x0B, &val, i2c_clt[5]);
1247*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x80) >> 7;
1248*4882a593Smuzhiyun return 0;
1249*4882a593Smuzhiyun }
1250*4882a593Smuzhiyun
1251*4882a593Smuzhiyun static int
es7243e_adc11adc12_suspend_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1252*4882a593Smuzhiyun es7243e_adc11adc12_suspend_get(struct snd_kcontrol *kcontrol,
1253*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1254*4882a593Smuzhiyun {
1255*4882a593Smuzhiyun u8 val = 0;
1256*4882a593Smuzhiyun es7243e_read(0x17, &val, i2c_clt[5]);
1257*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x02) >> 2;
1258*4882a593Smuzhiyun return 0;
1259*4882a593Smuzhiyun }
1260*4882a593Smuzhiyun
1261*4882a593Smuzhiyun static int
es7243e_adc11adc12_suspend_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1262*4882a593Smuzhiyun es7243e_adc11adc12_suspend_set(struct snd_kcontrol *kcontrol,
1263*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1264*4882a593Smuzhiyun {
1265*4882a593Smuzhiyun // u8 val;
1266*4882a593Smuzhiyun if ((ucontrol->value.integer.value[0] & 0x01) == 1) { //suspend
1267*4882a593Smuzhiyun es7243e_write(0x04, 0x02, i2c_clt[5]);
1268*4882a593Smuzhiyun es7243e_write(0x04, 0x01, i2c_clt[5]);
1269*4882a593Smuzhiyun es7243e_write(0xf7, 0x30, i2c_clt[5]);
1270*4882a593Smuzhiyun es7243e_write(0xf9, 0x01, i2c_clt[5]);
1271*4882a593Smuzhiyun es7243e_write(0x16, 0xff, i2c_clt[5]);
1272*4882a593Smuzhiyun es7243e_write(0x17, 0x00, i2c_clt[5]);
1273*4882a593Smuzhiyun es7243e_write(0x01, 0x38, i2c_clt[5]);
1274*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x10, 0x00, i2c_clt[5]);
1275*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x10, 0x00, i2c_clt[5]);
1276*4882a593Smuzhiyun es7243e_write(0x00, 0x8e, i2c_clt[5]);
1277*4882a593Smuzhiyun es7243e_write(0x01, 0x30, i2c_clt[5]);
1278*4882a593Smuzhiyun } else { //resume
1279*4882a593Smuzhiyun es7243e_write(0x01, 0x3a, i2c_clt[5]);
1280*4882a593Smuzhiyun es7243e_write(0x00, 0x80, i2c_clt[5]);
1281*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x10, 0x10, i2c_clt[5]);
1282*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x10, 0x10, i2c_clt[5]);
1283*4882a593Smuzhiyun es7243e_write(0x16, 0x00, i2c_clt[5]);
1284*4882a593Smuzhiyun es7243e_write(0x17, 0x02, i2c_clt[5]);
1285*4882a593Smuzhiyun }
1286*4882a593Smuzhiyun return 0;
1287*4882a593Smuzhiyun }
1288*4882a593Smuzhiyun #endif
1289*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 12
1290*4882a593Smuzhiyun static int
es7243e_micboost13_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1291*4882a593Smuzhiyun es7243e_micboost13_setting_set(struct snd_kcontrol *kcontrol,
1292*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1293*4882a593Smuzhiyun {
1294*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x0F,
1295*4882a593Smuzhiyun ucontrol->value.integer.value[0] & 0x0f,
1296*4882a593Smuzhiyun i2c_clt[6]);
1297*4882a593Smuzhiyun return 0;
1298*4882a593Smuzhiyun }
1299*4882a593Smuzhiyun
1300*4882a593Smuzhiyun static int
es7243e_micboost13_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1301*4882a593Smuzhiyun es7243e_micboost13_setting_get(struct snd_kcontrol *kcontrol,
1302*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1303*4882a593Smuzhiyun {
1304*4882a593Smuzhiyun u8 val = 0;
1305*4882a593Smuzhiyun es7243e_read(0x20, &val, i2c_clt[6]);
1306*4882a593Smuzhiyun ucontrol->value.integer.value[0] = val & 0x0f;
1307*4882a593Smuzhiyun return 0;
1308*4882a593Smuzhiyun }
1309*4882a593Smuzhiyun
1310*4882a593Smuzhiyun static int
es7243e_micboost14_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1311*4882a593Smuzhiyun es7243e_micboost14_setting_set(struct snd_kcontrol *kcontrol,
1312*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1313*4882a593Smuzhiyun {
1314*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x0F,
1315*4882a593Smuzhiyun ucontrol->value.integer.value[0] & 0x0f,
1316*4882a593Smuzhiyun i2c_clt[6]);
1317*4882a593Smuzhiyun return 0;
1318*4882a593Smuzhiyun }
1319*4882a593Smuzhiyun
1320*4882a593Smuzhiyun static int
es7243e_micboost14_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1321*4882a593Smuzhiyun es7243e_micboost14_setting_get(struct snd_kcontrol *kcontrol,
1322*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1323*4882a593Smuzhiyun {
1324*4882a593Smuzhiyun u8 val = 0;
1325*4882a593Smuzhiyun es7243e_read(0x21, &val, i2c_clt[6]);
1326*4882a593Smuzhiyun ucontrol->value.integer.value[0] = val & 0x0f;
1327*4882a593Smuzhiyun return 0;
1328*4882a593Smuzhiyun }
1329*4882a593Smuzhiyun
1330*4882a593Smuzhiyun static int
es7243e_adc13_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1331*4882a593Smuzhiyun es7243e_adc13_mute_set(struct snd_kcontrol *kcontrol,
1332*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1333*4882a593Smuzhiyun {
1334*4882a593Smuzhiyun es7243e_update_bits(0x0B, 0x40,
1335*4882a593Smuzhiyun (ucontrol->value.integer.value[0] & 0x01) << 6,
1336*4882a593Smuzhiyun i2c_clt[6]);
1337*4882a593Smuzhiyun return 0;
1338*4882a593Smuzhiyun }
1339*4882a593Smuzhiyun
1340*4882a593Smuzhiyun static int
es7243e_adc13_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1341*4882a593Smuzhiyun es7243e_adc13_mute_get(struct snd_kcontrol *kcontrol,
1342*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1343*4882a593Smuzhiyun {
1344*4882a593Smuzhiyun u8 val = 0;
1345*4882a593Smuzhiyun es7243e_read(0x0B, &val, i2c_clt[6]);
1346*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x40) >> 6;
1347*4882a593Smuzhiyun return 0;
1348*4882a593Smuzhiyun }
1349*4882a593Smuzhiyun
1350*4882a593Smuzhiyun static int
es7243e_adc14_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1351*4882a593Smuzhiyun es7243e_adc14_mute_set(struct snd_kcontrol *kcontrol,
1352*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1353*4882a593Smuzhiyun {
1354*4882a593Smuzhiyun es7243e_update_bits(0x0B, 0x80,
1355*4882a593Smuzhiyun (ucontrol->value.integer.value[0] & 0x01) << 7,
1356*4882a593Smuzhiyun i2c_clt[6]);
1357*4882a593Smuzhiyun return 0;
1358*4882a593Smuzhiyun }
1359*4882a593Smuzhiyun
1360*4882a593Smuzhiyun static int
es7243e_adc14_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1361*4882a593Smuzhiyun es7243e_adc14_mute_get(struct snd_kcontrol *kcontrol,
1362*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1363*4882a593Smuzhiyun {
1364*4882a593Smuzhiyun u8 val = 0;
1365*4882a593Smuzhiyun es7243e_read(0x0B, &val, i2c_clt[6]);
1366*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x80) >> 7;
1367*4882a593Smuzhiyun return 0;
1368*4882a593Smuzhiyun }
1369*4882a593Smuzhiyun
1370*4882a593Smuzhiyun static int
es7243e_adc13adc14_suspend_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1371*4882a593Smuzhiyun es7243e_adc13adc14_suspend_get(struct snd_kcontrol *kcontrol,
1372*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1373*4882a593Smuzhiyun {
1374*4882a593Smuzhiyun u8 val = 0;
1375*4882a593Smuzhiyun es7243e_read(0x17, &val, i2c_clt[6]);
1376*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x02) >> 2;
1377*4882a593Smuzhiyun return 0;
1378*4882a593Smuzhiyun }
1379*4882a593Smuzhiyun
1380*4882a593Smuzhiyun static int
es7243e_adc13adc14_suspend_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1381*4882a593Smuzhiyun es7243e_adc13adc14_suspend_set(struct snd_kcontrol *kcontrol,
1382*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1383*4882a593Smuzhiyun {
1384*4882a593Smuzhiyun // u8 val;
1385*4882a593Smuzhiyun if ((ucontrol->value.integer.value[0] & 0x01) == 1) { //suspend
1386*4882a593Smuzhiyun es7243e_write(0x04, 0x02, i2c_clt[6]);
1387*4882a593Smuzhiyun es7243e_write(0x04, 0x01, i2c_clt[6]);
1388*4882a593Smuzhiyun es7243e_write(0xf7, 0x30, i2c_clt[6]);
1389*4882a593Smuzhiyun es7243e_write(0xf9, 0x01, i2c_clt[6]);
1390*4882a593Smuzhiyun es7243e_write(0x16, 0xff, i2c_clt[6]);
1391*4882a593Smuzhiyun es7243e_write(0x17, 0x00, i2c_clt[6]);
1392*4882a593Smuzhiyun es7243e_write(0x01, 0x38, i2c_clt[6]);
1393*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x10, 0x00, i2c_clt[6]);
1394*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x10, 0x00, i2c_clt[6]);
1395*4882a593Smuzhiyun es7243e_write(0x00, 0x8e, i2c_clt[6]);
1396*4882a593Smuzhiyun es7243e_write(0x01, 0x30, i2c_clt[6]);
1397*4882a593Smuzhiyun } else { //resume
1398*4882a593Smuzhiyun es7243e_write(0x01, 0x3a, i2c_clt[6]);
1399*4882a593Smuzhiyun es7243e_write(0x00, 0x80, i2c_clt[6]);
1400*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x10, 0x10, i2c_clt[6]);
1401*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x10, 0x10, i2c_clt[6]);
1402*4882a593Smuzhiyun es7243e_write(0x16, 0x00, i2c_clt[6]);
1403*4882a593Smuzhiyun es7243e_write(0x17, 0x02, i2c_clt[6]);
1404*4882a593Smuzhiyun }
1405*4882a593Smuzhiyun return 0;
1406*4882a593Smuzhiyun }
1407*4882a593Smuzhiyun #endif
1408*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 14
1409*4882a593Smuzhiyun static int
es7243e_micboost15_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1410*4882a593Smuzhiyun es7243e_micboost15_setting_set(struct snd_kcontrol *kcontrol,
1411*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1412*4882a593Smuzhiyun {
1413*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x0F,
1414*4882a593Smuzhiyun ucontrol->value.integer.value[0] & 0x0f,
1415*4882a593Smuzhiyun i2c_clt[7]);
1416*4882a593Smuzhiyun return 0;
1417*4882a593Smuzhiyun }
1418*4882a593Smuzhiyun
1419*4882a593Smuzhiyun static int
es7243e_micboost15_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1420*4882a593Smuzhiyun es7243e_micboost15_setting_get(struct snd_kcontrol *kcontrol,
1421*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1422*4882a593Smuzhiyun {
1423*4882a593Smuzhiyun u8 val = 0;
1424*4882a593Smuzhiyun es7243e_read(0x20, &val, i2c_clt[7]);
1425*4882a593Smuzhiyun ucontrol->value.integer.value[0] = val & 0x0f;
1426*4882a593Smuzhiyun return 0;
1427*4882a593Smuzhiyun }
1428*4882a593Smuzhiyun
1429*4882a593Smuzhiyun static int
es7243e_micboost16_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1430*4882a593Smuzhiyun es7243e_micboost16_setting_set(struct snd_kcontrol *kcontrol,
1431*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1432*4882a593Smuzhiyun {
1433*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x0F,
1434*4882a593Smuzhiyun ucontrol->value.integer.value[0] & 0x0f,
1435*4882a593Smuzhiyun i2c_clt[7]);
1436*4882a593Smuzhiyun return 0;
1437*4882a593Smuzhiyun }
1438*4882a593Smuzhiyun
1439*4882a593Smuzhiyun static int
es7243e_micboost16_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1440*4882a593Smuzhiyun es7243e_micboost16_setting_get(struct snd_kcontrol *kcontrol,
1441*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1442*4882a593Smuzhiyun {
1443*4882a593Smuzhiyun u8 val = 0;
1444*4882a593Smuzhiyun es7243e_read(0x21, &val, i2c_clt[7]);
1445*4882a593Smuzhiyun ucontrol->value.integer.value[0] = val & 0x0f;
1446*4882a593Smuzhiyun return 0;
1447*4882a593Smuzhiyun }
1448*4882a593Smuzhiyun
1449*4882a593Smuzhiyun static int
es7243e_adc15_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1450*4882a593Smuzhiyun es7243e_adc15_mute_set(struct snd_kcontrol *kcontrol,
1451*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1452*4882a593Smuzhiyun {
1453*4882a593Smuzhiyun es7243e_update_bits(0x0B, 0x40,
1454*4882a593Smuzhiyun (ucontrol->value.integer.value[0] & 0x01) << 6,
1455*4882a593Smuzhiyun i2c_clt[7]);
1456*4882a593Smuzhiyun return 0;
1457*4882a593Smuzhiyun }
1458*4882a593Smuzhiyun
1459*4882a593Smuzhiyun static int
es7243e_adc15_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1460*4882a593Smuzhiyun es7243e_adc15_mute_get(struct snd_kcontrol *kcontrol,
1461*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1462*4882a593Smuzhiyun {
1463*4882a593Smuzhiyun u8 val = 0;
1464*4882a593Smuzhiyun es7243e_read(0x0B, &val, i2c_clt[7]);
1465*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val 0x40) >> 6;
1466*4882a593Smuzhiyun return 0;
1467*4882a593Smuzhiyun }
1468*4882a593Smuzhiyun
1469*4882a593Smuzhiyun static int
es7243e_adc16_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1470*4882a593Smuzhiyun es7243e_adc16_mute_set(struct snd_kcontrol *kcontrol,
1471*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1472*4882a593Smuzhiyun {
1473*4882a593Smuzhiyun es7243e_update_bits(0x0B, 0x80,
1474*4882a593Smuzhiyun (ucontrol->value.integer.value[0] & 0x01) << 7,
1475*4882a593Smuzhiyun i2c_clt[7]);
1476*4882a593Smuzhiyun return 0;
1477*4882a593Smuzhiyun }
1478*4882a593Smuzhiyun
1479*4882a593Smuzhiyun static int
es7243e_adc16_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1480*4882a593Smuzhiyun es7243e_adc16_mute_get(struct snd_kcontrol *kcontrol,
1481*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1482*4882a593Smuzhiyun {
1483*4882a593Smuzhiyun u8 val = 0;
1484*4882a593Smuzhiyun es7243e_read(0x0B, &val, i2c_clt[7]);
1485*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x80) >> 7;
1486*4882a593Smuzhiyun return 0;
1487*4882a593Smuzhiyun }
1488*4882a593Smuzhiyun
1489*4882a593Smuzhiyun static int
es7243e_adc15adc16_suspend_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1490*4882a593Smuzhiyun es7243e_adc15adc16_suspend_get(struct snd_kcontrol *kcontrol,
1491*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1492*4882a593Smuzhiyun {
1493*4882a593Smuzhiyun u8 val = 0;
1494*4882a593Smuzhiyun es7243e_read(0x17, &val, i2c_clt[7]);
1495*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (val & 0x02) >> 2;
1496*4882a593Smuzhiyun return 0;
1497*4882a593Smuzhiyun }
1498*4882a593Smuzhiyun
1499*4882a593Smuzhiyun static int
es7243e_adc15adc16_suspend_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1500*4882a593Smuzhiyun es7243e_adc15adc16_suspend_set(struct snd_kcontrol *kcontrol,
1501*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1502*4882a593Smuzhiyun {
1503*4882a593Smuzhiyun // u8 val;
1504*4882a593Smuzhiyun if ((ucontrol->value.integer.value[0] & 0x01) == 1) { //suspend
1505*4882a593Smuzhiyun es7243e_write(0x04, 0x02, i2c_clt[7]);
1506*4882a593Smuzhiyun es7243e_write(0x04, 0x01, i2c_clt[7]);
1507*4882a593Smuzhiyun es7243e_write(0xf7, 0x30, i2c_clt[7]);
1508*4882a593Smuzhiyun es7243e_write(0xf9, 0x01, i2c_clt[7]);
1509*4882a593Smuzhiyun es7243e_write(0x16, 0xff, i2c_clt[7]);
1510*4882a593Smuzhiyun es7243e_write(0x17, 0x00, i2c_clt[7]);
1511*4882a593Smuzhiyun es7243e_write(0x01, 0x38, i2c_clt[7]);
1512*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x10, 0x00, i2c_clt[7]);
1513*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x10, 0x00, i2c_clt[7]);
1514*4882a593Smuzhiyun es7243e_write(0x00, 0x8e, i2c_clt[7]);
1515*4882a593Smuzhiyun es7243e_write(0x01, 0x30, i2c_clt[7]);
1516*4882a593Smuzhiyun } else { //resume
1517*4882a593Smuzhiyun es7243e_write(0x01, 0x3a, i2c_clt[7]);
1518*4882a593Smuzhiyun es7243e_write(0x00, 0x80, i2c_clt[7]);
1519*4882a593Smuzhiyun es7243e_update_bits(0x20, 0x10, 0x10, i2c_clt[7]);
1520*4882a593Smuzhiyun es7243e_update_bits(0x21, 0x10, 0x10, i2c_clt[7]);
1521*4882a593Smuzhiyun es7243e_write(0x16, 0x00, i2c_clt[7]);
1522*4882a593Smuzhiyun es7243e_write(0x17, 0x02, i2c_clt[7]);
1523*4882a593Smuzhiyun }
1524*4882a593Smuzhiyun return 0;
1525*4882a593Smuzhiyun }
1526*4882a593Smuzhiyun #endif
1527*4882a593Smuzhiyun static const struct snd_kcontrol_new es7243e_snd_controls[] = {
1528*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 0
1529*4882a593Smuzhiyun SOC_SINGLE_EXT_TLV("PGA1_setting", 0x20, 0, 0x0F, 0,
1530*4882a593Smuzhiyun es7243e_micboost1_setting_get,
1531*4882a593Smuzhiyun es7243e_micboost1_setting_set,
1532*4882a593Smuzhiyun mic_boost_tlv),
1533*4882a593Smuzhiyun SOC_SINGLE_EXT_TLV("PGA2_setting", 0x21, 0, 0x0F, 0,
1534*4882a593Smuzhiyun es7243e_micboost2_setting_get,
1535*4882a593Smuzhiyun es7243e_micboost2_setting_set,
1536*4882a593Smuzhiyun mic_boost_tlv),
1537*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC1_MUTE", 0x0B, 1, 0x40, 0,
1538*4882a593Smuzhiyun es7243e_adc1_mute_get, es7243e_adc1_mute_set),
1539*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC2_MUTE", 0x0B, 1, 0x80, 0,
1540*4882a593Smuzhiyun es7243e_adc2_mute_get, es7243e_adc2_mute_set),
1541*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC1ADC2_SUSPEND", 0x17, 1, 1, 0,
1542*4882a593Smuzhiyun es7243e_adc1adc2_suspend_get,
1543*4882a593Smuzhiyun es7243e_adc1adc2_suspend_set),
1544*4882a593Smuzhiyun #endif
1545*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 2
1546*4882a593Smuzhiyun SOC_SINGLE_EXT_TLV("PGA3_setting", 0x20, 0, 0x0F, 0,
1547*4882a593Smuzhiyun es7243e_micboost3_setting_get,
1548*4882a593Smuzhiyun es7243e_micboost3_setting_set,
1549*4882a593Smuzhiyun mic_boost_tlv),
1550*4882a593Smuzhiyun SOC_SINGLE_EXT_TLV("PGA4_setting", 0x21, 0, 0x0F, 0,
1551*4882a593Smuzhiyun es7243e_micboost4_setting_get,
1552*4882a593Smuzhiyun es7243e_micboost4_setting_set,
1553*4882a593Smuzhiyun mic_boost_tlv),
1554*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC3_MUTE", 0x0B, 1, 0x40, 0,
1555*4882a593Smuzhiyun es7243e_adc3_mute_get, es7243e_adc3_mute_set),
1556*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC4_MUTE", 0x0B, 1, 0x80, 0,
1557*4882a593Smuzhiyun es7243e_adc4_mute_get,
1558*4882a593Smuzhiyun es7243e_adc4_mute_set),
1559*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC3ADC4_SUSPEND", 0x17, 1, 1, 0,
1560*4882a593Smuzhiyun es7243e_adc3adc4_suspend_get,
1561*4882a593Smuzhiyun es7243e_adc3adc4_suspend_set),
1562*4882a593Smuzhiyun #endif
1563*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 4
1564*4882a593Smuzhiyun SOC_SINGLE_EXT_TLV("PGA5_setting", 0x20, 0, 0x0F, 0,
1565*4882a593Smuzhiyun es7243e_micboost5_setting_get,
1566*4882a593Smuzhiyun es7243e_micboost5_setting_set,
1567*4882a593Smuzhiyun mic_boost_tlv),
1568*4882a593Smuzhiyun SOC_SINGLE_EXT_TLV("PGA6_setting", 0x21, 0, 0x0F, 0,
1569*4882a593Smuzhiyun es7243e_micboost6_setting_get,
1570*4882a593Smuzhiyun es7243e_micboost6_setting_set,
1571*4882a593Smuzhiyun mic_boost_tlv),
1572*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC5_MUTE", 0x0B, 1, 0x40, 0,
1573*4882a593Smuzhiyun es7243e_adc5_mute_get, es7243e_adc5_mute_set),
1574*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC6_MUTE", 0x0B, 1, 0x80, 0,
1575*4882a593Smuzhiyun es7243e_adc6_mute_get, es7243e_adc6_mute_set),
1576*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC5ADC6_SUSPEND", 0x17, 1, 1, 0,
1577*4882a593Smuzhiyun es7243e_adc5adc6_suspend_get,
1578*4882a593Smuzhiyun es7243e_adc5adc6_suspend_set),
1579*4882a593Smuzhiyun #endif
1580*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 6
1581*4882a593Smuzhiyun SOC_SINGLE_EXT_TLV("PGA7_setting", 0x20, 0, 0x0F, 0,
1582*4882a593Smuzhiyun es7243e_micboost7_setting_get,
1583*4882a593Smuzhiyun es7243e_micboost7_setting_set,
1584*4882a593Smuzhiyun mic_boost_tlv),
1585*4882a593Smuzhiyun SOC_SINGLE_EXT_TLV("PGA8_setting", 0x21, 0, 0x0F, 0,
1586*4882a593Smuzhiyun es7243e_micboost8_setting_get,
1587*4882a593Smuzhiyun es7243e_micboost8_setting_set,
1588*4882a593Smuzhiyun mic_boost_tlv),
1589*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC7_MUTE", 0x0B, 1, 0x40, 0,
1590*4882a593Smuzhiyun es7243e_adc7_mute_get, es7243e_adc7_mute_set),
1591*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC8_MUTE", 0x0B, 1, 0x80, 0,
1592*4882a593Smuzhiyun es7243e_adc8_mute_get, es7243e_adc8_mute_set),
1593*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC7ADC8_SUSPEND", 0x17, 1, 1, 0,
1594*4882a593Smuzhiyun es7243e_adc7adc8_suspend_get,
1595*4882a593Smuzhiyun es7243e_adc7adc8_suspend_set),
1596*4882a593Smuzhiyun #endif
1597*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 8
1598*4882a593Smuzhiyun SOC_SINGLE_EXT_TLV("PGA9_setting", 0x20, 0, 0x0F, 0,
1599*4882a593Smuzhiyun es7243e_micboost9_setting_get,
1600*4882a593Smuzhiyun es7243e_micboost9_setting_set,
1601*4882a593Smuzhiyun mic_boost_tlv),
1602*4882a593Smuzhiyun SOC_SINGLE_EXT_TLV("PGA10_setting", 0x21, 0, 0x0F, 0,
1603*4882a593Smuzhiyun es7243e_micboost10_setting_get,
1604*4882a593Smuzhiyun es7243e_micboost10_setting_set,
1605*4882a593Smuzhiyun mic_boost_tlv),
1606*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC9_MUTE", 0x0B, 1, 0x40, 0,
1607*4882a593Smuzhiyun es7243e_adc9_mute_get, es7243e_adc9_mute_set),
1608*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC10_MUTE", 0x0B, 1, 0x80, 0,
1609*4882a593Smuzhiyun es7243e_adc10_mute_get, es7243e_adc10_mute_set),
1610*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC9ADC10_SUSPEND", 0x17, 1, 1, 0,
1611*4882a593Smuzhiyun es7243e_adc9adc10_suspend_get,
1612*4882a593Smuzhiyun es7243e_adc9adc10_suspend_set),
1613*4882a593Smuzhiyun #endif
1614*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 10
1615*4882a593Smuzhiyun SOC_SINGLE_EXT_TLV("PGA11_setting", 0x20, 0, 0x0F, 0,
1616*4882a593Smuzhiyun es7243e_micboost11_setting_get,
1617*4882a593Smuzhiyun es7243e_micboost11_setting_set,
1618*4882a593Smuzhiyun mic_boost_tlv),
1619*4882a593Smuzhiyun SOC_SINGLE_EXT_TLV("PGA12_setting", 0x21, 0, 0x0F, 0,
1620*4882a593Smuzhiyun es7243e_micboost12_setting_get,
1621*4882a593Smuzhiyun es7243e_micboost12_setting_set,
1622*4882a593Smuzhiyun mic_boost_tlv),
1623*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC11_MUTE", 0x0B, 1, 0x40, 0,
1624*4882a593Smuzhiyun es7243e_adc11_mute_get, es7243e_adc11_mute_set),
1625*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC12_MUTE", 0x0B, 1, 0x80, 0,
1626*4882a593Smuzhiyun es7243e_adc12_mute_get, es7243e_adc12_mute_set),
1627*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC11ADC12_SUSPEND", 0x17, 1, 1, 0,
1628*4882a593Smuzhiyun es7243e_adc11adc12_suspend_get,
1629*4882a593Smuzhiyun es7243e_adc11adc12_suspend_set),
1630*4882a593Smuzhiyun #endif
1631*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 12
1632*4882a593Smuzhiyun SOC_SINGLE_EXT_TLV("PGA13_setting", 0x20, 0, 0x0F, 0,
1633*4882a593Smuzhiyun es7243e_micboost13_setting_get,
1634*4882a593Smuzhiyun es7243e_micboost13_setting_set,
1635*4882a593Smuzhiyun mic_boost_tlv),
1636*4882a593Smuzhiyun SOC_SINGLE_EXT_TLV("PGA14_setting", 0x21, 0, 0x0F, 0,
1637*4882a593Smuzhiyun es7243e_micboost14_setting_get,
1638*4882a593Smuzhiyun es7243e_micboost14_setting_set,
1639*4882a593Smuzhiyun mic_boost_tlv),
1640*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC13_MUTE", 0x0B, 1, 0x40, 0,
1641*4882a593Smuzhiyun es7243e_adc13_mute_get, es7243e_adc13_mute_set),
1642*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC14_MUTE", 0x0B, 1, 0x80, 0,
1643*4882a593Smuzhiyun es7243e_adc14_mute_get, es7243e_adc14_mute_set),
1644*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC13ADC14_SUSPEND", 0x17, 1, 1, 0,
1645*4882a593Smuzhiyun es7243e_adc13adc14_suspend_get,
1646*4882a593Smuzhiyun es7243e_adc13adc14_suspend_set),
1647*4882a593Smuzhiyun #endif
1648*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 14
1649*4882a593Smuzhiyun SOC_SINGLE_EXT_TLV("PGA15_setting", 0x20, 0, 0x0F, 0,
1650*4882a593Smuzhiyun es7243e_micboost15_setting_get,
1651*4882a593Smuzhiyun es7243e_micboost15_setting_set,
1652*4882a593Smuzhiyun mic_boost_tlv),
1653*4882a593Smuzhiyun SOC_SINGLE_EXT_TLV("PGA16_setting", 0x21, 0, 0x0F, 0,
1654*4882a593Smuzhiyun es7243e_micboost16_setting_get,
1655*4882a593Smuzhiyun es7243e_micboost16_setting_set,
1656*4882a593Smuzhiyun mic_boost_tlv),
1657*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC15_MUTE", 0x0B, 1, 0x40, 0,
1658*4882a593Smuzhiyun es7243e_adc15_mute_get, es7243e_adc15_mute_set),
1659*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC16_MUTE", 0x0B, 1, 0x80, 0,
1660*4882a593Smuzhiyun es7243e_adc16_mute_get, es7243e_adc16_mute_set),
1661*4882a593Smuzhiyun SOC_SINGLE_EXT("ADC15ADC16_SUSPEND", 0x17, 1, 1, 0,
1662*4882a593Smuzhiyun es7243e_adc15adc16_suspend_get,
1663*4882a593Smuzhiyun es7243e_adc15adc16_suspend_set),
1664*4882a593Smuzhiyun #endif
1665*4882a593Smuzhiyun };
1666*4882a593Smuzhiyun
1667*4882a593Smuzhiyun #define es7243e_RATES SNDRV_PCM_RATE_8000_48000
1668*4882a593Smuzhiyun
1669*4882a593Smuzhiyun #define es7243e_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1670*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1671*4882a593Smuzhiyun
1672*4882a593Smuzhiyun static struct snd_soc_dai_ops es7243e_ops = {
1673*4882a593Smuzhiyun .startup = es7243e_pcm_startup,
1674*4882a593Smuzhiyun .hw_params = es7243e_pcm_hw_params,
1675*4882a593Smuzhiyun .set_fmt = es7243e_set_dai_fmt,
1676*4882a593Smuzhiyun .set_sysclk = es7243e_set_dai_sysclk,
1677*4882a593Smuzhiyun .mute_stream = es7243e_mute,
1678*4882a593Smuzhiyun };
1679*4882a593Smuzhiyun
1680*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 0
1681*4882a593Smuzhiyun static struct snd_soc_dai_driver es7243e_dai0 = {
1682*4882a593Smuzhiyun .name = "ES7243E HiFi 0",
1683*4882a593Smuzhiyun .capture = {
1684*4882a593Smuzhiyun .stream_name = "Capture",
1685*4882a593Smuzhiyun .channels_min = 1,
1686*4882a593Smuzhiyun .channels_max = 8,
1687*4882a593Smuzhiyun .rates = es7243e_RATES,
1688*4882a593Smuzhiyun .formats = es7243e_FORMATS,
1689*4882a593Smuzhiyun },
1690*4882a593Smuzhiyun .ops = &es7243e_ops,
1691*4882a593Smuzhiyun .symmetric_rates = 1,
1692*4882a593Smuzhiyun };
1693*4882a593Smuzhiyun #endif
1694*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 2
1695*4882a593Smuzhiyun static struct snd_soc_dai_driver es7243e_dai1 = {
1696*4882a593Smuzhiyun .name = "ES7243E HiFi 1",
1697*4882a593Smuzhiyun .capture = {
1698*4882a593Smuzhiyun .stream_name = "Capture",
1699*4882a593Smuzhiyun .channels_min = 1,
1700*4882a593Smuzhiyun .channels_max = 8,
1701*4882a593Smuzhiyun .rates = es7243e_RATES,
1702*4882a593Smuzhiyun .formats = es7243e_FORMATS,
1703*4882a593Smuzhiyun },
1704*4882a593Smuzhiyun .ops = &es7243e_ops,
1705*4882a593Smuzhiyun .symmetric_rates = 1,
1706*4882a593Smuzhiyun };
1707*4882a593Smuzhiyun #endif
1708*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 4
1709*4882a593Smuzhiyun static struct snd_soc_dai_driver es7243e_dai2 = {
1710*4882a593Smuzhiyun .name = "ES7243E HiFi 2",
1711*4882a593Smuzhiyun .capture = {
1712*4882a593Smuzhiyun .stream_name = "Capture",
1713*4882a593Smuzhiyun .channels_min = 1,
1714*4882a593Smuzhiyun .channels_max = 8,
1715*4882a593Smuzhiyun .rates = es7243e_RATES,
1716*4882a593Smuzhiyun .formats = es7243e_FORMATS,
1717*4882a593Smuzhiyun },
1718*4882a593Smuzhiyun .ops = &es7243e_ops,
1719*4882a593Smuzhiyun .symmetric_rates = 1,
1720*4882a593Smuzhiyun };
1721*4882a593Smuzhiyun #endif
1722*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 6
1723*4882a593Smuzhiyun static struct snd_soc_dai_driver es7243e_dai3 = {
1724*4882a593Smuzhiyun .name = "ES7243E HiFi 3",
1725*4882a593Smuzhiyun .capture = {
1726*4882a593Smuzhiyun .stream_name = "Capture",
1727*4882a593Smuzhiyun .channels_min = 1,
1728*4882a593Smuzhiyun .channels_max = 8,
1729*4882a593Smuzhiyun .rates = es7243e_RATES,
1730*4882a593Smuzhiyun .formats = es7243e_FORMATS,
1731*4882a593Smuzhiyun },
1732*4882a593Smuzhiyun .ops = &es7243e_ops,
1733*4882a593Smuzhiyun .symmetric_rates = 1,
1734*4882a593Smuzhiyun };
1735*4882a593Smuzhiyun #endif
1736*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 8
1737*4882a593Smuzhiyun static struct snd_soc_dai_driver es7243e_dai5 = {
1738*4882a593Smuzhiyun .name = "ES7243E HiFi 4",
1739*4882a593Smuzhiyun .capture = {
1740*4882a593Smuzhiyun .stream_name = "Capture",
1741*4882a593Smuzhiyun .channels_min = 1,
1742*4882a593Smuzhiyun .channels_max = 2,
1743*4882a593Smuzhiyun .rates = es7243e_RATES,
1744*4882a593Smuzhiyun .formats = es7243e_FORMATS,
1745*4882a593Smuzhiyun },
1746*4882a593Smuzhiyun .ops = &es7243e_ops,
1747*4882a593Smuzhiyun .symmetric_rates = 1,
1748*4882a593Smuzhiyun };
1749*4882a593Smuzhiyun #endif
1750*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 10
1751*4882a593Smuzhiyun static struct snd_soc_dai_driver es7243e_dai6 = {
1752*4882a593Smuzhiyun .name = "ES7243E HiFi 5",
1753*4882a593Smuzhiyun .capture = {
1754*4882a593Smuzhiyun .stream_name = "Capture",
1755*4882a593Smuzhiyun .channels_min = 1,
1756*4882a593Smuzhiyun .channels_max = 2,
1757*4882a593Smuzhiyun .rates = es7243e_RATES,
1758*4882a593Smuzhiyun .formats = es7243e_FORMATS,
1759*4882a593Smuzhiyun },
1760*4882a593Smuzhiyun .ops = &es7243e_ops,
1761*4882a593Smuzhiyun .symmetric_rates = 1,
1762*4882a593Smuzhiyun };
1763*4882a593Smuzhiyun #endif
1764*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 12
1765*4882a593Smuzhiyun static struct snd_soc_dai_driver es7243e_dai7 = {
1766*4882a593Smuzhiyun .name = "ES7243E HiFi 6",
1767*4882a593Smuzhiyun .capture = {
1768*4882a593Smuzhiyun .stream_name = "Capture",
1769*4882a593Smuzhiyun .channels_min = 1,
1770*4882a593Smuzhiyun .channels_max = 2,
1771*4882a593Smuzhiyun .rates = es7243e_RATES,
1772*4882a593Smuzhiyun .formats = es7243e_FORMATS,
1773*4882a593Smuzhiyun },
1774*4882a593Smuzhiyun .ops = &es7243e_ops,
1775*4882a593Smuzhiyun .symmetric_rates = 1,
1776*4882a593Smuzhiyun };
1777*4882a593Smuzhiyun #endif
1778*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 14
1779*4882a593Smuzhiyun static struct snd_soc_dai_driver es7243e_dai8 = {
1780*4882a593Smuzhiyun .name = "ES7243E HiFi 7",
1781*4882a593Smuzhiyun .capture = {
1782*4882a593Smuzhiyun .stream_name = "Capture",
1783*4882a593Smuzhiyun .channels_min = 1,
1784*4882a593Smuzhiyun .channels_max = 2,
1785*4882a593Smuzhiyun .rates = es7243e_RATES,
1786*4882a593Smuzhiyun .formats = es7243e_FORMATS,
1787*4882a593Smuzhiyun },
1788*4882a593Smuzhiyun .ops = &es7243e_ops,
1789*4882a593Smuzhiyun .symmetric_rates = 1,
1790*4882a593Smuzhiyun };
1791*4882a593Smuzhiyun #endif
1792*4882a593Smuzhiyun static struct snd_soc_dai_driver *es7243e_dai[] = {
1793*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 0
1794*4882a593Smuzhiyun &es7243e_dai0,
1795*4882a593Smuzhiyun #endif
1796*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 2
1797*4882a593Smuzhiyun &es7243e_dai1,
1798*4882a593Smuzhiyun #endif
1799*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 4
1800*4882a593Smuzhiyun &es7243e_dai2,
1801*4882a593Smuzhiyun #endif
1802*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 6
1803*4882a593Smuzhiyun &es7243e_dai3,
1804*4882a593Smuzhiyun #endif
1805*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 8
1806*4882a593Smuzhiyun &es7243e_dai4,
1807*4882a593Smuzhiyun #endif
1808*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 10
1809*4882a593Smuzhiyun &es7243e_dai5,
1810*4882a593Smuzhiyun #endif
1811*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 12
1812*4882a593Smuzhiyun &es7243e_dai6,
1813*4882a593Smuzhiyun #endif
1814*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 14
1815*4882a593Smuzhiyun &es7243e_dai7,
1816*4882a593Smuzhiyun #endif
1817*4882a593Smuzhiyun };
1818*4882a593Smuzhiyun
es7243e_suspend(struct snd_soc_component * component)1819*4882a593Smuzhiyun static int es7243e_suspend(struct snd_soc_component *component)
1820*4882a593Smuzhiyun {
1821*4882a593Smuzhiyun es7243e_set_bias_level(component, SND_SOC_BIAS_OFF);
1822*4882a593Smuzhiyun return 0;
1823*4882a593Smuzhiyun }
1824*4882a593Smuzhiyun
es7243e_resume(struct snd_soc_component * component)1825*4882a593Smuzhiyun static int es7243e_resume(struct snd_soc_component *component)
1826*4882a593Smuzhiyun {
1827*4882a593Smuzhiyun es7243e_set_bias_level(component, SND_SOC_BIAS_STANDBY);
1828*4882a593Smuzhiyun return 0;
1829*4882a593Smuzhiyun }
1830*4882a593Smuzhiyun
1831*4882a593Smuzhiyun struct _mclk_lrck_ratio {
1832*4882a593Smuzhiyun u16 ratio; //ratio between mclk and lrck
1833*4882a593Smuzhiyun u8 nfs; //nfs mode, =0, nfs mode disabled
1834*4882a593Smuzhiyun u8 osr; //adc over sample rate
1835*4882a593Smuzhiyun u8 prediv_premulti; //adcclk and dacclk divider
1836*4882a593Smuzhiyun u8 cf_dsp_div; //adclrck divider and daclrck divider
1837*4882a593Smuzhiyun u8 scale;
1838*4882a593Smuzhiyun };
1839*4882a593Smuzhiyun
1840*4882a593Smuzhiyun /* codec hifi mclk clock divider coefficients */
1841*4882a593Smuzhiyun static const struct _mclk_lrck_ratio ratio_div[] = {
1842*4882a593Smuzhiyun //ratio nfs, osr, pre, div ,scale
1843*4882a593Smuzhiyun {3072, 0, 0x20, 0x50, 0x00, 0x00},
1844*4882a593Smuzhiyun {3072, 2, 0x20, 0xb0, 0x00, 0x00},
1845*4882a593Smuzhiyun
1846*4882a593Smuzhiyun {2048, 0, 0x20, 0x30, 0x00, 0x00},
1847*4882a593Smuzhiyun {2048, 2, 0x20, 0x70, 0x00, 0x00},
1848*4882a593Smuzhiyun {2048, 3, 0x20, 0xb0, 0x00, 0x00},
1849*4882a593Smuzhiyun {2048, 4, 0x20, 0xf0, 0x00, 0x00},
1850*4882a593Smuzhiyun
1851*4882a593Smuzhiyun {1536, 0, 0x20, 0x20, 0x00, 0x00},
1852*4882a593Smuzhiyun {1536, 2, 0x20, 0x50, 0x00, 0x00},
1853*4882a593Smuzhiyun {1536, 3, 0x20, 0x80, 0x00, 0x00},
1854*4882a593Smuzhiyun {1536, 4, 0x20, 0xb0, 0x00, 0x00},
1855*4882a593Smuzhiyun
1856*4882a593Smuzhiyun {1024, 0, 0x20, 0x10, 0x00, 0x00},
1857*4882a593Smuzhiyun {1024, 2, 0x20, 0x30, 0x00, 0x00},
1858*4882a593Smuzhiyun {1024, 3, 0x20, 0x50, 0x00, 0x00},
1859*4882a593Smuzhiyun {1024, 4, 0x20, 0x70, 0x00, 0x00},
1860*4882a593Smuzhiyun {1024, 5, 0x20, 0x90, 0x00, 0x00},
1861*4882a593Smuzhiyun {1024, 6, 0x20, 0xb0, 0x00, 0x00},
1862*4882a593Smuzhiyun {1024, 7, 0x20, 0xd0, 0x00, 0x00},
1863*4882a593Smuzhiyun {1024, 8, 0x20, 0xf0, 0x00, 0x00},
1864*4882a593Smuzhiyun
1865*4882a593Smuzhiyun {768, 0, 0x20, 0x21, 0x00, 0x00},
1866*4882a593Smuzhiyun {768, 2, 0x20, 0x20, 0x00, 0x00},
1867*4882a593Smuzhiyun {768, 3, 0x20, 0x81, 0x00, 0x00},
1868*4882a593Smuzhiyun {768, 4, 0x20, 0x50, 0x00, 0x00},
1869*4882a593Smuzhiyun {768, 5, 0x20, 0xe1, 0x00, 0x00},
1870*4882a593Smuzhiyun {768, 6, 0x20, 0x80, 0x00, 0x00},
1871*4882a593Smuzhiyun {768, 8, 0x20, 0xb0, 0x00, 0x00},
1872*4882a593Smuzhiyun
1873*4882a593Smuzhiyun {512, 0, 0x20, 0x00, 0x00, 0x00},
1874*4882a593Smuzhiyun {512, 2, 0x20, 0x10, 0x00, 0x00},
1875*4882a593Smuzhiyun {512, 3, 0x20, 0x20, 0x00, 0x00},
1876*4882a593Smuzhiyun {512, 4, 0x20, 0x30, 0x00, 0x00},
1877*4882a593Smuzhiyun {512, 5, 0x20, 0x40, 0x00, 0x00},
1878*4882a593Smuzhiyun {512, 6, 0x20, 0x50, 0x00, 0x00},
1879*4882a593Smuzhiyun {512, 7, 0x20, 0x60, 0x00, 0x00},
1880*4882a593Smuzhiyun {512, 8, 0x20, 0x70, 0x00, 0x00},
1881*4882a593Smuzhiyun
1882*4882a593Smuzhiyun {384, 0, 0x20, 0x22, 0x00, 0x00},
1883*4882a593Smuzhiyun {384, 2, 0x20, 0x21, 0x00, 0x00},
1884*4882a593Smuzhiyun {384, 3, 0x20, 0x82, 0x00, 0x00},
1885*4882a593Smuzhiyun {384, 4, 0x20, 0x20, 0x00, 0x00},
1886*4882a593Smuzhiyun {384, 5, 0x20, 0xe2, 0x00, 0x00},
1887*4882a593Smuzhiyun {384, 6, 0x20, 0x81, 0x00, 0x00},
1888*4882a593Smuzhiyun {384, 8, 0x20, 0x50, 0x00, 0x00},
1889*4882a593Smuzhiyun
1890*4882a593Smuzhiyun {256, 0, 0x20, 0x01, 0x00, 0x00},
1891*4882a593Smuzhiyun {256, 2, 0x20, 0x00, 0x00, 0x00},
1892*4882a593Smuzhiyun {256, 3, 0x20, 0x21, 0x00, 0x00},
1893*4882a593Smuzhiyun {256, 4, 0x20, 0x10, 0x00, 0x00},
1894*4882a593Smuzhiyun {256, 5, 0x20, 0x41, 0x00, 0x00},
1895*4882a593Smuzhiyun {256, 6, 0x20, 0x20, 0x00, 0x00},
1896*4882a593Smuzhiyun {256, 7, 0x20, 0x61, 0x00, 0x00},
1897*4882a593Smuzhiyun {256, 8, 0x20, 0x30, 0x00, 0x00},
1898*4882a593Smuzhiyun
1899*4882a593Smuzhiyun {192, 0, 0x20, 0x23, 0x00, 0x00},
1900*4882a593Smuzhiyun {192, 2, 0x20, 0x22, 0x00, 0x00},
1901*4882a593Smuzhiyun {192, 3, 0x20, 0x83, 0x00, 0x00},
1902*4882a593Smuzhiyun {192, 4, 0x20, 0x21, 0x00, 0x00},
1903*4882a593Smuzhiyun {192, 5, 0x20, 0xe3, 0x00, 0x00},
1904*4882a593Smuzhiyun {192, 6, 0x20, 0x82, 0x00, 0x00},
1905*4882a593Smuzhiyun {192, 8, 0x20, 0x20, 0x00, 0x00},
1906*4882a593Smuzhiyun
1907*4882a593Smuzhiyun {128, 0, 0x20, 0x02, 0x00, 0x00},
1908*4882a593Smuzhiyun {128, 2, 0x20, 0x01, 0x00, 0x00},
1909*4882a593Smuzhiyun {128, 3, 0x20, 0x22, 0x00, 0x00},
1910*4882a593Smuzhiyun {128, 4, 0x20, 0x00, 0x00, 0x00},
1911*4882a593Smuzhiyun {128, 5, 0x20, 0x42, 0x00, 0x00},
1912*4882a593Smuzhiyun {128, 6, 0x20, 0x21, 0x00, 0x00},
1913*4882a593Smuzhiyun {128, 7, 0x20, 0x62, 0x00, 0x00},
1914*4882a593Smuzhiyun {128, 8, 0x20, 0x10, 0x00, 0x00},
1915*4882a593Smuzhiyun
1916*4882a593Smuzhiyun {64, 0, 0x20, 0x03, 0x00, 0x00},
1917*4882a593Smuzhiyun {64, 2, 0x20, 0x02, 0x00, 0x00},
1918*4882a593Smuzhiyun {64, 3, 0x20, 0x23, 0x00, 0x00},
1919*4882a593Smuzhiyun {64, 4, 0x20, 0x01, 0x00, 0x00},
1920*4882a593Smuzhiyun {64, 5, 0x20, 0x43, 0x00, 0x00},
1921*4882a593Smuzhiyun {64, 6, 0x20, 0x22, 0x00, 0x00},
1922*4882a593Smuzhiyun {64, 7, 0x20, 0x63, 0x00, 0x00},
1923*4882a593Smuzhiyun {64, 8, 0x20, 0x00, 0x00, 0x00},
1924*4882a593Smuzhiyun };
1925*4882a593Smuzhiyun
get_mclk_lrck_ratio(int clk_ratio,int n_fs)1926*4882a593Smuzhiyun static inline int get_mclk_lrck_ratio(int clk_ratio, int n_fs)
1927*4882a593Smuzhiyun {
1928*4882a593Smuzhiyun int i;
1929*4882a593Smuzhiyun
1930*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(ratio_div); i++) {
1931*4882a593Smuzhiyun if (ratio_div[i].ratio == clk_ratio
1932*4882a593Smuzhiyun && ratio_div[i].nfs == n_fs)
1933*4882a593Smuzhiyun
1934*4882a593Smuzhiyun return i;
1935*4882a593Smuzhiyun }
1936*4882a593Smuzhiyun
1937*4882a593Smuzhiyun return -EINVAL;
1938*4882a593Smuzhiyun }
1939*4882a593Smuzhiyun
es7243e_probe(struct snd_soc_component * component)1940*4882a593Smuzhiyun static int es7243e_probe(struct snd_soc_component *component)
1941*4882a593Smuzhiyun {
1942*4882a593Smuzhiyun struct es7243e_priv *es7243e = snd_soc_component_get_drvdata(component);
1943*4882a593Smuzhiyun int ret = 0;
1944*4882a593Smuzhiyun u8 index, regv = 0, chn, work_mode, ratio_index, datbits;
1945*4882a593Smuzhiyun u16 ratio;
1946*4882a593Smuzhiyun u8 digital_vol[16], pga_gain[16];
1947*4882a593Smuzhiyun
1948*4882a593Smuzhiyun printk("begin->>>>>>>>>>%s!\n", __func__);
1949*4882a593Smuzhiyun #if !ES7243E_CODEC_RW_TEST_EN
1950*4882a593Smuzhiyun //ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C);//8,8
1951*4882a593Smuzhiyun #else
1952*4882a593Smuzhiyun component->control_data = devm_regmap_init_i2c(es7243e->i2c,
1953*4882a593Smuzhiyun &es7243e_regmap_config);
1954*4882a593Smuzhiyun ret = PTR_ERR_OR_ZERO(component->control_data);
1955*4882a593Smuzhiyun #endif
1956*4882a593Smuzhiyun if (ret < 0) {
1957*4882a593Smuzhiyun dev_err(component->dev, "Failed to set cache I/O: %d\n", ret);
1958*4882a593Smuzhiyun return ret;
1959*4882a593Smuzhiyun }
1960*4882a593Smuzhiyun
1961*4882a593Smuzhiyun tron_component[es7243e_codec_num++] = component;
1962*4882a593Smuzhiyun index = 0;
1963*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 0
1964*4882a593Smuzhiyun digital_vol[index] = ES7243E_DIGITAL_VOLUME_1;
1965*4882a593Smuzhiyun pga_gain[index] = ES7243E_MIC_ARRAY_AIN1_PGA;
1966*4882a593Smuzhiyun index++;
1967*4882a593Smuzhiyun digital_vol[index] = ES7243E_DIGITAL_VOLUME_2;
1968*4882a593Smuzhiyun pga_gain[index] = ES7243E_MIC_ARRAY_AIN2_PGA;
1969*4882a593Smuzhiyun index++;
1970*4882a593Smuzhiyun #endif
1971*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 2
1972*4882a593Smuzhiyun digital_vol[index] = ES7243E_DIGITAL_VOLUME_3;
1973*4882a593Smuzhiyun pga_gain[index] = ES7243E_MIC_ARRAY_AIN3_PGA;
1974*4882a593Smuzhiyun index++;
1975*4882a593Smuzhiyun digital_vol[index] = ES7243E_DIGITAL_VOLUME_4;
1976*4882a593Smuzhiyun pga_gain[index] = ES7243E_MIC_ARRAY_AIN4_PGA;
1977*4882a593Smuzhiyun index++;
1978*4882a593Smuzhiyun #endif
1979*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 4
1980*4882a593Smuzhiyun digital_vol[index] = ES7243E_DIGITAL_VOLUME_5;
1981*4882a593Smuzhiyun pga_gain[index] = ES7243E_MIC_ARRAY_AIN5_PGA;
1982*4882a593Smuzhiyun index++;
1983*4882a593Smuzhiyun digital_vol[index] = ES7243E_DIGITAL_VOLUME_6;
1984*4882a593Smuzhiyun pga_gain[index] = ES7243E_MIC_ARRAY_AIN6_PGA;
1985*4882a593Smuzhiyun index++;
1986*4882a593Smuzhiyun #endif
1987*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 6
1988*4882a593Smuzhiyun digital_vol[index] = ES7243E_DIGITAL_VOLUME_7;
1989*4882a593Smuzhiyun pga_gain[index] = ES7243E_MIC_ARRAY_AIN7_PGA;
1990*4882a593Smuzhiyun index++;
1991*4882a593Smuzhiyun digital_vol[index] = ES7243E_DIGITAL_VOLUME_8;
1992*4882a593Smuzhiyun pga_gain[index] = ES7243E_MIC_ARRAY_AIN8_PGA;
1993*4882a593Smuzhiyun index++;
1994*4882a593Smuzhiyun #endif
1995*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 8
1996*4882a593Smuzhiyun digital_vol[index] = ES7243E_DIGITAL_VOLUME_9;
1997*4882a593Smuzhiyun pga_gain[index] = ES7243E_MIC_ARRAY_AIN9_PGA;
1998*4882a593Smuzhiyun index++;
1999*4882a593Smuzhiyun digital_vol[index] = ES7243E_DIGITAL_VOLUME_10;
2000*4882a593Smuzhiyun pga_gain[index] = ES7243E_MIC_ARRAY_AIN10_PGA;
2001*4882a593Smuzhiyun index++;
2002*4882a593Smuzhiyun #endif
2003*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 10
2004*4882a593Smuzhiyun digital_vol[index] = ES7243E_DIGITAL_VOLUME_11;
2005*4882a593Smuzhiyun pga_gain[index] = ES7243E_MIC_ARRAY_AIN11_PGA;
2006*4882a593Smuzhiyun index++;
2007*4882a593Smuzhiyun digital_vol[index] = ES7243E_DIGITAL_VOLUME_12;
2008*4882a593Smuzhiyun pga_gain[index] = ES7243E_MIC_ARRAY_AIN12_PGA;
2009*4882a593Smuzhiyun index++;
2010*4882a593Smuzhiyun #endif
2011*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 12
2012*4882a593Smuzhiyun digital_vol[index] = ES7243E_DIGITAL_VOLUME_13;
2013*4882a593Smuzhiyun pga_gain[index] = ES7243E_MIC_ARRAY_AIN13_PGA;
2014*4882a593Smuzhiyun index++;
2015*4882a593Smuzhiyun digital_vol[index] = ES7243E_DIGITAL_VOLUME_14;
2016*4882a593Smuzhiyun pga_gain[index] = ES7243E_MIC_ARRAY_AIN14_PGA;
2017*4882a593Smuzhiyun index++;
2018*4882a593Smuzhiyun #endif
2019*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 14
2020*4882a593Smuzhiyun digital_vol[index] = ES7243E_DIGITAL_VOLUME_15;
2021*4882a593Smuzhiyun pga_gain[index] = ES7243E_MIC_ARRAY_AIN15_PGA;
2022*4882a593Smuzhiyun index++;
2023*4882a593Smuzhiyun digital_vol[index] = ES7243E_DIGITAL_VOLUME_16;
2024*4882a593Smuzhiyun pga_gain[index] = ES7243E_MIC_ARRAY_AIN16_PGA;
2025*4882a593Smuzhiyun index++;
2026*4882a593Smuzhiyun #endif
2027*4882a593Smuzhiyun
2028*4882a593Smuzhiyun for (index = 0; index < (ES7243E_CHANNELS_MAX) / 2; index++) {
2029*4882a593Smuzhiyun printk("%s(), index = %d\n", __func__, index);
2030*4882a593Smuzhiyun es7243e_read(0x02, ®v, i2c_clt[index]);
2031*4882a593Smuzhiyun if (es7243e->mclksrc == FROM_MCLK_PIN)
2032*4882a593Smuzhiyun regv &= 0x7f;
2033*4882a593Smuzhiyun else
2034*4882a593Smuzhiyun regv |= 0x80;
2035*4882a593Smuzhiyun regv &= 0xfd;
2036*4882a593Smuzhiyun if (es7243e->mclkinv == true) {
2037*4882a593Smuzhiyun regv |= 0x20;
2038*4882a593Smuzhiyun }
2039*4882a593Smuzhiyun regv &= 0xfe;
2040*4882a593Smuzhiyun if (es7243e->bclkinv == true) {
2041*4882a593Smuzhiyun regv |= 0x01;
2042*4882a593Smuzhiyun }
2043*4882a593Smuzhiyun es7243e_write(0x02, regv, i2c_clt[index]);
2044*4882a593Smuzhiyun /*
2045*4882a593Smuzhiyun * set data bits
2046*4882a593Smuzhiyun */
2047*4882a593Smuzhiyun es7243e_read(0x0b, ®v, i2c_clt[index]);
2048*4882a593Smuzhiyun regv &= 0xe3;
2049*4882a593Smuzhiyun datbits = ES7243E_DATA_LENGTH;
2050*4882a593Smuzhiyun switch (datbits) {
2051*4882a593Smuzhiyun case DATA_16BITS:
2052*4882a593Smuzhiyun regv |= 0x0c;
2053*4882a593Smuzhiyun break;
2054*4882a593Smuzhiyun case DATA_24BITS:
2055*4882a593Smuzhiyun break;
2056*4882a593Smuzhiyun case DATA_32BITS:
2057*4882a593Smuzhiyun regv |= 0x10;
2058*4882a593Smuzhiyun break;
2059*4882a593Smuzhiyun default:
2060*4882a593Smuzhiyun regv |= 0x0c;
2061*4882a593Smuzhiyun break;
2062*4882a593Smuzhiyun }
2063*4882a593Smuzhiyun es7243e_write(0x0b, regv, i2c_clt[index]);
2064*4882a593Smuzhiyun /*
2065*4882a593Smuzhiyun * set sdp format and tdm mode
2066*4882a593Smuzhiyun */
2067*4882a593Smuzhiyun chn = ES7243E_CHANNELS_MAX / 2;
2068*4882a593Smuzhiyun switch (es7243e->tdm) {
2069*4882a593Smuzhiyun case ES7243E_NORMAL_I2S:
2070*4882a593Smuzhiyun es7243e_read(0x0b, ®v, i2c_clt[index]);
2071*4882a593Smuzhiyun regv &= 0xfc;
2072*4882a593Smuzhiyun es7243e_write(0x0b, regv, i2c_clt[index]);
2073*4882a593Smuzhiyun es7243e_read(0x0c, ®v, i2c_clt[index]);
2074*4882a593Smuzhiyun regv &= 0xc0;
2075*4882a593Smuzhiyun es7243e_write(0x0c, regv, i2c_clt[index]);
2076*4882a593Smuzhiyun work_mode = 0;
2077*4882a593Smuzhiyun break;
2078*4882a593Smuzhiyun case ES7243E_NORMAL_LJ:
2079*4882a593Smuzhiyun es7243e_read(0x0b, ®v, i2c_clt[index]);
2080*4882a593Smuzhiyun regv &= 0xfc;
2081*4882a593Smuzhiyun regv |= 0x01;
2082*4882a593Smuzhiyun es7243e_write(0x0b, regv, i2c_clt[index]);
2083*4882a593Smuzhiyun es7243e_read(0x0c, ®v, i2c_clt[index]);
2084*4882a593Smuzhiyun regv &= 0xc0;
2085*4882a593Smuzhiyun es7243e_write(0x0c, regv, i2c_clt[index]);
2086*4882a593Smuzhiyun work_mode = 0;
2087*4882a593Smuzhiyun break;
2088*4882a593Smuzhiyun case ES7243E_NORMAL_DSPA:
2089*4882a593Smuzhiyun es7243e_read(0x0b, ®v, i2c_clt[index]);
2090*4882a593Smuzhiyun regv &= 0xdc;
2091*4882a593Smuzhiyun regv |= 0x03;
2092*4882a593Smuzhiyun es7243e_write(0x0b, regv, i2c_clt[index]);
2093*4882a593Smuzhiyun es7243e_read(0x0c, ®v, i2c_clt[index]);
2094*4882a593Smuzhiyun regv &= 0xc0;
2095*4882a593Smuzhiyun es7243e_write(0x0c, regv, i2c_clt[index]);
2096*4882a593Smuzhiyun work_mode = 0;
2097*4882a593Smuzhiyun break;
2098*4882a593Smuzhiyun case ES7243E_NORMAL_DSPB:
2099*4882a593Smuzhiyun es7243e_read(0x0b, ®v, i2c_clt[index]);
2100*4882a593Smuzhiyun regv &= 0xdc;
2101*4882a593Smuzhiyun regv |= 0x23;
2102*4882a593Smuzhiyun es7243e_write(0x0b, regv, i2c_clt[index]);
2103*4882a593Smuzhiyun es7243e_read(0x0c, ®v, i2c_clt[index]);
2104*4882a593Smuzhiyun regv &= 0xc0;
2105*4882a593Smuzhiyun es7243e_write(0x0c, regv, i2c_clt[index]);
2106*4882a593Smuzhiyun work_mode = 0;
2107*4882a593Smuzhiyun break;
2108*4882a593Smuzhiyun case ES7243E_TDM_A:
2109*4882a593Smuzhiyun es7243e_read(0x0b, ®v, i2c_clt[index]);
2110*4882a593Smuzhiyun regv &= 0xdc;
2111*4882a593Smuzhiyun regv |= 0x03;
2112*4882a593Smuzhiyun es7243e_write(0x0b, regv, i2c_clt[index]);
2113*4882a593Smuzhiyun es7243e_read(0x0c, ®v, i2c_clt[index]);
2114*4882a593Smuzhiyun regv &= 0xc0;
2115*4882a593Smuzhiyun regv |= 0x08;
2116*4882a593Smuzhiyun es7243e_write(0x0c, regv, i2c_clt[index]);
2117*4882a593Smuzhiyun work_mode = 0;
2118*4882a593Smuzhiyun break;
2119*4882a593Smuzhiyun case ES7243E_NFS_I2S:
2120*4882a593Smuzhiyun es7243e_read(0x0b, ®v, i2c_clt[index]);
2121*4882a593Smuzhiyun regv &= 0xfc;
2122*4882a593Smuzhiyun es7243e_write(0x0b, regv, i2c_clt[index]);
2123*4882a593Smuzhiyun es7243e_read(0x0c, ®v, i2c_clt[index]);
2124*4882a593Smuzhiyun regv &= 0xc0;
2125*4882a593Smuzhiyun switch (chn) {
2126*4882a593Smuzhiyun case 2:
2127*4882a593Smuzhiyun regv |= 0x01;
2128*4882a593Smuzhiyun work_mode = 2;
2129*4882a593Smuzhiyun break;
2130*4882a593Smuzhiyun case 3:
2131*4882a593Smuzhiyun regv |= 0x02;
2132*4882a593Smuzhiyun work_mode = 3;
2133*4882a593Smuzhiyun break;
2134*4882a593Smuzhiyun case 4:
2135*4882a593Smuzhiyun regv |= 0x03;
2136*4882a593Smuzhiyun work_mode = 4;
2137*4882a593Smuzhiyun break;
2138*4882a593Smuzhiyun case 5:
2139*4882a593Smuzhiyun regv |= 0x04;
2140*4882a593Smuzhiyun work_mode = 5;
2141*4882a593Smuzhiyun break;
2142*4882a593Smuzhiyun case 6:
2143*4882a593Smuzhiyun regv |= 0x05;
2144*4882a593Smuzhiyun work_mode = 6;
2145*4882a593Smuzhiyun break;
2146*4882a593Smuzhiyun case 7:
2147*4882a593Smuzhiyun regv |= 0x06;
2148*4882a593Smuzhiyun work_mode = 7;
2149*4882a593Smuzhiyun break;
2150*4882a593Smuzhiyun case 8:
2151*4882a593Smuzhiyun regv |= 0x07;
2152*4882a593Smuzhiyun work_mode = 8;
2153*4882a593Smuzhiyun break;
2154*4882a593Smuzhiyun default:
2155*4882a593Smuzhiyun work_mode = 0;
2156*4882a593Smuzhiyun break;
2157*4882a593Smuzhiyun }
2158*4882a593Smuzhiyun /*
2159*4882a593Smuzhiyun * the last chip generate flag bits, others chip in sync mode
2160*4882a593Smuzhiyun */
2161*4882a593Smuzhiyun if (index == ((ES7243E_CHANNELS_MAX / 2) - 1))
2162*4882a593Smuzhiyun regv |= 0x10;
2163*4882a593Smuzhiyun else
2164*4882a593Smuzhiyun regv |= 0x20;
2165*4882a593Smuzhiyun es7243e_write(0x0c, regv, i2c_clt[index]);
2166*4882a593Smuzhiyun break;
2167*4882a593Smuzhiyun default:
2168*4882a593Smuzhiyun work_mode = 0;
2169*4882a593Smuzhiyun break;
2170*4882a593Smuzhiyun }
2171*4882a593Smuzhiyun
2172*4882a593Smuzhiyun /*
2173*4882a593Smuzhiyun * set clock divider and multiplexer according clock ratio and nfs mode
2174*4882a593Smuzhiyun */
2175*4882a593Smuzhiyun ratio = ES7243E_MCLK_LRCK_RATIO;
2176*4882a593Smuzhiyun ratio_index = get_mclk_lrck_ratio(ratio, work_mode);
2177*4882a593Smuzhiyun if (ratio_index < 0) {
2178*4882a593Smuzhiyun printk
2179*4882a593Smuzhiyun ("can't get configuration for %d ratio with %d es7243e",
2180*4882a593Smuzhiyun ratio, work_mode);
2181*4882a593Smuzhiyun es7243e_write(0x03, 0x20, i2c_clt[index]);
2182*4882a593Smuzhiyun es7243e_write(0x0d, 0x00, i2c_clt[index]);
2183*4882a593Smuzhiyun es7243e_write(0x04, 0x00, i2c_clt[index]);
2184*4882a593Smuzhiyun es7243e_write(0x05, 0x00, i2c_clt[index]);
2185*4882a593Smuzhiyun } else {
2186*4882a593Smuzhiyun es7243e_write(0x03, ratio_div[ratio_index].osr,
2187*4882a593Smuzhiyun i2c_clt[index]);
2188*4882a593Smuzhiyun es7243e_write(0x0d, ratio_div[ratio_index].scale,
2189*4882a593Smuzhiyun i2c_clt[index]);
2190*4882a593Smuzhiyun es7243e_write(0x04,
2191*4882a593Smuzhiyun ratio_div
2192*4882a593Smuzhiyun [ratio_index].prediv_premulti,
2193*4882a593Smuzhiyun i2c_clt[index]);
2194*4882a593Smuzhiyun es7243e_write(0x05,
2195*4882a593Smuzhiyun ratio_div[ratio_index].cf_dsp_div,
2196*4882a593Smuzhiyun i2c_clt[index]);
2197*4882a593Smuzhiyun }
2198*4882a593Smuzhiyun
2199*4882a593Smuzhiyun es7243e_write(0x09, 0xe0, i2c_clt[index]);
2200*4882a593Smuzhiyun es7243e_write(0x0a, 0xa0, i2c_clt[index]);
2201*4882a593Smuzhiyun
2202*4882a593Smuzhiyun es7243e_write(0x0e, digital_vol[index * 2], i2c_clt[index]);
2203*4882a593Smuzhiyun
2204*4882a593Smuzhiyun es7243e_write(0x0f, 0x80, i2c_clt[index]);
2205*4882a593Smuzhiyun es7243e_write(0x14, 0x0c, i2c_clt[index]);
2206*4882a593Smuzhiyun es7243e_write(0x15, 0x0c, i2c_clt[index]);
2207*4882a593Smuzhiyun if (es7243e->vdda == VDDA_3V3) {
2208*4882a593Smuzhiyun es7243e_write(0x18, 0x26, i2c_clt[index]);
2209*4882a593Smuzhiyun es7243e_write(0x17, 0x02, i2c_clt[index]);
2210*4882a593Smuzhiyun es7243e_write(0x19, 0x77, i2c_clt[index]);
2211*4882a593Smuzhiyun es7243e_write(0x1a, 0xf4, i2c_clt[index]);
2212*4882a593Smuzhiyun es7243e_write(0x1b, 0x66, i2c_clt[index]);
2213*4882a593Smuzhiyun es7243e_write(0x1c, 0x44, i2c_clt[index]);
2214*4882a593Smuzhiyun es7243e_write(0x1d, 0x3c, i2c_clt[index]);
2215*4882a593Smuzhiyun es7243e_write(0x1e, 0x00, i2c_clt[index]);
2216*4882a593Smuzhiyun es7243e_write(0x1f, 0x0c, i2c_clt[index]);
2217*4882a593Smuzhiyun } else {
2218*4882a593Smuzhiyun es7243e_write(0x16, 0x00, i2c_clt[index]);
2219*4882a593Smuzhiyun es7243e_write(0x18, 0x26, i2c_clt[index]);
2220*4882a593Smuzhiyun es7243e_write(0x17, 0x02, i2c_clt[index]);
2221*4882a593Smuzhiyun es7243e_write(0x19, 0x66, i2c_clt[index]);
2222*4882a593Smuzhiyun es7243e_write(0x1a, 0x44, i2c_clt[index]);
2223*4882a593Smuzhiyun es7243e_write(0x1b, 0x44, i2c_clt[index]);
2224*4882a593Smuzhiyun es7243e_write(0x1c, 0x44, i2c_clt[index]);
2225*4882a593Smuzhiyun es7243e_write(0x1d, 0x3c, i2c_clt[index]);
2226*4882a593Smuzhiyun es7243e_write(0x1e, 0x0f, i2c_clt[index]);
2227*4882a593Smuzhiyun es7243e_write(0x1f, 0x07, i2c_clt[index]);
2228*4882a593Smuzhiyun }
2229*4882a593Smuzhiyun es7243e_write(0x00, 0x80, i2c_clt[index]);
2230*4882a593Smuzhiyun es7243e_write(0x01, 0x3a, i2c_clt[index]);
2231*4882a593Smuzhiyun es7243e_write(0x16, 0x00, i2c_clt[index]);
2232*4882a593Smuzhiyun
2233*4882a593Smuzhiyun es7243e_write(0x20, (0x10 | pga_gain[index * 2]),
2234*4882a593Smuzhiyun i2c_clt[index]);
2235*4882a593Smuzhiyun es7243e_write(0x21, (0x10 | pga_gain[index * 2 + 1]),
2236*4882a593Smuzhiyun i2c_clt[index]);
2237*4882a593Smuzhiyun
2238*4882a593Smuzhiyun //es7243e_write(0x1f, 0x03, i2c_clt[index]);
2239*4882a593Smuzhiyun /*
2240*4882a593Smuzhiyun * reset PGA
2241*4882a593Smuzhiyun */
2242*4882a593Smuzhiyun msleep(100);
2243*4882a593Smuzhiyun es7243e_write(0x16, 0x03, i2c_clt[index]);
2244*4882a593Smuzhiyun msleep(100);
2245*4882a593Smuzhiyun es7243e_write(0x16, 0x00, i2c_clt[index]);
2246*4882a593Smuzhiyun }
2247*4882a593Smuzhiyun return 0;
2248*4882a593Smuzhiyun }
2249*4882a593Smuzhiyun
es7243e_remove(struct snd_soc_component * component)2250*4882a593Smuzhiyun static void es7243e_remove(struct snd_soc_component *component)
2251*4882a593Smuzhiyun {
2252*4882a593Smuzhiyun es7243e_set_bias_level(component, SND_SOC_BIAS_OFF);
2253*4882a593Smuzhiyun }
2254*4882a593Smuzhiyun
2255*4882a593Smuzhiyun static struct snd_soc_component_driver soc_codec_dev_es7243e = {
2256*4882a593Smuzhiyun .probe = es7243e_probe,
2257*4882a593Smuzhiyun .remove = es7243e_remove,
2258*4882a593Smuzhiyun .suspend = es7243e_suspend,
2259*4882a593Smuzhiyun .resume = es7243e_resume,
2260*4882a593Smuzhiyun .set_bias_level = es7243e_set_bias_level,
2261*4882a593Smuzhiyun //.idle_bias_off = true,
2262*4882a593Smuzhiyun //.reg_word_size = sizeof(u8),
2263*4882a593Smuzhiyun .idle_bias_on = 1,
2264*4882a593Smuzhiyun .use_pmdown_time = 1,
2265*4882a593Smuzhiyun .endianness = 1,
2266*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
2267*4882a593Smuzhiyun #if ES7243E_CODEC_RW_TEST_EN
2268*4882a593Smuzhiyun .read = es7243e_codec_read,
2269*4882a593Smuzhiyun .write = es7243e_codec_write,
2270*4882a593Smuzhiyun #endif
2271*4882a593Smuzhiyun //.component_driver = {
2272*4882a593Smuzhiyun .controls = es7243e_snd_controls,
2273*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(es7243e_snd_controls),
2274*4882a593Smuzhiyun // }
2275*4882a593Smuzhiyun //,
2276*4882a593Smuzhiyun
2277*4882a593Smuzhiyun };
2278*4882a593Smuzhiyun
2279*4882a593Smuzhiyun static ssize_t
es7243e_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2280*4882a593Smuzhiyun es7243e_store(struct device *dev,
2281*4882a593Smuzhiyun struct device_attribute *attr, const char *buf, size_t count)
2282*4882a593Smuzhiyun {
2283*4882a593Smuzhiyun int val = 0, flag = 0;
2284*4882a593Smuzhiyun u8 i = 0, reg, num, value_w, value_r;
2285*4882a593Smuzhiyun
2286*4882a593Smuzhiyun struct es7243e_priv *es7243e = dev_get_drvdata(dev);
2287*4882a593Smuzhiyun val = simple_strtol(buf, NULL, 16);
2288*4882a593Smuzhiyun flag = (val >> 16) & 0xFF;
2289*4882a593Smuzhiyun
2290*4882a593Smuzhiyun if (flag) {
2291*4882a593Smuzhiyun reg = (val >> 8) & 0xFF;
2292*4882a593Smuzhiyun value_w = val & 0xFF;
2293*4882a593Smuzhiyun printk("\nWrite: start REG:0x%02x,val:0x%02x,count:0x%02x\n",
2294*4882a593Smuzhiyun reg, value_w, flag);
2295*4882a593Smuzhiyun while (flag--) {
2296*4882a593Smuzhiyun es7243e_write(reg, value_w, es7243e->i2c);
2297*4882a593Smuzhiyun printk("Write 0x%02x to REG:0x%02x\n", value_w, reg);
2298*4882a593Smuzhiyun reg++;
2299*4882a593Smuzhiyun }
2300*4882a593Smuzhiyun } else {
2301*4882a593Smuzhiyun reg = (val >> 8) & 0xFF;
2302*4882a593Smuzhiyun num = val & 0xff;
2303*4882a593Smuzhiyun printk("\nRead: start REG:0x%02x,count:0x%02x\n", reg, num);
2304*4882a593Smuzhiyun do {
2305*4882a593Smuzhiyun value_r = 0;
2306*4882a593Smuzhiyun es7243e_read(reg, &value_r, es7243e->i2c);
2307*4882a593Smuzhiyun printk("REG[0x%02x]: 0x%02x; \n", reg, value_r);
2308*4882a593Smuzhiyun reg++;
2309*4882a593Smuzhiyun i++;
2310*4882a593Smuzhiyun if ((i == num) || (i % 4 == 0))
2311*4882a593Smuzhiyun printk("\n");
2312*4882a593Smuzhiyun }
2313*4882a593Smuzhiyun while (i < num);
2314*4882a593Smuzhiyun }
2315*4882a593Smuzhiyun
2316*4882a593Smuzhiyun return count;
2317*4882a593Smuzhiyun }
2318*4882a593Smuzhiyun
2319*4882a593Smuzhiyun static ssize_t
es7243e_show(struct device * dev,struct device_attribute * attr,char * buf)2320*4882a593Smuzhiyun es7243e_show(struct device *dev, struct device_attribute *attr, char *buf)
2321*4882a593Smuzhiyun {
2322*4882a593Smuzhiyun printk("echo flag|reg|val > es7243e\n");
2323*4882a593Smuzhiyun printk("eg read star addres=0x06,count 0x10:echo 0610 >es7243e\n");
2324*4882a593Smuzhiyun printk
2325*4882a593Smuzhiyun ("eg write star addres=0x90,value=0x3c,count=4:echo 4903c >es7243\n");
2326*4882a593Smuzhiyun //printk("eg write value:0xfe to address:0x06 :echo 106fe > es7243\n");
2327*4882a593Smuzhiyun return 0;
2328*4882a593Smuzhiyun }
2329*4882a593Smuzhiyun
2330*4882a593Smuzhiyun static DEVICE_ATTR(es7243e, 0644, es7243e_show, es7243e_store);
2331*4882a593Smuzhiyun
2332*4882a593Smuzhiyun static struct attribute *es7243e_debug_attrs[] = {
2333*4882a593Smuzhiyun &dev_attr_es7243e.attr,
2334*4882a593Smuzhiyun NULL,
2335*4882a593Smuzhiyun };
2336*4882a593Smuzhiyun
2337*4882a593Smuzhiyun static struct attribute_group es7243e_debug_attr_group = {
2338*4882a593Smuzhiyun .name = "es7243e_debug",
2339*4882a593Smuzhiyun .attrs = es7243e_debug_attrs,
2340*4882a593Smuzhiyun };
2341*4882a593Smuzhiyun
2342*4882a593Smuzhiyun /*
2343*4882a593Smuzhiyun * If the i2c layer weren't so broken, we could pass this kind of data
2344*4882a593Smuzhiyun * around
2345*4882a593Smuzhiyun */
2346*4882a593Smuzhiyun static int
es7243e_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * i2c_id)2347*4882a593Smuzhiyun es7243e_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *i2c_id)
2348*4882a593Smuzhiyun {
2349*4882a593Smuzhiyun struct es7243e_priv *es7243e;
2350*4882a593Smuzhiyun int ret;
2351*4882a593Smuzhiyun
2352*4882a593Smuzhiyun printk("begin->>>>>>>>>>%s!\n", __func__);
2353*4882a593Smuzhiyun
2354*4882a593Smuzhiyun es7243e = devm_kzalloc(&i2c->dev, sizeof(struct es7243e_priv),
2355*4882a593Smuzhiyun GFP_KERNEL);
2356*4882a593Smuzhiyun if (es7243e == NULL)
2357*4882a593Smuzhiyun return -ENOMEM;
2358*4882a593Smuzhiyun es7243e->i2c = i2c;
2359*4882a593Smuzhiyun es7243e->tdm = ES7243E_WORK_MODE; //to initialize tdm mode
2360*4882a593Smuzhiyun es7243e->mclksrc = ES7243E_MCLK_SOURCE;
2361*4882a593Smuzhiyun es7243e->dmic = DMIC_INTERFACE;
2362*4882a593Smuzhiyun es7243e->mclkinv = MCLK_INVERTED_OR_NOT;
2363*4882a593Smuzhiyun es7243e->bclkinv = BCLK_INVERTED_OR_NOT;
2364*4882a593Smuzhiyun es7243e->vdda = VDDA_VOLTAGE;
2365*4882a593Smuzhiyun
2366*4882a593Smuzhiyun dev_set_drvdata(&i2c->dev, es7243e);
2367*4882a593Smuzhiyun //i2c_set_clientdata(i2c, es7243e);
2368*4882a593Smuzhiyun //es7243e->regmap = devm_regmap_init_i2c(i2c, &es7243e_regmap);
2369*4882a593Smuzhiyun // if (IS_ERR(es7243e->regmap)) {
2370*4882a593Smuzhiyun // ret = PTR_ERR(es7243e->regmap);
2371*4882a593Smuzhiyun // dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2372*4882a593Smuzhiyun // ret);
2373*4882a593Smuzhiyun // return ret;
2374*4882a593Smuzhiyun // }
2375*4882a593Smuzhiyun if (i2c_id->driver_data < (ES7243E_CHANNELS_MAX) / 2) {
2376*4882a593Smuzhiyun i2c_clt[i2c_id->driver_data] = i2c;
2377*4882a593Smuzhiyun ret = devm_snd_soc_register_component(&i2c->dev,
2378*4882a593Smuzhiyun &soc_codec_dev_es7243e,
2379*4882a593Smuzhiyun es7243e_dai
2380*4882a593Smuzhiyun [i2c_id->driver_data], 1);
2381*4882a593Smuzhiyun if (ret < 0) {
2382*4882a593Smuzhiyun devm_kfree(&i2c->dev, es7243e);
2383*4882a593Smuzhiyun printk("%s(), failed to register codec device\n",
2384*4882a593Smuzhiyun __func__);
2385*4882a593Smuzhiyun return ret;
2386*4882a593Smuzhiyun }
2387*4882a593Smuzhiyun }
2388*4882a593Smuzhiyun ret = sysfs_create_group(&i2c->dev.kobj, &es7243e_debug_attr_group);
2389*4882a593Smuzhiyun if (ret) {
2390*4882a593Smuzhiyun pr_err("failed to create attr group\n");
2391*4882a593Smuzhiyun }
2392*4882a593Smuzhiyun return ret;
2393*4882a593Smuzhiyun }
2394*4882a593Smuzhiyun
es7243e_i2c_remove(struct i2c_client * i2c)2395*4882a593Smuzhiyun static int __exit es7243e_i2c_remove(struct i2c_client *i2c)
2396*4882a593Smuzhiyun {
2397*4882a593Smuzhiyun sysfs_remove_group(&i2c->dev.kobj, &es7243e_debug_attr_group);
2398*4882a593Smuzhiyun
2399*4882a593Smuzhiyun return 0;
2400*4882a593Smuzhiyun }
2401*4882a593Smuzhiyun
2402*4882a593Smuzhiyun #if !ES7243E_MATCH_DTS_EN
2403*4882a593Smuzhiyun static int
es7243e_i2c_detect(struct i2c_client * client,struct i2c_board_info * info)2404*4882a593Smuzhiyun es7243e_i2c_detect(struct i2c_client *client, struct i2c_board_info *info)
2405*4882a593Smuzhiyun {
2406*4882a593Smuzhiyun struct i2c_adapter *adapter = client->adapter;
2407*4882a593Smuzhiyun printk("Enter into %s()\n", __func__);
2408*4882a593Smuzhiyun if (adapter->nr == ES7243E_I2C_BUS_NUM) {
2409*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 0
2410*4882a593Smuzhiyun if (client->addr == ES7243E_I2C_CHIP_ADDRESS_0) {
2411*4882a593Smuzhiyun strlcpy(info->type, "ES7243E_MicArray_0", I2C_NAME_SIZE);
2412*4882a593Smuzhiyun return 0;
2413*4882a593Smuzhiyun }
2414*4882a593Smuzhiyun #endif
2415*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 2
2416*4882a593Smuzhiyun else if (client->addr == ES7243E_I2C_CHIP_ADDRESS_1) {
2417*4882a593Smuzhiyun strlcpy(info->type, "ES7243E_MicArray_1", I2C_NAME_SIZE);
2418*4882a593Smuzhiyun return 0;
2419*4882a593Smuzhiyun }
2420*4882a593Smuzhiyun #endif
2421*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 4
2422*4882a593Smuzhiyun else if (client->addr == ES7243E_I2C_CHIP_ADDRESS_2) {
2423*4882a593Smuzhiyun strlcpy(info->type, "ES7243E_MicArray_2", I2C_NAME_SIZE);
2424*4882a593Smuzhiyun return 0;
2425*4882a593Smuzhiyun }
2426*4882a593Smuzhiyun #endif
2427*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 6
2428*4882a593Smuzhiyun else if (client->addr == ES7243E_I2C_CHIP_ADDRESS_3) {
2429*4882a593Smuzhiyun strlcpy(info->type, "ES7243E_MicArray_3", I2C_NAME_SIZE);
2430*4882a593Smuzhiyun return 0;
2431*4882a593Smuzhiyun }
2432*4882a593Smuzhiyun #endif
2433*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 8
2434*4882a593Smuzhiyun else if (client->addr == ES7243E_I2C_CHIP_ADDRESS_4) {
2435*4882a593Smuzhiyun strlcpy(info->type, "ES7243E_MicArray_4", I2C_NAME_SIZE);
2436*4882a593Smuzhiyun return 0;
2437*4882a593Smuzhiyun }
2438*4882a593Smuzhiyun #endif
2439*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 10
2440*4882a593Smuzhiyun else if (client->addr == ES7243E_I2C_CHIP_ADDRESS_5) {
2441*4882a593Smuzhiyun strlcpy(info->type, "ES7243E_MicArray_5", I2C_NAME_SIZE);
2442*4882a593Smuzhiyun return 0;
2443*4882a593Smuzhiyun }
2444*4882a593Smuzhiyun #endif
2445*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 12
2446*4882a593Smuzhiyun else if (client->addr == ES7243E_I2C_CHIP_ADDRESS_6) {
2447*4882a593Smuzhiyun strlcpy(info->type, "ES7243E_MicArray_6", I2C_NAME_SIZE);
2448*4882a593Smuzhiyun return 0;
2449*4882a593Smuzhiyun }
2450*4882a593Smuzhiyun #endif
2451*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 14
2452*4882a593Smuzhiyun else if (client->addr == ES7243E_I2C_CHIP_ADDRESS_7) {
2453*4882a593Smuzhiyun strlcpy(info->type, "ES7243E_MicArray_7", I2C_NAME_SIZE);
2454*4882a593Smuzhiyun return 0;
2455*4882a593Smuzhiyun }
2456*4882a593Smuzhiyun #endif
2457*4882a593Smuzhiyun }
2458*4882a593Smuzhiyun return -ENODEV;
2459*4882a593Smuzhiyun }
2460*4882a593Smuzhiyun #endif
2461*4882a593Smuzhiyun
2462*4882a593Smuzhiyun static const unsigned short es7243e_i2c_addr[] = {
2463*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 0
2464*4882a593Smuzhiyun ES7243E_I2C_CHIP_ADDRESS_0,
2465*4882a593Smuzhiyun #endif
2466*4882a593Smuzhiyun
2467*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 2
2468*4882a593Smuzhiyun ES7243E_I2C_CHIP_ADDRESS_1,
2469*4882a593Smuzhiyun #endif
2470*4882a593Smuzhiyun
2471*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 4
2472*4882a593Smuzhiyun ES7243E_I2C_CHIP_ADDRESS_2,
2473*4882a593Smuzhiyun #endif
2474*4882a593Smuzhiyun
2475*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 6
2476*4882a593Smuzhiyun ES7243E_I2C_CHIP_ADDRESS_3,
2477*4882a593Smuzhiyun #endif
2478*4882a593Smuzhiyun
2479*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 8
2480*4882a593Smuzhiyun ES7243E_I2C_CHIP_ADDRESS_4,
2481*4882a593Smuzhiyun #endif
2482*4882a593Smuzhiyun
2483*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 10
2484*4882a593Smuzhiyun ES7243E_I2C_CHIP_ADDRESS_5,
2485*4882a593Smuzhiyun #endif
2486*4882a593Smuzhiyun
2487*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 12
2488*4882a593Smuzhiyun ES7243E_I2C_CHIP_ADDRESS_6,
2489*4882a593Smuzhiyun #endif
2490*4882a593Smuzhiyun
2491*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 14
2492*4882a593Smuzhiyun ES7243E_I2C_CHIP_ADDRESS_7,
2493*4882a593Smuzhiyun #endif
2494*4882a593Smuzhiyun
2495*4882a593Smuzhiyun I2C_CLIENT_END,
2496*4882a593Smuzhiyun };
2497*4882a593Smuzhiyun
2498*4882a593Smuzhiyun /*
2499*4882a593Smuzhiyun * device tree source or i2c_board_info both use to transfer hardware information to linux kernel,
2500*4882a593Smuzhiyun * use one of them wil be OK
2501*4882a593Smuzhiyun */
2502*4882a593Smuzhiyun #if !ES7243E_MATCH_DTS_EN
2503*4882a593Smuzhiyun static struct i2c_board_info es7243e_i2c_board_info[] = {
2504*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 0
2505*4882a593Smuzhiyun {I2C_BOARD_INFO("ES7243E_MicArray_0", ES7243E_I2C_CHIP_ADDRESS_0),}, //es7243e_0
2506*4882a593Smuzhiyun #endif
2507*4882a593Smuzhiyun
2508*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 2
2509*4882a593Smuzhiyun {I2C_BOARD_INFO("ES7243E_MicArray_1", ES7243E_I2C_CHIP_ADDRESS_1),}, //es7243e_1
2510*4882a593Smuzhiyun #endif
2511*4882a593Smuzhiyun
2512*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 4
2513*4882a593Smuzhiyun {I2C_BOARD_INFO("ES7243E_MicArray_2", ES7243E_I2C_CHIP_ADDRESS_2),}, //es7243e_2
2514*4882a593Smuzhiyun #endif
2515*4882a593Smuzhiyun
2516*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 6
2517*4882a593Smuzhiyun {I2C_BOARD_INFO("ES7243E_MicArray_3", ES7243E_I2C_CHIP_ADDRESS_3),}, //es7243e_3
2518*4882a593Smuzhiyun #endif
2519*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 8
2520*4882a593Smuzhiyun {I2C_BOARD_INFO("ES7243E_MicArray_4", ES7243E_I2C_CHIP_ADDRESS_4),}, //es7243e_4
2521*4882a593Smuzhiyun #endif
2522*4882a593Smuzhiyun
2523*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 10
2524*4882a593Smuzhiyun {I2C_BOARD_INFO("ES7243E_MicArray_5", ES7243E_I2C_CHIP_ADDRESS_5),}, //es7243e_5
2525*4882a593Smuzhiyun #endif
2526*4882a593Smuzhiyun
2527*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 12
2528*4882a593Smuzhiyun {I2C_BOARD_INFO("ES7243E_MicArray_6", ES7243E_I2C_CHIP_ADDRESS_6),}, //es7243e_6
2529*4882a593Smuzhiyun #endif
2530*4882a593Smuzhiyun
2531*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 14
2532*4882a593Smuzhiyun {I2C_BOARD_INFO("ES7243E_MicArray_7", ES7243E_I2C_CHIP_ADDRESS_7),}, //es7243e_7
2533*4882a593Smuzhiyun #endif
2534*4882a593Smuzhiyun };
2535*4882a593Smuzhiyun #endif
2536*4882a593Smuzhiyun static const struct i2c_device_id es7243e_i2c_id[] = {
2537*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 0
2538*4882a593Smuzhiyun {"ES7243E_MicArray_0", 0}, //es7243e_0
2539*4882a593Smuzhiyun #endif
2540*4882a593Smuzhiyun
2541*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 2
2542*4882a593Smuzhiyun {"ES7243E_MicArray_1", 1}, //es7243e_1
2543*4882a593Smuzhiyun #endif
2544*4882a593Smuzhiyun
2545*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 4
2546*4882a593Smuzhiyun {"ES7243E_MicArray_2", 2}, //es7243e_2
2547*4882a593Smuzhiyun #endif
2548*4882a593Smuzhiyun
2549*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 6
2550*4882a593Smuzhiyun {"ES7243E_MicArray_3", 3}, //es7243e_3
2551*4882a593Smuzhiyun #endif
2552*4882a593Smuzhiyun
2553*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 8
2554*4882a593Smuzhiyun {"ES7243E_MicArray_4", 4}, //es7243e_4
2555*4882a593Smuzhiyun #endif
2556*4882a593Smuzhiyun
2557*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 10
2558*4882a593Smuzhiyun {"ES7243E_MicArray_5", 5}, //es7243e_5
2559*4882a593Smuzhiyun #endif
2560*4882a593Smuzhiyun
2561*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 12
2562*4882a593Smuzhiyun {"ES7243E_MicArray_6", 6}, //es7243e_6
2563*4882a593Smuzhiyun #endif
2564*4882a593Smuzhiyun
2565*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 14
2566*4882a593Smuzhiyun {"ES7243E_MicArray_7", 7}, //es7243e_7
2567*4882a593Smuzhiyun #endif
2568*4882a593Smuzhiyun {}
2569*4882a593Smuzhiyun };
2570*4882a593Smuzhiyun
2571*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, es7243e_i2c_id);
2572*4882a593Smuzhiyun
2573*4882a593Smuzhiyun static const struct of_device_id es7243e_dt_ids[] = {
2574*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 0
2575*4882a593Smuzhiyun {.compatible = "ES7243E_MicArray_0",}, //es7243e_0
2576*4882a593Smuzhiyun #endif
2577*4882a593Smuzhiyun
2578*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 2
2579*4882a593Smuzhiyun {.compatible = "ES7243E_MicArray_1",}, //es7243e_1
2580*4882a593Smuzhiyun #endif
2581*4882a593Smuzhiyun
2582*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 4
2583*4882a593Smuzhiyun {.compatible = "ES7243E_MicArray_2",}, //es7243e_2
2584*4882a593Smuzhiyun #endif
2585*4882a593Smuzhiyun
2586*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 6
2587*4882a593Smuzhiyun {.compatible = "ES7243E_MicArray_3",}, //es7243e_3
2588*4882a593Smuzhiyun #endif
2589*4882a593Smuzhiyun
2590*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 8
2591*4882a593Smuzhiyun {.compatible = "ES7243E_MicArray_4",}, //es7243e_4
2592*4882a593Smuzhiyun #endif
2593*4882a593Smuzhiyun
2594*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 10
2595*4882a593Smuzhiyun {.compatible = "ES7243E_MicArray_5",}, //es7243e_5
2596*4882a593Smuzhiyun #endif
2597*4882a593Smuzhiyun
2598*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 12
2599*4882a593Smuzhiyun {.compatible = "ES7243E_MicArray_6",}, //es7243e_6
2600*4882a593Smuzhiyun #endif
2601*4882a593Smuzhiyun
2602*4882a593Smuzhiyun #if ES7243E_CHANNELS_MAX > 14
2603*4882a593Smuzhiyun {.compatible = "ES7243E_MicArray_7",}, //es7243e_7
2604*4882a593Smuzhiyun #endif
2605*4882a593Smuzhiyun {}
2606*4882a593Smuzhiyun };
2607*4882a593Smuzhiyun
2608*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, es7243e_dt_ids);
2609*4882a593Smuzhiyun
2610*4882a593Smuzhiyun static struct i2c_driver es7243e_i2c_driver = {
2611*4882a593Smuzhiyun .driver = {
2612*4882a593Smuzhiyun .name = "es7243e",
2613*4882a593Smuzhiyun .owner = THIS_MODULE,
2614*4882a593Smuzhiyun #if ES7243E_MATCH_DTS_EN
2615*4882a593Smuzhiyun .of_match_table = es7243e_dt_ids,
2616*4882a593Smuzhiyun #endif
2617*4882a593Smuzhiyun },
2618*4882a593Smuzhiyun .probe = es7243e_i2c_probe,
2619*4882a593Smuzhiyun .remove = __exit_p(es7243e_i2c_remove),
2620*4882a593Smuzhiyun .class = I2C_CLASS_HWMON,
2621*4882a593Smuzhiyun .id_table = es7243e_i2c_id,
2622*4882a593Smuzhiyun
2623*4882a593Smuzhiyun #if !ES7243E_MATCH_DTS_EN
2624*4882a593Smuzhiyun .address_list = es7243e_i2c_addr,
2625*4882a593Smuzhiyun .detect = es7243e_i2c_detect,
2626*4882a593Smuzhiyun #endif
2627*4882a593Smuzhiyun
2628*4882a593Smuzhiyun };
2629*4882a593Smuzhiyun
es7243e_modinit(void)2630*4882a593Smuzhiyun static int __init es7243e_modinit(void)
2631*4882a593Smuzhiyun {
2632*4882a593Smuzhiyun int ret;
2633*4882a593Smuzhiyun #if 0
2634*4882a593Smuzhiyun int i;
2635*4882a593Smuzhiyun struct i2c_adapter *adapter;
2636*4882a593Smuzhiyun struct i2c_client *client;
2637*4882a593Smuzhiyun #endif
2638*4882a593Smuzhiyun
2639*4882a593Smuzhiyun #if 0
2640*4882a593Smuzhiyun adapter = i2c_get_adapter(ES7243E_I2C_BUS_NUM);
2641*4882a593Smuzhiyun if (!adapter) {
2642*4882a593Smuzhiyun printk("i2c_get_adapter() fail!\n");
2643*4882a593Smuzhiyun return -ENODEV;
2644*4882a593Smuzhiyun }
2645*4882a593Smuzhiyun printk("%s() begin0000\n", __func__);
2646*4882a593Smuzhiyun
2647*4882a593Smuzhiyun for (i = 0; i < ES7243E_CHANNELS_MAX / 2; i++) {
2648*4882a593Smuzhiyun client = i2c_new_device(adapter, &es7243e_i2c_board_info[i]);
2649*4882a593Smuzhiyun printk("%s() i2c_new_device\n", __func__);
2650*4882a593Smuzhiyun if (!client)
2651*4882a593Smuzhiyun return -ENODEV;
2652*4882a593Smuzhiyun }
2653*4882a593Smuzhiyun i2c_put_adapter(adapter);
2654*4882a593Smuzhiyun #endif
2655*4882a593Smuzhiyun ret = i2c_add_driver(&es7243e_i2c_driver);
2656*4882a593Smuzhiyun if (ret != 0)
2657*4882a593Smuzhiyun printk("Failed to register es7243 i2c driver : %d \n", ret);
2658*4882a593Smuzhiyun return ret;
2659*4882a593Smuzhiyun }
2660*4882a593Smuzhiyun
2661*4882a593Smuzhiyun //late_initcall(es7243e_modinit);
2662*4882a593Smuzhiyun module_init(es7243e_modinit);
es7243e_exit(void)2663*4882a593Smuzhiyun static void __exit es7243e_exit(void)
2664*4882a593Smuzhiyun {
2665*4882a593Smuzhiyun i2c_del_driver(&es7243e_i2c_driver);
2666*4882a593Smuzhiyun }
2667*4882a593Smuzhiyun
2668*4882a593Smuzhiyun module_exit(es7243e_exit);
2669*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC ES7243E audio adc driver");
2670*4882a593Smuzhiyun MODULE_AUTHOR("David Yang <yangxiaohua@everest-semi.com>");
2671*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
2672