1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * ALSA SoC ES7210 codec driver 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Author: David Yang, <yangxiaohua@everest-semi.com> 5*4882a593Smuzhiyun * or 6*4882a593Smuzhiyun * <info@everest-semi.com> 7*4882a593Smuzhiyun * Copyright: (C) 2018 Everest Semiconductor Co., Ltd 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 10*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as 11*4882a593Smuzhiyun * published by the Free Software Foundation. 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #ifndef _ES7210_H 15*4882a593Smuzhiyun #define _ES7210_H 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define ES7210_RESET_CTL_REG00 0x00 18*4882a593Smuzhiyun #define ES7210_CLK_ON_OFF_REG01 0x01 19*4882a593Smuzhiyun #define ES7210_MCLK_CTL_REG02 0x02 20*4882a593Smuzhiyun #define ES7210_MST_CLK_CTL_REG03 0x03 21*4882a593Smuzhiyun #define ES7210_MST_LRCDIVH_REG04 0x04 22*4882a593Smuzhiyun #define ES7210_MST_LRCDIVL_REG05 0x05 23*4882a593Smuzhiyun #define ES7210_DIGITAL_PDN_REG06 0x06 24*4882a593Smuzhiyun #define ES7210_ADC_OSR_REG07 0x07 25*4882a593Smuzhiyun #define ES7210_MODE_CFG_REG08 0x08 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #define ES7210_TCT0_CHPINI_REG09 0x09 28*4882a593Smuzhiyun #define ES7210_TCT1_CHPINI_REG0A 0x0A 29*4882a593Smuzhiyun #define ES7210_CHIP_STA_REG0B 0x0B 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define ES7210_IRQ_CTL_REG0C 0x0C 32*4882a593Smuzhiyun #define ES7210_MISC_CTL_REG0D 0x0D 33*4882a593Smuzhiyun #define ES7210_DMIC_CTL_REG10 0x10 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define ES7210_SDP_CFG1_REG11 0x11 36*4882a593Smuzhiyun #define ES7210_SDP_CFG2_REG12 0x12 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define ES7210_ADC_AUTOMUTE_REG13 0x13 39*4882a593Smuzhiyun #define ES7210_ADC34_MUTE_REG14 0x14 40*4882a593Smuzhiyun #define ES7210_ADC12_MUTE_REG15 0x15 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define ES7210_ALC_SEL_REG16 0x16 43*4882a593Smuzhiyun #define ES7210_ALC_COM_CFG1_REG17 0x17 44*4882a593Smuzhiyun #define ES7210_ALC34_LVL_REG18 0x18 45*4882a593Smuzhiyun #define ES7210_ALC12_LVL_REG19 0x19 46*4882a593Smuzhiyun #define ES7210_ALC_COM_CFG2_REG1A 0x1A 47*4882a593Smuzhiyun #define ES7210_ALC4_MAX_GAIN_REG1B 0x1B 48*4882a593Smuzhiyun #define ES7210_ALC3_MAX_GAIN_REG1C 0x1C 49*4882a593Smuzhiyun #define ES7210_ALC2_MAX_GAIN_REG1D 0x1D 50*4882a593Smuzhiyun #define ES7210_ALC1_MAX_GAIN_REG1E 0x1E 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #define ES7210_ADC34_HPF2_REG20 0x20 53*4882a593Smuzhiyun #define ES7210_ADC34_HPF1_REG21 0x21 54*4882a593Smuzhiyun #define ES7210_ADC12_HPF2_REG22 0x22 55*4882a593Smuzhiyun #define ES7210_ADC12_HPF1_REG23 0x23 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #define ES7210_CHP_ID1_REG3D 0x3D 58*4882a593Smuzhiyun #define ES7210_CHP_ID0_REG3E 0x3E 59*4882a593Smuzhiyun #define ES7210_CHP_VER_REG3F 0x3F 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun #define ES7210_ANALOG_SYS_REG40 0x40 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun #define ES7210_MICBIAS12_REG41 0x41 64*4882a593Smuzhiyun #define ES7210_MICBIAS34_REG42 0x42 65*4882a593Smuzhiyun #define ES7210_MIC1_GAIN_REG43 0x43 66*4882a593Smuzhiyun #define ES7210_MIC2_GAIN_REG44 0x44 67*4882a593Smuzhiyun #define ES7210_MIC3_GAIN_REG45 0x45 68*4882a593Smuzhiyun #define ES7210_MIC4_GAIN_REG46 0x46 69*4882a593Smuzhiyun #define ES7210_MIC1_LP_REG47 0x47 70*4882a593Smuzhiyun #define ES7210_MIC2_LP_REG48 0x48 71*4882a593Smuzhiyun #define ES7210_MIC3_LP_REG49 0x49 72*4882a593Smuzhiyun #define ES7210_MIC4_LP_REG4A 0x4A 73*4882a593Smuzhiyun #define ES7210_MIC12_PDN_REG4B 0x4B 74*4882a593Smuzhiyun #define ES7210_MIC34_PDN_REG4C 0x4C 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun #endif /* _ES7210_H_ */ 77