xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/es7202.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * ALSA SoC ES7202 pdm adc driver
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Author:      David Yang, <yangxiaohua@everest-semi.com>
5*4882a593Smuzhiyun  * Copyright:   (C) 2020 Everest Semiconductor Co Ltd.,
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Based on sound/soc/codecs/es7210.c by David Yang
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify
10*4882a593Smuzhiyun  * it under the terms of the GNU General Public License version 2 as
11*4882a593Smuzhiyun  * published by the Free Software Foundation.
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * Notes:
14*4882a593Smuzhiyun  *  ES7202 is 2-ch ADC with PDM interface
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  */
17*4882a593Smuzhiyun #include <linux/clk.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/moduleparam.h>
20*4882a593Smuzhiyun #include <linux/init.h>
21*4882a593Smuzhiyun #include <linux/delay.h>
22*4882a593Smuzhiyun #include <linux/pm.h>
23*4882a593Smuzhiyun #include <linux/i2c.h>
24*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
25*4882a593Smuzhiyun #include <linux/spi/spi.h>
26*4882a593Smuzhiyun #include <linux/platform_device.h>
27*4882a593Smuzhiyun #include <linux/slab.h>
28*4882a593Smuzhiyun #include <linux/of_gpio.h>
29*4882a593Smuzhiyun #include <sound/core.h>
30*4882a593Smuzhiyun #include <sound/pcm.h>
31*4882a593Smuzhiyun #include <sound/pcm_params.h>
32*4882a593Smuzhiyun #include <sound/tlv.h>
33*4882a593Smuzhiyun #include <sound/soc.h>
34*4882a593Smuzhiyun #include <sound/soc-dapm.h>
35*4882a593Smuzhiyun #include <sound/initval.h>
36*4882a593Smuzhiyun #include <linux/proc_fs.h>
37*4882a593Smuzhiyun #include <linux/gpio.h>
38*4882a593Smuzhiyun #include <linux/interrupt.h>
39*4882a593Smuzhiyun #include <linux/irq.h>
40*4882a593Smuzhiyun #include <linux/regmap.h>
41*4882a593Smuzhiyun #include "es7202.h"
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun //static struct snd_soc_codec *es7202_codec;
44*4882a593Smuzhiyun struct i2c_client *i2c_ctl[ADC_DEV_MAXNUM];
45*4882a593Smuzhiyun struct snd_soc_component *tron_component1[ADC_DEV_MAXNUM];
46*4882a593Smuzhiyun static int es7202_adc_num = 0;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun /* codec private data */
49*4882a593Smuzhiyun struct es7202_priv {
50*4882a593Smuzhiyun 	struct regmap *regmap;
51*4882a593Smuzhiyun 	struct i2c_client *i2c;
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	unsigned int pwr_vdd_voltage;
54*4882a593Smuzhiyun 	struct regulator *vdd;
55*4882a593Smuzhiyun 	int reset_gpio;
56*4882a593Smuzhiyun 	bool reset_active_level;
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun static const struct reg_default es7202_reg_defaults[] = {
60*4882a593Smuzhiyun 	{0x00, 0x10}, {0x01, 0x00}, {0x02, 0x04}, {0x03, 0x00},
61*4882a593Smuzhiyun 	{0x04, 0x01}, {0x05, 0x18}, {0x06, 0x00}, {0x07, 0x30},
62*4882a593Smuzhiyun 	{0x08, 0x02}, {0x10, 0xff}, {0x11, 0x0c}, {0x12, 0x55},
63*4882a593Smuzhiyun 	{0x13, 0x55}, {0x14, 0x8c}, {0x15, 0x33}, {0x16, 0x33},
64*4882a593Smuzhiyun 	{0x17, 0x33}, {0x18, 0x44}, {0x19, 0x00}, {0x1a, 0x00},
65*4882a593Smuzhiyun 	{0x1b, 0x00}, {0x1c, 0xf8}, {0x1d, 0x18}, {0x1e, 0x18},
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun 
es7202_read(u8 reg,u8 * rt_value,struct i2c_client * client)68*4882a593Smuzhiyun static int es7202_read(u8 reg, u8 * rt_value, struct i2c_client *client)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	int ret;
71*4882a593Smuzhiyun 	u8 read_cmd[3] = { 0 };
72*4882a593Smuzhiyun 	u8 cmd_len = 0;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	read_cmd[0] = reg;
75*4882a593Smuzhiyun 	cmd_len = 1;
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	if (!client || !client->adapter)
78*4882a593Smuzhiyun 		return -1;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	ret = i2c_master_send(client, read_cmd, cmd_len);
81*4882a593Smuzhiyun 	if (ret != cmd_len) {
82*4882a593Smuzhiyun 		printk("es7202_read error1\n");
83*4882a593Smuzhiyun 		return -1;
84*4882a593Smuzhiyun 	}
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	ret = i2c_master_recv(client, rt_value, 1);
87*4882a593Smuzhiyun 	if (ret != 1) {
88*4882a593Smuzhiyun 		printk("es7202_read error2, ret = %d.\n", ret);
89*4882a593Smuzhiyun 		return -1;
90*4882a593Smuzhiyun 	}
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	return 0;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun 
es7202_write(u8 reg,unsigned char value,struct i2c_client * client)95*4882a593Smuzhiyun static int es7202_write(u8 reg, unsigned char value, struct i2c_client *client)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun 	int ret = 0;
98*4882a593Smuzhiyun 	u8 write_cmd[2] = { 0 };
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	if (!client || !client->adapter)
101*4882a593Smuzhiyun 		return -1;
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	write_cmd[0] = reg;
104*4882a593Smuzhiyun 	write_cmd[1] = value;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	ret = i2c_master_send(client, write_cmd, 2);
107*4882a593Smuzhiyun 	if (ret != 2) {
108*4882a593Smuzhiyun 		printk("es7202_write error->[REG-0x%02x,val-0x%02x]\n",
109*4882a593Smuzhiyun 		       reg, value);
110*4882a593Smuzhiyun 		return -1;
111*4882a593Smuzhiyun 	}
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	return 0;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun 
es7202_update_bits(u8 reg,u8 mask,u8 value,struct i2c_client * client)116*4882a593Smuzhiyun static int es7202_update_bits(u8 reg, u8 mask, u8 value,
117*4882a593Smuzhiyun 			      struct i2c_client *client)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun 	u8 val_old = 0, val_new = 0;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	es7202_read(reg, &val_old, client);
122*4882a593Smuzhiyun 	val_new = (val_old & ~mask) | (value & mask);
123*4882a593Smuzhiyun 	if (val_new != val_old) {
124*4882a593Smuzhiyun 		es7202_write(reg, val_new, client);
125*4882a593Smuzhiyun 	}
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	return 0;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun #if 0
130*4882a593Smuzhiyun static int es7202_multi_chips_write(u8 reg, unsigned char value)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun 	u8 i;
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	for (i = 0; i < ADC_DEV_MAXNUM; i++) {
135*4882a593Smuzhiyun 		es7202_write(reg, value, i2c_ctl[i]);
136*4882a593Smuzhiyun 	}
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	return 0;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun #endif
es7202_multi_chips_update_bits(u8 reg,u8 mask,u8 value)141*4882a593Smuzhiyun static int es7202_multi_chips_update_bits(u8 reg, u8 mask, u8 value)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun 	u8 i;
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	for (i = 0; i < ADC_DEV_MAXNUM; i++) {
146*4882a593Smuzhiyun 		es7202_update_bits(reg, mask, value, i2c_ctl[i]);
147*4882a593Smuzhiyun 	}
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	return 0;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun static const DECLARE_TLV_DB_SCALE(mic_boost_tlv, 0, 300, 0);
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 0
es7202_micboost1_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)157*4882a593Smuzhiyun static int es7202_micboost1_setting_set(struct snd_kcontrol *kcontrol,
158*4882a593Smuzhiyun 			struct snd_ctl_elem_value *ucontrol)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun 	es7202_update_bits(0x1d, 0x0F,
161*4882a593Smuzhiyun 		ucontrol->value.integer.value[0] & 0x0f,
162*4882a593Smuzhiyun 		i2c_ctl[0]);
163*4882a593Smuzhiyun 	return 0;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun 
es7202_micboost1_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)166*4882a593Smuzhiyun static int es7202_micboost1_setting_get(struct snd_kcontrol *kcontrol,
167*4882a593Smuzhiyun 			struct snd_ctl_elem_value *ucontrol)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun 	u8 val = 0;
170*4882a593Smuzhiyun 	es7202_read(0x1d, &val, i2c_ctl[0]);
171*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val & 0x0f;
172*4882a593Smuzhiyun 	return 0;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun 
es7202_micboost2_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)175*4882a593Smuzhiyun static int es7202_micboost2_setting_set(struct snd_kcontrol *kcontrol,
176*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun 	es7202_update_bits(0x1e,
179*4882a593Smuzhiyun 			   0x0F,
180*4882a593Smuzhiyun 			   ucontrol->value.integer.value[0] & 0x0f, i2c_ctl[0]);
181*4882a593Smuzhiyun 	return 0;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun 
es7202_micboost2_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)184*4882a593Smuzhiyun static int es7202_micboost2_setting_get(struct snd_kcontrol *kcontrol,
185*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun 	u8 val = 0;
188*4882a593Smuzhiyun 	es7202_read(0x1e, &val, i2c_ctl[0]);
189*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val & 0x0f;
190*4882a593Smuzhiyun 	return 0;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun #endif
193*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 2
es7202_micboost3_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)194*4882a593Smuzhiyun static int es7202_micboost3_setting_set(struct snd_kcontrol *kcontrol,
195*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun 	es7202_update_bits(0x1d,
198*4882a593Smuzhiyun 			   0x0F,
199*4882a593Smuzhiyun 			   ucontrol->value.integer.value[0] & 0x0f, i2c_ctl[1]);
200*4882a593Smuzhiyun 	return 0;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun 
es7202_micboost3_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)203*4882a593Smuzhiyun static int es7202_micboost3_setting_get(struct snd_kcontrol *kcontrol,
204*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
205*4882a593Smuzhiyun {
206*4882a593Smuzhiyun 	u8 val = 0;
207*4882a593Smuzhiyun 	es7202_read(0x1d, &val, i2c_ctl[1]);
208*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val & 0x0f;
209*4882a593Smuzhiyun 	return 0;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun 
es7202_micboost4_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)212*4882a593Smuzhiyun static int es7202_micboost4_setting_set(struct snd_kcontrol *kcontrol,
213*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun 	es7202_update_bits(0x1e,
216*4882a593Smuzhiyun 			   0x0F,
217*4882a593Smuzhiyun 			   ucontrol->value.integer.value[0] & 0x0f, i2c_ctl[1]);
218*4882a593Smuzhiyun 	return 0;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun 
es7202_micboost4_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)221*4882a593Smuzhiyun static int es7202_micboost4_setting_get(struct snd_kcontrol *kcontrol,
222*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun 	u8 val = 0;
225*4882a593Smuzhiyun 	es7202_read(0x1e, &val, i2c_ctl[1]);
226*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val & 0x0f;
227*4882a593Smuzhiyun 	return 0;
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun #endif
230*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 4
es7202_micboost5_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)231*4882a593Smuzhiyun static int es7202_micboost5_setting_set(struct snd_kcontrol *kcontrol,
232*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun 	es7202_update_bits(0x1d,
235*4882a593Smuzhiyun 			   0x0F,
236*4882a593Smuzhiyun 			   ucontrol->value.integer.value[0] & 0x0f, i2c_ctl[2]);
237*4882a593Smuzhiyun 	return 0;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun 
es7202_micboost5_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)240*4882a593Smuzhiyun static int es7202_micboost5_setting_get(struct snd_kcontrol *kcontrol,
241*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun 	u8 val;
244*4882a593Smuzhiyun 	es7202_read(0x1d, &val, i2c_ctl[2]);
245*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val & 0x0f;
246*4882a593Smuzhiyun 	return 0;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun 
es7202_micboost6_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)249*4882a593Smuzhiyun static int es7202_micboost6_setting_set(struct snd_kcontrol *kcontrol,
250*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun 	es7202_update_bits(0x1e,
253*4882a593Smuzhiyun 			   0x0F,
254*4882a593Smuzhiyun 			   ucontrol->value.integer.value[0] & 0x0f, i2c_ctl[2]);
255*4882a593Smuzhiyun 	return 0;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun 
es7202_micboost6_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)258*4882a593Smuzhiyun static int es7202_micboost6_setting_get(struct snd_kcontrol *kcontrol,
259*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun 	u8 val;
262*4882a593Smuzhiyun 	es7202_read(0x1e, &val, i2c_ctl[2]);
263*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val & 0x0f;
264*4882a593Smuzhiyun 	return 0;
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun #endif
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 6
es7202_micboost7_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)269*4882a593Smuzhiyun static int es7202_micboost7_setting_set(struct snd_kcontrol *kcontrol,
270*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
271*4882a593Smuzhiyun {
272*4882a593Smuzhiyun 	es7202_update_bits(0x1d,
273*4882a593Smuzhiyun 			   0x0F,
274*4882a593Smuzhiyun 			   ucontrol->value.integer.value[0] & 0x0f, i2c_ctl[3]);
275*4882a593Smuzhiyun 	return 0;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun 
es7202_micboost7_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)278*4882a593Smuzhiyun static int es7202_micboost7_setting_get(struct snd_kcontrol *kcontrol,
279*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
280*4882a593Smuzhiyun {
281*4882a593Smuzhiyun 	u8 val;
282*4882a593Smuzhiyun 	es7202_read(0x1d, &val, i2c_ctl[3]);
283*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val & 0x0f;
284*4882a593Smuzhiyun 	return 0;
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun 
es7202_micboost8_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)287*4882a593Smuzhiyun static int es7202_micboost8_setting_set(struct snd_kcontrol *kcontrol,
288*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
289*4882a593Smuzhiyun {
290*4882a593Smuzhiyun 	es7202_update_bits(0x1e,
291*4882a593Smuzhiyun 			   0x0F,
292*4882a593Smuzhiyun 			   ucontrol->value.integer.value[0] & 0x0f, i2c_ctl[3]);
293*4882a593Smuzhiyun 	return 0;
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun 
es7202_micboost8_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)296*4882a593Smuzhiyun static int es7202_micboost8_setting_get(struct snd_kcontrol *kcontrol,
297*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
298*4882a593Smuzhiyun {
299*4882a593Smuzhiyun 	u8 val;
300*4882a593Smuzhiyun 	es7202_read(0x1e, &val, i2c_ctl[3]);
301*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val & 0x0f;
302*4882a593Smuzhiyun 	return 0;
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun #endif
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 8
es7202_micboost9_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)307*4882a593Smuzhiyun static int es7202_micboost9_setting_set(struct snd_kcontrol *kcontrol,
308*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun 	es7202_update_bits(0x1d,
311*4882a593Smuzhiyun 			   0x0F,
312*4882a593Smuzhiyun 			   ucontrol->value.integer.value[0] & 0x0f, i2c_ctl[4]);
313*4882a593Smuzhiyun 	return 0;
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun 
es7202_micboost9_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)316*4882a593Smuzhiyun static int es7202_micboost9_setting_get(struct snd_kcontrol *kcontrol,
317*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun 	u8 val;
320*4882a593Smuzhiyun 	es7202_read(0x1d, &val, i2c_ctl[4]);
321*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val & 0x0f;
322*4882a593Smuzhiyun 	return 0;
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun 
es7202_micboost10_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)325*4882a593Smuzhiyun static int es7202_micboost10_setting_set(struct snd_kcontrol *kcontrol,
326*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
327*4882a593Smuzhiyun {
328*4882a593Smuzhiyun 	es7202_update_bits(0x1e,
329*4882a593Smuzhiyun 			   0x0F,
330*4882a593Smuzhiyun 			   ucontrol->value.integer.value[0] & 0x0f, i2c_ctl[4]);
331*4882a593Smuzhiyun 	return 0;
332*4882a593Smuzhiyun }
333*4882a593Smuzhiyun 
es7202_micboost10_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)334*4882a593Smuzhiyun static int es7202_micboost10_setting_get(struct snd_kcontrol *kcontrol,
335*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
336*4882a593Smuzhiyun {
337*4882a593Smuzhiyun 	u8 val;
338*4882a593Smuzhiyun 	es7202_read(0x1e, &val, i2c_ctl[4]);
339*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val & 0x0f;
340*4882a593Smuzhiyun 	return 0;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun #endif
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 10
es7202_micboost11_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)345*4882a593Smuzhiyun static int es7202_micboost11_setting_set(struct snd_kcontrol *kcontrol,
346*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun 	es7202_update_bits(0x1d,
349*4882a593Smuzhiyun 			   0x0F,
350*4882a593Smuzhiyun 			   ucontrol->value.integer.value[0] & 0x0f, i2c_ctl[5]);
351*4882a593Smuzhiyun 	return 0;
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun 
es7202_micboost11_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)354*4882a593Smuzhiyun static int es7202_micboost11_setting_get(struct snd_kcontrol *kcontrol,
355*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
356*4882a593Smuzhiyun {
357*4882a593Smuzhiyun 	u8 val;
358*4882a593Smuzhiyun 	es7202_read(0x1d, &val, i2c_ctl[5]);
359*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val & 0x0f;
360*4882a593Smuzhiyun 	return 0;
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun 
es7202_micboost12_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)363*4882a593Smuzhiyun static int es7202_micboost12_setting_set(struct snd_kcontrol *kcontrol,
364*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun 	es7202_update_bits(0x1e,
367*4882a593Smuzhiyun 			   0x0F,
368*4882a593Smuzhiyun 			   ucontrol->value.integer.value[0] & 0x0f, i2c_ctl[5]);
369*4882a593Smuzhiyun 	return 0;
370*4882a593Smuzhiyun }
371*4882a593Smuzhiyun 
es7202_micboost12_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)372*4882a593Smuzhiyun static int es7202_micboost12_setting_get(struct snd_kcontrol *kcontrol,
373*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun 	u8 val;
376*4882a593Smuzhiyun 	es7202_read(0x1e, &val, i2c_ctl[5]);
377*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val & 0x0f;
378*4882a593Smuzhiyun 	return 0;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun #endif
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 12
es7202_micboost13_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)383*4882a593Smuzhiyun static int es7202_micboost13_setting_set(struct snd_kcontrol *kcontrol,
384*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
385*4882a593Smuzhiyun {
386*4882a593Smuzhiyun 	es7202_update_bits(0x1d,
387*4882a593Smuzhiyun 			   0x0F,
388*4882a593Smuzhiyun 			   ucontrol->value.integer.value[0] & 0x0f, i2c_ctl[6]);
389*4882a593Smuzhiyun 	return 0;
390*4882a593Smuzhiyun }
391*4882a593Smuzhiyun 
es7202_micboost13_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)392*4882a593Smuzhiyun static int es7202_micboost13_setting_get(struct snd_kcontrol *kcontrol,
393*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
394*4882a593Smuzhiyun {
395*4882a593Smuzhiyun 	u8 val;
396*4882a593Smuzhiyun 	es7202_read(0x1d, &val, i2c_ctl[6]);
397*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val & 0x0f;
398*4882a593Smuzhiyun 	return 0;
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun 
es7202_micboost14_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)401*4882a593Smuzhiyun static int es7202_micboost14_setting_set(struct snd_kcontrol *kcontrol,
402*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun 	es7202_update_bits(0x1e,
405*4882a593Smuzhiyun 			   0x0F,
406*4882a593Smuzhiyun 			   ucontrol->value.integer.value[0] & 0x0f, i2c_ctl[6]);
407*4882a593Smuzhiyun 	return 0;
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun 
es7202_micboost14_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)410*4882a593Smuzhiyun static int es7202_micboost14_setting_get(struct snd_kcontrol *kcontrol,
411*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
412*4882a593Smuzhiyun {
413*4882a593Smuzhiyun 	u8 val;
414*4882a593Smuzhiyun 	es7202_read(0x1e, &val, i2c_ctl[6]);
415*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val & 0x0f;
416*4882a593Smuzhiyun 	return 0;
417*4882a593Smuzhiyun }
418*4882a593Smuzhiyun #endif
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 14
es7202_micboost15_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)421*4882a593Smuzhiyun static int es7202_micboost15_setting_set(struct snd_kcontrol *kcontrol,
422*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
423*4882a593Smuzhiyun {
424*4882a593Smuzhiyun 	es7202_update_bits(0x1d,
425*4882a593Smuzhiyun 			   0x0F,
426*4882a593Smuzhiyun 			   ucontrol->value.integer.value[0] & 0x0f, i2c_ctl[7]);
427*4882a593Smuzhiyun 	return 0;
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun 
es7202_micboost15_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)430*4882a593Smuzhiyun static int es7202_micboost15_setting_get(struct snd_kcontrol *kcontrol,
431*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
432*4882a593Smuzhiyun {
433*4882a593Smuzhiyun 	u8 val;
434*4882a593Smuzhiyun 	es7202_read(0x1d, &val, i2c_ctl[7]);
435*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val & 0x0f;
436*4882a593Smuzhiyun 	return 0;
437*4882a593Smuzhiyun }
438*4882a593Smuzhiyun 
es7202_micboost16_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)439*4882a593Smuzhiyun static int es7202_micboost16_setting_set(struct snd_kcontrol *kcontrol,
440*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
441*4882a593Smuzhiyun {
442*4882a593Smuzhiyun 	es7202_update_bits(0x1e,
443*4882a593Smuzhiyun 			   0x0F,
444*4882a593Smuzhiyun 			   ucontrol->value.integer.value[0] & 0x0f, i2c_ctl[7]);
445*4882a593Smuzhiyun 	return 0;
446*4882a593Smuzhiyun }
447*4882a593Smuzhiyun 
es7202_micboost16_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)448*4882a593Smuzhiyun static int es7202_micboost16_setting_get(struct snd_kcontrol *kcontrol,
449*4882a593Smuzhiyun 					struct snd_ctl_elem_value *ucontrol)
450*4882a593Smuzhiyun {
451*4882a593Smuzhiyun 	u8 val;
452*4882a593Smuzhiyun 	es7202_read(0x1e, &val, i2c_ctl[7]);
453*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = val & 0x0f;
454*4882a593Smuzhiyun 	return 0;
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun #endif
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun static const struct snd_kcontrol_new es7202_snd_controls[] = {
459*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 0
460*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("PGA1_setting", 0x1D, 0, 0x0C, 0,
461*4882a593Smuzhiyun 			   es7202_micboost1_setting_get,
462*4882a593Smuzhiyun 			   es7202_micboost1_setting_set,
463*4882a593Smuzhiyun 			   mic_boost_tlv),
464*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("PGA2_setting", 0x1E, 0, 0x0C, 0,
465*4882a593Smuzhiyun 			   es7202_micboost2_setting_get,
466*4882a593Smuzhiyun 			   es7202_micboost2_setting_set,
467*4882a593Smuzhiyun 			   mic_boost_tlv),
468*4882a593Smuzhiyun #endif
469*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 2
470*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("PGA3_setting", 0x1D, 0, 0x0C, 0,
471*4882a593Smuzhiyun 			   es7202_micboost3_setting_get,
472*4882a593Smuzhiyun 			   es7202_micboost3_setting_set,
473*4882a593Smuzhiyun 			   mic_boost_tlv),
474*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("PGA4_setting", 0x1E, 0, 0x0C, 0,
475*4882a593Smuzhiyun 			   es7202_micboost4_setting_get,
476*4882a593Smuzhiyun 			   es7202_micboost4_setting_set,
477*4882a593Smuzhiyun 			   mic_boost_tlv),
478*4882a593Smuzhiyun #endif
479*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 4
480*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("PGA5_setting", 0x1D, 0, 0x0C, 0,
481*4882a593Smuzhiyun 			   es7202_micboost5_setting_get,
482*4882a593Smuzhiyun 			   es7202_micboost5_setting_set,
483*4882a593Smuzhiyun 			   mic_boost_tlv),
484*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("PGA6_setting", 0x1E, 0, 0x0C, 0,
485*4882a593Smuzhiyun 			   es7202_micboost6_setting_get,
486*4882a593Smuzhiyun 			   es7202_micboost6_setting_set,
487*4882a593Smuzhiyun 			   mic_boost_tlv),
488*4882a593Smuzhiyun #endif
489*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 6
490*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("PGA7_setting", 0x1D, 0, 0x0C, 0,
491*4882a593Smuzhiyun 			   es7202_micboost7_setting_get,
492*4882a593Smuzhiyun 			   es7202_micboost7_setting_set,
493*4882a593Smuzhiyun 			   mic_boost_tlv),
494*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("PGA8_setting", 0x1E, 0, 0x0C, 0,
495*4882a593Smuzhiyun 			   es7202_micboost8_setting_get,
496*4882a593Smuzhiyun 			   es7202_micboost8_setting_set,
497*4882a593Smuzhiyun 			   mic_boost_tlv),
498*4882a593Smuzhiyun #endif
499*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 8
500*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("PGA9_setting", 0x1D, 0, 0x0C, 0,
501*4882a593Smuzhiyun 			   es7202_micboost9_setting_get,
502*4882a593Smuzhiyun 			   es7202_micboost9_setting_set,
503*4882a593Smuzhiyun 			   mic_boost_tlv),
504*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("PGA10_setting", 0x1E, 0, 0x0C, 0,
505*4882a593Smuzhiyun 			   es7202_micboost10_setting_get,
506*4882a593Smuzhiyun 			   es7202_micboost10_setting_set,
507*4882a593Smuzhiyun 			   mic_boost_tlv),
508*4882a593Smuzhiyun #endif
509*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 10
510*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("PGA11_setting", 0x1D, 0, 0x0C, 0,
511*4882a593Smuzhiyun 			   es7202_micboost11_setting_get,
512*4882a593Smuzhiyun 			   es7202_micboost11_setting_set,
513*4882a593Smuzhiyun 			   mic_boost_tlv),
514*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("PGA12_setting", 0x1E, 0, 0x0C, 0,
515*4882a593Smuzhiyun 			   es7202_micboost12_setting_get,
516*4882a593Smuzhiyun 			   es7202_micboost12_setting_set,
517*4882a593Smuzhiyun 			   mic_boost_tlv),
518*4882a593Smuzhiyun #endif
519*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 12
520*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("PGA13_setting", 0x1D, 0, 0x0C, 0,
521*4882a593Smuzhiyun 			   es7202_micboost13_setting_get,
522*4882a593Smuzhiyun 			   es7202_micboost13_setting_set,
523*4882a593Smuzhiyun 			   mic_boost_tlv),
524*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("PGA14_setting", 0x1E, 0, 0x0C, 0,
525*4882a593Smuzhiyun 			   es7202_micboost14_setting_get,
526*4882a593Smuzhiyun 			   es7202_micboost14_setting_set,
527*4882a593Smuzhiyun 			   mic_boost_tlv),
528*4882a593Smuzhiyun #endif
529*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 14
530*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("PGA15_setting", 0x1D, 0, 0x0C, 0,
531*4882a593Smuzhiyun 			   es7202_micboost15_setting_get,
532*4882a593Smuzhiyun 			   es7202_micboost15_setting_set,
533*4882a593Smuzhiyun 			   mic_boost_tlv),
534*4882a593Smuzhiyun 	SOC_SINGLE_EXT_TLV("PGA16_setting", 0x1E, 0, 0x0C, 0,
535*4882a593Smuzhiyun 			   es7202_micboost16_setting_get,
536*4882a593Smuzhiyun 			   es7202_micboost16_setting_set,
537*4882a593Smuzhiyun 			   mic_boost_tlv),
538*4882a593Smuzhiyun #endif
539*4882a593Smuzhiyun };
540*4882a593Smuzhiyun 
es7202_mute(struct snd_soc_dai * dai,int mute,int stream)541*4882a593Smuzhiyun static int es7202_mute(struct snd_soc_dai *dai, int mute, int stream)
542*4882a593Smuzhiyun {
543*4882a593Smuzhiyun 	if (stream == SNDRV_PCM_STREAM_PLAYBACK)
544*4882a593Smuzhiyun 		return 0;
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	if (mute) {
547*4882a593Smuzhiyun 		es7202_multi_chips_update_bits(ES7202_PDM_INF_CTL_REG07, 0x03,0x03);
548*4882a593Smuzhiyun 	} else {
549*4882a593Smuzhiyun 		es7202_multi_chips_update_bits(ES7202_PDM_INF_CTL_REG07, 0x03,0x00);
550*4882a593Smuzhiyun 	}
551*4882a593Smuzhiyun 
552*4882a593Smuzhiyun 	return 0;
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun #define es7202_RATES SNDRV_PCM_RATE_8000_96000
556*4882a593Smuzhiyun 
557*4882a593Smuzhiyun static struct snd_soc_dai_ops es7202_ops = {
558*4882a593Smuzhiyun 	.mute_stream = es7202_mute,
559*4882a593Smuzhiyun };
560*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 0
561*4882a593Smuzhiyun static struct snd_soc_dai_driver es7202_dai0 = {
562*4882a593Smuzhiyun 	.name = "es7202 pdm 0",
563*4882a593Smuzhiyun 	.capture = {
564*4882a593Smuzhiyun 		.stream_name = "Capture",
565*4882a593Smuzhiyun 		.channels_min = 1,
566*4882a593Smuzhiyun 		.channels_max = 8,
567*4882a593Smuzhiyun 		.rates = es7202_RATES,
568*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S16_LE,
569*4882a593Smuzhiyun 	},
570*4882a593Smuzhiyun 	.ops = &es7202_ops,
571*4882a593Smuzhiyun 	.symmetric_rates = 1,
572*4882a593Smuzhiyun };
573*4882a593Smuzhiyun #endif
574*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 2
575*4882a593Smuzhiyun static struct snd_soc_dai_driver es7202_dai1 = {
576*4882a593Smuzhiyun 	.name = "es7202 pdm 1",
577*4882a593Smuzhiyun 	.capture = {
578*4882a593Smuzhiyun 		.stream_name = "Capture",
579*4882a593Smuzhiyun 		.channels_min = 1,
580*4882a593Smuzhiyun 		.channels_max = 8,
581*4882a593Smuzhiyun 		.rates = es7202_RATES,
582*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S16_LE,
583*4882a593Smuzhiyun 	},
584*4882a593Smuzhiyun 	.ops = &es7202_ops,
585*4882a593Smuzhiyun 	.symmetric_rates = 1,
586*4882a593Smuzhiyun };
587*4882a593Smuzhiyun #endif
588*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 4
589*4882a593Smuzhiyun static struct snd_soc_dai_driver es7202_dai2 = {
590*4882a593Smuzhiyun 	.name = "es7202 pdm 2",
591*4882a593Smuzhiyun 	.capture = {
592*4882a593Smuzhiyun 		.stream_name = "Capture",
593*4882a593Smuzhiyun 		.channels_min = 1,
594*4882a593Smuzhiyun 		.channels_max = 8,
595*4882a593Smuzhiyun 		.rates = es7202_RATES,
596*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S16_LE,
597*4882a593Smuzhiyun 	},
598*4882a593Smuzhiyun 	.ops = &es7202_ops,
599*4882a593Smuzhiyun 	.symmetric_rates = 1,
600*4882a593Smuzhiyun };
601*4882a593Smuzhiyun #endif
602*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 6
603*4882a593Smuzhiyun static struct snd_soc_dai_driver es7202_dai3 = {
604*4882a593Smuzhiyun 	.name = "es7202 pdm 3",
605*4882a593Smuzhiyun 	.capture = {
606*4882a593Smuzhiyun 		.stream_name = "Capture",
607*4882a593Smuzhiyun 		.channels_min = 1,
608*4882a593Smuzhiyun 		.channels_max = 8,
609*4882a593Smuzhiyun 		.rates = es7202_RATES,
610*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S16_LE,
611*4882a593Smuzhiyun 	},
612*4882a593Smuzhiyun 	.ops = &es7202_ops,
613*4882a593Smuzhiyun 	.symmetric_rates = 1,
614*4882a593Smuzhiyun };
615*4882a593Smuzhiyun #endif
616*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 8
617*4882a593Smuzhiyun static struct snd_soc_dai_driver es7202_dai4 = {
618*4882a593Smuzhiyun 	.name = "es7202 pdm 4",
619*4882a593Smuzhiyun 	.capture = {
620*4882a593Smuzhiyun 		.stream_name = "Capture",
621*4882a593Smuzhiyun 		.channels_min = 1,
622*4882a593Smuzhiyun 		.channels_max = 10,
623*4882a593Smuzhiyun 		.rates = es7202_RATES,
624*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S16_LE,
625*4882a593Smuzhiyun 	},
626*4882a593Smuzhiyun 	.ops = &es7202_ops,
627*4882a593Smuzhiyun 	.symmetric_rates = 1,
628*4882a593Smuzhiyun };
629*4882a593Smuzhiyun #endif
630*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 10
631*4882a593Smuzhiyun static struct snd_soc_dai_driver es7202_dai5 = {
632*4882a593Smuzhiyun 	.name = "es7202 pdm 5",
633*4882a593Smuzhiyun 	.capture = {
634*4882a593Smuzhiyun 		.stream_name = "Capture",
635*4882a593Smuzhiyun 		.channels_min = 1,
636*4882a593Smuzhiyun 		.channels_max = 12,
637*4882a593Smuzhiyun 		.rates = es7202_RATES,
638*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S16_LE,
639*4882a593Smuzhiyun 	},
640*4882a593Smuzhiyun 	.ops = &es7202_ops,
641*4882a593Smuzhiyun 	.symmetric_rates = 1,
642*4882a593Smuzhiyun };
643*4882a593Smuzhiyun #endif
644*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 12
645*4882a593Smuzhiyun static struct snd_soc_dai_driver es7202_dai6 = {
646*4882a593Smuzhiyun 	.name = "es7202 pdm 6",
647*4882a593Smuzhiyun 	.capture = {
648*4882a593Smuzhiyun 		.stream_name = "Capture",
649*4882a593Smuzhiyun 		.channels_min = 1,
650*4882a593Smuzhiyun 		.channels_max = 14,
651*4882a593Smuzhiyun 		.rates = es7202_RATES,
652*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S16_LE,
653*4882a593Smuzhiyun 	},
654*4882a593Smuzhiyun 	.ops = &es7202_ops,
655*4882a593Smuzhiyun 	.symmetric_rates = 1,
656*4882a593Smuzhiyun };
657*4882a593Smuzhiyun #endif
658*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 14
659*4882a593Smuzhiyun static struct snd_soc_dai_driver es7202_dai7 = {
660*4882a593Smuzhiyun 	.name = "es7202 pdm 7",
661*4882a593Smuzhiyun 	.capture = {
662*4882a593Smuzhiyun 		.stream_name = "Capture",
663*4882a593Smuzhiyun 		.channels_min = 1,
664*4882a593Smuzhiyun 		.channels_max = 16,
665*4882a593Smuzhiyun 		.rates = es7202_RATES,
666*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S16_LE,
667*4882a593Smuzhiyun 	},
668*4882a593Smuzhiyun 	.ops = &es7202_ops,
669*4882a593Smuzhiyun 	.symmetric_rates = 1,
670*4882a593Smuzhiyun };
671*4882a593Smuzhiyun #endif
672*4882a593Smuzhiyun 
673*4882a593Smuzhiyun static struct snd_soc_dai_driver *es7202_dai[] = {
674*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 0
675*4882a593Smuzhiyun         &es7202_dai0,
676*4882a593Smuzhiyun #endif
677*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 2
678*4882a593Smuzhiyun         &es7202_dai1,
679*4882a593Smuzhiyun #endif
680*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 4
681*4882a593Smuzhiyun         &es7202_dai2,
682*4882a593Smuzhiyun #endif
683*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 6
684*4882a593Smuzhiyun         &es7202_dai3,
685*4882a593Smuzhiyun #endif
686*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 8
687*4882a593Smuzhiyun         &es7202_dai4,
688*4882a593Smuzhiyun #endif
689*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 10
690*4882a593Smuzhiyun         &es7202_dai5,
691*4882a593Smuzhiyun #endif
692*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 12
693*4882a593Smuzhiyun         &es7202_dai6,
694*4882a593Smuzhiyun #endif
695*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 14
696*4882a593Smuzhiyun         &es7202_dai7,
697*4882a593Smuzhiyun #endif
698*4882a593Smuzhiyun };
699*4882a593Smuzhiyun 
es7202_suspend(struct snd_soc_component * component)700*4882a593Smuzhiyun static int es7202_suspend(struct snd_soc_component *component)
701*4882a593Smuzhiyun {
702*4882a593Smuzhiyun 	es7202_multi_chips_update_bits(ES7202_PDM_INF_CTL_REG07, 0x03,0x03);
703*4882a593Smuzhiyun 	msleep(50);
704*4882a593Smuzhiyun 	return 0;
705*4882a593Smuzhiyun }
706*4882a593Smuzhiyun 
es7202_resume(struct snd_soc_component * component)707*4882a593Smuzhiyun static int es7202_resume(struct snd_soc_component *component)
708*4882a593Smuzhiyun {
709*4882a593Smuzhiyun 	msleep(50);
710*4882a593Smuzhiyun 	es7202_multi_chips_update_bits(ES7202_PDM_INF_CTL_REG07, 0x03,0x00);
711*4882a593Smuzhiyun 	return 0;
712*4882a593Smuzhiyun }
713*4882a593Smuzhiyun 
es7202_probe(struct snd_soc_component * component)714*4882a593Smuzhiyun static int es7202_probe(struct snd_soc_component *component)
715*4882a593Smuzhiyun {
716*4882a593Smuzhiyun 	struct es7202_priv *es7202 = snd_soc_component_get_drvdata(component);
717*4882a593Smuzhiyun 	int cnt;
718*4882a593Smuzhiyun 	int ret = 0;
719*4882a593Smuzhiyun 	printk("enter into %s()\n", __func__);
720*4882a593Smuzhiyun 	tron_component1[es7202_adc_num++] = component;
721*4882a593Smuzhiyun 
722*4882a593Smuzhiyun 	for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
723*4882a593Smuzhiyun 		es7202_write(ES7202_SOFT_MODE_REG01, 0x01, i2c_ctl[cnt]);
724*4882a593Smuzhiyun 		switch(es7202->pwr_vdd_voltage) {
725*4882a593Smuzhiyun 		case VDD_3V3:
726*4882a593Smuzhiyun 			es7202_write(ES7202_ANALOG_MISC1_REG1B, 0x50, i2c_ctl[cnt]);
727*4882a593Smuzhiyun 			es7202_write(ES7202_PGA1_REG1D, 0x1b, i2c_ctl[cnt]);
728*4882a593Smuzhiyun 			es7202_write(ES7202_PGA2_REG1E, 0x1b, i2c_ctl[cnt]);
729*4882a593Smuzhiyun 			es7202_write(ES7202_ANALOG_EN_REG10, 0x7F, i2c_ctl[cnt]);
730*4882a593Smuzhiyun 			es7202_write(ES7202_BIAS_VMID_REG11, 0x2F, i2c_ctl[cnt]);
731*4882a593Smuzhiyun 			es7202_write(ES7202_ANALOG_EN_REG10, 0x0F, i2c_ctl[cnt]);
732*4882a593Smuzhiyun 			es7202_write(ES7202_ANALOG_EN_REG10, 0x00, i2c_ctl[cnt]);
733*4882a593Smuzhiyun 			break;
734*4882a593Smuzhiyun 		default:
735*4882a593Smuzhiyun 		case VDD_1V8:
736*4882a593Smuzhiyun 			es7202_write(ES7202_ANALOG_MISC1_REG1B, 0x40, i2c_ctl[cnt]);
737*4882a593Smuzhiyun 			es7202_write(ES7202_PGA1_REG1D, 0x1b, i2c_ctl[cnt]);
738*4882a593Smuzhiyun 			es7202_write(ES7202_PGA2_REG1E, 0x1b, i2c_ctl[cnt]);
739*4882a593Smuzhiyun 			es7202_write(ES7202_ANALOG_EN_REG10, 0x7F, i2c_ctl[cnt]);
740*4882a593Smuzhiyun 			es7202_write(ES7202_BIAS_VMID_REG11, 0x2F, i2c_ctl[cnt]);
741*4882a593Smuzhiyun 			es7202_write(ES7202_ANALOG_EN_REG10, 0x3F, i2c_ctl[cnt]);
742*4882a593Smuzhiyun 			es7202_write(ES7202_ANALOG_EN_REG10, 0x00, i2c_ctl[cnt]);
743*4882a593Smuzhiyun 			break;
744*4882a593Smuzhiyun 		}
745*4882a593Smuzhiyun 		es7202_write(ES7202_MOD1_BIAS_REG14, 0x58, i2c_ctl[cnt]);
746*4882a593Smuzhiyun 		es7202_write(ES7202_CLK_DIV_REG02, 0x01, i2c_ctl[cnt]);
747*4882a593Smuzhiyun 		es7202_write(ES7202_T2_VMID_REG05, 0x01, i2c_ctl[cnt]);
748*4882a593Smuzhiyun 		es7202_write(ES7202_MISC_CTL_REG08, 0x02, i2c_ctl[cnt]);
749*4882a593Smuzhiyun 		es7202_write(ES7202_RESET_REG00, 0x01, i2c_ctl[cnt]);
750*4882a593Smuzhiyun 		es7202_write(ES7202_CLK_EN_REG03, 0x03, i2c_ctl[cnt]);
751*4882a593Smuzhiyun 		es7202_write(ES7202_BIAS_VMID_REG11, 0x2E, i2c_ctl[cnt]);
752*4882a593Smuzhiyun 
753*4882a593Smuzhiyun 		es7202_multi_chips_update_bits(ES7202_PDM_INF_CTL_REG07, 0x03, 0x00);
754*4882a593Smuzhiyun 	}
755*4882a593Smuzhiyun 	return ret;
756*4882a593Smuzhiyun }
757*4882a593Smuzhiyun 
es7202_remove(struct snd_soc_component * component)758*4882a593Smuzhiyun static void es7202_remove(struct snd_soc_component *component)
759*4882a593Smuzhiyun {
760*4882a593Smuzhiyun 	es7202_multi_chips_update_bits(ES7202_PDM_INF_CTL_REG07, 0x03,0x03);
761*4882a593Smuzhiyun 	msleep(50);
762*4882a593Smuzhiyun }
763*4882a593Smuzhiyun 
764*4882a593Smuzhiyun const struct regmap_config es7202_regmap_config = {
765*4882a593Smuzhiyun 	.reg_bits	= 8,
766*4882a593Smuzhiyun 	.val_bits	= 8,
767*4882a593Smuzhiyun 	.max_register	= 0xff,
768*4882a593Smuzhiyun 	.cache_type	= REGCACHE_RBTREE,
769*4882a593Smuzhiyun 	.reg_defaults = es7202_reg_defaults,
770*4882a593Smuzhiyun 	.num_reg_defaults = ARRAY_SIZE(es7202_reg_defaults),
771*4882a593Smuzhiyun };
772*4882a593Smuzhiyun 
773*4882a593Smuzhiyun static struct snd_soc_component_driver soc_codec_dev_es7202 = {
774*4882a593Smuzhiyun 	.probe =	es7202_probe,
775*4882a593Smuzhiyun 	.remove =	es7202_remove,
776*4882a593Smuzhiyun 	.suspend =	es7202_suspend,
777*4882a593Smuzhiyun 	.resume =	es7202_resume,
778*4882a593Smuzhiyun 
779*4882a593Smuzhiyun 
780*4882a593Smuzhiyun 	.controls = es7202_snd_controls,
781*4882a593Smuzhiyun 	.num_controls = ARRAY_SIZE(es7202_snd_controls),
782*4882a593Smuzhiyun 	.idle_bias_on = 1,
783*4882a593Smuzhiyun 	.use_pmdown_time = 1,
784*4882a593Smuzhiyun 	.endianness = 1,
785*4882a593Smuzhiyun 	.non_legacy_dai_naming = 1,
786*4882a593Smuzhiyun };
787*4882a593Smuzhiyun 
es7202_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)788*4882a593Smuzhiyun static ssize_t es7202_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
789*4882a593Smuzhiyun {
790*4882a593Smuzhiyun 	int val=0, flag=0;
791*4882a593Smuzhiyun 	u8 i=0, reg, num, value_w, value_r;
792*4882a593Smuzhiyun 
793*4882a593Smuzhiyun 	struct es7202_priv *es7202 = dev_get_drvdata(dev);
794*4882a593Smuzhiyun 	val = simple_strtol(buf, NULL, 16);
795*4882a593Smuzhiyun 	flag = (val >> 16) & 0xFF;
796*4882a593Smuzhiyun 
797*4882a593Smuzhiyun 	if (flag) {
798*4882a593Smuzhiyun 		reg = (val >> 8) & 0xFF;
799*4882a593Smuzhiyun 		value_w = val & 0xFF;
800*4882a593Smuzhiyun 		printk("\nWrite: start REG:0x%02x,val:0x%02x,count:0x%02x\n", reg, value_w, flag);
801*4882a593Smuzhiyun 		while(flag--) {
802*4882a593Smuzhiyun 			es7202_write(reg, value_w,  es7202->i2c);
803*4882a593Smuzhiyun 			printk("Write 0x%02x to REG:0x%02x\n", value_w, reg);
804*4882a593Smuzhiyun 			reg++;
805*4882a593Smuzhiyun 		}
806*4882a593Smuzhiyun 	} else {
807*4882a593Smuzhiyun 		reg = (val >> 8) & 0xFF;
808*4882a593Smuzhiyun 		num = val & 0xff;
809*4882a593Smuzhiyun 		printk("\nRead: start REG:0x%02x,count:0x%02x\n", reg, num);
810*4882a593Smuzhiyun 		do {
811*4882a593Smuzhiyun 			value_r = 0;
812*4882a593Smuzhiyun 			es7202_read(reg, &value_r, es7202->i2c);
813*4882a593Smuzhiyun 			printk("REG[0x%02x]: 0x%02x;  ", reg, value_r);
814*4882a593Smuzhiyun 			reg++;
815*4882a593Smuzhiyun 			i++;
816*4882a593Smuzhiyun 			if ((i==num) || (i%4==0))	printk("\n");
817*4882a593Smuzhiyun 		} while (i<num);
818*4882a593Smuzhiyun 	}
819*4882a593Smuzhiyun 
820*4882a593Smuzhiyun 	return count;
821*4882a593Smuzhiyun }
822*4882a593Smuzhiyun 
es7202_show(struct device * dev,struct device_attribute * attr,char * buf)823*4882a593Smuzhiyun static ssize_t es7202_show(struct device *dev, struct device_attribute *attr, char *buf)
824*4882a593Smuzhiyun {
825*4882a593Smuzhiyun 	printk("echo flag|reg|val > es7202\n");
826*4882a593Smuzhiyun 	printk("eg read star addres=0x06,count 0x10:echo 0610 >es7202\n");
827*4882a593Smuzhiyun 	printk("eg write star addres=0x90,value=0x3c,count=4:echo 4903c >es7202\n");
828*4882a593Smuzhiyun 	return 0;
829*4882a593Smuzhiyun }
830*4882a593Smuzhiyun 
831*4882a593Smuzhiyun static DEVICE_ATTR(es7202, 0644, es7202_show, es7202_store);
832*4882a593Smuzhiyun 
833*4882a593Smuzhiyun static struct attribute *es7202_debug_attrs[] = {
834*4882a593Smuzhiyun 	&dev_attr_es7202.attr,
835*4882a593Smuzhiyun 	NULL,
836*4882a593Smuzhiyun };
837*4882a593Smuzhiyun 
838*4882a593Smuzhiyun static struct attribute_group es7202_debug_attr_group = {
839*4882a593Smuzhiyun 	.name   = "es7202_debug",
840*4882a593Smuzhiyun 	.attrs  = es7202_debug_attrs,
841*4882a593Smuzhiyun };
842*4882a593Smuzhiyun 
es7202_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)843*4882a593Smuzhiyun static int es7202_i2c_probe(struct i2c_client *i2c,
844*4882a593Smuzhiyun 			    const struct i2c_device_id *id)
845*4882a593Smuzhiyun {
846*4882a593Smuzhiyun 	struct es7202_priv *es7202;
847*4882a593Smuzhiyun 	int uV;
848*4882a593Smuzhiyun 	int ret = -1;
849*4882a593Smuzhiyun 
850*4882a593Smuzhiyun 	dev_info(&i2c->dev, "probe\n");
851*4882a593Smuzhiyun 	es7202 = devm_kzalloc(&i2c->dev, sizeof(*es7202), GFP_KERNEL);
852*4882a593Smuzhiyun 	if (!es7202)
853*4882a593Smuzhiyun 		return -ENOMEM;
854*4882a593Smuzhiyun 	es7202->i2c = i2c;
855*4882a593Smuzhiyun 	es7202->vdd = devm_regulator_get_optional(&i2c->dev, "power");
856*4882a593Smuzhiyun 	if (IS_ERR(es7202->vdd)) {
857*4882a593Smuzhiyun 		if (PTR_ERR(es7202->vdd) == -EPROBE_DEFER)
858*4882a593Smuzhiyun 			return -EPROBE_DEFER;
859*4882a593Smuzhiyun 		dev_warn(&i2c->dev, "power-supply get fail, use 3v3 as default\n");
860*4882a593Smuzhiyun 		es7202->pwr_vdd_voltage = VDD_3V3;
861*4882a593Smuzhiyun 	} else {
862*4882a593Smuzhiyun 		uV = regulator_get_voltage(es7202->vdd);
863*4882a593Smuzhiyun 		dev_info(&i2c->dev, "probe power-supply %duV\n", uV);
864*4882a593Smuzhiyun 		if (uV <= MAX_VOLTAGE_1_8)
865*4882a593Smuzhiyun 			es7202->pwr_vdd_voltage = VDD_1V8;
866*4882a593Smuzhiyun 		else
867*4882a593Smuzhiyun 			es7202->pwr_vdd_voltage = VDD_3V3;
868*4882a593Smuzhiyun 	}
869*4882a593Smuzhiyun 	dev_set_drvdata(&i2c->dev, es7202);
870*4882a593Smuzhiyun 	if (id->driver_data < ADC_DEV_MAXNUM) {
871*4882a593Smuzhiyun 		i2c_ctl[id->driver_data] = i2c;
872*4882a593Smuzhiyun 		dev_info(&i2c->dev, "probe reigister es7202 dai(%s) component\n",
873*4882a593Smuzhiyun 			 es7202_dai[id->driver_data]->name);
874*4882a593Smuzhiyun 		ret = devm_snd_soc_register_component(&i2c->dev, &soc_codec_dev_es7202,
875*4882a593Smuzhiyun 						      es7202_dai[id->driver_data], 1);
876*4882a593Smuzhiyun 		if (ret < 0) {
877*4882a593Smuzhiyun 			return ret;
878*4882a593Smuzhiyun 		}
879*4882a593Smuzhiyun 	}
880*4882a593Smuzhiyun 	ret = sysfs_create_group(&i2c->dev.kobj, &es7202_debug_attr_group);
881*4882a593Smuzhiyun 	if (ret) {
882*4882a593Smuzhiyun 		dev_err(&i2c->dev, "failed to create attr group\n");
883*4882a593Smuzhiyun 	}
884*4882a593Smuzhiyun 	return ret;
885*4882a593Smuzhiyun }
886*4882a593Smuzhiyun 
es7202_i2c_remove(struct i2c_client * client)887*4882a593Smuzhiyun static  int es7202_i2c_remove(struct i2c_client *client)
888*4882a593Smuzhiyun {
889*4882a593Smuzhiyun 	sysfs_remove_group(&client->dev.kobj, &es7202_debug_attr_group);
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun 	return 0;
892*4882a593Smuzhiyun }
893*4882a593Smuzhiyun 
es7202_i2c_shutdown(struct i2c_client * client)894*4882a593Smuzhiyun static void es7202_i2c_shutdown(struct i2c_client *client)
895*4882a593Smuzhiyun {
896*4882a593Smuzhiyun 	es7202_multi_chips_update_bits(ES7202_PDM_INF_CTL_REG07, 0x03,0x03);
897*4882a593Smuzhiyun 	msleep(50);
898*4882a593Smuzhiyun }
899*4882a593Smuzhiyun 
900*4882a593Smuzhiyun #if !ES7202_MATCH_DTS_EN
es7202_i2c_detect(struct i2c_client * client,struct i2c_board_info * info)901*4882a593Smuzhiyun static int es7202_i2c_detect(struct i2c_client *client,
902*4882a593Smuzhiyun 			     struct i2c_board_info *info)
903*4882a593Smuzhiyun {
904*4882a593Smuzhiyun 	struct i2c_adapter *adapter = client->adapter;
905*4882a593Smuzhiyun 
906*4882a593Smuzhiyun 	if (adapter->nr == ES7202_I2C_BUS_NUM) {
907*4882a593Smuzhiyun 		if (client->addr == 0x30) {
908*4882a593Smuzhiyun 			strlcpy(info->type, "ES7202_PDM_ADC_1", I2C_NAME_SIZE);
909*4882a593Smuzhiyun 			return 0;
910*4882a593Smuzhiyun 		} else if (client->addr == 0x31) {
911*4882a593Smuzhiyun 			strlcpy(info->type, "ES7202_PDM_ADC_2", I2C_NAME_SIZE);
912*4882a593Smuzhiyun 			return 0;
913*4882a593Smuzhiyun 		} else if (client->addr == 0x32) {
914*4882a593Smuzhiyun 			strlcpy(info->type, "ES7202_PDM_ADC_3", I2C_NAME_SIZE);
915*4882a593Smuzhiyun 			return 0;
916*4882a593Smuzhiyun 		} else if (client->addr == 0x33) {
917*4882a593Smuzhiyun 			strlcpy(info->type, "ES7202_PDM_ADC_4", I2C_NAME_SIZE);
918*4882a593Smuzhiyun 			return 0;
919*4882a593Smuzhiyun 		}else if (client->addr == 0x34) {
920*4882a593Smuzhiyun 			strlcpy(info->type, "ES7202_PDM_ADC_5", I2C_NAME_SIZE);
921*4882a593Smuzhiyun 			return 0;
922*4882a593Smuzhiyun 		}else if (client->addr == 0x35) {
923*4882a593Smuzhiyun 			strlcpy(info->type, "ES7202_PDM_ADC_6", I2C_NAME_SIZE);
924*4882a593Smuzhiyun 			return 0;
925*4882a593Smuzhiyun 		}else if (client->addr == 0x36) {
926*4882a593Smuzhiyun 			strlcpy(info->type, "ES7202_PDM_ADC_7", I2C_NAME_SIZE);
927*4882a593Smuzhiyun 			return 0;
928*4882a593Smuzhiyun 		}else if (client->addr == 0x37) {
929*4882a593Smuzhiyun 			strlcpy(info->type, "ES7202_PDM_ADC_8", I2C_NAME_SIZE);
930*4882a593Smuzhiyun 			return 0;
931*4882a593Smuzhiyun 		}
932*4882a593Smuzhiyun 	}
933*4882a593Smuzhiyun 
934*4882a593Smuzhiyun 	return -ENODEV;
935*4882a593Smuzhiyun }
936*4882a593Smuzhiyun 
937*4882a593Smuzhiyun static const unsigned short es7202_i2c_addr[] = {
938*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 0
939*4882a593Smuzhiyun 	0x30,
940*4882a593Smuzhiyun #endif
941*4882a593Smuzhiyun 
942*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 2
943*4882a593Smuzhiyun 	0x31,
944*4882a593Smuzhiyun #endif
945*4882a593Smuzhiyun 
946*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 4
947*4882a593Smuzhiyun 	0x32,
948*4882a593Smuzhiyun #endif
949*4882a593Smuzhiyun 
950*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 6
951*4882a593Smuzhiyun 	0x33,
952*4882a593Smuzhiyun #endif
953*4882a593Smuzhiyun 
954*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 8
955*4882a593Smuzhiyun 	0x34,
956*4882a593Smuzhiyun #endif
957*4882a593Smuzhiyun 
958*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 10
959*4882a593Smuzhiyun 	0x35,
960*4882a593Smuzhiyun #endif
961*4882a593Smuzhiyun 
962*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 12
963*4882a593Smuzhiyun 	0x36,
964*4882a593Smuzhiyun #endif
965*4882a593Smuzhiyun 
966*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 14
967*4882a593Smuzhiyun 	0x37,
968*4882a593Smuzhiyun #endif
969*4882a593Smuzhiyun 	I2C_CLIENT_END,
970*4882a593Smuzhiyun };
971*4882a593Smuzhiyun #endif
972*4882a593Smuzhiyun 
973*4882a593Smuzhiyun #if ES7202_MATCH_DTS_EN
974*4882a593Smuzhiyun /*
975*4882a593Smuzhiyun * device tree source or i2c_board_info both use to
976*4882a593Smuzhiyun * transfer hardware information to linux kernel,
977*4882a593Smuzhiyun * use one of them wil be OK
978*4882a593Smuzhiyun */
979*4882a593Smuzhiyun #if 0
980*4882a593Smuzhiyun static struct i2c_board_info es7202_i2c_board_info[] = {
981*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 0
982*4882a593Smuzhiyun 	{I2C_BOARD_INFO("ES7202_PDM_ADC_1", 0x30),},
983*4882a593Smuzhiyun #endif
984*4882a593Smuzhiyun 
985*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 2
986*4882a593Smuzhiyun 	{I2C_BOARD_INFO("ES7202_PDM_ADC_2", 0x31),},
987*4882a593Smuzhiyun #endif
988*4882a593Smuzhiyun 
989*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 4
990*4882a593Smuzhiyun 	{I2C_BOARD_INFO("ES7202_PDM_ADC_3", 0x32),},
991*4882a593Smuzhiyun #endif
992*4882a593Smuzhiyun 
993*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 6
994*4882a593Smuzhiyun 	{I2C_BOARD_INFO("ES7202_PDM_ADC_4", 0x33),},
995*4882a593Smuzhiyun #endif
996*4882a593Smuzhiyun 
997*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 8
998*4882a593Smuzhiyun 	{I2C_BOARD_INFO("ES7202_PDM_ADC_5", 0x34),},
999*4882a593Smuzhiyun #endif
1000*4882a593Smuzhiyun 
1001*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 10
1002*4882a593Smuzhiyun 	{I2C_BOARD_INFO("ES7202_PDM_ADC_6", 0x35),},
1003*4882a593Smuzhiyun #endif
1004*4882a593Smuzhiyun 
1005*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 12
1006*4882a593Smuzhiyun 	{I2C_BOARD_INFO("ES7202_PDM_ADC_7", 0x36),},
1007*4882a593Smuzhiyun #endif
1008*4882a593Smuzhiyun 
1009*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 14
1010*4882a593Smuzhiyun 	{I2C_BOARD_INFO("ES7202_PDM_ADC_8", 0x37),},
1011*4882a593Smuzhiyun #endif
1012*4882a593Smuzhiyun };
1013*4882a593Smuzhiyun #endif
1014*4882a593Smuzhiyun static const struct of_device_id es7202_dt_ids[] = {
1015*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 0
1016*4882a593Smuzhiyun 	{.compatible = "ES7202_PDM_ADC_1",},
1017*4882a593Smuzhiyun #endif
1018*4882a593Smuzhiyun 
1019*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 2
1020*4882a593Smuzhiyun 	{.compatible = "ES7202_PDM_ADC_2",},
1021*4882a593Smuzhiyun #endif
1022*4882a593Smuzhiyun 
1023*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 4
1024*4882a593Smuzhiyun 	{.compatible = "ES7202_PDM_ADC_3",},
1025*4882a593Smuzhiyun #endif
1026*4882a593Smuzhiyun 
1027*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 6
1028*4882a593Smuzhiyun 	{.compatible = "ES7202_PDM_ADC_4",},
1029*4882a593Smuzhiyun #endif
1030*4882a593Smuzhiyun 
1031*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 8
1032*4882a593Smuzhiyun 	{.compatible = "ES7202_PDM_ADC_5",},
1033*4882a593Smuzhiyun #endif
1034*4882a593Smuzhiyun 
1035*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 10
1036*4882a593Smuzhiyun 	{.compatible = "ES7202_PDM_ADC_6",},
1037*4882a593Smuzhiyun #endif
1038*4882a593Smuzhiyun 
1039*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 12
1040*4882a593Smuzhiyun 	{.compatible = "ES7202_PDM_ADC_7",},
1041*4882a593Smuzhiyun #endif
1042*4882a593Smuzhiyun 
1043*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 14
1044*4882a593Smuzhiyun 	{.compatible = "ES7202_PDM_ADC_8",},
1045*4882a593Smuzhiyun #endif
1046*4882a593Smuzhiyun 	{}
1047*4882a593Smuzhiyun };
1048*4882a593Smuzhiyun #endif
1049*4882a593Smuzhiyun 
1050*4882a593Smuzhiyun static const struct i2c_device_id es7202_i2c_id[] = {
1051*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 0
1052*4882a593Smuzhiyun 	{"ES7202_PDM_ADC_1", 0},
1053*4882a593Smuzhiyun #endif
1054*4882a593Smuzhiyun 
1055*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 2
1056*4882a593Smuzhiyun 	{"ES7202_PDM_ADC_2", 1},
1057*4882a593Smuzhiyun #endif
1058*4882a593Smuzhiyun 
1059*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 4
1060*4882a593Smuzhiyun 	{"ES7202_PDM_ADC_3", 2},
1061*4882a593Smuzhiyun #endif
1062*4882a593Smuzhiyun 
1063*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 6
1064*4882a593Smuzhiyun 	{"ES7202_PDM_ADC_4", 3},
1065*4882a593Smuzhiyun #endif
1066*4882a593Smuzhiyun 
1067*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 8
1068*4882a593Smuzhiyun 	{"ES7202_PDM_ADC_5", 4},
1069*4882a593Smuzhiyun #endif
1070*4882a593Smuzhiyun 
1071*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 10
1072*4882a593Smuzhiyun 	{"ES7202_PDM_ADC_6", 5},
1073*4882a593Smuzhiyun #endif
1074*4882a593Smuzhiyun 
1075*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 12
1076*4882a593Smuzhiyun 	{"ES7202_PDM_ADC_7", 6},
1077*4882a593Smuzhiyun #endif
1078*4882a593Smuzhiyun 
1079*4882a593Smuzhiyun #if ES7202_CHANNELS_MAX > 14
1080*4882a593Smuzhiyun 	{"ES7202_PDM_ADC_8", 7},
1081*4882a593Smuzhiyun #endif
1082*4882a593Smuzhiyun 	{}
1083*4882a593Smuzhiyun };
1084*4882a593Smuzhiyun 
1085*4882a593Smuzhiyun static struct i2c_driver es7202_i2c_driver = {
1086*4882a593Smuzhiyun 	.driver = {
1087*4882a593Smuzhiyun 		.name		= "es7202",
1088*4882a593Smuzhiyun #if ES7202_MATCH_DTS_EN
1089*4882a593Smuzhiyun 		   .of_match_table = es7202_dt_ids,
1090*4882a593Smuzhiyun #endif
1091*4882a593Smuzhiyun 	},
1092*4882a593Smuzhiyun 	.probe    = es7202_i2c_probe,
1093*4882a593Smuzhiyun 	.remove   = es7202_i2c_remove,
1094*4882a593Smuzhiyun 	.shutdown = es7202_i2c_shutdown,
1095*4882a593Smuzhiyun 	.class = I2C_CLASS_HWMON,
1096*4882a593Smuzhiyun 	.id_table = es7202_i2c_id,
1097*4882a593Smuzhiyun #if !ES7202_MATCH_DTS_EN
1098*4882a593Smuzhiyun 	.address_list = es7202_i2c_addr,
1099*4882a593Smuzhiyun 	.detect = es7202_i2c_detect,
1100*4882a593Smuzhiyun #endif
1101*4882a593Smuzhiyun };
1102*4882a593Smuzhiyun 
es7202_modinit(void)1103*4882a593Smuzhiyun static int __init es7202_modinit(void)
1104*4882a593Smuzhiyun {
1105*4882a593Smuzhiyun 	int ret;
1106*4882a593Smuzhiyun //#if ES7202_MATCH_DTS_EN
1107*4882a593Smuzhiyun #if 0
1108*4882a593Smuzhiyun 	int i;
1109*4882a593Smuzhiyun 	struct i2c_adapter *adapter;
1110*4882a593Smuzhiyun 	struct i2c_client *client;
1111*4882a593Smuzhiyun #endif
1112*4882a593Smuzhiyun 
1113*4882a593Smuzhiyun //#if ES7202_MATCH_DTS_EN
1114*4882a593Smuzhiyun #if 0
1115*4882a593Smuzhiyun /*
1116*4882a593Smuzhiyun * Notes:
1117*4882a593Smuzhiyun * if the device has been declared in DTS tree,
1118*4882a593Smuzhiyun * here don't need to create new i2c device with i2c_board_info.
1119*4882a593Smuzhiyun */
1120*4882a593Smuzhiyun 	adapter = i2c_get_adapter(ES7202_I2C_BUS_NUM);
1121*4882a593Smuzhiyun 	if (!adapter) {
1122*4882a593Smuzhiyun 		printk("i2c_get_adapter() fail!\n");
1123*4882a593Smuzhiyun 		return -ENODEV;
1124*4882a593Smuzhiyun 	}
1125*4882a593Smuzhiyun 	printk("%s() begin0000", __func__);
1126*4882a593Smuzhiyun 
1127*4882a593Smuzhiyun 	for (i = 0; i < ADC_DEV_MAXNUM; i++) {
1128*4882a593Smuzhiyun 		client = i2c_new_device(adapter, &es7202_i2c_board_info[i]);
1129*4882a593Smuzhiyun 		printk("%s() i2c_new_device\n", __func__);
1130*4882a593Smuzhiyun 		if (!client)
1131*4882a593Smuzhiyun 			return -ENODEV;
1132*4882a593Smuzhiyun 	}
1133*4882a593Smuzhiyun 	i2c_put_adapter(adapter);
1134*4882a593Smuzhiyun #endif
1135*4882a593Smuzhiyun 	ret = i2c_add_driver(&es7202_i2c_driver);
1136*4882a593Smuzhiyun 	if (ret != 0)
1137*4882a593Smuzhiyun 		printk("Failed to register es7202 i2c driver : %d \n", ret);
1138*4882a593Smuzhiyun 	return ret;
1139*4882a593Smuzhiyun }
1140*4882a593Smuzhiyun 
1141*4882a593Smuzhiyun late_initcall(es7202_modinit);
1142*4882a593Smuzhiyun //module_init(es7202_modinit);
es7202_exit(void)1143*4882a593Smuzhiyun static void __exit es7202_exit(void)
1144*4882a593Smuzhiyun {
1145*4882a593Smuzhiyun 	i2c_del_driver(&es7202_i2c_driver);
1146*4882a593Smuzhiyun }
1147*4882a593Smuzhiyun 
1148*4882a593Smuzhiyun module_exit(es7202_exit);
1149*4882a593Smuzhiyun 
1150*4882a593Smuzhiyun MODULE_DESCRIPTION("ASoC es7202 pdm adc driver");
1151*4882a593Smuzhiyun MODULE_AUTHOR(" David Yang, <yangxiaohua@everest-semi.com>>");
1152*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
1153